Model { Name "ofdm_txrx_supermimo_coded" Version 7.7 MdlSubVersion 0 GraphicalInterface { NumRootInports 0 NumRootOutports 0 ParameterArgumentNames "" ComputedModelVersion "1.1631" NumModelReferences 0 NumTestPointedSignals 0 } SavedCharacterEncoding "windows-1252" PostLoadFcn "%bbReplace\nofdm_rx_supermimo_init" SaveDefaultBlockParams on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off DataTypeOverride "UseLocalSettings" DataTypeOverrideAppliesTo "AllNumericTypes" MinMaxOverflowLogging "UseLocalSettings" MinMaxOverflowArchiveMode "Overwrite" MaxMDLFileLineLength 120 InitFcn "ofdm_rx_supermimo_init" StartFcn "ofdm_rx_supermimo_init" Created "Sun Jun 14 16:43:05 2009" Creator "murphpo" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "murphpo" ModifiedDateFormat "%" LastModifiedDate "Thu Aug 30 12:51:18 2012" RTWModifiedTimeStamp 268230407 ModelVersionFormat "1.%" ConfigurationManager "None" SampleTimeColors off SampleTimeAnnotations off LibraryLinkDisplay "none" WideLines off ShowLineDimensions off ShowPortDataTypes on ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowSignalResolutionIcons on ShowViewerIcons on SortedOrder off ExecutionContextIcon off ShowLinearizationAnnotations on BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks on BrowserLookUnderMasks on SimulationMode "normal" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" TryForcingSFcnDF off RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on CovForceBlockReductionOff on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeVarName "covCumulativeData" CovCumulativeReport off CovReportOnPause on CovModelRefEnable "Off" CovExternalEMLEnable off ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on BufferReuse on ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 1 Version "1.11.0" Array { Type "Handle" Dimension 8 Simulink.SolverCC { $ObjectID 2 Version "1.11.0" StartTime "0.0" StopTime "2*simOnly_simLength" AbsTol "auto" FixedStep "auto" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ZcThreshold "auto" ConsecutiveZCsStepRelTol "10*128*eps" MaxConsecutiveZCs "1000" ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep "auto" MinStep "auto" MaxConsecutiveMinStep "1" RelTol "1e-3" SolverMode "SingleTasking" ConcurrentTasks off Solver "VariableStepDiscrete" SolverName "VariableStepDiscrete" SolverJacobianMethodControl "auto" ShapePreserveControl "DisableAll" ZeroCrossControl "UseLocalSettings" ZeroCrossAlgorithm "Nonadaptive" AlgebraicLoopSolver "TrustRegion" SolverResetMethod "Fast" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Unconstrained" InsertRTBMode "Whenever possible" } Simulink.DataIOCC { $ObjectID 3 Version "1.11.0" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints off MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveCompleteFinalSimState off SaveFormat "Array" SignalLoggingSaveFormat "ModelDataLogs" SaveOutput off SaveState off SignalLogging off DSMLogging on InspectSignalLogs off SaveTime off ReturnWorkspaceOutputs off StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "logsout" DSMLoggingName "dsmout" OutputOption "RefineOutputTimes" OutputTimes "[]" ReturnWorkspaceOutputsName "out" Refine "1" } Simulink.OptimizationCC { $ObjectID 4 Version "1.11.0" Array { Type "Cell" Dimension 4 Cell "ZeroExternalMemoryAtStartup" Cell "ZeroInternalMemoryAtStartup" Cell "NoFixptDivByZeroProtection" Cell "OptimizeModelRefInitCode" PropName "DisabledProps" } BlockReduction on BooleanDataType on ConditionallyExecuteInputs on InlineParams on UseIntDivNetSlope off UseSpecifiedMinMax off InlineInvariantSignals off OptimizeBlockIOStorage on BufferReuse on EnhancedBackFolding off StrengthReduction off ExpressionFolding on BooleansAsBitfields off BitfieldContainerType "uint_T" EnableMemcpy on MemcpyThreshold 64 PassReuseOutputArgsAs "Structure reference" ExpressionDepthLimit 2147483647 FoldNonRolledExpr on LocalBlockOutputs on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero on NoFixptDivByZeroProtection off EfficientFloat2IntCast off EfficientMapNaN2IntZero on OptimizeModelRefInitCode off LifeSpan "inf" MaxStackSize "Inherit from target" BufferReusableBoundary on SimCompilerOptimization "Off" AccelVerboseBuild off AccelParallelForEachSubsystem on } Simulink.DebuggingCC { $ObjectID 5 Version "1.11.0" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" SignalInfNanChecking "none" SignalRangeChecking "none" ReadBeforeWriteMsg "UseLocalSettings" WriteAfterWriteMsg "UseLocalSettings" WriteAfterReadMsg "UseLocalSettings" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" SaveWithDisabledLinksMsg "warning" SaveWithParameterizedLinksMsg "none" CheckSSInitialOutputMsg on UnderspecifiedInitializationDetection "Classic" MergeDetectMultiDrivingBlocksExec "none" CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "UseLocalSettings" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" TimeAdjustmentMsg "none" MaxConsecutiveZCsMsg "error" MaskedZcDiagnostic "warning" IgnoredZcDiagnostic "warning" SolverPrmCheckMsg "warning" InheritedTsInSrcMsg "warning" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "error" MultiTaskCondExecSysMsg "error" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" SigSpecEnsureSampleTimeMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "warning" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterUnderflowMsg "none" ParameterPrecisionLossMsg "warning" ParameterTunabilityLossMsg "warning" FixptConstUnderflowMsg "none" FixptConstOverflowMsg "none" FixptConstPrecisionLossMsg "none" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Use local settings" SignalLabelMismatchMsg "none" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" SFcnCompatibilityMsg "none" UniqueDataStoreMsg "none" BusObjectLabelMismatch "warning" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceMultiInstanceNormalModeStructChecksumCheck "error" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" ModelReferenceExtraNoncontSigs "error" StateNameClashWarn "warning" SimStateInterfaceChecksumMismatchMsg "warning" SimStateOlderReleaseMsg "error" InitInArrayFormatMsg "warning" StrictBusMsg "Warning" BusNameAdapt "WarnAndRepair" NonBusSignalsTreatedAsBus "none" LoggingUnavailableSignals "error" BlockIODiagnostic "none" SFUnusedDataAndEventsDiag "warning" SFUnexpectedBacktrackingDiag "warning" SFInvalidInputDataAccessInChartInitDiag "warning" SFNoUnconditionalDefaultTransitionDiag "warning" SFTransitionOutsideNaturalParentDiag "warning" } Simulink.HardwareCC { $ObjectID 6 Version "1.11.0" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 32 ProdBitPerLong 32 ProdBitPerFloat 32 ProdBitPerDouble 64 ProdBitPerPointer 32 ProdLargestAtomicInteger "Char" ProdLargestAtomicFloat "None" ProdIntDivRoundTo "Undefined" ProdEndianess "Unspecified" ProdWordSize 32 ProdShiftRightIntArith on ProdHWDeviceType "32-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetBitPerFloat 32 TargetBitPerDouble 64 TargetBitPerPointer 32 TargetLargestAtomicInteger "Char" TargetLargestAtomicFloat "None" TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "Specified" TargetUnknown off ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 7 Version "1.11.0" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" EnableParallelModelReferenceBuilds off ParallelModelReferenceErrorOnInvalidPool on ParallelModelReferenceMATLABWorkerInit "None" ModelReferenceNumInstancesAllowed "Multi" PropagateVarSize "Infer from blocks in model" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off PropagateSignalLabelsOutOfModel off SupportModelReferenceSimTargetCustomCode off } Simulink.SFSimCC { $ObjectID 8 Version "1.11.0" SFSimEnableDebug on SFSimOverflowDetection on SFSimEcho on SimBlas on SimCtrlC on SimExtrinsic on SimIntegrity on SimUseLocalCustomCode off SimParseCustomCode on SimBuildMode "sf_incremental_build" } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 9 Version "1.11.0" Array { Type "Cell" Dimension 6 Cell "IncludeHyperlinkInReport" Cell "GenerateTraceInfo" Cell "GenerateTraceReport" Cell "GenerateTraceReportSl" Cell "GenerateTraceReportSf" Cell "GenerateTraceReportEml" PropName "DisabledProps" } SystemTargetFile "grt.tlc" GenCodeOnly off MakeCommand "make_rtw" GenerateMakefile on TemplateMakefile "grt_default_tmf" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ConfigAtBuild off RTWUseLocalCustomCode off RTWUseSimCustomCode off IncludeHyperlinkInReport off LaunchReport off TargetLang "C" IncludeBusHierarchyInRTWFileBlockHierarchyMap off IncludeERTFirstTime off GenerateTraceInfo off GenerateTraceReport off GenerateTraceReportSl off GenerateTraceReportSf off GenerateTraceReportEml off GenerateCodeInfo off GenerateSLWebview off GenerateCodeMetricsReport off RTWCompilerOptimization "Off" CheckMdlBeforeBuild "Off" CustomRebuildMode "OnUpdate" Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 10 Version "1.11.0" Array { Type "Cell" Dimension 16 Cell "IgnoreCustomStorageClasses" Cell "InsertBlockDesc" Cell "SFDataObjDesc" Cell "SimulinkDataObjDesc" Cell "DefineNamingRule" Cell "SignalNamingRule" Cell "ParamNamingRule" Cell "InlinedPrmAccess" Cell "CustomSymbolStr" Cell "CustomSymbolStrGlobalVar" Cell "CustomSymbolStrType" Cell "CustomSymbolStrField" Cell "CustomSymbolStrFcn" Cell "CustomSymbolStrBlkIO" Cell "CustomSymbolStrTmpVar" Cell "CustomSymbolStrMacro" PropName "DisabledProps" } ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses on IgnoreTestpoints off IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off MATLABFcnDesc off IncDataTypeInIds off MangleLength 1 CustomSymbolStrGlobalVar "$R$N$M" CustomSymbolStrType "$N$R$M" CustomSymbolStrField "$N$M" CustomSymbolStrFcn "$R$N$M$F" CustomSymbolStrFcnArg "rt$I$N$M" CustomSymbolStrBlkIO "rtb_$N$M" CustomSymbolStrTmpVar "$N$M" CustomSymbolStrMacro "$R$N$M" DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off InsertPolySpaceComments off SimulinkBlockComments on MATLABSourceComments off EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off UseSimReservedNames off } Simulink.GRTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 11 Version "1.11.0" Array { Type "Cell" Dimension 15 Cell "IncludeMdlTerminateFcn" Cell "CombineOutputUpdateFcns" Cell "SuppressErrorStatus" Cell "ERTCustomFileBanners" Cell "GenerateSampleERTMain" Cell "GenerateTestInterfaces" Cell "ModelStepFunctionPrototypeControlCompliant" Cell "CPPClassGenCompliant" Cell "MultiInstanceERTCode" Cell "PurelyIntegerCode" Cell "PortableWordSizes" Cell "SupportComplex" Cell "SupportAbsoluteTime" Cell "SupportContinuousTime" Cell "SupportNonInlinedSFcns" PropName "DisabledProps" } TargetFcnLib "ansi_tfl_table_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" TargetFunctionLibrary "ANSI_C" UtilityFuncGeneration "Auto" ERTMultiwordTypeDef "System defined" FunctionExecutionProfile off CodeExecutionProfiling off ERTCodeCoverageTool "None" ERTMultiwordLength 256 MultiwordLength 2048 GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant on ParMdlRefBuildCompliant on CompOptLevelCompliant on IncludeMdlTerminateFcn on GeneratePreprocessorConditionals "Disable all" CombineOutputUpdateFcns off CombineSignalStateStructs off SuppressErrorStatus off ERTFirstTimeCompliant off IncludeFileDelimiter "Auto" ERTCustomFileBanners off SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging on MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime on SupportNonInlinedSFcns on SupportVariableSizeSignals off EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off CPPClassGenCompliant off AutosarCompliant off UseMalloc off ExtMode off ExtModeStaticAlloc off ExtModeTesting off ExtModeStaticAllocSize 1000000 ExtModeTransport 0 ExtModeMexFile "ext_comm" ExtModeIntrfLevel "Level1" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off RTWCAPIRootIO off GenerateASAP2 off } PropName "Components" } } PropName "Components" } Name "Configuration" CurrentDlgPage "Solver" ConfigPrmDlgPosition [ 836, 462, 1724, 1119 ] } PropName "ConfigurationSets" } Simulink.ConfigSet { $PropName "ActiveConfigurationSet" $ObjectID 1 } BlockDefaults { ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on BlockRotation 0 BlockMirror off } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" UseDisplayTextAsClickCallback off } LineDefaults { FontName "Helvetica" FontSize 9 FontWeight "normal" FontAngle "normal" } BlockParameterDefaults { Block { BlockType BusCreator Inputs "4" DisplayOption "none" OutDataTypeStr "Inherit: auto" NonVirtualBus off } Block { BlockType BusSelector OutputAsBus off } Block { BlockType ComplexToMagnitudeAngle Output "Magnitude and angle" SampleTime "-1" } Block { BlockType ComplexToRealImag Output "Real and imag" SampleTime "-1" } Block { BlockType Constant Value "1" VectorParams1D on SamplingMode "Sample based" OutMin "[]" OutMax "[]" OutDataTypeStr "Inherit: Inherit from 'Constant value'" LockScale off SampleTime "inf" FramePeriod "inf" PreserveConstantTs off } Block { BlockType DiscretePulseGenerator PulseType "Sample based" TimeSource "Use simulation time" Amplitude "1" Period "2" PulseWidth "1" PhaseDelay "0" SampleTime "1" VectorParams1D on } Block { BlockType Display Format "short" Decimation "10" Floating off SampleTime "-1" } Block { BlockType From IconDisplay "Tag" TagVisibility "local" } Block { BlockType FromWorkspace VariableName "simulink_input" SampleTime "-1" Interpolate on ZeroCross off OutputAfterFinalValue "Extrapolation" } Block { BlockType Gain Gain "1" Multiplication "Element-wise(K.*u)" ParamMin "[]" ParamMax "[]" ParamDataTypeStr "Inherit: Same as input" OutMin "[]" OutMax "[]" OutDataTypeStr "Inherit: Same as input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Goto IconDisplay "Tag" } Block { BlockType Inport Port "1" OutputFunctionCall off OutMin "[]" OutMax "[]" OutDataTypeStr "Inherit: auto" LockScale off BusOutputAsStruct off PortDimensions "-1" VarSizeSig "Inherit" SampleTime "-1" SignalType "auto" SamplingMode "auto" LatchByDelayingOutsideSignal off LatchInputForFeedbackSignals off Interpolate on } Block { BlockType Mux Inputs "4" DisplayOption "none" UseBusObject off BusObject "BusObject" NonVirtualBus off } Block { BlockType Outport Port "1" OutMin "[]" OutMax "[]" OutDataTypeStr "Inherit: auto" LockScale off BusOutputAsStruct off PortDimensions "-1" VarSizeSig "Inherit" SampleTime "-1" SignalType "auto" SamplingMode "auto" SourceOfInitialOutputValue "Dialog" OutputWhenDisabled "held" InitialOutput "[]" } Block { BlockType Product Inputs "2" Multiplication "Element-wise(.*)" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on OutMin "[]" OutMax "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Zero" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType RealImagToComplex Input "Real and imag" ConstantPart "0" SampleTime "-1" } Block { BlockType RelationalOperator Operator ">=" InputSameDT on OutDataTypeStr "Inherit: Logical (see Configuration Parameters: Optimization)" ZeroCross on SampleTime "-1" } Block { BlockType Scope ModelBased off TickLabels "OneTimeTick" ZoomMode "on" Grid "on" TimeRange "auto" YMin "-5" YMax "5" SaveToWorkspace off SaveName "ScopeData" LimitDataPoints on MaxDataPoints "5000" Decimation "1" SampleInput off SampleTime "-1" } Block { BlockType Step Time "1" Before "0" After "1" SampleTime "-1" VectorParams1D on ZeroCross on } Block { BlockType SubSystem ShowPortLabels "FromPortIcon" Permissions "ReadWrite" PermitHierarchicalResolution "All" TreatAsAtomicUnit off CheckFcnCallInpInsideContextMsg off SystemSampleTime "-1" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" SimViewingDevice off DataTypeOverride "UseLocalSettings" DataTypeOverrideAppliesTo "AllNumericTypes" MinMaxOverflowLogging "UseLocalSettings" Variant off GeneratePreprocessorConditionals off } Block { BlockType Sum IconShape "rectangular" Inputs "++" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on AccumDataTypeStr "Inherit: Inherit via internal rule" OutMin "[]" OutMax "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Switch Criteria "u2 >= Threshold" Threshold "0" InputSameDT on OutMin "[]" OutMax "[]" OutDataTypeStr "Inherit: Inherit via internal rule" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on ZeroCross on SampleTime "-1" AllowDiffInputSizes off } Block { BlockType Terminator } Block { BlockType ZeroOrderHold SampleTime "1" } } System { Name "ofdm_txrx_supermimo_coded" Location [202, 70, 1424, 851] Open on ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "227" ReportName "simulink-default.rpt" SIDHighWatermark "10216" Block { BlockType Reference Name " System Generator" SID "1" Tag "genX" Ports [] Position [251, 127, 296, 172] ShowName off AttributesFormatString "System\\nGenerator" LibraryVersion "1.2" UserDataPersistent on UserData "DataTag0" SourceBlock "xbsIndex_r4/ System Generator" SourceType "Xilinx System Generator Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" GeneratePreprocessorConditionals off infoedit " System Generator" xilinxfamily "virtex4" part "xc4vfx100" speed "-11" package "ff1517" synthesis_tool "XST" clock_wrapper "Clock Enables" directory "./OFDM_txrx_SG13_V4_v18_0" proj_type "Project Navigator" Synth_file "XST Defaults" Impl_file "ISE Defaults" testbench off simulink_period "1" sysclk_period "10" dcm_input_clock_period "100" incr_netlist off trim_vbits "Everywhere in SubSystem" dbl_ovrd "According to Block Masks" core_generation "According to Block Masks" run_coregen off deprecated_control off eval_field "0" has_advanced_control "0" sggui_pos "326,241,464,470" block_type "sysgen" block_version "10.1.3" sg_icon_stat "45,45,0,0,token,white,0,58c5b5770fe5f7c311f53dbc6e73f0f6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 45 45 0 ],[1 1 1 ]" ");\npatch([1.975 14.98 23.98 32.98 41.98 23.98 10.975 1.975 ],[31.99 31.99 40.99 31.99 40.99 40.99 40.99 31.99 ]" ",[0.933333 0.203922 0.141176 ]);\npatch([10.975 23.98 14.98 1.975 10.975 ],[22.99 22.99 31.99 31.99 22.99 ],[0.6" "98039 0.0313725 0.219608 ]);\npatch([1.975 14.98 23.98 10.975 1.975 ],[13.99 13.99 22.99 22.99 13.99 ],[0.933333" " 0.203922 0.141176 ]);\npatch([10.975 41.98 32.98 23.98 14.98 1.975 10.975 ],[4.99 4.99 13.99 4.99 13.99 13.99 4" ".99 ],[0.698039 0.0313725 0.219608 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic" "on text');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "\"Channel\"" SID "2" Ports [4, 4] Position [160, 36, 250, 99] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskDescription "This block implements a simple static 2x2 channel. The one parameter sets the 2x2 channel" " matrix. h=[1 0;0 1] would be perfectly orthogonal channels. The norm of the matrix should be 1 to avoid overflo" "w." MaskPromptString "2x2 Channel Matrix|Freq Offset A (phase inc [0,1])|Freq Offset B (phase inc [0,1])|SNR (" "dB)|Phase Noise (dBc @ 100Hz)" MaskStyleString "edit,edit,edit,edit,edit" MaskVariables "h=@1;freqOffsetA=@2;freqOffsetB=@3;awgnSNR=@4;phNoise=@5;" MaskTunableValueString "on,on,on,on,on" MaskCallbackString "||||" MaskEnableString "on,on,on,on,on" MaskVisibilityString "on,on,on,on,on" MaskToolTipString "on,on,on,on,on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "channel_h %[1 0; 0 0] * 0.65 % [1 0; 0 0] * 0.5|7.5e-4|0|40|-5000" System { Name "\"Channel\"" Location [160, 74, 1868, 1156] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "136" Block { BlockType Inport Name "AntA I" SID "3" Position [80, 183, 110, 197] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "AntA Q" SID "4" Position [80, 218, 110, 232] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "AntB I" SID "5" Position [80, 258, 110, 272] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "AntB Q" SID "6" Position [80, 293, 110, 307] Port "4" IconDisplay "Port number" } Block { BlockType Sum Name "Add" SID "9" Ports [2, 1] Position [845, 43, 875, 107] ShowName off Inputs "+-" InputSameDT off OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Add1" SID "10" Ports [2, 1] Position [845, 108, 875, 172] ShowName off Inputs "+-" InputSameDT off OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType ComplexToMagnitudeAngle Name "Complex to\nMagnitude-Angle" SID "11" Ports [1, 2] Position [765, 38, 795, 67] ShowName off Output "Magnitude and angle" } Block { BlockType ComplexToMagnitudeAngle Name "Complex to\nMagnitude-Angle1" SID "12" Ports [1, 2] Position [765, 68, 795, 97] ShowName off Output "Magnitude and angle" } Block { BlockType ComplexToMagnitudeAngle Name "Complex to\nMagnitude-Angle2" SID "13" Ports [1, 2] Position [765, 103, 795, 132] ShowName off Output "Magnitude and angle" } Block { BlockType ComplexToMagnitudeAngle Name "Complex to\nMagnitude-Angle3" SID "14" Ports [1, 2] Position [765, 133, 795, 162] ShowName off Output "Magnitude and angle" } Block { BlockType ComplexToRealImag Name "Complex to\nReal-Imag1" SID "15" Ports [1, 2] Position [900, 193, 930, 222] ShowName off Output "Real and imag" } Block { BlockType ComplexToRealImag Name "Complex to\nReal-Imag2" SID "16" Ports [1, 2] Position [900, 268, 930, 297] ShowName off Output "Real and imag" } Block { BlockType SubSystem Name "Delays" SID "17" Ports [2, 2] Position [270, 172, 310, 323] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Delays" Location [182, 138, 657, 507] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" SID "18" Position [75, 193, 105, 207] IconDisplay "Port number" } Block { BlockType Inport Name "In2" SID "19" Position [45, 253, 75, 267] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out1" SID "22" Position [300, 193, 330, 207] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" SID "23" Position [300, 253, 330, 267] Port "2" IconDisplay "Port number" } Line { SrcBlock "In1" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "Out2" DstPort 1 } } } Block { BlockType SubSystem Name "Freq Offset" SID "24" Ports [2, 2] Position [340, 173, 380, 322] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Freq Offset" Location [527, 287, 832, 584] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" SID "25" Position [255, 138, 285, 152] IconDisplay "Port number" } Block { BlockType Inport Name "In2" SID "26" Position [290, 358, 320, 372] Port "2" IconDisplay "Port number" } Block { BlockType Goto Name "Goto1" SID "27" Position [605, 242, 710, 268] ShowName off GotoTag "freqOffset" TagVisibility "global" } Block { BlockType Product Name "Product4" SID "28" Ports [2, 1] Position [310, 167, 340, 198] ShowName off InputSameDT off OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Product5" SID "29" Ports [2, 1] Position [310, 277, 340, 308] ShowName off InputSameDT off OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType RealImagToComplex Name "Real-Imag to\nComplex" SID "9229" Ports [2, 1] Position [205, 386, 235, 459] ZOrder -21 Input "Real and imag" } Block { BlockType RealImagToComplex Name "Real-Imag to\nComplex1" SID "9234" Ports [2, 1] Position [205, 181, 235, 254] ZOrder -21 Input "Real and imag" } Block { BlockType Outport Name "Out1" SID "32" Position [515, 138, 545, 152] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" SID "33" Position [425, 358, 455, 372] Port "2" IconDisplay "Port number" } Line { Points [290, 175] DstBlock "Product4" DstPort 1 } Line { Points [290, 285] DstBlock "Product5" DstPort 1 } Line { SrcBlock "Real-Imag to\nComplex1" SrcPort 1 Points [55, 0] Branch { DstBlock "Product4" DstPort 2 } Branch { Points [0, 35] DstBlock "Goto1" DstPort 1 } } Line { SrcBlock "Product4" SrcPort 1 Points [165, 0] } Line { SrcBlock "Product5" SrcPort 1 Points [165, 0] } Line { SrcBlock "Real-Imag to\nComplex" SrcPort 1 Points [40, 0; 0, -120] DstBlock "Product5" DstPort 2 } Line { SrcBlock "In1" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "Out2" DstPort 1 } Annotation { Name "Optional additive carrier\nModels effects of DC-offsets at Tx/Rx\nSet gain=0.15 for realistic offs" "et" Position [499, 351] HorizontalAlignment "left" } } } Block { BlockType Gain Name "Gain" SID "34" Position [475, 195, 505, 225] ShowName off ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain1" SID "35" Position [475, 270, 505, 300] ShowName off ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType SubSystem Name "MIMO \"Channel\"" SID "38" Ports [2, 2] Position [405, 172, 445, 323] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MIMO \"Channel\"" Location [182, 138, 657, 507] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" SID "39" Position [30, 138, 60, 152] IconDisplay "Port number" } Block { BlockType Inport Name "In2" SID "40" Position [25, 213, 55, 227] Port "2" IconDisplay "Port number" } Block { BlockType Sum Name "Add" SID "41" Ports [2, 1] Position [345, 135, 375, 235] ShowName off InputSameDT off OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Add1" SID "42" Ports [2, 1] Position [345, 245, 375, 345] ShowName off InputSameDT off OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Constant Name "Constant" SID "43" Position [115, 156, 160, 184] ShowName off Value "h(1,1)" } Block { BlockType Constant Name "Constant1" SID "44" Position [115, 181, 160, 209] ShowName off Value "h(2,1)" } Block { BlockType Constant Name "Constant2" SID "45" Position [115, 266, 160, 294] ShowName off Value "h(1,2)" } Block { BlockType Constant Name "Constant3" SID "46" Position [115, 291, 160, 319] ShowName off Value "h(2,2)" } Block { BlockType Display Name "Display" SID "47" Ports [1] Position [360, 28, 450, 52] ShowName off Decimation "1" Lockdown off } Block { BlockType Display Name "Display1" SID "48" Ports [1] Position [360, 53, 450, 77] ShowName off Decimation "1" Lockdown off } Block { BlockType Display Name "Display2" SID "49" Ports [1] Position [360, 78, 450, 102] ShowName off Decimation "1" Lockdown off } Block { BlockType Display Name "Display3" SID "50" Ports [1] Position [360, 103, 450, 127] ShowName off Decimation "1" Lockdown off } Block { BlockType Product Name "Product" SID "51" Ports [2, 1] Position [255, 134, 285, 181] ShowName off InputSameDT off OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Product1" SID "52" Ports [2, 1] Position [255, 184, 285, 231] ShowName off InputSameDT off OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Product2" SID "53" Ports [2, 1] Position [255, 244, 285, 291] ShowName off InputSameDT off OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Product3" SID "54" Ports [2, 1] Position [255, 294, 285, 341] ShowName off InputSameDT off OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "Out1" SID "55" Position [400, 178, 430, 192] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" SID "56" Position [400, 288, 430, 302] Port "2" IconDisplay "Port number" } Line { SrcBlock "Constant" SrcPort 1 Points [0, 0; 40, 0] Branch { DstBlock "Product" DstPort 2 } Branch { Points [0, -130] DstBlock "Display" DstPort 1 } } Line { SrcBlock "Product" SrcPort 1 DstBlock "Add" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Product" DstPort 1 } Branch { Points [0, 110] DstBlock "Product2" DstPort 1 } } Line { SrcBlock "In2" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Product1" DstPort 2 } Branch { Points [0, 110] DstBlock "Product3" DstPort 2 } } Line { SrcBlock "Constant1" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Product1" DstPort 1 } Branch { Points [0, -130] DstBlock "Display1" DstPort 1 } } Line { SrcBlock "Product1" SrcPort 1 DstBlock "Add" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 Points [0, 0; 50, 0] Branch { DstBlock "Product2" DstPort 2 } Branch { Points [0, -190] DstBlock "Display2" DstPort 1 } } Line { SrcBlock "Product2" SrcPort 1 DstBlock "Add1" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 Points [0, 0; 55, 0] Branch { DstBlock "Product3" DstPort 1 } Branch { Points [0, -190] DstBlock "Display3" DstPort 1 } } Line { SrcBlock "Product3" SrcPort 1 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Add" SrcPort 1 Points [0, 0] DstBlock "Out1" DstPort 1 } Line { SrcBlock "Add1" SrcPort 1 Points [0, 0] DstBlock "Out2" DstPort 1 } } } Block { BlockType RealImagToComplex Name "Real-Imag to\nComplex" SID "59" Ports [2, 1] Position [205, 174, 235, 241] ShowName off Input "Real and imag" } Block { BlockType RealImagToComplex Name "Real-Imag to\nComplex1" SID "60" Ports [2, 1] Position [205, 249, 235, 316] ShowName off Input "Real and imag" } Block { BlockType ZeroOrderHold Name "Zero-Order\nHold" SID "61" Position [135, 175, 170, 205] } Block { BlockType ZeroOrderHold Name "Zero-Order\nHold1" SID "62" Position [135, 210, 170, 240] } Block { BlockType ZeroOrderHold Name "Zero-Order\nHold2" SID "63" Position [135, 250, 170, 280] } Block { BlockType ZeroOrderHold Name "Zero-Order\nHold3" SID "64" Position [135, 285, 170, 315] } Block { BlockType Outport Name " AntA I" SID "65" Position [1035, 193, 1065, 207] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name " AntA Q" SID "66" Position [1035, 208, 1065, 222] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name " AntB I" SID "67" Position [1040, 268, 1070, 282] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name " AntB Q" SID "68" Position [1040, 283, 1070, 297] Port "4" IconDisplay "Port number" } Line { SrcBlock "AntA I" SrcPort 1 DstBlock "Zero-Order\nHold" DstPort 1 } Line { SrcBlock "AntA Q" SrcPort 1 DstBlock "Zero-Order\nHold1" DstPort 1 } Line { SrcBlock "AntB I" SrcPort 1 DstBlock "Zero-Order\nHold2" DstPort 1 } Line { SrcBlock "AntB Q" SrcPort 1 DstBlock "Zero-Order\nHold3" DstPort 1 } Line { SrcBlock "Complex to\nReal-Imag1" SrcPort 1 DstBlock " AntA I" DstPort 1 } Line { SrcBlock "Complex to\nReal-Imag1" SrcPort 2 DstBlock " AntA Q" DstPort 1 } Line { SrcBlock "Complex to\nReal-Imag2" SrcPort 1 DstBlock " AntB I" DstPort 1 } Line { SrcBlock "Complex to\nReal-Imag2" SrcPort 2 DstBlock " AntB Q" DstPort 1 } Line { SrcBlock "Gain" SrcPort 1 Points [90, 0] Branch { Points [0, -155] DstBlock "Complex to\nMagnitude-Angle" DstPort 1 } Branch { Points [125, 0] Branch { Points [0, -125] DstBlock "Complex to\nMagnitude-Angle1" DstPort 1 } Branch { DstBlock "Complex to\nReal-Imag1" DstPort 1 } } } Line { SrcBlock "Gain1" SrcPort 1 Points [95, 0] Branch { Points [0, -165] DstBlock "Complex to\nMagnitude-Angle2" DstPort 1 } Branch { Points [125, 0] Branch { Points [0, -135] DstBlock "Complex to\nMagnitude-Angle3" DstPort 1 } Branch { DstBlock "Complex to\nReal-Imag2" DstPort 1 } } } Line { SrcBlock "Real-Imag to\nComplex" SrcPort 1 DstBlock "Delays" DstPort 1 } Line { SrcBlock "Real-Imag to\nComplex1" SrcPort 1 DstBlock "Delays" DstPort 2 } Line { SrcBlock "Zero-Order\nHold1" SrcPort 1 DstBlock "Real-Imag to\nComplex" DstPort 2 } Line { SrcBlock "Zero-Order\nHold2" SrcPort 1 DstBlock "Real-Imag to\nComplex1" DstPort 1 } Line { SrcBlock "Zero-Order\nHold3" SrcPort 1 DstBlock "Real-Imag to\nComplex1" DstPort 2 } Line { SrcBlock "Zero-Order\nHold" SrcPort 1 DstBlock "Real-Imag to\nComplex" DstPort 1 } Line { SrcBlock "Complex to\nMagnitude-Angle" SrcPort 2 DstBlock "Add" DstPort 1 } Line { SrcBlock "Complex to\nMagnitude-Angle1" SrcPort 2 DstBlock "Add" DstPort 2 } Line { SrcBlock "Complex to\nMagnitude-Angle2" SrcPort 2 DstBlock "Add1" DstPort 1 } Line { SrcBlock "Complex to\nMagnitude-Angle3" SrcPort 2 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Delays" SrcPort 1 DstBlock "Freq Offset" DstPort 1 } Line { SrcBlock "Delays" SrcPort 2 DstBlock "Freq Offset" DstPort 2 } Line { SrcBlock "MIMO \"Channel\"" SrcPort 1 DstBlock "Gain" DstPort 1 } Line { SrcBlock "MIMO \"Channel\"" SrcPort 2 DstBlock "Gain1" DstPort 1 } Line { SrcBlock "Freq Offset" SrcPort 1 DstBlock "MIMO \"Channel\"" DstPort 1 } Line { SrcBlock "Freq Offset" SrcPort 2 DstBlock "MIMO \"Channel\"" DstPort 2 } Annotation { Name "Phase Noise\nblocks were here" Position [666, 246] } Annotation { Name "AWGN\nblocks were here" Position [806, 246] } } } Block { BlockType SubSystem Name "Changelog" SID "69" Ports [] Position [329, 127, 372, 172] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Changelog" Location [296, 728, 814, 918] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "202" Block { BlockType SubSystem Name "Through PHY 3.00i" SID "70" Ports [] Position [15, 50, 82, 70] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Through PHY 3.00i" Location [433, 403, 931, 703] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "222" Annotation { Name "Export 2.01.r:\n-Yet another pilot phase fix" Position [31, 23] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.s:\n-Disabled the CFO correction filter (to save multipliers in the V4)" Position [31, 43] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.t:\n-Changed SISO H_BB matrix value to 1 (from 0.5+0.5j)" Position [31, 68] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "========================================\nStarting iterations for pre-spin/DF support" Position [31, 93] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.a:\n-Started from 2.01.t (PHY for refdes14.1_fpgaV2_public)\n-Re-generated memmap (sim" "s are faster w/out EDK Processor block)\n-Removed nearly all scopes (faster sims, less memory consumption)\n-Re" "moved match6/7 blocks and localHeader buffer in autoResponse system (we never used this,\n after figuring the " "flagA/flagB actions/conditions were enough)\n-Removed CFO PI filter\n-Moved phase normalization to immediately " "after pilot arctan\n-Completely redesigned pilot insertion logic and phase estimation/tracking logic. Pilots in" " Alamouti mode\n are now interleaved in frequency, not time. Phase error corrections are applied to the curre" "nt symbol,\n not the next one. Overall improvement in EVM should be good, especially in Alamouti mode.\n-Fixe" "d checksum bug in random payload mode (payloads were being flagged as all bad)\n-Added readback registers for p" "ilot-based and coarse CFO estimates\n-Added readback register for whether A and B channels are used in pilot ph" "ase calculation (Alamouti mode only)" Position [31, 138] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.b:\n-Added FFT overflow/AGC/pkt signals to ChipScope" Position [31, 198] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.c:\n-Fixed pilot selection for single-path Alamouti" Position [31, 228] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.d:\n-Added CFO pre-spin blocks\n -Multipliers in Tx path, before filters\n -Pilot-ba" "sed CFO estimator\n -Per-packet-buffer CFO capture buffer" Position [31, 268] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.e:\n-Changed pre-spin mults to conj-mults" Position [36, 303] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.f:\n-Added pktDetection event counter\n-Added logic to capture random Tx payloads to a" " pkt buffer\n-Shifted autoTx delay up one bit (user's 8 bits are [8:1] of 9-bit delay)\n-Fixed antB conj mult (" "was conjugating wrong argument)" Position [36, 338] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.g:\n-Fixed autoTx delay comparison (to < instead of <=, so that Tx isn't always being " "asserted)" Position [36, 373] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.h:\n-Fixed latency on pilotCFOest_en signals, bumped CFO capture buffer to T=1\n-Fixed" " autoTx delay counter (now 9 bits, matching delay param)\n-Updated LFSR polynomial" Position [36, 398] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.i:\n-Redesigned pilot pre-CFO calculator, to use all received phases instead of trying" " to average just the last N." Position [36, 433] HorizontalAlignment "left" FontName "Arial" FontSize 6 } } } Block { BlockType SubSystem Name "Through PHY 3.00u" SID "71" Ports [] Position [15, 85, 82, 105] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Through PHY 3.00u" Location [433, 403, 931, 703] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "222" Annotation { Name "Export 3.00.j:\n-Fixed bug in pilot-CFO calc (added reset to unwrapping counter)" Position [16, 18] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.k:\n-Fixed bug in random payload generation/recording (LFSR en toggled only once per p" "kt in 3.00j)" Position [16, 43] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.l:\n-Fixed random payload mode (again) so capture & checksums will work." Position [16, 68] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.m:\n-Added precision and multiplication correction factor to pilotCFO estimator, based" " on experimental tests." Position [16, 98] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.n:\n-Added AutoTwoTx circuit, to optionally transmit every user-initiated packet twice" " with programmed delay\n-Added external PktDetReset input to hold Rx PHY in reset via GPIO" Position [16, 128] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.o:\n-Fixed timing of AutoTwoTx\n-Added autoResponse action to force Tx antenna swap\n-" "Added optional circuit to calculate/store channel magnitudes (and not raw I/Q)" Position [16, 163] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.p:\n-Added hooks to disable random payload generation for autoResponse and autoTwoTx t" "ransmissions\n (don't want new payloads for slot2 when testing PHY stuff)\n-Fixed pktBuf mixup on autoTwoTx t" "ransissions (shouldn't use autoResponse pktBuf assignment)" Position [16, 208] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.q:\n-Rearranged coarse CFO calc (moved 1/2pi scaling just after arctan)\n-Added coarse" "CFO correction adder" Position [21, 253] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.r:\n-Added coarseCFO correction register to EDK processor block (was omitted in q)" Position [21, 288] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.t:\n-Redesigned checksum subsystems; header now has real CRC-16, full packet has real " "CRC-32" Position [21, 338] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.s:\n-Re-export of 3.00r with logic multiliers for V4 project" Position [21, 313] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.u:\n-Added EVM buffers\n -One summing all EVM for a given subcarrier across symbols\n" " -One summing EVM across all subcarriers per symbol\n-Changed antB preamble shift to add (delay relative to an" "tA)\n-Changed autoResponder delay to 9 bits {user8, 0}, so each user bit is a sample delay\n-Renamed coarseCFO " "correction register" Position [21, 373] HorizontalAlignment "left" FontName "Arial" FontSize 6 } } } Block { BlockType SubSystem Name "Through PHY 3.01f" SID "72" Ports [] Position [15, 125, 82, 145] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Through PHY 3.01f" Location [433, 403, 931, 703] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "263" Annotation { Name "Export 3.00.v:\n-Fixed EVM-per-sc logic to reset at start of each Rx packet" Position [31, 18] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.w:\n-Fixed autoResponder timing (new CRC blocks were 2 cycles slower declaring good/ba" "d payload)" Position [31, 48] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.x:\n-Added extra delay bits for autoTx and reTx counters\n-Increased int. bits for per" "-SC EVM accumulation\n-Added external pktDet port\n-Rearragned TxControlBits register bits" Position [36, 93] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.y:\n-Added additional TxRunning outputs with programmable masks/delays (for faking pkt" "Detecton)\n-Rearranged TxControlBits register and added TxDelays register" Position [36, 133] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.00.z:\n-Added logic to allow coarse CFO to be triggered only by external pktDet (so long " "correlation can be bypassed entirely)\n-Added channel estimate magnitude checking to optionally ignore HAA or H" "BA when they're too small\n-Added logic to optionally mask part of the AF transmission (to blank the now-noisy " "unused training symbol)\n-Changed AF scaling so all AF samples are scaled by TxPayload scaling (only re-generat" "ed preamble gets scaled\n by TxPreamble scaling)" Position [36, 193] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.a:\n-Fixed timing bug that blocked autoResponder flags" Position [366, 18] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.b:\n-Added selectable filters for TxA I/Q" Position [366, 48] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.c:\n-Added precision to long correlator" Position [366, 68] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.d:\n-Added registers to mask input I/Q until AGC is done" Position [366, 98] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.e:\n-Added extra longCorr threshold check" Position [366, 123] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.f:\n-Removed dualThreshold logic (didn't help)\n-Rebuilt preamble generator for realy " "cyclic shift of STS/LTS for antB (removed masking too)\n-Added regs to fix length of Rx pkt (for testing \"true" "\" AF)\n-Removed unused RxControlBits (reqShortCorr, dynPktLenEn)\n-Added windowing for LongCorr\n-Added option" "al conjugation of antB preamble\n-Added conjugate-correlation output from LongCorr" Position [366, 168] HorizontalAlignment "left" FontName "Arial" FontSize 6 } } } Block { BlockType SubSystem Name "Through PHY 3.01x" SID "9751" Ports [] Position [15, 170, 82, 190] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Through PHY 3.01x" Location [433, 403, 931, 703] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "263" Annotation { Name "Export 3.01.g:\n-Redesigned long corr to use 1-bit inputs, 3-bit stored coefficients (avoids input" " amplitude dependence)" Position [21, 28] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.h:\n-Added optional cyclic shift to Tx chain (shift happens before CP insertion, for t" "raining and data)\n-Removed conjugation for preamble B\n-Delayed preamble/payload scaling by 2 more (was switch" "ing to higher payload scaling too early)\n-This export is OFDM refdes v15.0 V2P public" Position [21, 63] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.k:\n-Replaced downsamples-with-enables in phase tracker with DFF->downsample (workarou" "nd for Sysgen Virtex-4 export bug)\n-Made 10 multipliers non-embedded (too many mults for DSP48's in V4FX100)\n" "-This export is OFDM refdes v15.0 V4 public" Position [21, 108] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.l:\n-Reverted multiplier settings for further development on V2P\n-This version hasn't" " actually been integrated in an XPS project (just a milestone post-v15 release)" Position [21, 148] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.m:\n-Un-zeroed two HF subcarriers for testing relocation away from DC" Position [21, 178] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.n:\n-Reverted two HF subcarriers to zero (DC issues were fixed with AGC IIR filter coe" "fficient updates)\n-Integrated Yang's FEC subsystems" Position [21, 208] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.o:\n-Removed interpolation fitlers; added gateways to use external rate_change_filter " "pcore" Position [21, 233] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.p:\n-Added sim mux for FEC decoder reset (needs assertion at t=0, which happens differ" "ently in hardware)" Position [21, 258] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.q:\n-Added bits to bit counter in Tx mod control (now that packets can have >2k bytes " "post-coding)" Position [21, 283] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.r:\n-Fixed issue with FEC encoder and packets with odd numbers of bytes (added extra r" "eset input to Tx modulation\n accumulator, to clear its state at the end of each Tx, rather than just at the" " start of each Tx)." Position [21, 308] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.s:\n-Fixed timing bug in phase error calculation; accumulators were incrementing after" " end-of-pkt reset, storing stale\n state for first symbol of next packet." Position [21, 343] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.u:\n-Added force-carrier-sense port for Chris' experiments\n-Increased maxNumOFDMSyms " "to 1023, allowing full-length 1/2 rate BSPK packets to work" Position [21, 383] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.v:\n-Fixed timing bug in random payload capture address generation\n-Shifted longCorr " "input to ChipScope up by 4 bits (now bits [17:4] instead of [13:0])" Position [21, 413] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.w:\n-Added auto-correlation based packet detector (RSSI detector is still there)\n-Add" "ed pktDet signals to ChipScope" Position [21, 448] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 3.01.x:\n-Fixed bug in autoCorr detector (minPower was comparing to wrong mult output)" Position [21, 478] HorizontalAlignment "left" FontName "Arial" FontSize 6 } } } Block { BlockType SubSystem Name "Through refdes14.0" SID "73" Ports [] Position [15, 15, 82, 35] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Through refdes14.0" Location [433, 403, 931, 703] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "222" Annotation { Name "Export 2.00.x:\n-Added register to capture autoTx delay (required for actions which require a Flag" ")\n-Added better TxStart logic (posedge on TxStart gateway; OR'd AF_TxDone for TxRunning SR reset)\n-Screwed wi" "th precision in equalizer (more fractional bits, knowing abs(H)<1)\n-Register phase error to chipscope/debug po" "rt\n-Fixed TxPktLength%12==0 problem\n-Adjust pktDet RSSI for RF gain change\n-Added muxes to bypass Tx interp " "filters" Position [16, 43] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.00.y:\n-Added option to use diff(phaseError) for fine CFO\n-Shortened coarse CFO window t" "o 68 samles (from 72)\n-CFO delay should be > 0 (already settable in software)\n-Increased precision of input t" "o phase error scaling/lookup (remember to update constant in software!)" Position [16, 103] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.00.z:\n-Shortened coarse CFO window to 64 samples (from 68)" Position [16, 138] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.00.z:\n-Shortened coarse CFO window to 64 samples (from 68)" Position [16, 168] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.a:\n-Added sanity checking for max phase diff in coarse CFO calc\n-Added force reset o" "f coarse CFO output when pkt not detected (coarse CFO was non-zero inter-packets before?)\n-Added preCFO at Tx\n" "-Added Sw reset of autoResponse flagA/B (via RxControlBits register)\n-Modified action registers to include use" "PreCFO bit\n-Increased accuracy/latency of coarse CFO arctan (11 cycles to 15)\n-Reworked coarse CFO control (r" "unning sum, uses both longCorr crossings)\n-Inverted training symbol; better PAPR in time domain this way (don'" "t know why it was negated before)" Position [16, 218] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.b:\n-Fixed action register connections (only action0 was connected in 2.01a)" Position [16, 268] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.c:\n-Fixed potential stale state bits in the Tx control; hopefully the cause of the tr" "ansmit-forever-on-reset condition we see occasionally" Position [16, 293] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.d:\n-Added condition to capturing preCFO phaseInc- if either autoResponse flag is setu" "p, it won't update the preCFO value" Position [16, 318] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.e:\n-Added software control of pos/neg/reg for preCFO phaseInc\n-Disabled payload scal" "ing for AF Tx (preamble * afScaling for AF waveform now)\n-BUG: DDS I/Q were connected at Tx for all Tx - maybe" " not a problem?" Position [16, 343] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.f:\n-Fixed DDS I/Q bug\n-Fixed support for non-QPSK baseRate in Alamouti mode\n-Added " "TxReg bit to enable preCFO for all Tx pkts\n-Added DDS_I to chipscope\n-Disabled generation of chan est buf (to" " save BRAM for now)" Position [16, 383] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.g:\n-Fixed EVM for BPSK\n-Added option to average all 8 pilot tones (instead of 2x ave" "rage of 4)\n-Fixed phase tracking latency bug" Position [16, 428] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.h:\n-Added precision to PN tracking 1/symNumber lookup table\n-Added new packet-long C" "FO estimator\n-Delayed TxDone by 8 samples\n-Moved Tx scaling post-interp-filters\n-Tx PreCFO mult is now pre-s" "caling, to avoid overflow" Position [16, 473] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.i:\n-Removed packet-long CFO estimator\n-Removed preCFO logic\n-Added post-interp scal" "ing for all four DAC outputs\n-Un-disabled channel estimate shared mem\n-Removed DDS from ChipScope\n-Disabled " "AF buffers (still a work in progress)\n-Adjusted timing of preamble/payload switch" Position [421, 43] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.j:\n-Attempted re-design of phase tracking" Position [421, 123] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.k:\n-Second attempt at redesigning phase tracking system. Phase\nerrors can now exceed" " 2*pi, to track larger residual CFO during\nlonger packets." Position [426, 163] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.l:\n-Fixed timing of phase correction block for Alamouti Rx\n-Fixed (very) long-standi" "ng bug with 64-QAM checksums (false errors for some pkt lengths)" Position [421, 208] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.m:\n-Fixed Tx control symbol counter (caused error for long Alamouti pkts)" Position [421, 253] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.n:\n-Un-disabled AF buffer subsystem" Position [421, 288] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.o:\n-Added logic to cap maximum pilot phase difference (otherwise a single noisy pilot" " can \n corrupt an entire packet by screwing up the phase tracking system)" Position [421, 328] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.p:\n-Rebuilt pilot phase difference calc (previous \"fix\" made things worse...)" Position [421, 373] HorizontalAlignment "left" FontName "Arial" FontSize 6 } Annotation { Name "Export 2.01.q:\n-Yet another pilot phase fix" Position [421, 408] HorizontalAlignment "left" FontName "Arial" FontSize 6 } } } Annotation { Name "Export 4.00.a:\n-First atempt at Sysgen 13.4 export\n -Replaced deprecated FFT/DDS/sin-cos cores\n -Upd" "ated indetermenite detector locations\n -Added bbReplace.m script to work around black box bug\n -Replaced old re" "gister wrapper subsystems with actual To/From regs\n (hoping \"register readback\" actually works)\n\nExport 4." "00.b\n-Reapplied read-before-write for chan ests used by pilot phase calc\n-Updaed precision through autoCorr det (" "old values had lots of useless integer bits)\n-Reconnected pilot atan block (was effecively disabled in 4.00.a)\n\n" "Export 4.00.c\n-Removed artificial CFO (accidentally left in from debugging)\n-Added BRAM_En output (always 1) to P" "ORTB BUS_IF, so XPS stops complaining about non-BUS connecting in MHS\n\nExport 4.00.d\n-Substituted fec_decoder.v " "for post-xst model provided by Xilinx tech support, to work around MATLAB crash during sim\n\nExport 4.00.e\n-Sim-m" "uxed fec_decoder, to use source HDL for export but sim HDL for simulation\n\nExport 4.00.f\n-Back-ported updated au" "to corr pkt det logic from V6 (better data types through pipeline and thresholds)" Position [146, 113] HorizontalAlignment "left" FontName "Arial" FontSize 6 } } } Block { BlockType SubSystem Name "ChipScope" SID "9798" Ports [] Position [405, 128, 447, 172] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ChipScope" Location [202, 70, 2558, 1552] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "144" Block { BlockType Reference Name "ChipScope1" SID "9799" Ports [25] Position [605, 40, 710, 640] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ChipScope" SourceType "Xilinx ChipScope Block" infoedit "Enables run-time debugging and verification of signals by inserting ChipScope Pro ICON and ILA cores.<" "br>
Restrictions:
Only one ChipScope core can be instantiated in a System Generator design. A design or su" "bsystem containing a ChipScope block must have at least one output port." num_trig_ports "5" current_port "4" show_trig_port "0" match_units "1" match_type "Basic with edges" data_is_trigger off num_data_ports "20" data_depth "4096" SRL16s on add_bufg on match_type_t0 "2" match_type_t1 "2" match_type_t2 "2" match_type_t3 "2" match_type_t4 "2" match_type_t5 "1" match_type_t6 "1" match_type_t7 "1" match_type_t8 "1" match_type_t9 "1" match_type_t10 "1" match_type_t11 "1" match_type_t12 "1" match_type_t13 "1" match_type_t14 "1" match_type_t15 "1" match_units_t0 "1" match_units_t1 "1" match_units_t2 "1" match_units_t3 "1" match_units_t4 "1" match_units_t5 "1" match_units_t6 "1" match_units_t7 "1" match_units_t8 "1" match_units_t9 "1" match_units_t10 "1" match_units_t11 "1" match_units_t12 "1" match_units_t13 "1" match_units_t14 "1" match_units_t15 "1" dbl_ovrd "0" user_scan_chain "USER1" has_advanced_control "0" sggui_pos "20,20,356,501" block_type "chipscope" block_version "VER_STRING_GOES_HERE" sg_icon_stat "105,600,25,0,white,blue,0,9ac07a7d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 105 105 0 0 ],[0 0 600 600 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 105 105 0 0 ],[0 0 600 600 0 ]);\npatch([18.625 40.3 55.3 70.3 85.3 55.3 33.625 18.625 ],[316.65 " "316.65 331.65 316.65 331.65 331.65 331.65 316.65 ],[1 1 1 ]);\npatch([33.625 55.3 40.3 18.625 33.625 ],[301.65 301." "65 316.65 316.65 301.65 ],[0.931 0.946 0.973 ]);\npatch([18.625 40.3 55.3 33.625 18.625 ],[286.65 286.65 301.65 301" ".65 286.65 ],[1 1 1 ]);\npatch([33.625 85.3 70.3 55.3 40.3 18.625 33.625 ],[271.65 271.65 286.65 271.65 286.65 286." "65 271.65 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'Payload1');\ncolor('black');port_label('input',2,'ExtTrig');\ncolor('blac" "k');port_label('input',3,'Good_Pkt_Int1');\ncolor('black');port_label('input',4,'Bad_Pkt_Int1');\ncolor('black');po" "rt_label('input',5,'SampClk');\ncolor('black');port_label('input',6,'Payload2');\ncolor('black');port_label('input'" ",7,'Good_Pkt_Int2');\ncolor('black');port_label('input',8,'Bad_Pkt_Int2');\ncolor('black');port_label('input',9,'An" "tA_ADC_I');\ncolor('black');port_label('input',10,'AntA_ADC_Q');\ncolor('black');port_label('input',11,'EQ_I');\nco" "lor('black');port_label('input',12,'EQ_Q');\ncolor('black');port_label('input',13,'LongCorr');\ncolor('black');port" "_label('input',14,'EVM');\ncolor('black');port_label('input',15,'ChanEst');\ncolor('black');port_label('input',16,'" "PilotPhaseErr');\ncolor('black');port_label('input',17,'Good_Header_Int');\ncolor('black');port_label('input',18,'B" "ad_Header_Int');\ncolor('black');port_label('input',19,'PktDet');\ncolor('black');port_label('input',20,'AntA_AGC_D" "one');\ncolor('black');port_label('input',21,'AntA_GainBB');\ncolor('black');port_label('input',22,'AntA_GainRF');\n" "color('black');port_label('input',23,'FFT_Overflow');\ncolor('black');port_label('input',24,'pktDet_RSSI');\ncolor(" "'black');port_label('input',25,'pktDet_Corr');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Constant Name "Constant1" SID "9800" Position [240, 54, 260, 76] ShowName off Value "0" } Block { BlockType Reference Name "Convert1" SID "9801" Ports [1, 1] Position [365, 355, 395, 375] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "14" bin_pt "12" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "189,265,461,375" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "9802" Ports [1, 1] Position [365, 330, 395, 350] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "14" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "189,265,461,375" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "9803" Ports [0, 1] Position [295, 128, 340, 152] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is" " implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "2" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[5 10 0 10 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,630" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,24,0,1,white,blue,0,7ac47ef5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15.33 15.3" "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12.33 15.33 15" ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 " "]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');disp('{\\" "fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "9804" Position [205, 432, 280, 448] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodHeader" TagVisibility "global" } Block { BlockType From Name "From10" SID "9805" Position [205, 257, 280, 273] ShowName off CloseFcn "tagdialog Close" GotoTag "AntA_ADC_Q_Filt" TagVisibility "global" } Block { BlockType From Name "From11" SID "9806" Position [205, 607, 280, 623] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_rssi" TagVisibility "global" } Block { BlockType From Name "From12" SID "9807" Position [205, 632, 280, 648] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet_corr" TagVisibility "global" } Block { BlockType From Name "From15" SID "9808" Position [205, 232, 280, 248] ShowName off CloseFcn "tagdialog Close" GotoTag "AntA_ADC_I_Filt" TagVisibility "global" } Block { BlockType From Name "From17" SID "9809" Position [235, 82, 310, 98] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodPkt" TagVisibility "global" } Block { BlockType From Name "From18" SID "9810" Position [205, 407, 280, 423] ShowName off CloseFcn "tagdialog Close" GotoTag "PilotPhaseErr" TagVisibility "global" Port { PortNumber 1 Name "PilotPhaseErr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType From Name "From2" SID "9811" Position [235, 107, 310, 123] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_BadPkt" TagVisibility "global" } Block { BlockType From Name "From20" SID "9812" Position [205, 381, 305, 399] ShowName off CloseFcn "tagdialog Close" GotoTag "Chipscope_ChanEst" TagVisibility "global" Port { PortNumber 1 Name "ChanEst" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType From Name "From21" SID "9813" Position [205, 282, 280, 298] ShowName off CloseFcn "tagdialog Close" GotoTag "EQ_I" TagVisibility "global" } Block { BlockType From Name "From22" SID "9814" Position [205, 307, 280, 323] ShowName off CloseFcn "tagdialog Close" GotoTag "EQ_Q" TagVisibility "global" } Block { BlockType From Name "From23" SID "9815" Position [120, 332, 195, 348] ShowName off CloseFcn "tagdialog Close" GotoTag "Long_Corr" TagVisibility "global" } Block { BlockType From Name "From24" SID "9816" Position [235, 32, 310, 48] ShowName off CloseFcn "tagdialog Close" GotoTag "Payload" TagVisibility "global" } Block { BlockType From Name "From3" SID "9817" Position [205, 457, 280, 473] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_BadHeader" TagVisibility "global" } Block { BlockType From Name "From4" SID "9818" Position [205, 357, 280, 373] ShowName off CloseFcn "tagdialog Close" GotoTag "DebugOut_EVM" TagVisibility "global" } Block { BlockType From Name "From5" SID "9819" Position [205, 482, 280, 498] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDet" TagVisibility "global" } Block { BlockType From Name "From6" SID "9820" Position [205, 507, 310, 523] ShowName off CloseFcn "tagdialog Close" GotoTag "AntA_AGC_Done" TagVisibility "global" } Block { BlockType From Name "From7" SID "9821" Position [205, 532, 310, 548] ShowName off CloseFcn "tagdialog Close" GotoTag "AntA_GainBB" TagVisibility "global" } Block { BlockType From Name "From8" SID "9822" Position [205, 557, 310, 573] ShowName off CloseFcn "tagdialog Close" GotoTag "AntA_GainRF" TagVisibility "global" } Block { BlockType From Name "From9" SID "9823" Position [205, 582, 310, 598] ShowName off CloseFcn "tagdialog Close" GotoTag "FFT_Overflow" TagVisibility "global" Port { PortNumber 1 Name "FFT_Overflow" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Slice1" SID "9824" Ports [1, 1] Position [280, 332, 305, 348] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type " "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardware " "notes: In hardware this block costs nothing." nbits "14" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "4" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12.2" "2 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a:b]');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice2" SID "9825" Ports [1, 1] Position [395, 132, 420, 148] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type " "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardware " "notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12.2" "2 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a:b]');\nfpri" "ntf('','COMMENT: end icon text');" Port { PortNumber 1 Name "SampClk" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample1" SID "9826" Ports [1, 1] Position [440, 353, 465, 377] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "EVM" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample11" SID "9827" Ports [1, 1] Position [395, 28, 420, 52] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Payload" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample12" SID "9828" Ports [1, 1] Position [395, 78, 420, 102] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Good Pkt Int" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample14" SID "9829" Ports [1, 1] Position [395, 103, 420, 127] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Bad Pkt Int" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample15" SID "9830" Ports [1, 1] Position [440, 253, 465, 277] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "AntA_ADC_Q" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample16" SID "9831" Ports [1, 1] Position [440, 328, 465, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "LongCorr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample17" SID "9832" Ports [1, 1] Position [440, 278, 465, 302] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "EQ_I" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample18" SID "9833" Ports [1, 1] Position [440, 303, 465, 327] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "EQ_Q" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample2" SID "9834" Ports [1, 1] Position [440, 428, 465, 452] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Good Header Int" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample21" SID "9835" Ports [1, 1] Position [440, 228, 465, 252] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "AntA_ADC_I" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample3" SID "9836" Ports [1, 1] Position [440, 453, 465, 477] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Bad Header Int" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample4" SID "9837" Ports [1, 1] Position [440, 478, 465, 502] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "PktDet" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample5" SID "9838" Ports [1, 1] Position [440, 503, 465, 527] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "AntA_AGC_Done" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample6" SID "9839" Ports [1, 1] Position [440, 528, 465, 552] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "AntA_GainBB" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample7" SID "9840" Ports [1, 1] Position [440, 553, 465, 577] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "AntA_GainRF" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample8" SID "9841" Ports [1, 1] Position [440, 603, 465, 627] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "pktDet_RSSI" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Up Sample9" SID "9842" Ports [1, 1] Position [440, 628, 465, 652] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

" "Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and singl" "e bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "pktDet_Corr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "debug_chipscopeTrig1" SID "9843" Ports [1, 1] Position [325, 59, 365, 71] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p" "oint type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "14" bin_pt "13" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 12 12 0 ],[0.95 0.93 0.65" " ]);\nplot([0 40 40 0 0 ],[0 0 12 12 0 ]);\npatch([17.775 19.22 20.22 21.22 22.22 20.22 18.775 17.775 ],[7.11 7.11 " "8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([18.775 20.22 19.22 17.775 18.775 ],[6.11 6.11 7.11 7.11 6.11 ],[" "0.985 0.979 0.895 ]);\npatch([17.775 19.22 20.22 18.775 17.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch([18." "775 22.22 21.22 20.22 19.22 17.775 18.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0.979 0.895 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\f" "ontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon " "text');" Port { PortNumber 1 Name "ExtTrig" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Line { SrcBlock "From24" SrcPort 1 DstBlock "Up Sample11" DstPort 1 } Line { SrcBlock "From15" SrcPort 1 DstBlock "Up Sample21" DstPort 1 } Line { SrcBlock "From21" SrcPort 1 DstBlock "Up Sample17" DstPort 1 } Line { SrcBlock "From22" SrcPort 1 DstBlock "Up Sample18" DstPort 1 } Line { SrcBlock "From23" SrcPort 1 DstBlock "Slice1" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "debug_chipscopeTrig1" DstPort 1 } Line { Name "Payload" Labels [0, 0] SrcBlock "Up Sample11" SrcPort 1 Points [105, 0] Branch { DstBlock "ChipScope1" DstPort 1 } Branch { Points [0, 125] DstBlock "ChipScope1" DstPort 6 } } Line { Name "LongCorr" Labels [0, 0] SrcBlock "Up Sample16" SrcPort 1 DstBlock "ChipScope1" DstPort 13 } Line { Name "EQ_I" Labels [0, 0] SrcBlock "Up Sample17" SrcPort 1 DstBlock "ChipScope1" DstPort 11 } Line { Name "EQ_Q" Labels [0, 0] SrcBlock "Up Sample18" SrcPort 1 DstBlock "ChipScope1" DstPort 12 } Line { Name "AntA_ADC_I" Labels [0, 0] SrcBlock "Up Sample21" SrcPort 1 DstBlock "ChipScope1" DstPort 9 } Line { Name "ExtTrig" Labels [0, 0] SrcBlock "debug_chipscopeTrig1" SrcPort 1 DstBlock "ChipScope1" DstPort 2 } Line { SrcBlock "From17" SrcPort 1 DstBlock "Up Sample12" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Up Sample14" DstPort 1 } Line { Name "Good Pkt Int" Labels [0, 0] SrcBlock "Up Sample12" SrcPort 1 Points [100, 0] Branch { DstBlock "ChipScope1" DstPort 3 } Branch { Points [0, 100] DstBlock "ChipScope1" DstPort 7 } } Line { Name "Bad Pkt Int" Labels [0, 0] SrcBlock "Up Sample14" SrcPort 1 Points [95, 0] Branch { DstBlock "ChipScope1" DstPort 4 } Branch { Points [0, 100] DstBlock "ChipScope1" DstPort 8 } } Line { SrcBlock "From10" SrcPort 1 DstBlock "Up Sample15" DstPort 1 } Line { Name "AntA_ADC_Q" Labels [0, 0] SrcBlock "Up Sample15" SrcPort 1 DstBlock "ChipScope1" DstPort 10 } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Slice2" DstPort 1 } Line { Name "SampClk" Labels [0, 0] SrcBlock "Slice2" SrcPort 1 DstBlock "ChipScope1" DstPort 5 } Line { Name "ChanEst" Labels [1, 0] SrcBlock "From20" SrcPort 1 DstBlock "ChipScope1" DstPort 15 } Line { Name "PilotPhaseErr" Labels [1, 0] SrcBlock "From18" SrcPort 1 DstBlock "ChipScope1" DstPort 16 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Up Sample16" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Up Sample2" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Up Sample3" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { Name "EVM" Labels [0, 0] SrcBlock "Up Sample1" SrcPort 1 DstBlock "ChipScope1" DstPort 14 } Line { Name "Good Header Int" Labels [0, 0] SrcBlock "Up Sample2" SrcPort 1 DstBlock "ChipScope1" DstPort 17 } Line { Name "Bad Header Int" Labels [0, 0] SrcBlock "Up Sample3" SrcPort 1 DstBlock "ChipScope1" DstPort 18 } Line { Name "PktDet" Labels [0, 0] SrcBlock "Up Sample4" SrcPort 1 DstBlock "ChipScope1" DstPort 19 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Up Sample4" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Up Sample5" DstPort 1 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Up Sample6" DstPort 1 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Up Sample7" DstPort 1 } Line { Name "AntA_AGC_Done" Labels [0, 0] SrcBlock "Up Sample5" SrcPort 1 DstBlock "ChipScope1" DstPort 20 } Line { Name "AntA_GainBB" Labels [0, 0] SrcBlock "Up Sample6" SrcPort 1 DstBlock "ChipScope1" DstPort 21 } Line { Name "AntA_GainRF" Labels [0, 0] SrcBlock "Up Sample7" SrcPort 1 DstBlock "ChipScope1" DstPort 22 } Line { Name "FFT_Overflow" Labels [1, 0] SrcBlock "From9" SrcPort 1 DstBlock "ChipScope1" DstPort 23 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "Slice1" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "From11" SrcPort 1 DstBlock "Up Sample8" DstPort 1 } Line { Name "pktDet_RSSI" Labels [0, 0] SrcBlock "Up Sample8" SrcPort 1 DstBlock "ChipScope1" DstPort 24 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Up Sample9" DstPort 1 } Line { Name "pktDet_Corr" Labels [0, 0] SrcBlock "Up Sample9" SrcPort 1 DstBlock "ChipScope1" DstPort 25 } } } Block { BlockType SubSystem Name "EDK Processor" SID "10216" Ports [] Position [175, 129, 219, 173] CopyFcn "xlProcBlockCopyCallback(gcbh);xlBlockMoveCallback(gcbh);" DeleteFcn "xlDestroyGui(gcbh);" LoadFcn "xlBlockLoadCallback(gcbh);" ModelCloseFcn "xlDestroyGui(gcbh);" PreSaveFcn "xlBlockPreSaveCallback(gcbh);" PostSaveFcn "xlBlockPostSaveCallback(gcbh);" DestroyFcn "xlDestroyGui(gcbh);" OpenFcn "bh=gcbh;xlProcBlockCallbacks('populatesharedmemorylistbox',bh);xlOpenGui(bh, 'edkprocessor_gui.x" "ml', @xlProcBlockEnablement, @xlProcBlockAction);" CloseFcn "xlDestroyGui(gcbh);" MoveFcn "xlBlockMoveCallback(gcbh);" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Xilinx EDK Processor Block" MaskDescription "Xilinx EDK Processor" MaskHelp "eval('');xlDoc('-book','sysgen','-topic','EDK_Processor');" MaskPromptString "Configure Processor for|XPS Project| |Available Memories| | |Bus Type|Base Address| |Loc" "k| |Dual Clocks| |Register Read-Back|Constraint File| |Inherit Device Type|Initial Program| |Enable Co-Debug wit" "h Xilinx SDK (Beta)| | | | | | | | | | | | | | | | " MaskStyleString "popup(EDK pcore generation|HDL netlisting),edit,edit,edit,edit,edit,popup(AXI|PLB),edit,e" "dit,checkbox,edit,checkbox,edit,checkbox,edit,edit,checkbox,edit,edit,checkbox,edit,edit,edit,edit,edit,edit,edi" "t,edit,edit,edit,edit,edit,edit,edit,edit,edit" MaskVariables "mode=&1;xmp=&2;MemVisToProc=&3;AvailableMemories=&4;portInterfaceTable=&5;bus_type_sgadvanc" "ed=&6;bus_type=&7;baseaddr=&8;baseaddr_lock_sgadvanced=&9;baseaddr_lock=@10;dual_clock_sgadvanced=&11;dual_clock" "=@12;reg_readback_sgadvanced=&13;reg_readback=@14;ucf_file=&15;inheritDeviceType_sgadvanced=&16;inheritDeviceTyp" "e=@17;elf_file=&18;codebug_sgadvanced=&19;codebug=@20;clock_name=&21;internalPortList=&22;resetPolarity=&23;memx" "table=&24;procinfo=&25;memmapdirty=&26;blockname=&27;xpsintstyle=&28;has_advanced_control=@29;sggui_pos=&30;bloc" "k_type=&31;block_version=&32;sg_icon_stat=&33;sg_mask_display=&34;sg_list_contents=&35;sg_blockgui_xml=&36;" MaskTunableValueString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on," "on,on,on,on,on,on,on" MaskCallbackString "|||||||||||||||||||||||||||||||||||" MaskEnableString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,o" "n,on,on,on,on,on,on" MaskVisibilityString "on,on,off,on,on,off,on,on,off,on,off,on,off,on,on,off,on,on,off,on,off,off,off,off,off," "off,off,off,off,off,off,off,off,off,off,off" MaskToolTipString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on," "on,on,on,on,on,on,on" MaskInitialization "try\n tmp_gcb = gcb;\n tmp_gcbh = gcbh;\n if (strcmp('SysGenIndex',get_param(bdroot(" "tmp_gcbh),'tag')) && ~isempty(regexp(bdroot(tmp_gcb), '^xbs', 'once')))\n return;\n end;\n xlMungeMaskParam" "s;\n\n block_type='edkprocessor';\n\n serialized_declarations = '{''block_type''=>''String''}';\n xledkproces" "sor_init();\n ptable_ = xlblockprep(get_param(tmp_gcb, 'MaskWSVariables'));\n try\n xlBlockMoveCallback(tmp" "_gcbh);\n catch \n clear global xl_updateicon_recursion_guard;\n end;\ncatch\n global dbgsysgen;\n if(~i" "sempty(dbgsysgen) && dbgsysgen)\n e = regexprep(lasterr, '\\n', '\\nError: ');\n disp(['Error: While runni" "ng MaskInit code on block ' tmp_gcb ': ' e]);\n error(e);\n end\nend\n" MaskSelfModifiable on MaskDisplay "fprintf('','COMMENT: begin icon graphics');\npatch([0 44 44 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0" ".91 ]);\nplot([0 44 44 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28." 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<<FEC_Config>>
<<Tx_OFDM_SymCounts>>
<<Rx_OFDM_SymbolCounts>>
<<TxRx_Pilots_Values>>
<<TxRx_Pilots_Index>" ">
<<TxRx_Inte" "rrupt_PktBuf_Ctrl>>
<<TxRx_FFT_Scaling>>
<<Tx_Start_Reset_Control>>
<<Tx_ControlBits>>
<<Tx_Delays>>
<<Tx_Scaling>>
<<pktDet_durations>>
<<pktDet_thresholds>>
<<pktDet_autoCorrParams>>
<<pktDet_controlB" "its>>
<<Rx" "_AF_TxScaling>>
" "<<Rx_AF_Blanking>>
<<Rx_PilotCalcParams>>
<<Rx_Constellation_Scaling>>
<<Rx_PktDet_Delay>>
<<Rx_ChanEst_MinMag>>
<<Rx_pktByteNums>>
<<Rx_FixedPktLen>>
" "
<<Rx_PktDet_LongCorr_Thre" "sholds>>
<<" ";Rx_PktDet_LongCorr_Params>>
<<Rx_coarseCFO_correction>>
<<Rx_PreCFO_PilotCalcCorrection>>
<<Rx_PreCFO_Options>>
<<Rx_ControlBits>>
" " <<TxRx_AutoReply_Action3>&g" "t;
<<TxRx_AutoRe" "ply_Action2>>
&l" "t;<TxRx_AutoReply_Action1>>
<<TxRx_AutoReply_Action0>>
<<TxRx_AutoReply_Match5>>
<<TxRx_AutoReply_Match4>>
<<TxRx_AutoReply_Match3>>
<" "div> <<TxRx_AutoReply_Match2>" ";>
<<TxRx_Aut" "oReply_Action5>>
" " <<TxRx_AutoReply_Action4>>
<<TxRx_AutoReply_Match1>>
<<TxRx_AutoReply_Match0>>
<<midPacketRSSI>>
<<Tx_PktRunning>>
<<Rx_pktDetEventCount>>
<<Rx_coarseCFOest>>
<<Rx_pilotCFOest&" "gt;>
<<Rx_pkt" "Done_interruptStatus>>
<<Rx_BER_TotalBits>>
<<Rx_BER_Errors>>
<<Rx_Gains>>
<<pktDet_status>>
<<TxModulation>>
<<TxHeaderTranslate>>
<<ChannelEstimates>>
<<RxModulation>>
<<EVM_perSym>>
<<EVM_perSC>>
<<PktBufFreqOffsets>>
<" "/qt>||{'exposed'=>[],'portdir'=>[],'portname'=>[],'shortname'=>[]}||PLB|0x80000000||off||on||on|||off|||o" "n|plb|{}|0|{'mladdr'=>[0.00000000000000000,1.00000000000000000,2.00000000000000000,3.00000000000000000,4.0000000" "0000000000,5.00000000000000000,6.00000000000000000,7.00000000000000000,8.00000000000000000,9.00000000000000000,1" "0.00000000000000000,11.00000000000000000,12.00000000000000000,13.00000000000000000,14.00000000000000000,15.00000" "000000000000,16.00000000000000000,17.00000000000000000,18.00000000000000000,19.00000000000000000,20.000000000000" "00000,21.00000000000000000,22.00000000000000000,23.00000000000000000,24.00000000000000000,25.00000000000000000,2" "6.00000000000000000,27.00000000000000000,28.00000000000000000,29.00000000000000000,30.00000000000000000,31.00000" "000000000000,32.00000000000000000,33.00000000000000000,34.00000000000000000,35.00000000000000000,36.000000000000" "00000,37.00000000000000000,38.00000000000000000,39.00000000000000000,40.00000000000000000,0.00000000000000000,1." "00000000000000000,2.00000000000000000,3.00000000000000000,4.00000000000000000,5.00000000000000000,6.000000000000" "00000,7.00000000000000000,8.00000000000000000,9.00000000000000000,-1.00000000000000000,-1.00000000000000000,-1.0" "0000000000000000,-1.00000000000000000,-1.00000000000000000,-1.00000000000000000,-1.00000000000000000],'mlist'=>[" "'ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/TxRx Registers/From Register8','ofdm_txrx_supermimo_coded/Me" "mory-mapped\nRegisters/TxRx Registers/From Register7','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/TxRx R" "egisters/From Register6','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/TxRx Registers/From Register5','ofd" "m_txrx_supermimo_coded/Memory-mapped\nRegisters/TxRx Registers/From Register4','ofdm_txrx_supermimo_coded/Memory" "-mapped\nRegisters/TxRx Registers/From Register3','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/TxRx Regis" "ters/From Register2','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Tx Registers/From Register3','ofdm_txrx" "_supermimo_coded/Memory-mapped\nRegisters/Tx Registers/From Register2','ofdm_txrx_supermimo_coded/Memory-mapped\n" "Registers/Tx Registers/From Register10','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Tx Registers/From Re" "gister1','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Rx Registers/Pkt Detector Registers/From Register5'" ",'ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Rx Registers/Pkt Detector Registers/From Register4','ofdm_t" "xrx_supermimo_coded/Memory-mapped\nRegisters/Rx Registers/Pkt Detector Registers/From Register2','ofdm_txrx_supe" "rmimo_coded/Memory-mapped\nRegisters/Rx Registers/Pkt Detector Registers/From Register1','ofdm_txrx_supermimo_co" "ded/Memory-mapped\nRegisters/Rx Registers/From Register8','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Rx" " Registers/From Register7','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Rx Registers/From Register6','ofd" "m_txrx_supermimo_coded/Memory-mapped\nRegisters/Rx Registers/From Register5','ofdm_txrx_supermimo_coded/Memory-m" "apped\nRegisters/Rx Registers/From Register4','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Rx Registers/F" "rom Register3','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Rx Registers/From Register2','ofdm_txrx_super" "mimo_coded/Memory-mapped\nRegisters/Rx Registers/From Register16','ofdm_txrx_supermimo_coded/Memory-mapped\nRegi" "sters/Rx Registers/From Register14','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Rx Registers/From Regist" "er13','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Rx Registers/From Register12','ofdm_txrx_supermimo_cod" "ed/Memory-mapped\nRegisters/Rx Registers/From Register11','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Rx" " Registers/From Register10','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Rx Registers/From Register','ofd" "m_txrx_supermimo_coded/Memory-mapped\nRegisters/AutoReply Registers/From Register9','ofdm_txrx_supermimo_coded/M" "emory-mapped\nRegisters/AutoReply Registers/From Register8','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/" "AutoReply Registers/From Register7','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/AutoReply Registers/From" " Register6','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/AutoReply Registers/From Register5','ofdm_txrx_s" "upermimo_coded/Memory-mapped\nRegisters/AutoReply Registers/From Register4','ofdm_txrx_supermimo_coded/Memory-ma" "pped\nRegisters/AutoReply Registers/From Register3','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/AutoRepl" "y Registers/From Register2','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/AutoReply Registers/From Registe" "r11','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/AutoReply Registers/From Register10','ofdm_txrx_supermi" "mo_coded/Memory-mapped\nRegisters/AutoReply Registers/From Register1','ofdm_txrx_supermimo_coded/Memory-mapped\n" "Registers/AutoReply Registers/From Register','ofdm_txrx_supermimo_coded/OFDM Rx MIMO/Packet_Detection/RSSI-based" " PktDet/Mid-Packet\nRSSI Register/To Register2','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Tx Registers" "/To Register7','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Rx Registers/To Register6','ofdm_txrx_supermi" "mo_coded/Memory-mapped\nRegisters/Rx Registers/To Register5','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters" "/Rx Registers/To Register4','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Rx Registers/To Register3','ofdm" "_txrx_supermimo_coded/Memory-mapped\nRegisters/Rx Registers/To Register2','ofdm_txrx_supermimo_coded/Memory-mapp" "ed\nRegisters/Rx Registers/To Register1','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Rx Registers/To Reg" "ister','ofdm_txrx_supermimo_coded/Memory-mapped\nRegisters/Rx Registers/Pkt Detector Registers/To Register','ofd" "m_txrx_supermimo_coded/OFDM Tx MIMO/Training_Data/FlexibleMod/control/Tx Modulation/Shared Memory for\nModulatio" "n Masks/Shared Memory','ofdm_txrx_supermimo_coded/OFDM Tx MIMO/Training_Data/FlexibleMod/PktBuffer_CRC1/Packet B" "uffer/AutoTx\nHeader Translation/Shared Memory','ofdm_txrx_supermimo_coded/OFDM Rx MIMO/FFT & Chan Est/Channel E" "stimation\n& Pilot Processing/Chan Est Buffer\n& Mag Calc/Shared Memory','ofdm_txrx_supermimo_coded/OFDM Rx MIMO" "/Equalizer & Packetizer/Packet_Constructor/Modulation RAM/Modulation Masks/Shared Memory','ofdm_txrx_supermimo_c" "oded/OFDM Rx MIMO/Equalizer & Packetizer/Packet_Constructor/EVM Calc/EVM per Symbol/Shared Memory','ofdm_txrx_su" "permimo_coded/OFDM Rx MIMO/Equalizer & Packetizer/Packet_Constructor/EVM Calc/EVM per Subcarrier/Shared Memory'," "'ofdm_txrx_supermimo_coded/OFDM Rx MIMO/Coarse Freq Correction/PreSpin CFO Sel/Shared Memory'],'mlname'=>['\\\\'" "FEC_Config\\\\'','\\\\'Tx_OFDM_SymCounts\\\\'','\\\\'Rx_OFDM_SymbolCounts\\\\'','\\\\'TxRx_Pilots_Values\\\\'','" "\\\\'TxRx_Pilots_Index\\\\'','\\\\'TxRx_Interrupt_PktBuf_Ctrl\\\\'','\\\\'TxRx_FFT_Scaling\\\\'','\\\\'Tx_Start_" "Reset_Control\\\\'','\\\\'Tx_ControlBits\\\\'','\\\\'Tx_Delays\\\\'','\\\\'Tx_Scaling\\\\'','\\\\'pktDet_duratio" "ns\\\\'','\\\\'pktDet_thresholds\\\\'','\\\\'pktDet_autoCorrParams\\\\'','\\\\'pktDet_controlBits\\\\'','\\\\'Rx" "_AF_TxScaling\\\\'','\\\\'Rx_AF_Blanking\\\\'','\\\\'Rx_PilotCalcParams\\\\'','\\\\'Rx_Constellation_Scaling\\\\" "'','\\\\'Rx_PktDet_Delay\\\\'','\\\\'Rx_ChanEst_MinMag\\\\'','\\\\'Rx_pktByteNums\\\\'','\\\\'Rx_FixedPktLen\\\\" "'','\\\\'Rx_PktDet_LongCorr_Thresholds\\\\'','\\\\'Rx_PktDet_LongCorr_Params\\\\'','\\\\'Rx_coarseCFO_correction" "\\\\'','\\\\'Rx_PreCFO_PilotCalcCorrection\\\\'','\\\\'Rx_PreCFO_Options\\\\'','\\\\'Rx_ControlBits\\\\'','\\\\'" "TxRx_AutoReply_Action3\\\\'','\\\\'TxRx_AutoReply_Action2\\\\'','\\\\'TxRx_AutoReply_Action1\\\\'','\\\\'TxRx_Au" "toReply_Action0\\\\'','\\\\'TxRx_AutoReply_Match5\\\\'','\\\\'TxRx_AutoReply_Match4\\\\'','\\\\'TxRx_AutoReply_M" "atch3\\\\'','\\\\'TxRx_AutoReply_Match2\\\\'','\\\\'TxRx_AutoReply_Action5\\\\'','\\\\'TxRx_AutoReply_Action4\\\\" "'','\\\\'TxRx_AutoReply_Match1\\\\'','\\\\'TxRx_AutoReply_Match0\\\\'','\\\\'midPacketRSSI\\\\'','\\\\'Tx_PktRun" "ning\\\\'','\\\\'Rx_pktDetEventCount\\\\'','\\\\'Rx_coarseCFOest\\\\'','\\\\'Rx_pilotCFOest\\\\'','\\\\'Rx_pktDo" "ne_interruptStatus\\\\'','\\\\'Rx_BER_TotalBits\\\\'','\\\\'Rx_BER_Errors\\\\'','\\\\'Rx_Gains\\\\'','\\\\'pktDe" "t_status\\\\'','\\\\'TxModulation\\\\'','\\\\'TxHeaderTranslate\\\\'','\\\\'ChannelEstimates\\\\'','\\\\'RxModul" "ation\\\\'','\\\\'EVM_perSym\\\\'','\\\\'EVM_perSC\\\\'','\\\\'PktBufFreqOffsets\\\\''],'mlstate'=>[0.0000000000" "0000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00" "000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000" "000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.000000" "00000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000," "0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.0000000000" "0000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00" "000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000" "000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.000000" "00000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000," "0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.0000000000" "0000000,0.00000000000000000]}|{}|off||default|0|-1,-1,-1,-1|edkprocessor|2.7|44,44,-1,-1,white,blue,0,07734,righ" "t,,[ ],[ ]|fprintf('','COMMENT: begin icon graphics');\npatch([0 44 44 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.91 ]);\n" "plot([0 44 44 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 34.66 " "28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22.66" " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npat" "ch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ]" ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end" " icon text');|{'table'=>{'AvailableMemories'=>'popup()'}}|" System { Name "EDK Processor" Location [514, 91, 900, 269] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" SIDHighWatermark "190" Block { BlockType Constant Name "Constant" SID "10216:118" Position [40, 985, 60, 1005] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant1" SID "10216:120" Position [40, 1050, 60, 1070] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant2" SID "10216:122" Position [40, 1120, 60, 1140] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant3" SID "10216:124" Position [40, 1185, 60, 1205] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant4" SID "10216:126" Position [40, 1255, 60, 1275] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant5" SID "10216:128" Ports [0, 1] Position [20, 912, 75, 938] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "xlGetNormalizedPeriod()" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.91" " ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16.33 16.3" "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13.33 16.33 16" ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1" " 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Sl_wait" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Constant Name "Constant6" SID "10216:129" Position [40, 1355, 60, 1375] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "From Register" SID "10216:132" Ports [0, 1] Position [400, 2272, 460, 2328] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'midPacketRSSI'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "midPacketRSSI_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "From Register1" SID "10216:133" Ports [0, 1] Position [400, 2377, 460, 2433] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Tx_PktRunning'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Tx_PktRunning_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "From Register2" SID "10216:134" Ports [0, 1] Position [400, 2482, 460, 2538] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_pktDetEventCount'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Rx_pktDetEventCount_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "From Register3" SID "10216:135" Ports [0, 1] Position [400, 2587, 460, 2643] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_coarseCFOest'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Rx_coarseCFOest_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "From Register4" SID "10216:136" Ports [0, 1] Position [400, 2692, 460, 2748] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_pilotCFOest'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Rx_pilotCFOest_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "From Register5" SID "10216:137" Ports [0, 1] Position [400, 2797, 460, 2853] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_pktDone_interruptStatus'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Rx_pktDone_interruptStatus_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "From Register6" SID "10216:138" Ports [0, 1] Position [400, 2902, 460, 2958] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_BER_TotalBits'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Rx_BER_TotalBits_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "From Register7" SID "10216:139" Ports [0, 1] Position [400, 3007, 460, 3063] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_BER_Errors'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Rx_BER_Errors_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "From Register8" SID "10216:140" Ports [0, 1] Position [400, 3117, 460, 3173] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_Gains'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Rx_Gains_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "From Register9" SID "10216:141" Ports [0, 1] Position [400, 3222, 460, 3278] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'pktDet_status'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "14" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "pktDet_status_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "PLB_ABus" SID "10216:121" Ports [1, 1] Position [175, 1050, 245, 1070] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_ABus'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" Port { PortNumber 1 Name "PLB_ABus" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "PLB_PAValid" SID "10216:123" Ports [1, 1] Position [175, 1120, 245, 1140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_PAValid'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" Port { PortNumber 1 Name "PLB_PAValid" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "PLB_RNW" SID "10216:125" Ports [1, 1] Position [175, 1185, 245, 1205] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_RNW'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" Port { PortNumber 1 Name "PLB_RNW" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "PLB_wrDBus" SID "10216:127" Ports [1, 1] Position [175, 1255, 245, 1275] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_wrDBus'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" Port { PortNumber 1 Name "PLB_wrDBus" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "SPLB_Rst" SID "10216:119" Ports [1, 1] Position [175, 985, 245, 1005] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'SPLB_Rst'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" Port { PortNumber 1 Name "SPLB_Rst" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Shared Memory" SID "10216:183" Ports [3, 1] Position [885, 4779, 965, 4871] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shared Memory" SourceType "Xilinx Shared Memory Random Access Memory Block" shared_memory_name "'TxModulation'" depth "192" ownership "Owned and Initialized Elsewhere" initVector "sin(pi*(0:15)/16)" en off mutex "Unprotected" mode "Read and Write" write_mode "Read Before Write" time_out "0" latency "1" explicit_data_type off gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "4" bin_pt "0" preci_type "Single" xl_use_area off xl_area "[0,0,0,0,0,0,0]" implementation "Block RAM" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shmem" sg_icon_stat "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91" " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2" "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58" ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1" " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we" "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "TxModulation_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Shared Memory1" SID "10216:184" Ports [3, 1] Position [885, 4919, 965, 5011] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shared Memory" SourceType "Xilinx Shared Memory Random Access Memory Block" shared_memory_name "'TxHeaderTranslate'" depth "1024" ownership "Owned and Initialized Elsewhere" initVector "sin(pi*(0:15)/16)" en off mutex "Unprotected" mode "Read and Write" write_mode "Read Before Write" time_out "0" latency "1" explicit_data_type off gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "10" bin_pt "0" preci_type "Single" xl_use_area off xl_area "[0,0,0,0,0,0,0]" implementation "Block RAM" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shmem" sg_icon_stat "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91" " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2" "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58" ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1" " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we" "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "TxHeaderTranslate_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Shared Memory2" SID "10216:185" Ports [3, 1] Position [885, 5059, 965, 5151] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shared Memory" SourceType "Xilinx Shared Memory Random Access Memory Block" shared_memory_name "'ChannelEstimates'" depth "256" ownership "Owned and Initialized Elsewhere" initVector "sin(pi*(0:15)/16)" en off mutex "Unprotected" mode "Read and Write" write_mode "Read Before Write" time_out "0" latency "1" explicit_data_type off gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" xl_use_area off xl_area "[0,0,0,0,0,0,0]" implementation "Block RAM" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shmem" sg_icon_stat "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91" " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2" "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58" ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1" " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we" "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "ChannelEstimates_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Shared Memory3" SID "10216:186" Ports [3, 1] Position [885, 5199, 965, 5291] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shared Memory" SourceType "Xilinx Shared Memory Random Access Memory Block" shared_memory_name "'RxModulation'" depth "192" ownership "Owned and Initialized Elsewhere" initVector "sin(pi*(0:15)/16)" en off mutex "Unprotected" mode "Read and Write" write_mode "Read Before Write" time_out "0" latency "1" explicit_data_type off gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "4" bin_pt "0" preci_type "Single" xl_use_area off xl_area "[0,0,0,0,0,0,0]" implementation "Block RAM" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shmem" sg_icon_stat "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91" " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2" "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58" ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1" " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we" "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "RxModulation_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Shared Memory4" SID "10216:187" Ports [3, 1] Position [885, 5339, 965, 5431] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shared Memory" SourceType "Xilinx Shared Memory Random Access Memory Block" shared_memory_name "'EVM_perSym'" depth "256" ownership "Owned and Initialized Elsewhere" initVector "sin(pi*(0:15)/16)" en off mutex "Unprotected" mode "Read and Write" write_mode "Read Before Write" time_out "0" latency "1" explicit_data_type off gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "32" bin_pt "14" preci_type "Single" xl_use_area off xl_area "[0,0,0,0,0,0,0]" implementation "Block RAM" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shmem" sg_icon_stat "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91" " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2" "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58" ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1" " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we" "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "EVM_perSym_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Shared Memory5" SID "10216:188" Ports [3, 1] Position [885, 5479, 965, 5571] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shared Memory" SourceType "Xilinx Shared Memory Random Access Memory Block" shared_memory_name "'EVM_perSC'" depth "64" ownership "Owned and Initialized Elsewhere" initVector "sin(pi*(0:15)/16)" en off mutex "Unprotected" mode "Read and Write" write_mode "Read Before Write" time_out "0" latency "1" explicit_data_type off gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "32" bin_pt "22" preci_type "Single" xl_use_area off xl_area "[0,0,0,0,0,0,0]" implementation "Block RAM" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shmem" sg_icon_stat "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91" " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2" "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58" ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1" " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we" "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "EVM_perSC_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Shared Memory6" SID "10216:189" Ports [3, 1] Position [885, 5619, 965, 5711] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shared Memory" SourceType "Xilinx Shared Memory Random Access Memory Block" shared_memory_name "'PktBufFreqOffsets'" depth "32" ownership "Owned and Initialized Elsewhere" initVector "sin(pi*(0:15)/16)" en off mutex "Unprotected" mode "Read and Write" write_mode "Read Before Write" time_out "0" latency "1" explicit_data_type off gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "32" preci_type "Single" xl_use_area off xl_area "[0,0,0,0,0,0,0]" implementation "Block RAM" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shmem" sg_icon_stat "80,92,3,1,white,blue,0,bf435243,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 92 92 0 ],[0.77 0.82 0.91" " ]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[58.21 58.2" "1 69.21 58.21 69.21 69.21 69.21 58.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[47.21 47.21 58.21 58" ".21 47.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[36.21 36.21 47.21 47.21 36.21 ],[1 1" " 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[25.21 25.21 36.21 25.21 36.21 36.21 25.21 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we" "');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "PktBufFreqOffsets_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Sl_addrAck" SID "10216:105" Ports [1, 1] Position [670, 150, 730, 170] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_addrAck'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Sl_rdComp" SID "10216:107" Ports [1, 1] Position [670, 320, 730, 340] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_rdComp'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Sl_rdDAck" SID "10216:109" Ports [1, 1] Position [670, 1170, 730, 1190] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_rdDAck'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Sl_rdDBus" SID "10216:111" Ports [1, 1] Position [670, 1280, 730, 1300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_rdDBus'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Sl_wait" SID "10216:113" Ports [1, 1] Position [180, 915, 240, 935] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_wait'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Sl_wrComp" SID "10216:117" Ports [1, 1] Position [670, 1080, 730, 1100] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_wrComp'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Sl_wrDAck" SID "10216:115" Ports [1, 1] Position [670, 600, 730, 620] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_wrDAck'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Terminator Name "Terminator" SID "10216:104" Position [915, 50, 935, 70] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator1" SID "10216:106" Position [915, 120, 935, 140] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator2" SID "10216:108" Position [915, 320, 935, 340] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator3" SID "10216:110" Position [915, 390, 935, 410] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator4" SID "10216:112" Position [420, 915, 440, 935] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator5" SID "10216:114" Position [915, 185, 935, 205] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator6" SID "10216:116" Position [915, 255, 935, 275] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "To Register" SID "10216:142" Ports [2, 1] Position [895, 457, 955, 513] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'FEC_Config'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "FEC_Config_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register1" SID "10216:143" Ports [2, 1] Position [895, 562, 955, 618] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Tx_OFDM_SymCounts'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Tx_OFDM_SymCounts_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register10" SID "10216:152" Ports [2, 1] Position [895, 1512, 955, 1568] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Tx_Scaling'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Tx_Scaling_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register11" SID "10216:153" Ports [2, 1] Position [895, 1617, 955, 1673] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'pktDet_durations'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "pktDet_durations_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register12" SID "10216:154" Ports [2, 1] Position [895, 1722, 955, 1778] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'pktDet_thresholds'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "pktDet_thresholds_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register13" SID "10216:155" Ports [2, 1] Position [895, 1827, 955, 1883] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'pktDet_autoCorrParams'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "pktDet_autoCorrParams_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register14" SID "10216:156" Ports [2, 1] Position [895, 1932, 955, 1988] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'pktDet_controlBits'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "pktDet_controlBits_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register15" SID "10216:157" Ports [2, 1] Position [895, 2037, 955, 2093] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_AF_TxScaling'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Rx_AF_TxScaling_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register16" SID "10216:158" Ports [2, 1] Position [895, 2142, 955, 2198] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_AF_Blanking'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Rx_AF_Blanking_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register17" SID "10216:159" Ports [2, 1] Position [895, 2247, 955, 2303] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_PilotCalcParams'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Rx_PilotCalcParams_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register18" SID "10216:160" Ports [2, 1] Position [895, 2357, 955, 2413] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_Constellation_Scaling'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Rx_Constellation_Scaling_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register19" SID "10216:161" Ports [2, 1] Position [895, 2462, 955, 2518] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_PktDet_Delay'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Rx_PktDet_Delay_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register2" SID "10216:144" Ports [2, 1] Position [895, 667, 955, 723] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_OFDM_SymbolCounts'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Rx_OFDM_SymbolCounts_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register20" SID "10216:162" Ports [2, 1] Position [895, 2567, 955, 2623] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_ChanEst_MinMag'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Rx_ChanEst_MinMag_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register21" SID "10216:163" Ports [2, 1] Position [895, 2672, 955, 2728] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_pktByteNums'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Rx_pktByteNums_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register22" SID "10216:164" Ports [2, 1] Position [895, 2777, 955, 2833] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_FixedPktLen'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Rx_FixedPktLen_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register23" SID "10216:165" Ports [2, 1] Position [895, 2882, 955, 2938] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_PktDet_LongCorr_Thresholds'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Rx_PktDet_LongCorr_Thresholds_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register24" SID "10216:166" Ports [2, 1] Position [895, 2987, 955, 3043] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_PktDet_LongCorr_Params'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Rx_PktDet_LongCorr_Params_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register25" SID "10216:167" Ports [2, 1] Position [895, 3092, 955, 3148] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_coarseCFO_correction'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Rx_coarseCFO_correction_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register26" SID "10216:168" Ports [2, 1] Position [895, 3197, 955, 3253] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_PreCFO_PilotCalcCorrection'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Rx_PreCFO_PilotCalcCorrection_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register27" SID "10216:169" Ports [2, 1] Position [895, 3302, 955, 3358] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_PreCFO_Options'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Rx_PreCFO_Options_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register28" SID "10216:170" Ports [2, 1] Position [895, 3407, 955, 3463] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_ControlBits'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Rx_ControlBits_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register29" SID "10216:171" Ports [2, 1] Position [895, 3512, 955, 3568] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Action3'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TxRx_AutoReply_Action3_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register3" SID "10216:145" Ports [2, 1] Position [895, 777, 955, 833] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_Pilots_Values'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TxRx_Pilots_Values_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register30" SID "10216:172" Ports [2, 1] Position [895, 3617, 955, 3673] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Action2'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TxRx_AutoReply_Action2_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register31" SID "10216:173" Ports [2, 1] Position [895, 3722, 955, 3778] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Action1'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TxRx_AutoReply_Action1_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register32" SID "10216:174" Ports [2, 1] Position [895, 3827, 955, 3883] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Action0'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TxRx_AutoReply_Action0_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register33" SID "10216:175" Ports [2, 1] Position [895, 3937, 955, 3993] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Match5'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TxRx_AutoReply_Match5_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register34" SID "10216:176" Ports [2, 1] Position [895, 4042, 955, 4098] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Match4'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TxRx_AutoReply_Match4_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register35" SID "10216:177" Ports [2, 1] Position [895, 4147, 955, 4203] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Match3'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TxRx_AutoReply_Match3_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register36" SID "10216:178" Ports [2, 1] Position [895, 4252, 955, 4308] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Match2'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TxRx_AutoReply_Match2_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register37" SID "10216:179" Ports [2, 1] Position [895, 4357, 955, 4413] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Action5'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TxRx_AutoReply_Action5_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register38" SID "10216:180" Ports [2, 1] Position [895, 4462, 955, 4518] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Action4'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TxRx_AutoReply_Action4_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register39" SID "10216:181" Ports [2, 1] Position [895, 4567, 955, 4623] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Match1'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TxRx_AutoReply_Match1_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register4" SID "10216:146" Ports [2, 1] Position [895, 882, 955, 938] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_Pilots_Index'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TxRx_Pilots_Index_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register40" SID "10216:182" Ports [2, 1] Position [895, 4672, 955, 4728] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Match0'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TxRx_AutoReply_Match0_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register5" SID "10216:147" Ports [2, 1] Position [895, 987, 955, 1043] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_Interrupt_PktBuf_Ctrl'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TxRx_Interrupt_PktBuf_Ctrl_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register6" SID "10216:148" Ports [2, 1] Position [895, 1092, 955, 1148] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_FFT_Scaling'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "12" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "TxRx_FFT_Scaling_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register7" SID "10216:149" Ports [2, 1] Position [895, 1197, 955, 1253] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Tx_Start_Reset_Control'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Tx_Start_Reset_Control_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register8" SID "10216:150" Ports [2, 1] Position [895, 1302, 955, 1358] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Tx_ControlBits'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Tx_ControlBits_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register9" SID "10216:151" Ports [2, 1] Position [895, 1407, 955, 1463] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Tx_Delays'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" Port { PortNumber 1 Name "Tx_Delays_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "plb_decode" SID "10216:131" Ports [7, 9] Position [345, 984, 515, 1396] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/MCode" SourceType "Xilinx MCode Block Block" infoedit "Pass input values to a MATLAB function for evaluation in Xilinx fixed-point type. The input ports of t" "he block are input arguments of the function. The output ports of the block are output arguments of the function." mfname "xlmax" explicit_period off period "1" dbl_ovrd off enable_stdout off enable_debug off xl_use_area off xl_area "[0,0,0,0,0,0,0]" mfilecontent "function [wrDBusReg, addrAck, rdComp, wrDAck, bankAddr, RNWReg, rdDAck, rdDBus, linearAddr] = plb_" "bus_decode(plbRst, plbABus, plbPAValid, plbRNW, plbWrDBus, rdData, addrPref)\n\n% constant variables (TODO: should " "pass from outside)\nADDRPREF_LEN = 16;\nBANKADDR_LEN = 2;\nLINEARADDR_LEN = 12;\nABUS_LEN = 32;\nDBUS_LEN = 32;\n\n" "% declare and initialize persistent variables\n% register input bus signals\npersistent plbRstReg_, plbRstReg_ = xl" "_state(0, {xlBoolean});\npersistent plbABusReg_, plbABusReg_ = xl_state(0, {xlUnsigned, ABUS_LEN, 0});\npersistent " "plbPAValidReg_, plbPAValidReg_ = xl_state(0, {xlBoolean});\npersistent plbRNWReg_, plbRNWReg_ = xl_state(0, {xlUnsi" "gned, 1, 0});\npersistent plbWrDBusReg_, plbWrDBusReg_ = xl_state(0, {xlUnsigned, DBUS_LEN, 0});\n\n% ===== rest of" " the outputs =====\n\nbankAddr = xl_slice(plbABusReg_, 2+BANKADDR_LEN+LINEARADDR_LEN-1, 2+LINEARADDR_LEN);\nlinea" "rAddr = xl_slice(plbABusReg_, 2+LINEARADDR_LEN-1, 2);\nRNWReg = plbRNWReg_;\nwrDBusReg = plbWrDBusReg_;\n\n% ===== " "p_select =====\n\n% register PAValid\npersistent aValidReg, aValidReg = xl_state(0, {xlBoolean});\naValidReg = plbP" "AValidReg_;\n\n% extract and register the address prefix\naddrPref_in = xl_slice(plbABusReg_, xl_nbits(plbABusReg_)" "-1, xl_nbits(plbABusReg_)-ADDRPREF_LEN);\nif addrPref_in == addrPref\n ps1 = true;\nelse \n ps1 = false;\nend" " \n\npersistent ps1Reg, ps1Reg = xl_state(0, ps1);\nps1Reg = ps1;\n\nps = xl_and(ps1Reg, aValidReg);\n\n% ===== add" "rAck =====\n\n% register ps\npersistent psReg, psReg = xl_state(0, ps);\n\naddrAck = xfix({xlUnsigned, 1, 0}, xl_an" "d(xl_not(plbRstReg_), ps, xl_not(psReg)));\n\npsReg = ps;\n\n% ===== rdComp, rd/wr DAck =====\n \nrdComp1 = xfix({x" "lUnsigned, 1, 0}, xl_and(addrAck, RNWReg));\n\nNUM_rdCompDelay = 3;\npersistent rdCompDelay, rdCompDelay = xl_state" "(zeros(1, NUM_rdCompDelay), rdComp1, NUM_rdCompDelay);\nrdComp2 = rdCompDelay.back;\nrdCompDelay.push_front_pop_bac" "k(rdComp1);\n\npersistent rdCompReg, rdCompReg = xl_state(0, rdComp1);\nrdComp = rdCompReg;\nrdCompReg = rdComp2;\n" "\npersistent rdDAckReg, rdDAckReg = xl_state(0, rdComp1);\nrdDAck = rdDAckReg;\nrdDAckReg = rdComp;\n\npersistent w" "rDAckReg, wrDAckReg = xl_state(0, addrAck);\nwrDAck = wrDAckReg;\nwrDAckReg = xl_and(addrAck, xl_not(RNWReg));\n\n%" " ===== rdDBus =====\n\nrdSel = xl_or(rdComp2, rdComp);\n\nif rdSel == 1\n rdDBus1 = rdData;\nelse\n rdDBus1 =" " 0;\nend % if\n\npersistent rdDBusReg, rdDBusReg = xl_state(0, rdDBus1);\nrdDBus = rdDBusReg;\nrdDBusReg = rdDBus1;" "\n\n% rdDBus = xl_concat(rdDBus32, rdDBus32);\n% rdDBus = rdDBus32;\n\n% ===== update the persistent variables ====" "=\n\nplbRstReg_ = plbRst;\nplbABusReg_ = plbABus;\nplbPAValidReg_ = plbPAValid;\nplbRNWReg_ = plbRNW;\nplbWrDBusReg" "_ = xl_slice(plbWrDBus, DBUS_LEN-1, 0);\n" suppress_output "on" defparams "{}" hide_port_list "{}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mcode" sg_icon_stat "170,412,7,9,white,blue,0,43a237d5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 170 170 0 0 ],[0 0 412 412 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 170 170 0 0 ],[0 0 412 412 0 ]);\npatch([31.6 66.28 90.28 114.28 138.28 90.28 55.6 31.6 ],[232.64" " 232.64 256.64 232.64 256.64 256.64 256.64 232.64 ],[1 1 1 ]);\npatch([55.6 90.28 66.28 31.6 55.6 ],[208.64 208.64 " "232.64 232.64 208.64 ],[0.931 0.946 0.973 ]);\npatch([31.6 66.28 90.28 55.6 31.6 ],[184.64 184.64 208.64 208.64 184" ".64 ],[1 1 1 ]);\npatch([55.6 138.28 114.28 90.28 66.28 31.6 55.6 ],[160.64 160.64 184.64 160.64 184.64 184.64 160." "64 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nco" "lor('black');port_label('input',1,'plbRst');\ncolor('black');port_label('input',2,'plbABus');\ncolor('black');port_" "label('input',3,'plbPAValid');\ncolor('black');port_label('input',4,'plbRNW');\ncolor('black');port_label('input',5" ",'plbWrDBus');\ncolor('black');port_label('input',6,'rdData');\ncolor('black');port_label('input',7,'addrPref');\nc" "olor('black');port_label('output',1,'wrDBusReg');\ncolor('black');port_label('output',2,'addrAck');\ncolor('black')" ";port_label('output',3,'rdComp');\ncolor('black');port_label('output',4,'wrDAck');\ncolor('black');port_label('outp" "ut',5,'bankAddr');\ncolor('black');port_label('output',6,'RNWReg');\ncolor('black');port_label('output',7,'rdDAck')" ";\ncolor('black');port_label('output',8,'rdDBus');\ncolor('black');port_label('output',9,'linearAddr');\ncolor('bla" "ck');disp('\\bf{xlmax}','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "wrDBusReg" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 2 Name "Sl_addrAck" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 3 Name "Sl_rdComp" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 4 Name "Sl_wrDAck" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 5 Name "bankAddr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 6 Name "RNWReg" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 7 Name "Sl_rdDAck" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 8 Name "Sl_rdDBus" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 9 Name "linearAddr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "plb_memmap" SID "10216:190" Ports [63, 104] Position [615, 2690, 785, 3205] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/MCode" SourceType "Xilinx MCode Block Block" infoedit "Pass input values to a MATLAB function for evaluation in Xilinx fixed-point type. The input ports of t" "he block are input arguments of the function. The output ports of the block are output arguments of the function." mfname "xlmax" explicit_period off period "1" dbl_ovrd off enable_stdout off enable_debug off xl_use_area off xl_area "[0,0,0,0,0,0,0]" mfilecontent "function [read_bank_out, sm_FEC_Config_din, sm_FEC_Config_en, sm_Tx_OFDM_SymCounts_din, sm_Tx_OFDM" "_SymCounts_en, sm_Rx_OFDM_SymbolCounts_din, sm_Rx_OFDM_SymbolCounts_en, sm_TxRx_Pilots_Values_din, sm_TxRx_Pilots_V" "alues_en, sm_TxRx_Pilots_Index_din, sm_TxRx_Pilots_Index_en, sm_TxRx_Interrupt_PktBuf_Ctrl_din, sm_TxRx_Interrupt_P" "ktBuf_Ctrl_en, sm_TxRx_FFT_Scaling_din, sm_TxRx_FFT_Scaling_en, sm_Tx_Start_Reset_Control_din, sm_Tx_Start_Reset_Co" "ntrol_en, sm_Tx_ControlBits_din, sm_Tx_ControlBits_en, sm_Tx_Delays_din, sm_Tx_Delays_en, sm_Tx_Scaling_din, sm_Tx_" "Scaling_en, sm_pktDet_durations_din, sm_pktDet_durations_en, sm_pktDet_thresholds_din, sm_pktDet_thresholds_en, sm_" "pktDet_autoCorrParams_din, sm_pktDet_autoCorrParams_en, sm_pktDet_controlBits_din, sm_pktDet_controlBits_en, sm_Rx_" "AF_TxScaling_din, sm_Rx_AF_TxScaling_en, sm_Rx_AF_Blanking_din, sm_Rx_AF_Blanking_en, sm_Rx_PilotCalcParams_din, sm" "_Rx_PilotCalcParams_en, sm_Rx_Constellation_Scaling_din, sm_Rx_Constellation_Scaling_en, sm_Rx_PktDet_Delay_din, sm" "_Rx_PktDet_Delay_en, sm_Rx_ChanEst_MinMag_din, sm_Rx_ChanEst_MinMag_en, sm_Rx_pktByteNums_din, sm_Rx_pktByteNums_en" ", sm_Rx_FixedPktLen_din, sm_Rx_FixedPktLen_en, sm_Rx_PktDet_LongCorr_Thresholds_din, sm_Rx_PktDet_LongCorr_Threshol" "ds_en, sm_Rx_PktDet_LongCorr_Params_din, sm_Rx_PktDet_LongCorr_Params_en, sm_Rx_coarseCFO_correction_din, sm_Rx_coa" "rseCFO_correction_en, sm_Rx_PreCFO_PilotCalcCorrection_din, sm_Rx_PreCFO_PilotCalcCorrection_en, sm_Rx_PreCFO_Optio" "ns_din, sm_Rx_PreCFO_Options_en, sm_Rx_ControlBits_din, sm_Rx_ControlBits_en, sm_TxRx_AutoReply_Action3_din, sm_TxR" "x_AutoReply_Action3_en, sm_TxRx_AutoReply_Action2_din, sm_TxRx_AutoReply_Action2_en, sm_TxRx_AutoReply_Action1_din," " sm_TxRx_AutoReply_Action1_en, sm_TxRx_AutoReply_Action0_din, sm_TxRx_AutoReply_Action0_en, sm_TxRx_AutoReply_Match" "5_din, sm_TxRx_AutoReply_Match5_en, sm_TxRx_AutoReply_Match4_din, sm_TxRx_AutoReply_Match4_en, sm_TxRx_AutoReply_Ma" "tch3_din, sm_TxRx_AutoReply_Match3_en, sm_TxRx_AutoReply_Match2_din, sm_TxRx_AutoReply_Match2_en, sm_TxRx_AutoReply" "_Action5_din, sm_TxRx_AutoReply_Action5_en, sm_TxRx_AutoReply_Action4_din, sm_TxRx_AutoReply_Action4_en, sm_TxRx_Au" "toReply_Match1_din, sm_TxRx_AutoReply_Match1_en, sm_TxRx_AutoReply_Match0_din, sm_TxRx_AutoReply_Match0_en, sm_TxMo" "dulation_addr, sm_TxModulation_din, sm_TxModulation_we, sm_TxHeaderTranslate_addr, sm_TxHeaderTranslate_din, sm_TxH" "eaderTranslate_we, sm_ChannelEstimates_addr, sm_ChannelEstimates_din, sm_ChannelEstimates_we, sm_RxModulation_addr," " sm_RxModulation_din, sm_RxModulation_we, sm_EVM_perSym_addr, sm_EVM_perSym_din, sm_EVM_perSym_we, sm_EVM_perSC_add" "r, sm_EVM_perSC_din, sm_EVM_perSC_we, sm_PktBufFreqOffsets_addr, sm_PktBufFreqOffsets_din, sm_PktBufFreqOffsets_we]" " = plb_memmap(wrDBus, bankAddr, linearAddr, RNWReg, addrAck, sm_midPacketRSSI, sm_Tx_PktRunning, sm_Rx_pktDetEventC" "ount, sm_Rx_coarseCFOest, sm_Rx_pilotCFOest, sm_Rx_pktDone_interruptStatus, sm_Rx_BER_TotalBits, sm_Rx_BER_Errors, " "sm_Rx_Gains, sm_pktDet_status, sm_FEC_Config, sm_Tx_OFDM_SymCounts, sm_Rx_OFDM_SymbolCounts, sm_TxRx_Pilots_Values," " sm_TxRx_Pilots_Index, sm_TxRx_Interrupt_PktBuf_Ctrl, sm_TxRx_FFT_Scaling, sm_Tx_Start_Reset_Control, sm_Tx_Control" "Bits, sm_Tx_Delays, sm_Tx_Scaling, sm_pktDet_durations, sm_pktDet_thresholds, sm_pktDet_autoCorrParams, sm_pktDet_c" "ontrolBits, sm_Rx_AF_TxScaling, sm_Rx_AF_Blanking, sm_Rx_PilotCalcParams, sm_Rx_Constellation_Scaling, sm_Rx_PktDet" "_Delay, sm_Rx_ChanEst_MinMag, sm_Rx_pktByteNums, sm_Rx_FixedPktLen, sm_Rx_PktDet_LongCorr_Thresholds, sm_Rx_PktDet_" "LongCorr_Params, sm_Rx_coarseCFO_correction, sm_Rx_PreCFO_PilotCalcCorrection, sm_Rx_PreCFO_Options, sm_Rx_ControlB" "its, sm_TxRx_AutoReply_Action3, sm_TxRx_AutoReply_Action2, sm_TxRx_AutoReply_Action1, sm_TxRx_AutoReply_Action0, sm" "_TxRx_AutoReply_Match5, sm_TxRx_AutoReply_Match4, sm_TxRx_AutoReply_Match3, sm_TxRx_AutoReply_Match2, sm_TxRx_AutoR" "eply_Action5, sm_TxRx_AutoReply_Action4, sm_TxRx_AutoReply_Match1, sm_TxRx_AutoReply_Match0, sm_TxModulation, sm_Tx" "HeaderTranslate, sm_ChannelEstimates, sm_RxModulation, sm_EVM_perSym, sm_EVM_perSC, sm_PktBufFreqOffsets)\n\n\n% co" "nnvert the input data to UFix_32_0 (the bus data type)\n% 'From Register' blocks\n% sm_midPacketRSSI_bus = xfix({xl" "Unsigned, 32, 0}, 0);\nsm_midPacketRSSI_bus = xl_force(sm_midPacketRSSI, xlUnsigned, 0);\n\n% sm_Tx_PktRunning_bus " "= xfix({xlUnsigned, 32, 0}, 0);\nsm_Tx_PktRunning_bus = xl_force(sm_Tx_PktRunning, xlUnsigned, 0);\n\n% sm_Rx_pktDe" "tEventCount_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_Rx_pktDetEventCount_bus = xl_force(sm_Rx_pktDetEventCount, xlUn" "signed, 0);\n\n% sm_Rx_coarseCFOest_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_Rx_coarseCFOest_bus = xl_force(sm_Rx_co" "arseCFOest, xlUnsigned, 0);\n\n% sm_Rx_pilotCFOest_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_Rx_pilotCFOest_bus = xl_" "force(sm_Rx_pilotCFOest, xlUnsigned, 0);\n\n% sm_Rx_pktDone_interruptStatus_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm" "_Rx_pktDone_interruptStatus_bus = xl_force(sm_Rx_pktDone_interruptStatus, xlUnsigned, 0);\n\n% sm_Rx_BER_TotalBits_" "bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_Rx_BER_TotalBits_bus = xl_force(sm_Rx_BER_TotalBits, xlUnsigned, 0);\n\n% s" "m_Rx_BER_Errors_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_Rx_BER_Errors_bus = xl_force(sm_Rx_BER_Errors, xlUnsigned, " "0);\n\n% sm_Rx_Gains_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_Rx_Gains_bus = xl_force(sm_Rx_Gains, xlUnsigned, 0);\n" "\n% sm_pktDet_status_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_pktDet_status_bus = xl_force(sm_pktDet_status, xlUnsig" "ned, 0);\n\n% 'To Register' blocks\n\n% sm_FEC_Config_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_FEC_Config_dout = xl" "_force(sm_FEC_Config, xlUnsigned, 0);\n\n% sm_Tx_OFDM_SymCounts_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_Tx_OFDM_Sy" "mCounts_dout = xl_force(sm_Tx_OFDM_SymCounts, xlUnsigned, 0);\n\n% sm_Rx_OFDM_SymbolCounts_dout = xfix({xlUnsigned," " 32, 0}, 0);\nsm_Rx_OFDM_SymbolCounts_dout = xl_force(sm_Rx_OFDM_SymbolCounts, xlUnsigned, 0);\n\n% sm_TxRx_Pilots_" "Values_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxRx_Pilots_Values_dout = xl_force(sm_TxRx_Pilots_Values, xlUnsigne" "d, 0);\n\n% sm_TxRx_Pilots_Index_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxRx_Pilots_Index_dout = xl_force(sm_TxRx" "_Pilots_Index, xlUnsigned, 0);\n\n% sm_TxRx_Interrupt_PktBuf_Ctrl_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxRx_Int" "errupt_PktBuf_Ctrl_dout = xl_force(sm_TxRx_Interrupt_PktBuf_Ctrl, xlUnsigned, 0);\n\n% sm_TxRx_FFT_Scaling_dout = x" "fix({xlUnsigned, 32, 0}, 0);\nsm_TxRx_FFT_Scaling_dout = xl_force(sm_TxRx_FFT_Scaling, xlUnsigned, 0);\n\n% sm_Tx_S" "tart_Reset_Control_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_Tx_Start_Reset_Control_dout = xl_force(sm_Tx_Start_Rese" "t_Control, xlUnsigned, 0);\n\n% sm_Tx_ControlBits_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_Tx_ControlBits_dout = xl" "_force(sm_Tx_ControlBits, xlUnsigned, 0);\n\n% sm_Tx_Delays_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_Tx_Delays_dout" " = xl_force(sm_Tx_Delays, xlUnsigned, 0);\n\n% sm_Tx_Scaling_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_Tx_Scaling_do" "ut = xl_force(sm_Tx_Scaling, xlUnsigned, 0);\n\n% sm_pktDet_durations_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_pktD" "et_durations_dout = xl_force(sm_pktDet_durations, xlUnsigned, 0);\n\n% sm_pktDet_thresholds_dout = xfix({xlUnsigned" ", 32, 0}, 0);\nsm_pktDet_thresholds_dout = xl_force(sm_pktDet_thresholds, xlUnsigned, 0);\n\n% sm_pktDet_autoCorrPa" "rams_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_pktDet_autoCorrParams_dout = xl_force(sm_pktDet_autoCorrParams, xlUns" "igned, 0);\n\n% sm_pktDet_controlBits_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_pktDet_controlBits_dout = xl_force(s" "m_pktDet_controlBits, xlUnsigned, 0);\n\n% sm_Rx_AF_TxScaling_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_Rx_AF_TxScal" "ing_dout = xl_force(sm_Rx_AF_TxScaling, xlUnsigned, 0);\n\n% sm_Rx_AF_Blanking_dout = xfix({xlUnsigned, 32, 0}, 0);" "\nsm_Rx_AF_Blanking_dout = xl_force(sm_Rx_AF_Blanking, xlUnsigned, 0);\n\n% sm_Rx_PilotCalcParams_dout = xfix({xlUn" "signed, 32, 0}, 0);\nsm_Rx_PilotCalcParams_dout = xl_force(sm_Rx_PilotCalcParams, xlUnsigned, 0);\n\n% sm_Rx_Conste" "llation_Scaling_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_Rx_Constellation_Scaling_dout = xl_force(sm_Rx_Constellati" "on_Scaling, xlUnsigned, 0);\n\n% sm_Rx_PktDet_Delay_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_Rx_PktDet_Delay_dout =" " xl_force(sm_Rx_PktDet_Delay, xlUnsigned, 0);\n\n% sm_Rx_ChanEst_MinMag_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_Rx" "_ChanEst_MinMag_dout = xl_force(sm_Rx_ChanEst_MinMag, xlUnsigned, 0);\n\n% sm_Rx_pktByteNums_dout = xfix({xlUnsigne" "d, 32, 0}, 0);\nsm_Rx_pktByteNums_dout = xl_force(sm_Rx_pktByteNums, xlUnsigned, 0);\n\n% sm_Rx_FixedPktLen_dout = " "xfix({xlUnsigned, 32, 0}, 0);\nsm_Rx_FixedPktLen_dout = xl_force(sm_Rx_FixedPktLen, xlUnsigned, 0);\n\n% sm_Rx_PktD" "et_LongCorr_Thresholds_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_Rx_PktDet_LongCorr_Thresholds_dout = xl_force(sm_Rx" "_PktDet_LongCorr_Thresholds, xlUnsigned, 0);\n\n% sm_Rx_PktDet_LongCorr_Params_dout = xfix({xlUnsigned, 32, 0}, 0);" "\nsm_Rx_PktDet_LongCorr_Params_dout = xl_force(sm_Rx_PktDet_LongCorr_Params, xlUnsigned, 0);\n\n% sm_Rx_coarseCFO_c" "orrection_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_Rx_coarseCFO_correction_dout = xl_force(sm_Rx_coarseCFO_correcti" "on, xlUnsigned, 0);\n\n% sm_Rx_PreCFO_PilotCalcCorrection_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_Rx_PreCFO_PilotC" "alcCorrection_dout = xl_force(sm_Rx_PreCFO_PilotCalcCorrection, xlUnsigned, 0);\n\n% sm_Rx_PreCFO_Options_dout = xf" "ix({xlUnsigned, 32, 0}, 0);\nsm_Rx_PreCFO_Options_dout = xl_force(sm_Rx_PreCFO_Options, xlUnsigned, 0);\n\n% sm_Rx_" "ControlBits_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_Rx_ControlBits_dout = xl_force(sm_Rx_ControlBits, xlUnsigned, " "0);\n\n% sm_TxRx_AutoReply_Action3_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxRx_AutoReply_Action3_dout = xl_force(" "sm_TxRx_AutoReply_Action3, xlUnsigned, 0);\n\n% sm_TxRx_AutoReply_Action2_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_" "TxRx_AutoReply_Action2_dout = xl_force(sm_TxRx_AutoReply_Action2, xlUnsigned, 0);\n\n% sm_TxRx_AutoReply_Action1_do" "ut = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxRx_AutoReply_Action1_dout = xl_force(sm_TxRx_AutoReply_Action1, xlUnsigned" ", 0);\n\n% sm_TxRx_AutoReply_Action0_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxRx_AutoReply_Action0_dout = xl_forc" "e(sm_TxRx_AutoReply_Action0, xlUnsigned, 0);\n\n% sm_TxRx_AutoReply_Match5_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm" "_TxRx_AutoReply_Match5_dout = xl_force(sm_TxRx_AutoReply_Match5, xlUnsigned, 0);\n\n% sm_TxRx_AutoReply_Match4_dout" " = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxRx_AutoReply_Match4_dout = xl_force(sm_TxRx_AutoReply_Match4, xlUnsigned, 0)" ";\n\n% sm_TxRx_AutoReply_Match3_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxRx_AutoReply_Match3_dout = xl_force(sm_T" "xRx_AutoReply_Match3, xlUnsigned, 0);\n\n% sm_TxRx_AutoReply_Match2_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxRx_A" "utoReply_Match2_dout = xl_force(sm_TxRx_AutoReply_Match2, xlUnsigned, 0);\n\n% sm_TxRx_AutoReply_Action5_dout = xfi" "x({xlUnsigned, 32, 0}, 0);\nsm_TxRx_AutoReply_Action5_dout = xl_force(sm_TxRx_AutoReply_Action5, xlUnsigned, 0);\n\n" "% sm_TxRx_AutoReply_Action4_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxRx_AutoReply_Action4_dout = xl_force(sm_TxRx" "_AutoReply_Action4, xlUnsigned, 0);\n\n% sm_TxRx_AutoReply_Match1_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxRx_Aut" "oReply_Match1_dout = xl_force(sm_TxRx_AutoReply_Match1, xlUnsigned, 0);\n\n% sm_TxRx_AutoReply_Match0_dout = xfix({" "xlUnsigned, 32, 0}, 0);\nsm_TxRx_AutoReply_Match0_dout = xl_force(sm_TxRx_AutoReply_Match0, xlUnsigned, 0);\n\n\n% " "'From FIFO' blocks\n% 'To FIFO' blocks\n% 'Shared Memory' blocks\n% TxModulation_bus = xfix({xlUnsigned, 32, 0}, 0)" ";\nsm_TxModulation_bus = xl_force(sm_TxModulation, xlUnsigned, 0);\n\n% TxHeaderTranslate_bus = xfix({xlUnsigned, 3" "2, 0}, 0);\nsm_TxHeaderTranslate_bus = xl_force(sm_TxHeaderTranslate, xlUnsigned, 0);\n\n% ChannelEstimates_bus = x" "fix({xlUnsigned, 32, 0}, 0);\nsm_ChannelEstimates_bus = xl_force(sm_ChannelEstimates, xlUnsigned, 0);\n\n% RxModula" "tion_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RxModulation_bus = xl_force(sm_RxModulation, xlUnsigned, 0);\n\n% EVM_" "perSym_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_EVM_perSym_bus = xl_force(sm_EVM_perSym, xlUnsigned, 0);\n\n% EVM_pe" "rSC_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_EVM_perSC_bus = xl_force(sm_EVM_perSC, xlUnsigned, 0);\n\n% PktBufFreqO" "ffsets_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_PktBufFreqOffsets_bus = xl_force(sm_PktBufFreqOffsets, xlUnsigned, 0" ");\n\n\n% 'dout' ports of 'From Register' blocks\n\n% registered register mux output\npersistent reg_bank_out_reg; " "reg_bank_out_reg = xl_state(0, {xlUnsigned, 32, 0});\nreg_bank_out = reg_bank_out_reg;\n\nif linearAddr == 41\n " "reg_bank_out_reg = sm_midPacketRSSI_bus;\nelseif linearAddr == 42\n reg_bank_out_reg = sm_Tx_PktRunning_bus;\nel" "seif linearAddr == 43\n reg_bank_out_reg = sm_Rx_pktDetEventCount_bus;\nelseif linearAddr == 44\n reg_bank_ou" "t_reg = sm_Rx_coarseCFOest_bus;\nelseif linearAddr == 45\n reg_bank_out_reg = sm_Rx_pilotCFOest_bus;\nelseif lin" "earAddr == 46\n reg_bank_out_reg = sm_Rx_pktDone_interruptStatus_bus;\nelseif linearAddr == 47\n reg_bank_out" "_reg = sm_Rx_BER_TotalBits_bus;\nelseif linearAddr == 48\n reg_bank_out_reg = sm_Rx_BER_Errors_bus;\nelseif line" "arAddr == 49\n reg_bank_out_reg = sm_Rx_Gains_bus;\nelseif linearAddr == 50\n reg_bank_out_reg = sm_pktDet_st" "atus_bus;\nelseif linearAddr == 0\n reg_bank_out_reg = sm_FEC_Config_dout;\nelseif linearAddr == 1\n reg_bank" "_out_reg = sm_Tx_OFDM_SymCounts_dout;\nelseif linearAddr == 2\n reg_bank_out_reg = sm_Rx_OFDM_SymbolCounts_dout;" "\nelseif linearAddr == 3\n reg_bank_out_reg = sm_TxRx_Pilots_Values_dout;\nelseif linearAddr == 4\n reg_bank_" "out_reg = sm_TxRx_Pilots_Index_dout;\nelseif linearAddr == 5\n reg_bank_out_reg = sm_TxRx_Interrupt_PktBuf_Ctrl_" "dout;\nelseif linearAddr == 6\n reg_bank_out_reg = sm_TxRx_FFT_Scaling_dout;\nelseif linearAddr == 7\n reg_ba" "nk_out_reg = sm_Tx_Start_Reset_Control_dout;\nelseif linearAddr == 8\n reg_bank_out_reg = sm_Tx_ControlBits_dout" ";\nelseif linearAddr == 9\n reg_bank_out_reg = sm_Tx_Delays_dout;\nelseif linearAddr == 10\n reg_bank_out_reg" " = sm_Tx_Scaling_dout;\nelseif linearAddr == 11\n reg_bank_out_reg = sm_pktDet_durations_dout;\nelseif linearAdd" "r == 12\n reg_bank_out_reg = sm_pktDet_thresholds_dout;\nelseif linearAddr == 13\n reg_bank_out_reg = sm_pktD" "et_autoCorrParams_dout;\nelseif linearAddr == 14\n reg_bank_out_reg = sm_pktDet_controlBits_dout;\nelseif linear" "Addr == 15\n reg_bank_out_reg = sm_Rx_AF_TxScaling_dout;\nelseif linearAddr == 16\n reg_bank_out_reg = sm_Rx_" "AF_Blanking_dout;\nelseif linearAddr == 17\n reg_bank_out_reg = sm_Rx_PilotCalcParams_dout;\nelseif linearAddr =" "= 18\n reg_bank_out_reg = sm_Rx_Constellation_Scaling_dout;\nelseif linearAddr == 19\n reg_bank_out_reg = sm_" "Rx_PktDet_Delay_dout;\nelseif linearAddr == 20\n reg_bank_out_reg = sm_Rx_ChanEst_MinMag_dout;\nelseif linearAdd" "r == 21\n reg_bank_out_reg = sm_Rx_pktByteNums_dout;\nelseif linearAddr == 22\n reg_bank_out_reg = sm_Rx_Fixe" "dPktLen_dout;\nelseif linearAddr == 23\n reg_bank_out_reg = sm_Rx_PktDet_LongCorr_Thresholds_dout;\nelseif linea" "rAddr == 24\n reg_bank_out_reg = sm_Rx_PktDet_LongCorr_Params_dout;\nelseif linearAddr == 25\n reg_bank_out_r" "eg = sm_Rx_coarseCFO_correction_dout;\nelseif linearAddr == 26\n reg_bank_out_reg = sm_Rx_PreCFO_PilotCalcCorrec" "tion_dout;\nelseif linearAddr == 27\n reg_bank_out_reg = sm_Rx_PreCFO_Options_dout;\nelseif linearAddr == 28\n " " reg_bank_out_reg = sm_Rx_ControlBits_dout;\nelseif linearAddr == 29\n reg_bank_out_reg = sm_TxRx_AutoReply_Act" "ion3_dout;\nelseif linearAddr == 30\n reg_bank_out_reg = sm_TxRx_AutoReply_Action2_dout;\nelseif linearAddr == 3" "1\n reg_bank_out_reg = sm_TxRx_AutoReply_Action1_dout;\nelseif linearAddr == 32\n reg_bank_out_reg = sm_TxRx_" "AutoReply_Action0_dout;\nelseif linearAddr == 33\n reg_bank_out_reg = sm_TxRx_AutoReply_Match5_dout;\nelseif lin" "earAddr == 34\n reg_bank_out_reg = sm_TxRx_AutoReply_Match4_dout;\nelseif linearAddr == 35\n reg_bank_out_reg" " = sm_TxRx_AutoReply_Match3_dout;\nelseif linearAddr == 36\n reg_bank_out_reg = sm_TxRx_AutoReply_Match2_dout;\n" "elseif linearAddr == 37\n reg_bank_out_reg = sm_TxRx_AutoReply_Action5_dout;\nelseif linearAddr == 38\n reg_b" "ank_out_reg = sm_TxRx_AutoReply_Action4_dout;\nelseif linearAddr == 39\n reg_bank_out_reg = sm_TxRx_AutoReply_Ma" "tch1_dout;\nelseif linearAddr == 40\n reg_bank_out_reg = sm_TxRx_AutoReply_Match0_dout;\n\nend\n\n\n% 'From FIFO" "' and 'To FIFO' blocks\n\n\n\n\n\nopCode = xl_concat(addrAck, RNWReg, bankAddr, linearAddr);\n\n% 'Shared Memory' b" "locks\n\nsm_TxModulation_sel_value = xl_concat(xl_slice(linearAddr, ...\n xl" "_nbits(linearAddr) - 1, ...\n 8) ...\n );" "\nif sm_TxModulation_sel_value == xfix({xlUnsigned, ...\n xl_nbits(linearAdd" "r) - 8, ...\n 0}, ...\n 4);\n sm_T" "xModulation_sel = true;\nelse\n sm_TxModulation_sel = false;\nend\nsm_TxHeaderTranslate_sel_value = xl_concat(xl" "_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n " " 10) ...\n );\nif sm_TxHeaderTranslate_sel_value == xfix({xlU" "nsigned, ...\n xl_nbits(linearAddr) - 10, ...\n " " 0}, ...\n 0);\n sm_TxHeaderTranslate_sel = true;\nelse\n sm" "_TxHeaderTranslate_sel = false;\nend\nsm_ChannelEstimates_sel_value = xl_concat(xl_slice(linearAddr, ...\n " " xl_nbits(linearAddr) - 1, ...\n 8) ...\n " " );\nif sm_ChannelEstimates_sel_value == xfix({xlUnsigned, ...\n " " xl_nbits(linearAddr) - 8, ...\n 0}, ...\n " " 5);\n sm_ChannelEstimates_sel = true;\nelse\n sm_ChannelEstimates_sel = false;\nend\n" "sm_RxModulation_sel_value = xl_concat(xl_slice(linearAddr, ...\n xl_nbits(li" "nearAddr) - 1, ...\n 8) ...\n );\nif sm_R" "xModulation_sel_value == xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 8, ." "..\n 0}, ...\n 6);\n sm_RxModulati" "on_sel = true;\nelse\n sm_RxModulation_sel = false;\nend\nsm_EVM_perSym_sel_value = xl_concat(xl_slice(linearAdd" "r, ...\n xl_nbits(linearAddr) - 1, ...\n " " 8) ...\n );\nif sm_EVM_perSym_sel_value == xfix({xlUnsigned, ...\n " " xl_nbits(linearAddr) - 8, ...\n 0}, ...\n " " 7);\n sm_EVM_perSym_sel = true;\nelse\n sm_EVM_perSym_sel = false;\nend\ns" "m_EVM_perSC_sel_value = xl_concat(xl_slice(linearAddr, ...\n xl_nbits(linear" "Addr) - 1, ...\n 6) ...\n );\nif sm_EVM_p" "erSC_sel_value == xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 6, ...\n " " 0}, ...\n 32);\n sm_EVM_perSC_sel = " "true;\nelse\n sm_EVM_perSC_sel = false;\nend\nsm_PktBufFreqOffsets_sel_value = xl_concat(xl_slice(linearAddr, .." ".\n xl_nbits(linearAddr) - 1, ...\n 5" ") ...\n );\nif sm_PktBufFreqOffsets_sel_value == xfix({xlUnsigned, ...\n " " xl_nbits(linearAddr) - 5, ...\n 0}, ...\n " " 66);\n sm_PktBufFreqOffsets_sel = true;\nelse\n sm_PktBufFreqOffsets_sel" " = false;\nend\n\n\n% registered Shared Memory mux output\npersistent ram_bank_out_reg; ram_bank_out_reg = xl_state" "(0, {xlUnsigned, 32, 0});\nram_bank_out = ram_bank_out_reg;\nif sm_TxModulation_sel\n ram_bank_out_reg = sm_TxMo" "dulation_bus;\nelseif sm_TxHeaderTranslate_sel\n ram_bank_out_reg = sm_TxHeaderTranslate_bus;\nelseif sm_Channel" "Estimates_sel\n ram_bank_out_reg = sm_ChannelEstimates_bus;\nelseif sm_RxModulation_sel\n ram_bank_out_reg = " "sm_RxModulation_bus;\nelseif sm_EVM_perSym_sel\n ram_bank_out_reg = sm_EVM_perSym_bus;\nelseif sm_EVM_perSC_sel\n" " ram_bank_out_reg = sm_EVM_perSC_bus;\nelseif sm_PktBufFreqOffsets_sel\n ram_bank_out_reg = sm_PktBufFreqOffs" "ets_bus;\nend\n\n% 'din' ports of 'Shared Memory' blocks\nsm_TxModulation_din = xl_force(xl_slice(wrDBus, 4 - 1, 0)" ", ...\n xlUnsigned, ...\n 0);\nsm_TxHeaderTranslate" "_din = xl_force(xl_slice(wrDBus, 10 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_ChannelEstimates_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_RxModulation_din = xl_force(xl_slice(wrDBus, 4 " "- 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_EVM_perSym" "_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlSigned, ...\n " " 14);\nsm_EVM_perSC_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlSigned, ...\n 22);\nsm_PktBufFreqOffsets_din = xl_force(xl_slice(wrDBus, 32 - 1" ", 0), ...\n xlUnsigned, ...\n 32);\n\n\n% 'we' port" "s of 'Shared Memory' blocks\npersistent sm_TxModulation_we_reg; sm_TxModulation_we_reg = xl_state(false, {xlBoolean" "});\nsm_TxModulation_we = sm_TxModulation_we_reg;\nopCode_sm_TxModulation = xl_concat(addrAck, ...\n " " RNWReg, ...\n bankAddr, ...\n " " xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n " " 8) ...\n );\nif opCode_sm_TxModulatio" "n == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n xfix({xlUnsigned, ...\n " " xl_nbits(linearAddr) - 8, ...\n " " 0}, ...\n 4) ...\n );\n" " sm_TxModulation_we_reg = true;\nelse\n sm_TxModulation_we_reg = false;\nend\npersistent sm_TxHeaderTranslate" "_we_reg; sm_TxHeaderTranslate_we_reg = xl_state(false, {xlBoolean});\nsm_TxHeaderTranslate_we = sm_TxHeaderTranslat" "e_we_reg;\nopCode_sm_TxHeaderTranslate = xl_concat(addrAck, ...\n RNWReg, ...\n" " bankAddr, ...\n xl_slice(linearAddr, ...\n" " xl_nbits(linearAddr) - 1, ...\n " " 10) ...\n );\nif opCode_sm_TxHeaderTranslate == xl_concat(xfix({xlUnsign" "ed, 4, 0}, 8), ...\n xfix({xlUnsigned, ...\n " " xl_nbits(linearAddr) - 10, ...\n 0}, ...\n " " 0) ...\n );\n sm_TxHeaderTranslate_we" "_reg = true;\nelse\n sm_TxHeaderTranslate_we_reg = false;\nend\npersistent sm_ChannelEstimates_we_reg; sm_Channe" "lEstimates_we_reg = xl_state(false, {xlBoolean});\nsm_ChannelEstimates_we = sm_ChannelEstimates_we_reg;\nopCode_sm_" "ChannelEstimates = xl_concat(addrAck, ...\n RNWReg, ...\n " " bankAddr, ...\n xl_slice(linearAddr, ...\n " " xl_nbits(linearAddr) - 1, ...\n 8) ...\n " " );\nif opCode_sm_ChannelEstimates == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n " " xfix({xlUnsigned, ...\n xl_nbits" "(linearAddr) - 8, ...\n 0}, ...\n " " 5) ...\n );\n sm_ChannelEstimates_we_reg = true;\nelse\n sm" "_ChannelEstimates_we_reg = false;\nend\npersistent sm_RxModulation_we_reg; sm_RxModulation_we_reg = xl_state(false," " {xlBoolean});\nsm_RxModulation_we = sm_RxModulation_we_reg;\nopCode_sm_RxModulation = xl_concat(addrAck, ...\n " " RNWReg, ...\n bankAddr, ...\n " " xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - " "1, ...\n 8) ...\n );\nif opCode_sm_" "RxModulation == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n xfix({xlUnsign" "ed, ...\n xl_nbits(linearAddr) - 8, ...\n " " 0}, ...\n 6) ...\n " " );\n sm_RxModulation_we_reg = true;\nelse\n sm_RxModulation_we_reg = false;\nend\npersistent sm_EVM_p" "erSym_we_reg; sm_EVM_perSym_we_reg = xl_state(false, {xlBoolean});\nsm_EVM_perSym_we = sm_EVM_perSym_we_reg;\nopCod" "e_sm_EVM_perSym = xl_concat(addrAck, ...\n RNWReg, ...\n " " bankAddr, ...\n xl_slice(linearAddr, ...\n " " xl_nbits(linearAddr) - 1, ...\n 8) ...\n " " );\nif opCode_sm_EVM_perSym == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n " " xfix({xlUnsigned, ...\n xl_nbits(linear" "Addr) - 8, ...\n 0}, ...\n " " 7) ...\n );\n sm_EVM_perSym_we_reg = true;\nelse\n sm_EVM_perSym_w" "e_reg = false;\nend\npersistent sm_EVM_perSC_we_reg; sm_EVM_perSC_we_reg = xl_state(false, {xlBoolean});\nsm_EVM_pe" "rSC_we = sm_EVM_perSC_we_reg;\nopCode_sm_EVM_perSC = xl_concat(addrAck, ...\n R" "NWReg, ...\n bankAddr, ...\n xl_slice(linea" "rAddr, ...\n xl_nbits(linearAddr) - 1, ...\n " " 6) ...\n );\nif opCode_sm_EVM_perSC == xl_concat(xfix({xlUns" "igned, 4, 0}, 8), ...\n xfix({xlUnsigned, ...\n " " xl_nbits(linearAddr) - 6, ...\n 0}, ...\n " " 32) ...\n );\n sm_EVM_perSC_we_reg " "= true;\nelse\n sm_EVM_perSC_we_reg = false;\nend\npersistent sm_PktBufFreqOffsets_we_reg; sm_PktBufFreqOffsets_" "we_reg = xl_state(false, {xlBoolean});\nsm_PktBufFreqOffsets_we = sm_PktBufFreqOffsets_we_reg;\nopCode_sm_PktBufFre" "qOffsets = xl_concat(addrAck, ...\n RNWReg, ...\n " " bankAddr, ...\n xl_slice(linearAddr, ...\n " " xl_nbits(linearAddr) - 1, ...\n 5) ...\n " " );\nif opCode_sm_PktBufFreqOffsets == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n " " xfix({xlUnsigned, ...\n xl_nbits(linear" "Addr) - 5, ...\n 0}, ...\n " " 66) ...\n );\n sm_PktBufFreqOffsets_we_reg = true;\nelse\n sm_PktB" "ufFreqOffsets_we_reg = false;\nend\n\n\n% 'addr' ports of 'Shared Memory' blocks\npersistent sm_TxModulation_addr_r" "eg; \nsm_TxModulation_addr_reg = xl_state(0, {xlUnsigned, 8, 0});\nsm_TxModulation_addr = sm_TxModulation_addr_reg;" "\nif addrAck == 1\n sm_TxModulation_addr_reg = xl_slice(linearAddr, 8, 0);\nelse\n sm_TxModulation_addr_reg =" " sm_TxModulation_addr_reg;\nend\npersistent sm_TxHeaderTranslate_addr_reg; \nsm_TxHeaderTranslate_addr_reg = xl_sta" "te(0, {xlUnsigned, 10, 0});\nsm_TxHeaderTranslate_addr = sm_TxHeaderTranslate_addr_reg;\nif addrAck == 1\n sm_Tx" "HeaderTranslate_addr_reg = xl_slice(linearAddr, 10, 0);\nelse\n sm_TxHeaderTranslate_addr_reg = sm_TxHeaderTrans" "late_addr_reg;\nend\npersistent sm_ChannelEstimates_addr_reg; \nsm_ChannelEstimates_addr_reg = xl_state(0, {xlUnsig" "ned, 8, 0});\nsm_ChannelEstimates_addr = sm_ChannelEstimates_addr_reg;\nif addrAck == 1\n sm_ChannelEstimates_ad" "dr_reg = xl_slice(linearAddr, 8, 0);\nelse\n sm_ChannelEstimates_addr_reg = sm_ChannelEstimates_addr_reg;\nend\n" "persistent sm_RxModulation_addr_reg; \nsm_RxModulation_addr_reg = xl_state(0, {xlUnsigned, 8, 0});\nsm_RxModulation" "_addr = sm_RxModulation_addr_reg;\nif addrAck == 1\n sm_RxModulation_addr_reg = xl_slice(linearAddr, 8, 0);\nels" "e\n sm_RxModulation_addr_reg = sm_RxModulation_addr_reg;\nend\npersistent sm_EVM_perSym_addr_reg; \nsm_EVM_perSy" "m_addr_reg = xl_state(0, {xlUnsigned, 8, 0});\nsm_EVM_perSym_addr = sm_EVM_perSym_addr_reg;\nif addrAck == 1\n s" "m_EVM_perSym_addr_reg = xl_slice(linearAddr, 8, 0);\nelse\n sm_EVM_perSym_addr_reg = sm_EVM_perSym_addr_reg;\nen" "d\npersistent sm_EVM_perSC_addr_reg; \nsm_EVM_perSC_addr_reg = xl_state(0, {xlUnsigned, 6, 0});\nsm_EVM_perSC_addr " "= sm_EVM_perSC_addr_reg;\nif addrAck == 1\n sm_EVM_perSC_addr_reg = xl_slice(linearAddr, 6, 0);\nelse\n sm_EV" "M_perSC_addr_reg = sm_EVM_perSC_addr_reg;\nend\npersistent sm_PktBufFreqOffsets_addr_reg; \nsm_PktBufFreqOffsets_ad" "dr_reg = xl_state(0, {xlUnsigned, 5, 0});\nsm_PktBufFreqOffsets_addr = sm_PktBufFreqOffsets_addr_reg;\nif addrAck =" "= 1\n sm_PktBufFreqOffsets_addr_reg = xl_slice(linearAddr, 5, 0);\nelse\n sm_PktBufFreqOffsets_addr_reg = sm_" "PktBufFreqOffsets_addr_reg;\nend\n\n\n% 're' ports of 'From FIFO' blocks\n\n\n% 'en' ports of 'To Register' blocks\n" "if opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearA" "ddr), 0}, 0))\n sm_FEC_Config_en = true;\nelse\n sm_FEC_Config_en = false;\nend\nif opCode == xl_concat(xfix(" "{xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 1))\n sm_Tx_OFD" "M_SymCounts_en = true;\nelse\n sm_Tx_OFDM_SymCounts_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4" ", 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 2))\n sm_Rx_OFDM_SymbolCounts" "_en = true;\nelse\n sm_Rx_OFDM_SymbolCounts_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10" "), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 3))\n sm_TxRx_Pilots_Values_en = true" ";\nelse\n sm_TxRx_Pilots_Values_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 4))\n sm_TxRx_Pilots_Index_en = true;\nelse\n " "sm_TxRx_Pilots_Index_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 5))\n sm_TxRx_Interrupt_PktBuf_Ctrl_en = true;\nelse\n sm_Tx" "Rx_Interrupt_PktBuf_Ctrl_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 6))\n sm_TxRx_FFT_Scaling_en = true;\nelse\n sm_TxRx_FFT" "_Scaling_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({x" "lUnsigned, xl_nbits(linearAddr), 0}, 7))\n sm_Tx_Start_Reset_Control_en = true;\nelse\n sm_Tx_Start_Reset_Con" "trol_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUns" "igned, xl_nbits(linearAddr), 0}, 8))\n sm_Tx_ControlBits_en = true;\nelse\n sm_Tx_ControlBits_en = false;\nen" "d\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(line" "arAddr), 0}, 9))\n sm_Tx_Delays_en = true;\nelse\n sm_Tx_Delays_en = false;\nend\nif opCode == xl_concat(xfix" "({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 10))\n sm_Tx_S" "caling_en = true;\nelse\n sm_Tx_Scaling_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ." "..\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 11))\n sm_pktDet_durations_en = true;\nel" "se\n sm_pktDet_durations_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 12))\n sm_pktDet_thresholds_en = true;\nelse\n sm_pkt" "Det_thresholds_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n x" "fix({xlUnsigned, xl_nbits(linearAddr), 0}, 13))\n sm_pktDet_autoCorrParams_en = true;\nelse\n sm_pktDet_autoC" "orrParams_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({" "xlUnsigned, xl_nbits(linearAddr), 0}, 14))\n sm_pktDet_controlBits_en = true;\nelse\n sm_pktDet_controlBits_e" "n = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned," " xl_nbits(linearAddr), 0}, 15))\n sm_Rx_AF_TxScaling_en = true;\nelse\n sm_Rx_AF_TxScaling_en = false;\nend\n" "if opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearA" "ddr), 0}, 16))\n sm_Rx_AF_Blanking_en = true;\nelse\n sm_Rx_AF_Blanking_en = false;\nend\nif opCode == xl_con" "cat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 17))\n " " sm_Rx_PilotCalcParams_en = true;\nelse\n sm_Rx_PilotCalcParams_en = false;\nend\nif opCode == xl_concat(xfix({x" "lUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 18))\n sm_Rx_Cons" "tellation_Scaling_en = true;\nelse\n sm_Rx_Constellation_Scaling_en = false;\nend\nif opCode == xl_concat(xfix({" "xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 19))\n sm_Rx_Pkt" "Det_Delay_en = true;\nelse\n sm_Rx_PktDet_Delay_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}" ", 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 20))\n sm_Rx_ChanEst_MinMag_en = " "true;\nelse\n sm_Rx_ChanEst_MinMag_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 21))\n sm_Rx_pktByteNums_en = true;\nelse\n " " sm_Rx_pktByteNums_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 22))\n sm_Rx_FixedPktLen_en = true;\nelse\n sm_Rx_FixedPktLen_" "en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned" ", xl_nbits(linearAddr), 0}, 23))\n sm_Rx_PktDet_LongCorr_Thresholds_en = true;\nelse\n sm_Rx_PktDet_LongCorr_" "Thresholds_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix(" "{xlUnsigned, xl_nbits(linearAddr), 0}, 24))\n sm_Rx_PktDet_LongCorr_Params_en = true;\nelse\n sm_Rx_PktDet_Lo" "ngCorr_Params_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xf" "ix({xlUnsigned, xl_nbits(linearAddr), 0}, 25))\n sm_Rx_coarseCFO_correction_en = true;\nelse\n sm_Rx_coarseCF" "O_correction_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfi" "x({xlUnsigned, xl_nbits(linearAddr), 0}, 26))\n sm_Rx_PreCFO_PilotCalcCorrection_en = true;\nelse\n sm_Rx_Pre" "CFO_PilotCalcCorrection_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 27))\n sm_Rx_PreCFO_Options_en = true;\nelse\n sm_Rx_PreC" "FO_Options_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix(" "{xlUnsigned, xl_nbits(linearAddr), 0}, 28))\n sm_Rx_ControlBits_en = true;\nelse\n sm_Rx_ControlBits_en = fal" "se;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbi" "ts(linearAddr), 0}, 29))\n sm_TxRx_AutoReply_Action3_en = true;\nelse\n sm_TxRx_AutoReply_Action3_en = false;" "\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(" "linearAddr), 0}, 30))\n sm_TxRx_AutoReply_Action2_en = true;\nelse\n sm_TxRx_AutoReply_Action2_en = false;\ne" "nd\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(lin" "earAddr), 0}, 31))\n sm_TxRx_AutoReply_Action1_en = true;\nelse\n sm_TxRx_AutoReply_Action1_en = false;\nend\n" "if opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearA" "ddr), 0}, 32))\n sm_TxRx_AutoReply_Action0_en = true;\nelse\n sm_TxRx_AutoReply_Action0_en = false;\nend\nif " "opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr" "), 0}, 33))\n sm_TxRx_AutoReply_Match5_en = true;\nelse\n sm_TxRx_AutoReply_Match5_en = false;\nend\nif opCod" "e == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}" ", 34))\n sm_TxRx_AutoReply_Match4_en = true;\nelse\n sm_TxRx_AutoReply_Match4_en = false;\nend\nif opCode == " "xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 35)" ")\n sm_TxRx_AutoReply_Match3_en = true;\nelse\n sm_TxRx_AutoReply_Match3_en = false;\nend\nif opCode == xl_co" "ncat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 36))\n " " sm_TxRx_AutoReply_Match2_en = true;\nelse\n sm_TxRx_AutoReply_Match2_en = false;\nend\nif opCode == xl_concat(" "xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 37))\n sm_" "TxRx_AutoReply_Action5_en = true;\nelse\n sm_TxRx_AutoReply_Action5_en = false;\nend\nif opCode == xl_concat(xfi" "x({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 38))\n sm_TxR" "x_AutoReply_Action4_en = true;\nelse\n sm_TxRx_AutoReply_Action4_en = false;\nend\nif opCode == xl_concat(xfix({" "xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 39))\n sm_TxRx_A" "utoReply_Match1_en = true;\nelse\n sm_TxRx_AutoReply_Match1_en = false;\nend\nif opCode == xl_concat(xfix({xlUns" "igned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 40))\n sm_TxRx_AutoRe" "ply_Match0_en = true;\nelse\n sm_TxRx_AutoReply_Match0_en = false;\nend\n\n\n% 'din' ports of 'To FIFO' blocks\n" "\n\n% 'we' ports of 'To FIFO' blocks\n\n\n% 'din' ports of 'To Register' blocks\nsm_FEC_Config_din = xl_force(xl_sl" "ice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);" "\nsm_Tx_OFDM_SymCounts_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned" ", ...\n 0);\nsm_Rx_OFDM_SymbolCounts_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), .." ".\n xlUnsigned, ...\n 0);\nsm_TxRx_Pilots_Values_di" "n = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_TxRx_Pilots_Index_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_TxRx_Interrupt_PktBuf_Ctrl_din = xl_force(xl_slic" "e(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\n" "sm_TxRx_FFT_Scaling_din = xl_force(xl_slice(wrDBus, 12 - 1, 0), ...\n xlUnsigned, ." "..\n 0);\nsm_Tx_Start_Reset_Control_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ..." "\n xlUnsigned, ...\n 0);\nsm_Tx_ControlBits_din = x" "l_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_Tx_Delays_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUns" "igned, ...\n 0);\nsm_Tx_Scaling_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_pktDet_durations_din = xl_" "force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_pktDet_thresholds_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_pktDet_autoCorrParams_din = xl_force(xl_slice(wrDBus, 32" " - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_pktDet_co" "ntrolBits_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_Rx_AF_TxScaling_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_Rx_AF_Blanking_din = xl_force(xl_slice(" "wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm" "_Rx_PilotCalcParams_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ." "..\n 0);\nsm_Rx_Constellation_Scaling_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ." "..\n xlUnsigned, ...\n 0);\nsm_Rx_PktDet_Delay_din " "= xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_Rx_ChanEst_MinMag_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_Rx_pktByteNums_din = xl_force(xl_slice(wrDBus, 32 -" " 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_Rx_FixedPkt" "Len_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_Rx_PktDet_LongCorr_Thresholds_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_Rx_PktDet_LongCorr_Params_din =" " xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_Rx_coarseCFO_correction_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_Rx_PreCFO_PilotCalcCorrection_din = xl_force(x" "l_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_Rx_PreCFO_Options_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsi" "gned, ...\n 0);\nsm_Rx_ControlBits_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n" " xlUnsigned, ...\n 0);\nsm_TxRx_AutoReply_Action3_d" "in = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_TxRx_AutoReply_Action2_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_TxRx_AutoReply_Action1_din = xl_force(xl_sl" "ice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);" "\nsm_TxRx_AutoReply_Action0_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUns" "igned, ...\n 0);\nsm_TxRx_AutoReply_Match5_din = xl_force(xl_slice(wrDBus, 32 - 1, " "0), ...\n xlUnsigned, ...\n 0);\nsm_TxRx_AutoReply_" "Match4_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_TxRx_AutoReply_Match3_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_TxRx_AutoReply_Match2_din = xl_force" "(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_TxRx_AutoReply_Action5_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_TxRx_AutoReply_Action4_din = xl_force(xl_slice(wrDBus, 3" "2 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_TxRx_Aut" "oReply_Match1_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_TxRx_AutoReply_Match0_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\n\n\npersistent read_bank_out_reg" "; read_bank_out_reg = xl_state(0, {xlUnsigned, 32, 0});\nread_bank_out = read_bank_out_reg;\n\npersistent bankAddr_" "reg; bankAddr_reg = xl_state(0, bankAddr);\n\nif bankAddr_reg == 0\n % Bank 0: Shared Memories\n read_bank_ou" "t_reg = ram_bank_out;\nelseif bankAddr_reg == 1\n % Bank 1: From/To FIFOs\n read_bank_out_reg = 0;\nelseif b" "ankAddr_reg == 2\n % Bank 2: From/To Registers\n read_bank_out_reg = reg_bank_out;\nelseif bankAddr_reg == 3\n" " % Bank 3: Configuration Registers\n read_bank_out_reg = 0;\nend\n\nbankAddr_reg = bankAddr;\n" suppress_output "on" defparams "{}" hide_port_list "{}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mcode" sg_icon_stat "170,515,63,104,white,blue,0,c6475a4f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 170 170 0 0 ],[0 0 515 515 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 170 170 0 0 ],[0 0 515 515 0 ]);\npatch([31.6 66.28 90.28 114.28 138.28 90.28 55.6 31.6 ],[283.64" " 283.64 307.64 283.64 307.64 307.64 307.64 283.64 ],[1 1 1 ]);\npatch([55.6 90.28 66.28 31.6 55.6 ],[259.64 259.64 " "283.64 283.64 259.64 ],[0.931 0.946 0.973 ]);\npatch([31.6 66.28 90.28 55.6 31.6 ],[235.64 235.64 259.64 259.64 235" ".64 ],[1 1 1 ]);\npatch([55.6 138.28 114.28 90.28 66.28 31.6 55.6 ],[211.64 211.64 235.64 211.64 235.64 235.64 211." "64 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nco" "lor('black');port_label('input',1,'wrDBus');\ncolor('black');port_label('input',2,'bankAddr');\ncolor('black');port" "_label('input',3,'linearAddr');\ncolor('black');port_label('input',4,'RNWReg');\ncolor('black');port_label('input'," "5,'addrAck');\ncolor('black');port_label('input',6,'sm_midPacketRSSI');\ncolor('black');port_label('input',7,'sm_Tx" "_PktRunning');\ncolor('black');port_label('input',8,'sm_Rx_pktDetEventCount');\ncolor('black');port_label('input',9" ",'sm_Rx_coarseCFOest');\ncolor('black');port_label('input',10,'sm_Rx_pilotCFOest');\ncolor('black');port_label('inp" "ut',11,'sm_Rx_pktDone_interruptStatus');\ncolor('black');port_label('input',12,'sm_Rx_BER_TotalBits');\ncolor('blac" "k');port_label('input',13,'sm_Rx_BER_Errors');\ncolor('black');port_label('input',14,'sm_Rx_Gains');\ncolor('black'" ");port_label('input',15,'sm_pktDet_status');\ncolor('black');port_label('input',16,'sm_FEC_Config');\ncolor('black'" ");port_label('input',17,'sm_Tx_OFDM_SymCounts');\ncolor('black');port_label('input',18,'sm_Rx_OFDM_SymbolCounts');\n" "color('black');port_label('input',19,'sm_TxRx_Pilots_Values');\ncolor('black');port_label('input',20,'sm_TxRx_Pilot" "s_Index');\ncolor('black');port_label('input',21,'sm_TxRx_Interrupt_PktBuf_Ctrl');\ncolor('black');port_label('inpu" "t',22,'sm_TxRx_FFT_Scaling');\ncolor('black');port_label('input',23,'sm_Tx_Start_Reset_Control');\ncolor('black');p" "ort_label('input',24,'sm_Tx_ControlBits');\ncolor('black');port_label('input',25,'sm_Tx_Delays');\ncolor('black');p" "ort_label('input',26,'sm_Tx_Scaling');\ncolor('black');port_label('input',27,'sm_pktDet_durations');\ncolor('black'" ");port_label('input',28,'sm_pktDet_thresholds');\ncolor('black');port_label('input',29,'sm_pktDet_autoCorrParams');" "\ncolor('black');port_label('input',30,'sm_pktDet_controlBits');\ncolor('black');port_label('input',31,'sm_Rx_AF_Tx" "Scaling');\ncolor('black');port_label('input',32,'sm_Rx_AF_Blanking');\ncolor('black');port_label('input',33,'sm_Rx" "_PilotCalcParams');\ncolor('black');port_label('input',34,'sm_Rx_Constellation_Scaling');\ncolor('black');port_labe" "l('input',35,'sm_Rx_PktDet_Delay');\ncolor('black');port_label('input',36,'sm_Rx_ChanEst_MinMag');\ncolor('black');" "port_label('input',37,'sm_Rx_pktByteNums');\ncolor('black');port_label('input',38,'sm_Rx_FixedPktLen');\ncolor('bla" "ck');port_label('input',39,'sm_Rx_PktDet_LongCorr_Thresholds');\ncolor('black');port_label('input',40,'sm_Rx_PktDet" "_LongCorr_Params');\ncolor('black');port_label('input',41,'sm_Rx_coarseCFO_correction');\ncolor('black');port_label" "('input',42,'sm_Rx_PreCFO_PilotCalcCorrection');\ncolor('black');port_label('input',43,'sm_Rx_PreCFO_Options');\nco" "lor('black');port_label('input',44,'sm_Rx_ControlBits');\ncolor('black');port_label('input',45,'sm_TxRx_AutoReply_A" "ction3');\ncolor('black');port_label('input',46,'sm_TxRx_AutoReply_Action2');\ncolor('black');port_label('input',47" ",'sm_TxRx_AutoReply_Action1');\ncolor('black');port_label('input',48,'sm_TxRx_AutoReply_Action0');\ncolor('black');" "port_label('input',49,'sm_TxRx_AutoReply_Match5');\ncolor('black');port_label('input',50,'sm_TxRx_AutoReply_Match4'" ");\ncolor('black');port_label('input',51,'sm_TxRx_AutoReply_Match3');\ncolor('black');port_label('input',52,'sm_TxR" "x_AutoReply_Match2');\ncolor('black');port_label('input',53,'sm_TxRx_AutoReply_Action5');\ncolor('black');port_labe" "l('input',54,'sm_TxRx_AutoReply_Action4');\ncolor('black');port_label('input',55,'sm_TxRx_AutoReply_Match1');\ncolo" "r('black');port_label('input',56,'sm_TxRx_AutoReply_Match0');\ncolor('black');port_label('input',57,'sm_TxModulatio" "n');\ncolor('black');port_label('input',58,'sm_TxHeaderTranslate');\ncolor('black');port_label('input',59,'sm_Chann" "elEstimates');\ncolor('black');port_label('input',60,'sm_RxModulation');\ncolor('black');port_label('input',61,'sm_" "EVM_perSym');\ncolor('black');port_label('input',62,'sm_EVM_perSC');\ncolor('black');port_label('input',63,'sm_PktB" "ufFreqOffsets');\ncolor('black');port_label('output',1,'read_bank_out');\ncolor('black');port_label('output',2,'sm_" "FEC_Config_din');\ncolor('black');port_label('output',3,'sm_FEC_Config_en');\ncolor('black');port_label('output',4," "'sm_Tx_OFDM_SymCounts_din');\ncolor('black');port_label('output',5,'sm_Tx_OFDM_SymCounts_en');\ncolor('black');port" "_label('output',6,'sm_Rx_OFDM_SymbolCounts_din');\ncolor('black');port_label('output',7,'sm_Rx_OFDM_SymbolCounts_en" "');\ncolor('black');port_label('output',8,'sm_TxRx_Pilots_Values_din');\ncolor('black');port_label('output',9,'sm_T" "xRx_Pilots_Values_en');\ncolor('black');port_label('output',10,'sm_TxRx_Pilots_Index_din');\ncolor('black');port_la" "bel('output',11,'sm_TxRx_Pilots_Index_en');\ncolor('black');port_label('output',12,'sm_TxRx_Interrupt_PktBuf_Ctrl_d" "in');\ncolor('black');port_label('output',13,'sm_TxRx_Interrupt_PktBuf_Ctrl_en');\ncolor('black');port_label('outpu" "t',14,'sm_TxRx_FFT_Scaling_din');\ncolor('black');port_label('output',15,'sm_TxRx_FFT_Scaling_en');\ncolor('black')" ";port_label('output',16,'sm_Tx_Start_Reset_Control_din');\ncolor('black');port_label('output',17,'sm_Tx_Start_Reset" "_Control_en');\ncolor('black');port_label('output',18,'sm_Tx_ControlBits_din');\ncolor('black');port_label('output'" ",19,'sm_Tx_ControlBits_en');\ncolor('black');port_label('output',20,'sm_Tx_Delays_din');\ncolor('black');port_label" "('output',21,'sm_Tx_Delays_en');\ncolor('black');port_label('output',22,'sm_Tx_Scaling_din');\ncolor('black');port_" "label('output',23,'sm_Tx_Scaling_en');\ncolor('black');port_label('output',24,'sm_pktDet_durations_din');\ncolor('b" "lack');port_label('output',25,'sm_pktDet_durations_en');\ncolor('black');port_label('output',26,'sm_pktDet_threshol" "ds_din');\ncolor('black');port_label('output',27,'sm_pktDet_thresholds_en');\ncolor('black');port_label('output',28" ",'sm_pktDet_autoCorrParams_din');\ncolor('black');port_label('output',29,'sm_pktDet_autoCorrParams_en');\ncolor('bl" "ack');port_label('output',30,'sm_pktDet_controlBits_din');\ncolor('black');port_label('output',31,'sm_pktDet_contro" "lBits_en');\ncolor('black');port_label('output',32,'sm_Rx_AF_TxScaling_din');\ncolor('black');port_label('output',3" "3,'sm_Rx_AF_TxScaling_en');\ncolor('black');port_label('output',34,'sm_Rx_AF_Blanking_din');\ncolor('black');port_l" "abel('output',35,'sm_Rx_AF_Blanking_en');\ncolor('black');port_label('output',36,'sm_Rx_PilotCalcParams_din');\ncol" "or('black');port_label('output',37,'sm_Rx_PilotCalcParams_en');\ncolor('black');port_label('output',38,'sm_Rx_Const" "ellation_Scaling_din');\ncolor('black');port_label('output',39,'sm_Rx_Constellation_Scaling_en');\ncolor('black');p" "ort_label('output',40,'sm_Rx_PktDet_Delay_din');\ncolor('black');port_label('output',41,'sm_Rx_PktDet_Delay_en');\n" "color('black');port_label('output',42,'sm_Rx_ChanEst_MinMag_din');\ncolor('black');port_label('output',43,'sm_Rx_Ch" "anEst_MinMag_en');\ncolor('black');port_label('output',44,'sm_Rx_pktByteNums_din');\ncolor('black');port_label('out" "put',45,'sm_Rx_pktByteNums_en');\ncolor('black');port_label('output',46,'sm_Rx_FixedPktLen_din');\ncolor('black');p" "ort_label('output',47,'sm_Rx_FixedPktLen_en');\ncolor('black');port_label('output',48,'sm_Rx_PktDet_LongCorr_Thresh" "olds_din');\ncolor('black');port_label('output',49,'sm_Rx_PktDet_LongCorr_Thresholds_en');\ncolor('black');port_lab" "el('output',50,'sm_Rx_PktDet_LongCorr_Params_din');\ncolor('black');port_label('output',51,'sm_Rx_PktDet_LongCorr_P" "arams_en');\ncolor('black');port_label('output',52,'sm_Rx_coarseCFO_correction_din');\ncolor('black');port_label('o" "utput',53,'sm_Rx_coarseCFO_correction_en');\ncolor('black');port_label('output',54,'sm_Rx_PreCFO_PilotCalcCorrectio" "n_din');\ncolor('black');port_label('output',55,'sm_Rx_PreCFO_PilotCalcCorrection_en');\ncolor('black');port_label(" "'output',56,'sm_Rx_PreCFO_Options_din');\ncolor('black');port_label('output',57,'sm_Rx_PreCFO_Options_en');\ncolor(" "'black');port_label('output',58,'sm_Rx_ControlBits_din');\ncolor('black');port_label('output',59,'sm_Rx_ControlBits" "_en');\ncolor('black');port_label('output',60,'sm_TxRx_AutoReply_Action3_din');\ncolor('black');port_label('output'" ",61,'sm_TxRx_AutoReply_Action3_en');\ncolor('black');port_label('output',62,'sm_TxRx_AutoReply_Action2_din');\ncolo" "r('black');port_label('output',63,'sm_TxRx_AutoReply_Action2_en');\ncolor('black');port_label('output',64,'sm_TxRx_" "AutoReply_Action1_din');\ncolor('black');port_label('output',65,'sm_TxRx_AutoReply_Action1_en');\ncolor('black');po" "rt_label('output',66,'sm_TxRx_AutoReply_Action0_din');\ncolor('black');port_label('output',67,'sm_TxRx_AutoReply_Ac" "tion0_en');\ncolor('black');port_label('output',68,'sm_TxRx_AutoReply_Match5_din');\ncolor('black');port_label('out" "put',69,'sm_TxRx_AutoReply_Match5_en');\ncolor('black');port_label('output',70,'sm_TxRx_AutoReply_Match4_din');\nco" "lor('black');port_label('output',71,'sm_TxRx_AutoReply_Match4_en');\ncolor('black');port_label('output',72,'sm_TxRx" "_AutoReply_Match3_din');\ncolor('black');port_label('output',73,'sm_TxRx_AutoReply_Match3_en');\ncolor('black');por" "t_label('output',74,'sm_TxRx_AutoReply_Match2_din');\ncolor('black');port_label('output',75,'sm_TxRx_AutoReply_Matc" "h2_en');\ncolor('black');port_label('output',76,'sm_TxRx_AutoReply_Action5_din');\ncolor('black');port_label('outpu" "t',77,'sm_TxRx_AutoReply_Action5_en');\ncolor('black');port_label('output',78,'sm_TxRx_AutoReply_Action4_din');\nco" "lor('black');port_label('output',79,'sm_TxRx_AutoReply_Action4_en');\ncolor('black');port_label('output',80,'sm_TxR" "x_AutoReply_Match1_din');\ncolor('black');port_label('output',81,'sm_TxRx_AutoReply_Match1_en');\ncolor('black');po" "rt_label('output',82,'sm_TxRx_AutoReply_Match0_din');\ncolor('black');port_label('output',83,'sm_TxRx_AutoReply_Mat" "ch0_en');\ncolor('black');port_label('output',84,'sm_TxModulation_addr');\ncolor('black');port_label('output',85,'s" "m_TxModulation_din');\ncolor('black');port_label('output',86,'sm_TxModulation_we');\ncolor('black');port_label('out" "put',87,'sm_TxHeaderTranslate_addr');\ncolor('black');port_label('output',88,'sm_TxHeaderTranslate_din');\ncolor('b" "lack');port_label('output',89,'sm_TxHeaderTranslate_we');\ncolor('black');port_label('output',90,'sm_ChannelEstimat" "es_addr');\ncolor('black');port_label('output',91,'sm_ChannelEstimates_din');\ncolor('black');port_label('output',9" "2,'sm_ChannelEstimates_we');\ncolor('black');port_label('output',93,'sm_RxModulation_addr');\ncolor('black');port_l" "abel('output',94,'sm_RxModulation_din');\ncolor('black');port_label('output',95,'sm_RxModulation_we');\ncolor('blac" "k');port_label('output',96,'sm_EVM_perSym_addr');\ncolor('black');port_label('output',97,'sm_EVM_perSym_din');\ncol" "or('black');port_label('output',98,'sm_EVM_perSym_we');\ncolor('black');port_label('output',99,'sm_EVM_perSC_addr')" ";\ncolor('black');port_label('output',100,'sm_EVM_perSC_din');\ncolor('black');port_label('output',101,'sm_EVM_perS" "C_we');\ncolor('black');port_label('output',102,'sm_PktBufFreqOffsets_addr');\ncolor('black');port_label('output',1" "03,'sm_PktBufFreqOffsets_din');\ncolor('black');port_label('output',104,'sm_PktBufFreqOffsets_we');\ncolor('black')" ";disp('\\bf{xlmax}','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "rdData" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 2 Name "FEC_Config_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 3 Name "FEC_Config_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 4 Name "Tx_OFDM_SymCounts_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 5 Name "Tx_OFDM_SymCounts_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 6 Name "Rx_OFDM_SymbolCounts_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 7 Name "Rx_OFDM_SymbolCounts_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 8 Name "TxRx_Pilots_Values_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 9 Name "TxRx_Pilots_Values_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 10 Name "TxRx_Pilots_Index_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 11 Name "TxRx_Pilots_Index_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 12 Name "TxRx_Interrupt_PktBuf_Ctrl_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 13 Name "TxRx_Interrupt_PktBuf_Ctrl_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 14 Name "TxRx_FFT_Scaling_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 15 Name "TxRx_FFT_Scaling_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 16 Name "Tx_Start_Reset_Control_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 17 Name "Tx_Start_Reset_Control_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 18 Name "Tx_ControlBits_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 19 Name "Tx_ControlBits_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 20 Name "Tx_Delays_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 21 Name "Tx_Delays_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 22 Name "Tx_Scaling_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 23 Name "Tx_Scaling_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 24 Name "pktDet_durations_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 25 Name "pktDet_durations_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 26 Name "pktDet_thresholds_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 27 Name "pktDet_thresholds_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 28 Name "pktDet_autoCorrParams_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 29 Name "pktDet_autoCorrParams_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 30 Name "pktDet_controlBits_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 31 Name "pktDet_controlBits_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 32 Name "Rx_AF_TxScaling_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 33 Name "Rx_AF_TxScaling_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 34 Name "Rx_AF_Blanking_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 35 Name "Rx_AF_Blanking_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 36 Name "Rx_PilotCalcParams_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 37 Name "Rx_PilotCalcParams_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 38 Name "Rx_Constellation_Scaling_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 39 Name "Rx_Constellation_Scaling_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 40 Name "Rx_PktDet_Delay_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 41 Name "Rx_PktDet_Delay_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 42 Name "Rx_ChanEst_MinMag_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 43 Name "Rx_ChanEst_MinMag_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 44 Name "Rx_pktByteNums_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 45 Name "Rx_pktByteNums_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 46 Name "Rx_FixedPktLen_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 47 Name "Rx_FixedPktLen_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 48 Name "Rx_PktDet_LongCorr_Thresholds_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 49 Name "Rx_PktDet_LongCorr_Thresholds_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 50 Name "Rx_PktDet_LongCorr_Params_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 51 Name "Rx_PktDet_LongCorr_Params_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 52 Name "Rx_coarseCFO_correction_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 53 Name "Rx_coarseCFO_correction_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 54 Name "Rx_PreCFO_PilotCalcCorrection_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 55 Name "Rx_PreCFO_PilotCalcCorrection_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 56 Name "Rx_PreCFO_Options_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 57 Name "Rx_PreCFO_Options_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 58 Name "Rx_ControlBits_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 59 Name "Rx_ControlBits_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 60 Name "TxRx_AutoReply_Action3_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 61 Name "TxRx_AutoReply_Action3_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 62 Name "TxRx_AutoReply_Action2_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 63 Name "TxRx_AutoReply_Action2_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 64 Name "TxRx_AutoReply_Action1_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 65 Name "TxRx_AutoReply_Action1_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 66 Name "TxRx_AutoReply_Action0_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 67 Name "TxRx_AutoReply_Action0_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 68 Name "TxRx_AutoReply_Match5_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 69 Name "TxRx_AutoReply_Match5_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 70 Name "TxRx_AutoReply_Match4_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 71 Name "TxRx_AutoReply_Match4_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 72 Name "TxRx_AutoReply_Match3_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 73 Name "TxRx_AutoReply_Match3_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 74 Name "TxRx_AutoReply_Match2_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 75 Name "TxRx_AutoReply_Match2_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 76 Name "TxRx_AutoReply_Action5_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 77 Name "TxRx_AutoReply_Action5_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 78 Name "TxRx_AutoReply_Action4_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 79 Name "TxRx_AutoReply_Action4_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 80 Name "TxRx_AutoReply_Match1_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 81 Name "TxRx_AutoReply_Match1_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 82 Name "TxRx_AutoReply_Match0_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 83 Name "TxRx_AutoReply_Match0_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 84 Name "TxModulation_addr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 85 Name "TxModulation_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 86 Name "TxModulation_we" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 87 Name "TxHeaderTranslate_addr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 88 Name "TxHeaderTranslate_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 89 Name "TxHeaderTranslate_we" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 90 Name "ChannelEstimates_addr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 91 Name "ChannelEstimates_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 92 Name "ChannelEstimates_we" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 93 Name "RxModulation_addr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 94 Name "RxModulation_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 95 Name "RxModulation_we" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 96 Name "EVM_perSym_addr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 97 Name "EVM_perSym_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 98 Name "EVM_perSym_we" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 99 Name "EVM_perSC_addr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 100 Name "EVM_perSC_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 101 Name "EVM_perSC_we" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 102 Name "PktBufFreqOffsets_addr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 103 Name "PktBufFreqOffsets_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 104 Name "PktBufFreqOffsets_we" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "sg_plb_addrpref" SID "10216:130" Ports [1, 1] Position [175, 1355, 245, 1375] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "16" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'sg_plb_addrpref'}},'iopad'=>{'constraint'=>'" "#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "70,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 70 70 0 0 ],[0 0 20 20 0 ]);\npatch([30.55 33.44 35.44 37.44 39.44 35.44 32.55 30.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([32.55 35.44 33.44 30.55 32.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([30.55 33.44 35.44 32.55 30.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([32.55 39.44 37.44 35.44 33.44 30.55 32.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" Port { PortNumber 1 Name "addrPref" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Line { Name "Sl_addrAck" SrcBlock "plb_decode" SrcPort 2 Points [0, 0] Branch { Labels [1, 0] DstBlock "plb_memmap" DstPort 5 } Branch { Labels [0, 0] DstBlock "Sl_addrAck" DstPort 1 } } Line { Name "Sl_wrDAck" SrcBlock "plb_decode" SrcPort 4 Points [0, 0] Branch { Labels [1, 0] DstBlock "Sl_wrDAck" DstPort 1 } Branch { Labels [0, 0] DstBlock "Sl_wrComp" DstPort 1 } } Line { Name "PktBufFreqOffsets_we" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 104 DstBlock "Shared Memory6" DstPort 3 } Line { Name "PktBufFreqOffsets_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 103 DstBlock "Shared Memory6" DstPort 2 } Line { Name "PktBufFreqOffsets_addr" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 102 DstBlock "Shared Memory6" DstPort 1 } Line { Name "EVM_perSC_we" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 101 DstBlock "Shared Memory5" DstPort 3 } Line { Name "EVM_perSC_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 100 DstBlock "Shared Memory5" DstPort 2 } Line { Name "EVM_perSC_addr" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 99 DstBlock "Shared Memory5" DstPort 1 } Line { Name "EVM_perSym_we" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 98 DstBlock "Shared Memory4" DstPort 3 } Line { Name "EVM_perSym_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 97 DstBlock "Shared Memory4" DstPort 2 } Line { Name "EVM_perSym_addr" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 96 DstBlock "Shared Memory4" DstPort 1 } Line { Name "RxModulation_we" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 95 DstBlock "Shared Memory3" DstPort 3 } Line { Name "RxModulation_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 94 DstBlock "Shared Memory3" DstPort 2 } Line { Name "RxModulation_addr" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 93 DstBlock "Shared Memory3" DstPort 1 } Line { Name "ChannelEstimates_we" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 92 DstBlock "Shared Memory2" DstPort 3 } Line { Name "ChannelEstimates_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 91 DstBlock "Shared Memory2" DstPort 2 } Line { Name "ChannelEstimates_addr" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 90 DstBlock "Shared Memory2" DstPort 1 } Line { Name "TxHeaderTranslate_we" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 89 DstBlock "Shared Memory1" DstPort 3 } Line { Name "TxHeaderTranslate_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 88 DstBlock "Shared Memory1" DstPort 2 } Line { Name "TxHeaderTranslate_addr" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 87 DstBlock "Shared Memory1" DstPort 1 } Line { Name "TxModulation_we" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 86 DstBlock "Shared Memory" DstPort 3 } Line { Name "TxModulation_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 85 DstBlock "Shared Memory" DstPort 2 } Line { Name "TxModulation_addr" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 84 DstBlock "Shared Memory" DstPort 1 } Line { Name "TxRx_AutoReply_Match0_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 83 DstBlock "To Register40" DstPort 2 } Line { Name "TxRx_AutoReply_Match0_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 82 DstBlock "To Register40" DstPort 1 } Line { Name "TxRx_AutoReply_Match1_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 81 DstBlock "To Register39" DstPort 2 } Line { Name "TxRx_AutoReply_Match1_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 80 DstBlock "To Register39" DstPort 1 } Line { Name "TxRx_AutoReply_Action4_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 79 DstBlock "To Register38" DstPort 2 } Line { Name "TxRx_AutoReply_Action4_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 78 DstBlock "To Register38" DstPort 1 } Line { Name "TxRx_AutoReply_Action5_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 77 DstBlock "To Register37" DstPort 2 } Line { Name "TxRx_AutoReply_Action5_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 76 DstBlock "To Register37" DstPort 1 } Line { Name "TxRx_AutoReply_Match2_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 75 DstBlock "To Register36" DstPort 2 } Line { Name "TxRx_AutoReply_Match2_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 74 DstBlock "To Register36" DstPort 1 } Line { Name "TxRx_AutoReply_Match3_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 73 DstBlock "To Register35" DstPort 2 } Line { Name "TxRx_AutoReply_Match3_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 72 DstBlock "To Register35" DstPort 1 } Line { Name "TxRx_AutoReply_Match4_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 71 DstBlock "To Register34" DstPort 2 } Line { Name "TxRx_AutoReply_Match4_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 70 DstBlock "To Register34" DstPort 1 } Line { Name "TxRx_AutoReply_Match5_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 69 DstBlock "To Register33" DstPort 2 } Line { Name "TxRx_AutoReply_Match5_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 68 DstBlock "To Register33" DstPort 1 } Line { Name "TxRx_AutoReply_Action0_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 67 DstBlock "To Register32" DstPort 2 } Line { Name "TxRx_AutoReply_Action0_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 66 DstBlock "To Register32" DstPort 1 } Line { Name "TxRx_AutoReply_Action1_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 65 DstBlock "To Register31" DstPort 2 } Line { Name "TxRx_AutoReply_Action1_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 64 DstBlock "To Register31" DstPort 1 } Line { Name "TxRx_AutoReply_Action2_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 63 DstBlock "To Register30" DstPort 2 } Line { Name "TxRx_AutoReply_Action2_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 62 DstBlock "To Register30" DstPort 1 } Line { Name "TxRx_AutoReply_Action3_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 61 DstBlock "To Register29" DstPort 2 } Line { Name "TxRx_AutoReply_Action3_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 60 DstBlock "To Register29" DstPort 1 } Line { Name "Rx_ControlBits_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 59 DstBlock "To Register28" DstPort 2 } Line { Name "Rx_ControlBits_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 58 DstBlock "To Register28" DstPort 1 } Line { Name "Rx_PreCFO_Options_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 57 DstBlock "To Register27" DstPort 2 } Line { Name "Rx_PreCFO_Options_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 56 DstBlock "To Register27" DstPort 1 } Line { Name "Rx_PreCFO_PilotCalcCorrection_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 55 DstBlock "To Register26" DstPort 2 } Line { Name "Rx_PreCFO_PilotCalcCorrection_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 54 DstBlock "To Register26" DstPort 1 } Line { Name "Rx_coarseCFO_correction_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 53 DstBlock "To Register25" DstPort 2 } Line { Name "Rx_coarseCFO_correction_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 52 DstBlock "To Register25" DstPort 1 } Line { Name "Rx_PktDet_LongCorr_Params_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 51 DstBlock "To Register24" DstPort 2 } Line { Name "Rx_PktDet_LongCorr_Params_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 50 DstBlock "To Register24" DstPort 1 } Line { Name "Rx_PktDet_LongCorr_Thresholds_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 49 DstBlock "To Register23" DstPort 2 } Line { Name "Rx_PktDet_LongCorr_Thresholds_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 48 DstBlock "To Register23" DstPort 1 } Line { Name "Rx_FixedPktLen_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 47 DstBlock "To Register22" DstPort 2 } Line { Name "Rx_FixedPktLen_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 46 DstBlock "To Register22" DstPort 1 } Line { Name "Rx_pktByteNums_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 45 DstBlock "To Register21" DstPort 2 } Line { Name "Rx_pktByteNums_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 44 DstBlock "To Register21" DstPort 1 } Line { Name "Rx_ChanEst_MinMag_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 43 DstBlock "To Register20" DstPort 2 } Line { Name "Rx_ChanEst_MinMag_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 42 DstBlock "To Register20" DstPort 1 } Line { Name "Rx_PktDet_Delay_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 41 DstBlock "To Register19" DstPort 2 } Line { Name "Rx_PktDet_Delay_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 40 DstBlock "To Register19" DstPort 1 } Line { Name "Rx_Constellation_Scaling_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 39 DstBlock "To Register18" DstPort 2 } Line { Name "Rx_Constellation_Scaling_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 38 DstBlock "To Register18" DstPort 1 } Line { Name "Rx_PilotCalcParams_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 37 DstBlock "To Register17" DstPort 2 } Line { Name "Rx_PilotCalcParams_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 36 DstBlock "To Register17" DstPort 1 } Line { Name "Rx_AF_Blanking_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 35 DstBlock "To Register16" DstPort 2 } Line { Name "Rx_AF_Blanking_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 34 DstBlock "To Register16" DstPort 1 } Line { Name "Rx_AF_TxScaling_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 33 DstBlock "To Register15" DstPort 2 } Line { Name "Rx_AF_TxScaling_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 32 DstBlock "To Register15" DstPort 1 } Line { Name "pktDet_controlBits_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 31 DstBlock "To Register14" DstPort 2 } Line { Name "pktDet_controlBits_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 30 DstBlock "To Register14" DstPort 1 } Line { Name "pktDet_autoCorrParams_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 29 DstBlock "To Register13" DstPort 2 } Line { Name "pktDet_autoCorrParams_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 28 DstBlock "To Register13" DstPort 1 } Line { Name "pktDet_thresholds_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 27 DstBlock "To Register12" DstPort 2 } Line { Name "pktDet_thresholds_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 26 DstBlock "To Register12" DstPort 1 } Line { Name "pktDet_durations_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 25 DstBlock "To Register11" DstPort 2 } Line { Name "pktDet_durations_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 24 DstBlock "To Register11" DstPort 1 } Line { Name "Tx_Scaling_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 23 DstBlock "To Register10" DstPort 2 } Line { Name "Tx_Scaling_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 22 DstBlock "To Register10" DstPort 1 } Line { Name "Tx_Delays_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 21 DstBlock "To Register9" DstPort 2 } Line { Name "Tx_Delays_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 20 DstBlock "To Register9" DstPort 1 } Line { Name "Tx_ControlBits_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 19 DstBlock "To Register8" DstPort 2 } Line { Name "Tx_ControlBits_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 18 DstBlock "To Register8" DstPort 1 } Line { Name "Tx_Start_Reset_Control_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 17 DstBlock "To Register7" DstPort 2 } Line { Name "Tx_Start_Reset_Control_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 16 DstBlock "To Register7" DstPort 1 } Line { Name "TxRx_FFT_Scaling_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 15 DstBlock "To Register6" DstPort 2 } Line { Name "TxRx_FFT_Scaling_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 14 DstBlock "To Register6" DstPort 1 } Line { Name "TxRx_Interrupt_PktBuf_Ctrl_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 13 DstBlock "To Register5" DstPort 2 } Line { Name "TxRx_Interrupt_PktBuf_Ctrl_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 12 DstBlock "To Register5" DstPort 1 } Line { Name "TxRx_Pilots_Index_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 11 DstBlock "To Register4" DstPort 2 } Line { Name "TxRx_Pilots_Index_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 10 DstBlock "To Register4" DstPort 1 } Line { Name "TxRx_Pilots_Values_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 9 DstBlock "To Register3" DstPort 2 } Line { Name "TxRx_Pilots_Values_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 8 DstBlock "To Register3" DstPort 1 } Line { Name "Rx_OFDM_SymbolCounts_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 7 DstBlock "To Register2" DstPort 2 } Line { Name "Rx_OFDM_SymbolCounts_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 6 DstBlock "To Register2" DstPort 1 } Line { Name "Tx_OFDM_SymCounts_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 5 DstBlock "To Register1" DstPort 2 } Line { Name "Tx_OFDM_SymCounts_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 4 DstBlock "To Register1" DstPort 1 } Line { Name "FEC_Config_en" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 3 DstBlock "To Register" DstPort 2 } Line { Name "FEC_Config_din" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 2 DstBlock "To Register" DstPort 1 } Line { Name "rdData" Labels [0, 0; 0, 0] SrcBlock "plb_memmap" SrcPort 1 DstBlock "plb_decode" DstPort 6 } Line { Name "PktBufFreqOffsets_dout" Labels [0, 0; 0, 0] SrcBlock "Shared Memory6" SrcPort 1 DstBlock "plb_memmap" DstPort 63 } Line { Name "EVM_perSC_dout" Labels [0, 0; 0, 0] SrcBlock "Shared Memory5" SrcPort 1 DstBlock "plb_memmap" DstPort 62 } Line { Name "EVM_perSym_dout" Labels [0, 0; 0, 0] SrcBlock "Shared Memory4" SrcPort 1 DstBlock "plb_memmap" DstPort 61 } Line { Name "RxModulation_dout" Labels [0, 0; 0, 0] SrcBlock "Shared Memory3" SrcPort 1 DstBlock "plb_memmap" DstPort 60 } Line { Name "ChannelEstimates_dout" Labels [0, 0; 0, 0] SrcBlock "Shared Memory2" SrcPort 1 DstBlock "plb_memmap" DstPort 59 } Line { Name "TxHeaderTranslate_dout" Labels [0, 0; 0, 0] SrcBlock "Shared Memory1" SrcPort 1 DstBlock "plb_memmap" DstPort 58 } Line { Name "TxModulation_dout" Labels [0, 0; 0, 0] SrcBlock "Shared Memory" SrcPort 1 DstBlock "plb_memmap" DstPort 57 } Line { Name "TxRx_AutoReply_Match0_dout" Labels [0, 0; 0, 0] SrcBlock "To Register40" SrcPort 1 DstBlock "plb_memmap" DstPort 56 } Line { Name "TxRx_AutoReply_Match1_dout" Labels [0, 0; 0, 0] SrcBlock "To Register39" SrcPort 1 DstBlock "plb_memmap" DstPort 55 } Line { Name "TxRx_AutoReply_Action4_dout" Labels [0, 0; 0, 0] SrcBlock "To Register38" SrcPort 1 DstBlock "plb_memmap" DstPort 54 } Line { Name "TxRx_AutoReply_Action5_dout" Labels [0, 0; 0, 0] SrcBlock "To Register37" SrcPort 1 DstBlock "plb_memmap" DstPort 53 } Line { Name "TxRx_AutoReply_Match2_dout" Labels [0, 0; 0, 0] SrcBlock "To Register36" SrcPort 1 DstBlock "plb_memmap" DstPort 52 } Line { Name "TxRx_AutoReply_Match3_dout" Labels [0, 0; 0, 0] SrcBlock "To Register35" SrcPort 1 DstBlock "plb_memmap" DstPort 51 } Line { Name "TxRx_AutoReply_Match4_dout" Labels [0, 0; 0, 0] SrcBlock "To Register34" SrcPort 1 DstBlock "plb_memmap" DstPort 50 } Line { Name "TxRx_AutoReply_Match5_dout" Labels [0, 0; 0, 0] SrcBlock "To Register33" SrcPort 1 DstBlock "plb_memmap" DstPort 49 } Line { Name "TxRx_AutoReply_Action0_dout" Labels [0, 0; 0, 0] SrcBlock "To Register32" SrcPort 1 DstBlock "plb_memmap" DstPort 48 } Line { Name "TxRx_AutoReply_Action1_dout" Labels [0, 0; 0, 0] SrcBlock "To Register31" SrcPort 1 DstBlock "plb_memmap" DstPort 47 } Line { Name "TxRx_AutoReply_Action2_dout" Labels [0, 0; 0, 0] SrcBlock "To Register30" SrcPort 1 DstBlock "plb_memmap" DstPort 46 } Line { Name "TxRx_AutoReply_Action3_dout" Labels [0, 0; 0, 0] SrcBlock "To Register29" SrcPort 1 DstBlock "plb_memmap" DstPort 45 } Line { Name "Rx_ControlBits_dout" Labels [0, 0; 0, 0] SrcBlock "To Register28" SrcPort 1 DstBlock "plb_memmap" DstPort 44 } Line { Name "Rx_PreCFO_Options_dout" Labels [0, 0; 0, 0] SrcBlock "To Register27" SrcPort 1 DstBlock "plb_memmap" DstPort 43 } Line { Name "Rx_PreCFO_PilotCalcCorrection_dout" Labels [0, 0; 0, 0] SrcBlock "To Register26" SrcPort 1 DstBlock "plb_memmap" DstPort 42 } Line { Name "Rx_coarseCFO_correction_dout" Labels [0, 0; 0, 0] SrcBlock "To Register25" SrcPort 1 DstBlock "plb_memmap" DstPort 41 } Line { Name "Rx_PktDet_LongCorr_Params_dout" Labels [0, 0; 0, 0] SrcBlock "To Register24" SrcPort 1 DstBlock "plb_memmap" DstPort 40 } Line { Name "Rx_PktDet_LongCorr_Thresholds_dout" Labels [0, 0; 0, 0] SrcBlock "To Register23" SrcPort 1 DstBlock "plb_memmap" DstPort 39 } Line { Name "Rx_FixedPktLen_dout" Labels [0, 0; 0, 0] SrcBlock "To Register22" SrcPort 1 DstBlock "plb_memmap" DstPort 38 } Line { Name "Rx_pktByteNums_dout" Labels [0, 0; 0, 0] SrcBlock "To Register21" SrcPort 1 DstBlock "plb_memmap" DstPort 37 } Line { Name "Rx_ChanEst_MinMag_dout" Labels [0, 0; 0, 0] SrcBlock "To Register20" SrcPort 1 DstBlock "plb_memmap" DstPort 36 } Line { Name "Rx_PktDet_Delay_dout" Labels [0, 0; 0, 0] SrcBlock "To Register19" SrcPort 1 DstBlock "plb_memmap" DstPort 35 } Line { Name "Rx_Constellation_Scaling_dout" Labels [0, 0; 0, 0] SrcBlock "To Register18" SrcPort 1 DstBlock "plb_memmap" DstPort 34 } Line { Name "Rx_PilotCalcParams_dout" Labels [0, 0; 0, 0] SrcBlock "To Register17" SrcPort 1 DstBlock "plb_memmap" DstPort 33 } Line { Name "Rx_AF_Blanking_dout" Labels [0, 0; 0, 0] SrcBlock "To Register16" SrcPort 1 DstBlock "plb_memmap" DstPort 32 } Line { Name "Rx_AF_TxScaling_dout" Labels [0, 0; 0, 0] SrcBlock "To Register15" SrcPort 1 DstBlock "plb_memmap" DstPort 31 } Line { Name "pktDet_controlBits_dout" Labels [0, 0; 0, 0] SrcBlock "To Register14" SrcPort 1 DstBlock "plb_memmap" DstPort 30 } Line { Name "pktDet_autoCorrParams_dout" Labels [0, 0; 0, 0] SrcBlock "To Register13" SrcPort 1 DstBlock "plb_memmap" DstPort 29 } Line { Name "pktDet_thresholds_dout" Labels [0, 0; 0, 0] SrcBlock "To Register12" SrcPort 1 DstBlock "plb_memmap" DstPort 28 } Line { Name "pktDet_durations_dout" Labels [0, 0; 0, 0] SrcBlock "To Register11" SrcPort 1 DstBlock "plb_memmap" DstPort 27 } Line { Name "Tx_Scaling_dout" Labels [0, 0; 0, 0] SrcBlock "To Register10" SrcPort 1 DstBlock "plb_memmap" DstPort 26 } Line { Name "Tx_Delays_dout" Labels [0, 0; 0, 0] SrcBlock "To Register9" SrcPort 1 DstBlock "plb_memmap" DstPort 25 } Line { Name "Tx_ControlBits_dout" Labels [0, 0; 0, 0] SrcBlock "To Register8" SrcPort 1 DstBlock "plb_memmap" DstPort 24 } Line { Name "Tx_Start_Reset_Control_dout" Labels [0, 0; 0, 0] SrcBlock "To Register7" SrcPort 1 DstBlock "plb_memmap" DstPort 23 } Line { Name "TxRx_FFT_Scaling_dout" Labels [0, 0; 0, 0] SrcBlock "To Register6" SrcPort 1 DstBlock "plb_memmap" DstPort 22 } Line { Name "TxRx_Interrupt_PktBuf_Ctrl_dout" Labels [0, 0; 0, 0] SrcBlock "To Register5" SrcPort 1 DstBlock "plb_memmap" DstPort 21 } Line { Name "TxRx_Pilots_Index_dout" Labels [0, 0; 0, 0] SrcBlock "To Register4" SrcPort 1 DstBlock "plb_memmap" DstPort 20 } Line { Name "TxRx_Pilots_Values_dout" Labels [0, 0; 0, 0] SrcBlock "To Register3" SrcPort 1 DstBlock "plb_memmap" DstPort 19 } Line { Name "Rx_OFDM_SymbolCounts_dout" Labels [0, 0; 0, 0] SrcBlock "To Register2" SrcPort 1 DstBlock "plb_memmap" DstPort 18 } Line { Name "Tx_OFDM_SymCounts_dout" Labels [0, 0; 0, 0] SrcBlock "To Register1" SrcPort 1 DstBlock "plb_memmap" DstPort 17 } Line { Name "FEC_Config_dout" Labels [0, 0; 0, 0] SrcBlock "To Register" SrcPort 1 DstBlock "plb_memmap" DstPort 16 } Line { Name "pktDet_status_dout" Labels [0, 0; 0, 0] SrcBlock "From Register9" SrcPort 1 DstBlock "plb_memmap" DstPort 15 } Line { Name "Rx_Gains_dout" Labels [0, 0; 0, 0] SrcBlock "From Register8" SrcPort 1 DstBlock "plb_memmap" DstPort 14 } Line { Name "Rx_BER_Errors_dout" Labels [0, 0; 0, 0] SrcBlock "From Register7" SrcPort 1 DstBlock "plb_memmap" DstPort 13 } Line { Name "Rx_BER_TotalBits_dout" Labels [0, 0; 0, 0] SrcBlock "From Register6" SrcPort 1 DstBlock "plb_memmap" DstPort 12 } Line { Name "Rx_pktDone_interruptStatus_dout" Labels [0, 0; 0, 0] SrcBlock "From Register5" SrcPort 1 DstBlock "plb_memmap" DstPort 11 } Line { Name "Rx_pilotCFOest_dout" Labels [0, 0; 0, 0] SrcBlock "From Register4" SrcPort 1 DstBlock "plb_memmap" DstPort 10 } Line { Name "Rx_coarseCFOest_dout" Labels [0, 0; 0, 0] SrcBlock "From Register3" SrcPort 1 DstBlock "plb_memmap" DstPort 9 } Line { Name "Rx_pktDetEventCount_dout" Labels [0, 0; 0, 0] SrcBlock "From Register2" SrcPort 1 DstBlock "plb_memmap" DstPort 8 } Line { Name "Tx_PktRunning_dout" Labels [0, 0; 0, 0] SrcBlock "From Register1" SrcPort 1 DstBlock "plb_memmap" DstPort 7 } Line { Name "midPacketRSSI_dout" Labels [0, 0; 0, 0] SrcBlock "From Register" SrcPort 1 DstBlock "plb_memmap" DstPort 6 } Line { Name "RNWReg" Labels [0, 0; 0, 0] SrcBlock "plb_decode" SrcPort 6 DstBlock "plb_memmap" DstPort 4 } Line { Name "linearAddr" Labels [0, 0; 0, 0] SrcBlock "plb_decode" SrcPort 9 DstBlock "plb_memmap" DstPort 3 } Line { Name "bankAddr" Labels [0, 0; 0, 0] SrcBlock "plb_decode" SrcPort 5 DstBlock "plb_memmap" DstPort 2 } Line { Name "wrDBusReg" Labels [0, 0; 0, 0] SrcBlock "plb_decode" SrcPort 1 DstBlock "plb_memmap" DstPort 1 } Line { Name "Sl_rdDBus" Labels [0, 0; 0, 0] SrcBlock "plb_decode" SrcPort 8 DstBlock "Sl_rdDBus" DstPort 1 } Line { Name "Sl_rdDAck" Labels [0, 0; 0, 0] SrcBlock "plb_decode" SrcPort 7 DstBlock "Sl_rdDAck" DstPort 1 } Line { Name "Sl_rdComp" Labels [0, 0; 0, 0] SrcBlock "plb_decode" SrcPort 3 DstBlock "Sl_rdComp" DstPort 1 } Line { Name "addrPref" Labels [0, 0; 0, 0] SrcBlock "sg_plb_addrpref" SrcPort 1 DstBlock "plb_decode" DstPort 7 } Line { Name "PLB_wrDBus" Labels [0, 0; 0, 0] SrcBlock "PLB_wrDBus" SrcPort 1 DstBlock "plb_decode" DstPort 5 } Line { Name "PLB_RNW" Labels [0, 0; 0, 0] SrcBlock "PLB_RNW" SrcPort 1 DstBlock "plb_decode" DstPort 4 } Line { Name "PLB_PAValid" Labels [0, 0; 0, 0] SrcBlock "PLB_PAValid" SrcPort 1 DstBlock "plb_decode" DstPort 3 } Line { Name "PLB_ABus" Labels [0, 0; 0, 0] SrcBlock "PLB_ABus" SrcPort 1 DstBlock "plb_decode" DstPort 2 } Line { Name "SPLB_Rst" Labels [0, 0; 0, 0] SrcBlock "SPLB_Rst" SrcPort 1 DstBlock "plb_decode" DstPort 1 } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "sg_plb_addrpref" DstPort 1 } Line { Name "Sl_wait" Labels [0, 0; 0, 0] SrcBlock "Constant5" SrcPort 1 DstBlock "Sl_wait" DstPort 1 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "PLB_wrDBus" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "PLB_RNW" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "PLB_PAValid" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "PLB_ABus" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "SPLB_Rst" DstPort 1 } Line { SrcBlock "Sl_wrComp" SrcPort 1 DstBlock "Terminator6" DstPort 1 } Line { SrcBlock "Sl_wrDAck" SrcPort 1 DstBlock "Terminator5" DstPort 1 } Line { SrcBlock "Sl_wait" SrcPort 1 DstBlock "Terminator4" DstPort 1 } Line { SrcBlock "Sl_rdDBus" SrcPort 1 DstBlock "Terminator3" DstPort 1 } Line { SrcBlock "Sl_rdDAck" SrcPort 1 DstBlock "Terminator2" DstPort 1 } Line { SrcBlock "Sl_rdComp" SrcPort 1 DstBlock "Terminator1" DstPort 1 } Line { SrcBlock "Sl_addrAck" SrcPort 1 DstBlock "Terminator" DstPort 1 } } } Block { BlockType SubSystem Name "Memory-mapped\nRegisters" SID "75" Ports [] Position [95, 127, 140, 172] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Memory-mapped\nRegisters" Location [-70, 194, 1552, 1138] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "343" Block { BlockType SubSystem Name "AutoReply Registers" SID "76" Ports [] Position [95, 160, 166, 197] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AutoReply Registers" Location [239, 103, 1997, 1185] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "121" Block { BlockType Reference Name "Down Sample1" SID "77" Ports [1, 1] Position [195, 40, 225, 70] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample10" SID "78" Ports [1, 1] Position [660, 170, 690, 200] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample11" SID "79" Ports [1, 1] Position [660, 105, 690, 135] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample12" SID "80" Ports [1, 1] Position [660, 40, 690, 70] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample2" SID "83" Ports [1, 1] Position [195, 105, 225, 135] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "84" Ports [1, 1] Position [195, 170, 225, 200] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "85" Ports [1, 1] Position [195, 235, 225, 265] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample5" SID "86" Ports [1, 1] Position [195, 300, 225, 330] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample6" SID "87" Ports [1, 1] Position [195, 365, 225, 395] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample7" SID "88" Ports [1, 1] Position [660, 370, 690, 400] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample8" SID "89" Ports [1, 1] Position [660, 305, 690, 335] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample9" SID "90" Ports [1, 1] Position [660, 235, 690, 265] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register" SID "9243" Ports [0, 1] Position [65, 38, 105, 72] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Match0'" init "Match0_Config" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,34,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register1" SID "9249" Ports [0, 1] Position [65, 103, 105, 137] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Match1'" init "Match1_Config" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,34,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register10" SID "9258" Ports [0, 1] Position [530, 303, 570, 337] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Action4'" init "Action4_Config" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,34,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register11" SID "9259" Ports [0, 1] Position [530, 368, 570, 402] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Action5'" init "Action5_Config" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,34,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register2" SID "9250" Ports [0, 1] Position [65, 168, 105, 202] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Match2'" init "Match2_Config" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,34,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register3" SID "9251" Ports [0, 1] Position [65, 233, 105, 267] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Match3'" init "Match3_Config" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,34,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register4" SID "9252" Ports [0, 1] Position [65, 298, 105, 332] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Match4'" init "Match4_Config" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,34,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register5" SID "9253" Ports [0, 1] Position [65, 363, 105, 397] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Match5'" init "Match5_Config" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,34,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register6" SID "9254" Ports [0, 1] Position [530, 38, 570, 72] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Action0'" init "Action0_Config" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,34,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register7" SID "9255" Ports [0, 1] Position [530, 103, 570, 137] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Action1'" init "Action1_Config" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,34,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register8" SID "9256" Ports [0, 1] Position [530, 168, 570, 202] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Action2'" init "Action2_Config" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,34,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register9" SID "9257" Ports [0, 1] Position [530, 233, 570, 267] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_AutoReply_Action3'" init "Action3_Config" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,34,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Goto Name "Goto1" SID "91" Position [265, 113, 425, 127] ShowName off GotoTag "regAutoReply_match1" TagVisibility "global" } Block { BlockType Goto Name "Goto10" SID "92" Position [730, 313, 890, 327] ShowName off GotoTag "regAutoReply_action4" TagVisibility "global" } Block { BlockType Goto Name "Goto11" SID "93" Position [730, 378, 890, 392] ShowName off GotoTag "regAutoReply_action5" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "96" Position [265, 178, 425, 192] ShowName off GotoTag "regAutoReply_match2" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "97" Position [265, 308, 425, 322] ShowName off GotoTag "regAutoReply_match4" TagVisibility "global" } Block { BlockType Goto Name "Goto31" SID "98" Position [265, 48, 425, 62] ShowName off GotoTag "regAutoReply_match0" TagVisibility "global" } Block { BlockType Goto Name "Goto4" SID "99" Position [265, 373, 425, 387] ShowName off GotoTag "regAutoReply_match5" TagVisibility "global" } Block { BlockType Goto Name "Goto5" SID "100" Position [265, 243, 425, 257] ShowName off GotoTag "regAutoReply_match3" TagVisibility "global" } Block { BlockType Goto Name "Goto6" SID "101" Position [730, 48, 890, 62] ShowName off GotoTag "regAutoReply_action0" TagVisibility "global" } Block { BlockType Goto Name "Goto7" SID "102" Position [730, 113, 890, 127] ShowName off GotoTag "regAutoReply_action1" TagVisibility "global" } Block { BlockType Goto Name "Goto8" SID "103" Position [730, 178, 890, 192] ShowName off GotoTag "regAutoReply_action2" TagVisibility "global" } Block { BlockType Goto Name "Goto9" SID "104" Position [730, 243, 890, 257] ShowName off GotoTag "regAutoReply_action3" TagVisibility "global" } Line { SrcBlock "From Register" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Goto31" DstPort 1 } Line { SrcBlock "From Register1" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "From Register2" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "From Register3" SrcPort 1 DstBlock "Down Sample4" DstPort 1 } Line { SrcBlock "From Register4" SrcPort 1 DstBlock "Down Sample5" DstPort 1 } Line { SrcBlock "From Register5" SrcPort 1 DstBlock "Down Sample6" DstPort 1 } Line { SrcBlock "From Register6" SrcPort 1 DstBlock "Down Sample12" DstPort 1 } Line { SrcBlock "From Register7" SrcPort 1 DstBlock "Down Sample11" DstPort 1 } Line { SrcBlock "From Register8" SrcPort 1 DstBlock "Down Sample10" DstPort 1 } Line { SrcBlock "From Register9" SrcPort 1 DstBlock "Down Sample9" DstPort 1 } Line { SrcBlock "From Register10" SrcPort 1 DstBlock "Down Sample8" DstPort 1 } Line { SrcBlock "From Register11" SrcPort 1 DstBlock "Down Sample7" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock "Goto5" DstPort 1 } Line { SrcBlock "Down Sample5" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "Down Sample6" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "Down Sample7" SrcPort 1 DstBlock "Goto11" DstPort 1 } Line { SrcBlock "Down Sample8" SrcPort 1 DstBlock "Goto10" DstPort 1 } Line { SrcBlock "Down Sample9" SrcPort 1 DstBlock "Goto9" DstPort 1 } Line { SrcBlock "Down Sample10" SrcPort 1 DstBlock "Goto8" DstPort 1 } Line { SrcBlock "Down Sample11" SrcPort 1 DstBlock "Goto7" DstPort 1 } Line { SrcBlock "Down Sample12" SrcPort 1 DstBlock "Goto6" DstPort 1 } } } Block { BlockType SubSystem Name "Rx Registers" SID "119" Ports [] Position [175, 95, 246, 132] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Rx Registers" Location [-271, 198, 1388, 1086] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "12LSB" SID "120" Ports [1, 1] Position [185, 601, 220, 619] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "12" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "12LSB " SID "121" Ports [1, 1] Position [285, 718, 325, 732] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "12" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "12LSB " SID "122" Ports [1, 1] Position [995, 759, 1030, 771] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "12" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.931 0.946 0.973 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('bla" "ck');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "12LSB+16" SID "123" Ports [1, 1] Position [285, 698, 325, 712] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "12" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "16LSB" SID "124" Ports [1, 1] Position [235, 933, 275, 947] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "16LSB " SID "125" Ports [1, 1] Position [955, 613, 995, 627] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "16MSB " SID "126" Ports [1, 1] Position [235, 913, 275, 927] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "18LSB" SID "127" Ports [1, 1] Position [180, 801, 215, 819] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "18" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "1LSB " SID "128" Ports [1, 1] Position [870, 144, 905, 156] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.931 0.946 0.973 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('bla" "ck');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "1LSB+1 " SID "129" Ports [1, 1] Position [870, 184, 905, 196] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.931 0.946 0.973 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('bla" "ck');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "1MSB" SID "130" Ports [1, 1] Position [995, 709, 1030, 721] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.931 0.946 0.973 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('bla" "ck');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "24MSB" SID "131" Ports [1, 1] Position [300, 241, 335, 259] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "24" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "3LSB+16" SID "132" Ports [1, 1] Position [185, 641, 220, 659] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "3" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "5b+16" SID "133" Ports [1, 1] Position [195, 383, 235, 397] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "6LSB+7" SID "134" Ports [1, 1] Position [205, 338, 245, 352] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "6" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "7" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "7LSB" SID "135" Ports [1, 1] Position [205, 293, 245, 307] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "7" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB " SID "136" Ports [1, 1] Position [300, 211, 335, 229] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+0" SID "137" Ports [1, 1] Position [955, 433, 995, 447] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+16" SID "138" Ports [1, 1] Position [955, 503, 995, 517] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+24" SID "139" Ports [1, 1] Position [955, 533, 995, 547] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+8" SID "140" Ports [1, 1] Position [955, 463, 995, 477] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8MSB" SID "141" Ports [1, 1] Position [195, 418, 235, 432] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "ControlBits Slices" SID "142" Ports [1] Position [285, 29, 360, 61] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ControlBits Slices" Location [160, 82, 1782, 1026] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "32b" SID "143" Position [25, 38, 55, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample" SID "144" Ports [1, 1] Position [190, 51, 220, 79] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "145" Ports [1, 1] Position [190, 131, 220, 159] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample10" SID "146" Ports [1, 1] Position [190, 231, 220, 259] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample11" SID "147" Ports [1, 1] Position [190, 721, 220, 749] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample12" SID "148" Ports [1, 1] Position [190, 766, 220, 794] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample13" SID "149" Ports [1, 1] Position [190, 251, 220, 279] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample14" SID "150" Ports [1, 1] Position [190, 271, 220, 299] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample19" SID "151" Ports [1, 1] Position [190, 346, 220, 374] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample2" SID "152" Ports [1, 1] Position [190, 151, 220, 179] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "153" Ports [1, 1] Position [190, 171, 220, 199] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "154" Ports [1, 1] Position [190, 301, 220, 329] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample5" SID "155" Ports [1, 1] Position [190, 211, 220, 239] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample6" SID "156" Ports [1, 1] Position [190, 401, 220, 429] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample7" SID "157" Ports [1, 1] Position [190, 436, 220, 464] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample8" SID "158" Ports [1, 1] Position [190, 481, 220, 509] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample9" SID "159" Ports [1, 1] Position [190, 591, 220, 619] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Goto Name "Goto1" SID "160" Position [280, 55, 465, 75] ShowName off GotoTag "regRx_reqLongCorr" TagVisibility "global" } Block { BlockType Goto Name "Goto10" SID "161" Position [280, 509, 465, 531] ShowName off GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType Goto Name "Goto11" SID "162" Position [280, 534, 465, 556] ShowName off GotoTag "regRx_FlexBERMode" TagVisibility "global" } Block { BlockType Goto Name "Goto12" SID "163" Position [280, 564, 465, 586] ShowName off GotoTag "regRx_BERignoreHeader" TagVisibility "global" } Block { BlockType Goto Name "Goto13" SID "164" Position [280, 114, 465, 136] ShowName off GotoTag "regRx_SISOmode" TagVisibility "global" } Block { BlockType Goto Name "Goto16" SID "165" Position [280, 594, 465, 616] ShowName off GotoTag "regRx_BER_perPktReset" TagVisibility "global" } Block { BlockType Goto Name "Goto17" SID "166" Position [280, 174, 465, 196] ShowName off GotoTag "regRx_chanEst_RecordEn" TagVisibility "global" } Block { BlockType Goto Name "Goto18" SID "167" Position [280, 624, 465, 646] ShowName off GotoTag "RxReg_radioRxEnable" TagVisibility "global" } Block { BlockType Goto Name "Goto19" SID "168" Position [280, 214, 465, 236] ShowName off GotoTag "regRx_freqCorrBypass" TagVisibility "global" } Block { BlockType Goto Name "Goto20" SID "169" Position [280, 654, 465, 676] ShowName off GotoTag "regRx_AF_SavePkt" TagVisibility "global" } Block { BlockType Goto Name "Goto21" SID "170" Position [280, 274, 465, 296] ShowName off GotoTag "regRx_CompensateRSSI_En" TagVisibility "global" } Block { BlockType Goto Name "Goto22" SID "171" Position [280, 379, 465, 401] ShowName off GotoTag "regRx_simpleDynRxModulationEn" TagVisibility "global" } Block { BlockType Goto Name "Goto23" SID "172" Position [280, 254, 465, 276] ShowName off GotoTag "regRx_ExtPktDetReset_En" TagVisibility "global" } Block { BlockType Goto Name "Goto24" SID "173" Position [280, 679, 465, 701] ShowName off GotoTag "RxReg_ResetFlagA" TagVisibility "global" } Block { BlockType Goto Name "Goto25" SID "174" Position [280, 194, 465, 216] ShowName off GotoTag "RxReg_CaptureChanMags" TagVisibility "global" } Block { BlockType Goto Name "Goto26" SID "175" Position [280, 704, 465, 726] ShowName off GotoTag "RxReg_ResetFlagB" TagVisibility "global" } Block { BlockType Goto Name "Goto27" SID "176" Position [280, 304, 465, 326] ShowName off GotoTag "RxReg_PreCFO_Negate" TagVisibility "global" } Block { BlockType Goto Name "Goto28" SID "177" Position [280, 724, 465, 746] ShowName off GotoTag "RxReg_PktDetCoarseCFOEn" TagVisibility "global" } Block { BlockType Goto Name "Goto29" SID "178" Position [280, 744, 465, 766] ShowName off GotoTag "regRx_UseChanMag_Masking" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "179" Position [280, 234, 465, 256] ShowName off GotoTag "regRx_coarseCFO_en" TagVisibility "global" } Block { BlockType Goto Name "Goto31" SID "180" Position [280, 329, 465, 351] ShowName off GotoTag "regRx_DivisionBypass" TagVisibility "global" } Block { BlockType Goto Name "Goto33" SID "181" Position [285, 805, 470, 825] ShowName off GotoTag "regRx_GlobalReset" TagVisibility "global" } Block { BlockType Goto Name "Goto4" SID "182" Position [280, 404, 465, 426] ShowName off GotoTag "regRx_switchingDivEn" TagVisibility "global" } Block { BlockType Goto Name "Goto5" SID "183" Position [280, 35, 465, 55] ShowName off GotoTag "regRx_BER_reset" TagVisibility "global" } Block { BlockType Goto Name "Goto6" SID "184" Position [280, 439, 465, 461] ShowName off GotoTag "regRx_noSwitch_forceAntB" TagVisibility "global" } Block { BlockType Goto Name "Goto7" SID "185" Position [280, 94, 465, 116] ShowName off GotoTag "regTxRx_BigPktBufMode" TagVisibility "global" } Block { BlockType Goto Name "Goto8" SID "186" Position [280, 484, 465, 506] ShowName off GotoTag "regRx_resetOnBadHeader" TagVisibility "global" } Block { BlockType Goto Name "Goto9" SID "187" Position [280, 349, 465, 371] ShowName off GotoTag "regRx_forceDisableOnTx" TagVisibility "global" } Block { BlockType Reference Name "Slice" SID "188" Ports [1, 1] Position [110, 36, 145, 54] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice1" SID "189" Ports [1, 1] Position [110, 56, 145, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice10" SID "190" Ports [1, 1] Position [110, 236, 145, 254] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "10" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice11" SID "191" Ports [1, 1] Position [110, 256, 145, 274] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "11" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice12" SID "192" Ports [1, 1] Position [110, 276, 145, 294] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "12" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice13" SID "193" Ports [1, 1] Position [110, 306, 145, 324] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "13" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice14" SID "194" Ports [1, 1] Position [110, 331, 145, 349] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "14" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice15" SID "195" Ports [1, 1] Position [110, 351, 145, 369] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "15" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice16" SID "196" Ports [1, 1] Position [110, 381, 145, 399] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice17" SID "197" Ports [1, 1] Position [110, 406, 145, 424] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "17" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice18" SID "198" Ports [1, 1] Position [110, 441, 145, 459] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "18" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice19" SID "199" Ports [1, 1] Position [110, 486, 145, 504] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "19" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice2" SID "200" Ports [1, 1] Position [110, 76, 145, 94] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice20" SID "201" Ports [1, 1] Position [110, 511, 145, 529] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "20" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice21" SID "202" Ports [1, 1] Position [110, 536, 145, 554] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "21" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice22" SID "203" Ports [1, 1] Position [110, 566, 145, 584] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "22" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice23" SID "204" Ports [1, 1] Position [110, 596, 145, 614] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "23" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice24" SID "205" Ports [1, 1] Position [110, 626, 145, 644] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice25" SID "206" Ports [1, 1] Position [110, 806, 145, 824] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,460,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice26" SID "207" Ports [1, 1] Position [110, 656, 145, 674] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "25" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice27" SID "208" Ports [1, 1] Position [110, 681, 145, 699] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "26" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice28" SID "209" Ports [1, 1] Position [110, 706, 145, 724] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "27" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice29" SID "210" Ports [1, 1] Position [110, 726, 145, 744] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "28" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice3" SID "211" Ports [1, 1] Position [110, 96, 145, 114] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice30" SID "212" Ports [1, 1] Position [110, 746, 145, 764] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "29" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice31" SID "213" Ports [1, 1] Position [110, 771, 145, 789] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "30" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice4" SID "214" Ports [1, 1] Position [110, 116, 145, 134] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "4" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice5" SID "215" Ports [1, 1] Position [110, 156, 145, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "6" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice6" SID "216" Ports [1, 1] Position [110, 136, 145, 154] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice7" SID "217" Ports [1, 1] Position [110, 176, 145, 194] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "7" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice8" SID "218" Ports [1, 1] Position [110, 196, 145, 214] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice9" SID "219" Ports [1, 1] Position [110, 216, 145, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "9" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Line { SrcBlock "Slice" SrcPort 1 DstBlock "Goto5" DstPort 1 } Line { SrcBlock "Slice1" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Slice2" SrcPort 1 Points [125, 0] } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "Slice4" SrcPort 1 DstBlock "Goto13" DstPort 1 } Line { SrcBlock "Slice6" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Slice5" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 Points [50, 0] } Line { SrcBlock "Down Sample2" SrcPort 1 Points [50, 0] } Line { SrcBlock "Slice7" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Slice8" SrcPort 1 DstBlock "Goto25" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Goto17" DstPort 1 } Line { SrcBlock "Slice9" SrcPort 1 DstBlock "Down Sample5" DstPort 1 } Line { SrcBlock "Down Sample5" SrcPort 1 DstBlock "Goto19" DstPort 1 } Line { SrcBlock "32b" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 20] Branch { Points [0, 20] Branch { Points [0, 20] Branch { Points [0, 20] Branch { Points [0, 20] Branch { Points [0, 20] Branch { Points [0, 20] Branch { Points [0, 20] Branch { Points [0, 20] Branch { Points [0, 20] Branch { Points [0, 20] Branch { Points [0, 20] Branch { Points [0, 30] Branch { Points [0, 25] Branch { Points [0, 20] Branch { Points [0, 30] Branch { DstBlock "Slice16" DstPort 1 } Branch { Points [0, 25] Branch { DstBlock "Slice17" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "Slice18" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "Slice19" DstPort 1 } Branch { Points [0, 25] Branch { DstBlock "Slice20" DstPort 1 } Branch { Points [0, 25] Branch { DstBlock "Slice21" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "Slice22" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "Slice23" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "Slice24" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "Slice26" DstPort 1 } Branch { Points [0, 25] Branch { DstBlock "Slice27" DstPort 1 } Branch { Points [0, 25] Branch { DstBlock "Slice28" DstPort 1 } Branch { Points [0, 20] Branch { DstBlock "Slice29" DstPort 1 } Branch { Points [0, 20] Branch { DstBlock "Slice30" DstPort 1 } Branch { Points [0, 25] Branch { Points [0, 35] DstBlock "Slice25" DstPort 1 } Branch { DstBlock "Slice31" DstPort 1 } } } } } } } } } } } } } } } } Branch { DstBlock "Slice15" DstPort 1 } } Branch { DstBlock "Slice14" DstPort 1 } } Branch { DstBlock "Slice13" DstPort 1 } } Branch { DstBlock "Slice12" DstPort 1 } } Branch { DstBlock "Slice11" DstPort 1 } } Branch { DstBlock "Slice10" DstPort 1 } } Branch { DstBlock "Slice9" DstPort 1 } } Branch { DstBlock "Slice8" DstPort 1 } } Branch { DstBlock "Slice7" DstPort 1 } } Branch { DstBlock "Slice5" DstPort 1 } } Branch { DstBlock "Slice6" DstPort 1 } } Branch { DstBlock "Slice4" DstPort 1 } } Branch { DstBlock "Slice3" DstPort 1 } } Branch { DstBlock "Slice2" DstPort 1 } } Branch { DstBlock "Slice1" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice10" SrcPort 1 DstBlock "Down Sample10" DstPort 1 } Line { SrcBlock "Down Sample10" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "Slice11" SrcPort 1 DstBlock "Down Sample13" DstPort 1 } Line { SrcBlock "Down Sample13" SrcPort 1 DstBlock "Goto23" DstPort 1 } Line { SrcBlock "Down Sample14" SrcPort 1 DstBlock "Goto21" DstPort 1 } Line { SrcBlock "Slice12" SrcPort 1 DstBlock "Down Sample14" DstPort 1 } Line { SrcBlock "Slice3" SrcPort 1 DstBlock "Goto7" DstPort 1 } Line { SrcBlock "Slice13" SrcPort 1 DstBlock "Down Sample4" DstPort 1 } Line { SrcBlock "Slice14" SrcPort 1 DstBlock "Goto31" DstPort 1 } Line { SrcBlock "Slice15" SrcPort 1 DstBlock "Down Sample19" DstPort 1 } Line { SrcBlock "Down Sample19" SrcPort 1 DstBlock "Goto9" DstPort 1 } Line { SrcBlock "Slice25" SrcPort 1 DstBlock "Goto33" DstPort 1 } Line { SrcBlock "Slice16" SrcPort 1 DstBlock "Goto22" DstPort 1 } Line { SrcBlock "Slice17" SrcPort 1 DstBlock "Down Sample6" DstPort 1 } Line { SrcBlock "Down Sample6" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "Slice18" SrcPort 1 DstBlock "Down Sample7" DstPort 1 } Line { SrcBlock "Down Sample7" SrcPort 1 Points [0, 0] DstBlock "Goto6" DstPort 1 } Line { SrcBlock "Down Sample8" SrcPort 1 Points [0, 0] DstBlock "Goto8" DstPort 1 } Line { SrcBlock "Slice19" SrcPort 1 DstBlock "Down Sample8" DstPort 1 } Line { SrcBlock "Slice20" SrcPort 1 DstBlock "Goto10" DstPort 1 } Line { SrcBlock "Slice21" SrcPort 1 DstBlock "Goto11" DstPort 1 } Line { SrcBlock "Slice22" SrcPort 1 DstBlock "Goto12" DstPort 1 } Line { SrcBlock "Slice23" SrcPort 1 DstBlock "Down Sample9" DstPort 1 } Line { SrcBlock "Down Sample9" SrcPort 1 DstBlock "Goto16" DstPort 1 } Line { SrcBlock "Slice24" SrcPort 1 DstBlock "Goto18" DstPort 1 } Line { SrcBlock "Slice26" SrcPort 1 DstBlock "Goto20" DstPort 1 } Line { SrcBlock "Slice27" SrcPort 1 DstBlock "Goto24" DstPort 1 } Line { SrcBlock "Slice28" SrcPort 1 DstBlock "Goto26" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock "Goto27" DstPort 1 } Line { SrcBlock "Slice29" SrcPort 1 DstBlock "Down Sample11" DstPort 1 } Line { SrcBlock "Down Sample11" SrcPort 1 DstBlock "Goto28" DstPort 1 } Line { SrcBlock "Slice30" SrcPort 1 DstBlock "Goto29" DstPort 1 } Line { SrcBlock "Slice31" SrcPort 1 DstBlock "Down Sample12" DstPort 1 } Line { SrcBlock "Down Sample12" SrcPort 1 Points [50, 0] } Annotation { Name "LSB" Position [125, 24] } Annotation { Name "0x1" Position [492, 49] } Annotation { Name "0x2" Position [492, 69] } Annotation { Name "0x4" Position [492, 89] } Annotation { Name "0x8" Position [492, 109] } Annotation { Name "0x10" Position [492, 129] } Annotation { Name "0x20" Position [492, 149] } Annotation { Name "0x40" Position [492, 169] } Annotation { Name "0x100" Position [492, 209] } Annotation { Name "0x200" Position [492, 229] } Annotation { Name "0x400" Position [492, 244] } Annotation { Name "0x800" Position [492, 264] } Annotation { Name "0x1000" Position [492, 284] } Annotation { Name "0x2000" Position [492, 319] } Annotation { Name "0x4000" Position [492, 344] } Annotation { Name "0x1_0000" Position [497, 389] } Annotation { Name "0x2_0000" Position [497, 414] } Annotation { Name "0x4_0000" Position [497, 449] } Annotation { Name "0x8_0000" Position [502, 494] } Annotation { Name "0x8000" Position [492, 364] } Annotation { Name "0x10_0000" Position [507, 519] } Annotation { Name "0x20_0000" Position [507, 544] } Annotation { Name "0x40_0000" Position [507, 574] } Annotation { Name "0x80" Position [492, 189] } Annotation { Name "0x80_0000" Position [507, 609] } Annotation { Name "0x100_0000" Position [512, 639] } Annotation { Name "0x200_0000" Position [512, 664] } Annotation { Name "0x400_0000" Position [512, 689] } Annotation { Name "0x800_0000" Position [512, 714] } Annotation { Name "0x8000_0000" Position [517, 814] } Annotation { Name "0x1000_0000" Position [512, 734] } Annotation { Name "0x2000_0000" Position [512, 754] } Annotation { Name "0x4000_0000" Position [512, 779] } } } Block { BlockType Reference Name "Down Sample1" SID "220" Ports [1, 1] Position [355, 411, 385, 439] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample12" SID "221" Ports [1, 1] Position [865, 456, 895, 484] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample15" SID "222" Ports [1, 1] Position [210, 206, 240, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample17" SID "223" Ports [1, 1] Position [355, 331, 385, 359] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample18" SID "224" Ports [1, 1] Position [210, 31, 240, 59] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample2" SID "225" Ports [1, 1] Position [990, 136, 1020, 164] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample23" SID "226" Ports [1, 1] Position [355, 376, 385, 404] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "227" Ports [1, 1] Position [990, 176, 1020, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "228" Ports [1, 1] Position [180, 696, 205, 714] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2" "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);" "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^" "{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample5" SID "229" Ports [1, 1] Position [160, 911, 185, 929] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,303" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2" "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);" "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^" "{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample6" SID "230" Ports [1, 1] Position [860, 606, 890, 634] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample7" SID "231" Ports [1, 1] Position [875, 701, 905, 729] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample9" SID "232" Ports [1, 1] Position [355, 286, 385, 314] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register" SID "9260" Ports [0, 1] Position [70, 30, 110, 60] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_ControlBits'" init "rx_controlBits" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register10" SID "9292" Ports [0, 1] Position [740, 135, 780, 165] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_PreCFO_Options'" init "regRx_preCFOoptions" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register11" SID "9293" Ports [0, 1] Position [740, 220, 780, 250] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_PreCFO_PilotCalcCorrection'" init "regRx_pilotCalcCorrection" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register12" SID "9294" Ports [0, 1] Position [740, 290, 780, 320] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_coarseCFO_correction'" init "regRx_coarseCalcCorrection" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register13" SID "9295" Ports [0, 1] Position [740, 455, 780, 485] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_PktDet_LongCorr_Params'" init "Rx_PktDet_LongCorr_Params" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register14" SID "9296" Ports [0, 1] Position [740, 605, 780, 635] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_PktDet_LongCorr_Thresholds'" init "Rx_PktDet_LongCorrThresholds" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register16" SID "9298" Ports [0, 1] Position [740, 700, 780, 730] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_FixedPktLen'" init "RxReg_FixedPktLen" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register2" SID "9284" Ports [0, 1] Position [70, 205, 110, 235] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_pktByteNums'" init "pktByteNums" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register3" SID "9285" Ports [0, 1] Position [65, 905, 105, 935] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_ChanEst_MinMag'" init "regRx_chanEst_minMag" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register4" SID "9286" Ports [0, 1] Position [65, 285, 105, 315] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_PktDet_Delay'" init "PktDet_Delay" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register5" SID "9287" Ports [0, 1] Position [65, 525, 105, 555] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_Constellation_Scaling'" init "rx_postEq_scaling" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register6" SID "9288" Ports [0, 1] Position [65, 595, 105, 625] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_PilotCalcParams'" init "reg_PilotCalcParams" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register7" SID "9289" Ports [0, 1] Position [65, 690, 105, 720] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_AF_Blanking'" init "reg_AF_Tx_Blanking" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register8" SID "9290" Ports [0, 1] Position [65, 795, 105, 825] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_AF_TxScaling'" init "reg_AF_Tx_Scaling" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "233" Position [1320, 66, 1435, 84] ShowName off CloseFcn "tagdialog Close" GotoTag "RxReg_RxGainsEn" TagVisibility "global" } Block { BlockType From Name "From10" SID "234" Position [1315, 635, 1470, 655] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_pktDetEventCount_en" TagVisibility "global" } Block { BlockType From Name "From12" SID "235" Position [1335, 175, 1450, 195] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_BER_Errors" TagVisibility "global" } Block { BlockType From Name "From13" SID "236" Position [1335, 190, 1450, 210] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_BER_ErrorsEn" TagVisibility "global" } Block { BlockType From Name "From14" SID "237" Position [1335, 275, 1450, 295] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_BER_TotalBitsEn" TagVisibility "global" } Block { BlockType From Name "From2" SID "238" Position [1315, 360, 1470, 380] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_PktDone_InterruptStatus" TagVisibility "global" } Block { BlockType From Name "From25" SID "239" Position [1335, 260, 1450, 280] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_BER_TotalBits" TagVisibility "global" } Block { BlockType From Name "From3" SID "240" Position [1320, 51, 1435, 69] ShowName off CloseFcn "tagdialog Close" GotoTag "RxReg_RxGains" TagVisibility "global" } Block { BlockType From Name "From4" SID "241" Position [1315, 375, 1470, 395] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_PktDone_InterruptStatusEn" TagVisibility "global" } Block { BlockType From Name "From5" SID "242" Position [1315, 465, 1470, 485] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_pilotCFOest" TagVisibility "global" } Block { BlockType From Name "From6" SID "243" Position [1315, 480, 1470, 500] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_pilotCFOest_en" TagVisibility "global" } Block { BlockType From Name "From7" SID "244" Position [1315, 550, 1470, 570] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_coarseCFOest" TagVisibility "global" } Block { BlockType From Name "From8" SID "245" Position [1315, 565, 1470, 585] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_coarseCFOest_en" TagVisibility "global" } Block { BlockType From Name "From9" SID "246" Position [1315, 620, 1470, 640] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_pktDetEventCount" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "247" Position [395, 802, 550, 818] ShowName off GotoTag "regRx_AF_TxScaling" TagVisibility "global" } Block { BlockType Goto Name "Goto10" SID "248" Position [1040, 430, 1240, 450] ShowName off GotoTag "regRx_PktDet_LongCorr_CountLoad" TagVisibility "global" } Block { BlockType Goto Name "Goto11" SID "249" Position [355, 642, 510, 658] ShowName off GotoTag "regRx_PilotCFOCalc_AvgLen" TagVisibility "global" } Block { BlockType Goto Name "Goto12" SID "250" Position [395, 717, 550, 733] ShowName off GotoTag "regRx_AF_BlankStart" TagVisibility "global" } Block { BlockType Goto Name "Goto13" SID "251" Position [395, 697, 550, 713] ShowName off GotoTag "regRx_AF_BlankEnd" TagVisibility "global" } Block { BlockType Goto Name "Goto14" SID "252" Position [430, 932, 600, 948] ShowName off GotoTag "regRx_chanEst_minMagA" TagVisibility "global" } Block { BlockType Goto Name "Goto15" SID "253" Position [430, 912, 600, 928] ShowName off GotoTag "regRx_chanEst_minMagB" TagVisibility "global" } Block { BlockType Goto Name "Goto16" SID "254" Position [1040, 610, 1240, 630] ShowName off GotoTag "regRx_PktDet_LongCorr_Thresh" TagVisibility "global" } Block { BlockType Goto Name "Goto17" SID "255" Position [1050, 499, 1235, 521] ShowName off GotoTag "regRx_PktDet_LongCorr_WindStart" TagVisibility "global" } Block { BlockType Goto Name "Goto18" SID "256" Position [1050, 529, 1235, 551] ShowName off GotoTag "regRx_PktDet_LongCorr_WindEnd" TagVisibility "global" } Block { BlockType Goto Name "Goto19" SID "257" Position [1105, 705, 1305, 725] ShowName off GotoTag "regRx_fixedLenMode" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "258" Position [465, 413, 635, 437] ShowName off GotoTag "regRx_CFOCalc_maxPhaseDiff" TagVisibility "global" } Block { BlockType Goto Name "Goto20" SID "259" Position [430, 290, 630, 310] ShowName off GotoTag "regRx_PktDet_Delay" TagVisibility "global" } Block { BlockType Goto Name "Goto21" SID "260" Position [1110, 755, 1310, 775] ShowName off GotoTag "regRx_fixedLen_maxNumBytes" TagVisibility "global" } Block { BlockType Goto Name "Goto26" SID "261" Position [355, 602, 510, 618] ShowName off GotoTag "regRx_MinimumPilotChanMag" TagVisibility "global" } Block { BlockType Goto Name "Goto27" SID "262" Position [410, 239, 595, 261] ShowName off GotoTag "regRx_headerByteNums" TagVisibility "global" } Block { BlockType Goto Name "Goto29" SID "263" Position [1045, 459, 1230, 481] ShowName off GotoTag "RxReg_PktDetCoarseCFO_CaptInd" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "264" Position [1080, 142, 1260, 158] ShowName off GotoTag "RxReg_PreCFO_UseCoarse" TagVisibility "global" } Block { BlockType Goto Name "Goto4" SID "265" Position [255, 532, 400, 548] ShowName off GotoTag "RxReg_PostEQScaling" TagVisibility "global" } Block { BlockType Goto Name "Goto41" SID "266" Position [465, 378, 635, 402] ShowName off GotoTag "regRx_CFOCalc_Dly" TagVisibility "global" } Block { BlockType Goto Name "Goto5" SID "267" Position [410, 209, 595, 231] ShowName off GotoTag "regTxRx_numHeaderBytes" TagVisibility "global" } Block { BlockType Goto Name "Goto6" SID "268" Position [1080, 182, 1260, 198] ShowName off GotoTag "RxReg_PreCFO_UsePilots" TagVisibility "global" } Block { BlockType Goto Name "Goto7" SID "269" Position [455, 333, 625, 357] ShowName off GotoTag "regRx_symbolTimingOffset" TagVisibility "global" } Block { BlockType Goto Name "Goto8" SID "270" Position [1040, 227, 1220, 243] ShowName off GotoTag "regRx_PilotCFOCalc_Correction" TagVisibility "global" } Block { BlockType Goto Name "Goto9" SID "271" Position [1040, 297, 1220, 313] ShowName off GotoTag "regRx_coarseCFO_correction" TagVisibility "global" } Block { BlockType SubSystem Name "Pkt Detector Registers" SID "272" Ports [] Position [650, 43, 699, 96] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Pkt Detector Registers" Location [160, 82, 1918, 1026] Open off ModelBrowserVisibility on ModelBrowserWidth 212 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "10LSB + 1" SID "10203" Ports [1, 1] Position [245, 321, 280, 339] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "10" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "11" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "11LSB1" SID "10204" Ports [1, 1] Position [245, 281, 280, 299] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "11" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "16LSB" SID "275" Ports [1, 1] Position [240, 466, 275, 484] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "16LSB+8" SID "276" Ports [1, 1] Position [305, 786, 340, 804] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "16MSB" SID "277" Ports [1, 1] Position [240, 506, 275, 524] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "5LSB + 1" SID "10205" Ports [1, 1] Position [245, 361, 280, 379] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "21" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "6LSB + 26" SID "10206" Ports [1, 1] Position [245, 411, 280, 429] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardw" "are notes: In hardware this block costs nothing." nbits "6" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "26" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB" SID "279" Ports [1, 1] Position [305, 741, 340, 759] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "280" Ports [5, 1] Position [435, 577, 505, 673] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at z" "ero." num_inputs "5" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,165" block_type "concat" block_version "10.1.3" sg_icon_stat "70,96,5,1,white,blue,0,64797e70,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 96 96 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 70 70 0 0 ],[0 0 96 96 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[59.1 59.1 69.1 5" "9.1 69.1 69.1 69.1 59.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[49.1 49.1 59.1 59.1 49.1 ],[0.931 0.94" "6 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[39.1 39.1 49.1 49.1 39.1 ],[1 1 1 ]);\npatch([22.75 57.2 47.2 3" "7.2 27.2 12.75 22.75 ],[29.1 29.1 39.1 29.1 39.1 39.1 29.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon" " graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\n\n\n\ncolor('bl" "ack');port_label('input',5,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT" ": end icon text');" } Block { BlockType Reference Name "Constant" SID "281" Ports [0, 1] Position [550, 643, 575, 667] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,24,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'," "1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "282" Ports [0, 1] Position [150, 593, 175, 617] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'," "1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "283" Ports [1, 1] Position [330, 597, 355, 613] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "284" Ports [1, 1] Position [330, 617, 355, 633] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "285" Ports [1, 1] Position [330, 637, 355, 653] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "286" Ports [1, 1] Position [330, 657, 355, 673] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample10" SID "288" Ports [1, 1] Position [395, 58, 420, 82] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample11" SID "289" Ports [1, 1] Position [395, 38, 420, 62] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample12" SID "290" Ports [1, 1] Position [395, 158, 420, 182] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample13" SID "291" Ports [1, 1] Position [395, 178, 420, 202] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample14" SID "292" Ports [1, 1] Position [395, 203, 420, 227] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample15" SID "293" Ports [1, 1] Position [395, 223, 420, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample16" SID "294" Ports [1, 1] Position [505, 738, 530, 762] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample17" SID "295" Ports [1, 1] Position [505, 783, 530, 807] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample18" SID "10207" Ports [1, 1] Position [400, 318, 425, 342] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample19" SID "10208" Ports [1, 1] Position [400, 408, 425, 432] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample20" SID "10209" Ports [1, 1] Position [400, 358, 425, 382] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample21" SID "10210" Ports [1, 1] Position [400, 278, 425, 302] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "297" Ports [1, 1] Position [400, 463, 425, 487] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "298" Ports [1, 1] Position [400, 503, 425, 527] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample5" SID "299" Ports [1, 1] Position [395, 138, 420, 162] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample7" SID "301" Ports [1, 1] Position [395, 118, 420, 142] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample8" SID "302" Ports [1, 1] Position [395, 98, 420, 122] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample9" SID "303" Ports [1, 1] Position [395, 78, 420, 102] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register1" SID "9299" Ports [0, 1] Position [95, 35, 135, 65] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'pktDet_controlBits'" init "pktDet_controlBits" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register2" SID "9300" Ports [0, 1] Position [125, 735, 165, 765] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'pktDet_autoCorrParams'" init "rxReg_pktDetCorr" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register4" SID "9302" Ports [0, 1] Position [110, 460, 150, 490] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'pktDet_thresholds'" init "(3000 * 2^0) + (3000 * 2^16)" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register5" SID "10211" Ports [0, 1] Position [110, 275, 150, 305] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'pktDet_durations'" init "(48 * 2^0) + (1000 * 2^11) + (16 * 2^21) + (1 * 2^26)" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "304" Position [45, 636, 200, 654] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_pktDetected_AntA" TagVisibility "global" } Block { BlockType From Name "From2" SID "305" Position [45, 616, 200, 634] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_pktDetected_AntB" TagVisibility "global" } Block { BlockType From Name "From3" SID "306" Position [45, 576, 200, 594] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_idleCounter" TagVisibility "global" } Block { BlockType From Name "From4" SID "307" Position [45, 656, 200, 674] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_idleForDIFS" TagVisibility "global" } Block { BlockType Goto Name "Goto" SID "308" Position [590, 741, 715, 759] ShowName off GotoTag "pktDetCorr_ratioThresh" TagVisibility "global" } Block { BlockType Goto Name "Goto10" SID "10215" Position [500, 410, 685, 430] ShowName off GotoTag "regPktDet_pktDetMinDuration_autoCorr" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto12" SID "310" Position [495, 60, 680, 80] ShowName off GotoTag "regPktDet_IgnoreDetection" TagVisibility "global" } Block { BlockType Goto Name "Goto13" SID "311" Position [495, 40, 680, 60] ShowName off GotoTag "regPktDet_MasterReset" TagVisibility "global" } Block { BlockType Goto Name "Goto14" SID "312" Position [495, 80, 680, 100] ShowName off GotoTag "regPktDet_RSSIclkRatioSel" TagVisibility "global" } Block { BlockType Goto Name "Goto15" SID "313" Position [495, 100, 680, 120] ShowName off GotoTag "regPktDet_CSMAenableIdle" TagVisibility "global" } Block { BlockType Goto Name "Goto16" SID "314" Position [495, 120, 680, 140] ShowName off GotoTag "regPktDet_pktDetMode" TagVisibility "global" } Block { BlockType Goto Name "Goto17" SID "315" Position [495, 140, 680, 160] ShowName off GotoTag "regPktDet_pktDetMask_A" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "317" Position [495, 160, 680, 180] ShowName off GotoTag "regPktDet_pktDetMask_B" TagVisibility "global" } Block { BlockType Goto Name "Goto21" SID "319" Position [505, 465, 690, 485] ShowName off GotoTag "regPktDet_pktDetThresh" TagVisibility "global" } Block { BlockType Goto Name "Goto22" SID "320" Position [505, 505, 690, 525] ShowName off GotoTag "regPktDet_carrierSenseThresh" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "321" Position [495, 180, 680, 200] ShowName off GotoTag "regPktDet_EnableExtDet" TagVisibility "global" } Block { BlockType Goto Name "Goto4" SID "322" Position [495, 205, 680, 225] ShowName off GotoTag "regPktDet_enableRSSIdet" TagVisibility "global" } Block { BlockType Goto Name "Goto5" SID "323" Position [495, 225, 680, 245] ShowName off GotoTag "regPktDet_enableAutoCorrDet" TagVisibility "global" } Block { BlockType Goto Name "Goto6" SID "10212" Position [500, 360, 685, 380] ShowName off GotoTag "regPktDet_RSSIavgLength" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto7" SID "10213" Position [500, 280, 685, 300] ShowName off GotoTag "regPktDet_pktDetMinDuration" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto8" SID "324" Position [590, 786, 715, 804] ShowName off GotoTag "pktDetCorr_minPower" TagVisibility "global" } Block { BlockType Goto Name "Goto9" SID "10214" Position [500, 320, 685, 340] ShowName off GotoTag "regPktDet_DIFSperiod" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Slice1" SID "329" Ports [1, 1] Position [235, 181, 270, 199] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "7" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice10" SID "330" Ports [1, 1] Position [235, 41, 270, 59] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice11" SID "331" Ports [1, 1] Position [235, 61, 270, 79] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice12" SID "332" Ports [1, 1] Position [235, 81, 270, 99] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice13" SID "333" Ports [1, 1] Position [235, 101, 270, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice14" SID "334" Ports [1, 1] Position [235, 121, 270, 139] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "4" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice15" SID "335" Ports [1, 1] Position [235, 161, 270, 179] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "6" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice16" SID "336" Ports [1, 1] Position [235, 141, 270, 159] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice2" SID "337" Ports [1, 1] Position [235, 206, 270, 224] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice3" SID "338" Ports [1, 1] Position [235, 226, 270, 244] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "9" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Terminator Name "Terminator" SID "339" Position [725, 630, 745, 650] ShowName off } Block { BlockType Reference Name "To Register" SID "340" Ports [2, 1] Position [625, 612, 685, 668] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'pktDet_status'" init "0" ownership "Locally owned and initialized" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "14" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,266" block_type "toreg" block_version "10.1.3" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44" ".88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88" " ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch(" "[20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "To_UFix8_1" SID "341" Ports [1, 1] Position [400, 787, 445, 803] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes type of samples without altering their binary representation.

Hardware notes: In hardwar" "e this block costs nothing.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and t" "he output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) " "becomes an output of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "8" has_advanced_control "0" sggui_pos "20,20,356,284" block_type "cast" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "To_UFix8_7" SID "342" Ports [1, 1] Position [400, 742, 445, 758] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes type of samples without altering their binary representation.

Hardware notes: In hardwar" "e this block costs nothing.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and t" "he output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) " "becomes an output of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "7" has_advanced_control "0" sggui_pos "20,20,356,284" block_type "cast" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "343" Ports [1, 1] Position [245, 636, 270, 654] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,263" block_type "usamp" block_version "8.2" sg_icon_stat "25,18,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}\\bf\\" "uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "344" Ports [1, 1] Position [245, 616, 270, 634] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,263" block_type "usamp" block_version "8.2" sg_icon_stat "25,18,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}\\bf\\" "uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample4" SID "345" Ports [1, 1] Position [245, 576, 270, 594] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,263" block_type "usamp" block_version "8.2" sg_icon_stat "25,18,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}\\bf\\" "uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Line { SrcBlock "From Register1" SrcPort 1 Points [65, 0] Branch { DstBlock "Slice10" DstPort 1 } Branch { Points [0, 20] Branch { DstBlock "Slice11" DstPort 1 } Branch { Points [0, 20] Branch { DstBlock "Slice12" DstPort 1 } Branch { Points [0, 20] Branch { DstBlock "Slice13" DstPort 1 } Branch { Points [0, 20] Branch { DstBlock "Slice14" DstPort 1 } Branch { Points [0, 20] Branch { DstBlock "Slice16" DstPort 1 } Branch { Points [0, 20] Branch { DstBlock "Slice15" DstPort 1 } Branch { Points [0, 20] Branch { DstBlock "Slice1" DstPort 1 } Branch { Points [0, 25] Branch { DstBlock "Slice2" DstPort 1 } Branch { Points [0, 20] DstBlock "Slice3" DstPort 1 } } } } } } } } } } Line { SrcBlock "Slice10" SrcPort 1 DstBlock "Down Sample11" DstPort 1 } Line { SrcBlock "Slice11" SrcPort 1 DstBlock "Down Sample10" DstPort 1 } Line { SrcBlock "Slice12" SrcPort 1 DstBlock "Down Sample9" DstPort 1 } Line { SrcBlock "Slice13" SrcPort 1 DstBlock "Down Sample8" DstPort 1 } Line { SrcBlock "Slice14" SrcPort 1 DstBlock "Down Sample7" DstPort 1 } Line { SrcBlock "From Register4" SrcPort 1 Points [50, 0] Branch { DstBlock "16LSB" DstPort 1 } Branch { Points [0, 40] DstBlock "16MSB" DstPort 1 } } Line { SrcBlock "16LSB" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Goto21" DstPort 1 } Line { SrcBlock "16MSB" SrcPort 1 DstBlock "Down Sample4" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock "Goto22" DstPort 1 } Line { SrcBlock "Down Sample5" SrcPort 1 DstBlock "Goto17" DstPort 1 } Line { SrcBlock "Down Sample7" SrcPort 1 DstBlock "Goto16" DstPort 1 } Line { SrcBlock "Down Sample8" SrcPort 1 DstBlock "Goto15" DstPort 1 } Line { SrcBlock "Down Sample9" SrcPort 1 DstBlock "Goto14" DstPort 1 } Line { SrcBlock "Down Sample10" SrcPort 1 DstBlock "Goto12" DstPort 1 } Line { SrcBlock "Down Sample11" SrcPort 1 DstBlock "Goto13" DstPort 1 } Line { SrcBlock "Slice16" SrcPort 1 DstBlock "Down Sample5" DstPort 1 } Line { SrcBlock "Slice15" SrcPort 1 DstBlock "Down Sample12" DstPort 1 } Line { SrcBlock "Down Sample12" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "To Register" DstPort 2 } Line { SrcBlock "Concat" SrcPort 1 DstBlock "To Register" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Convert4" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Up Sample2" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Up Sample4" DstPort 1 } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Concat" DstPort 3 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Concat" DstPort 4 } Line { SrcBlock "Convert4" SrcPort 1 DstBlock "Concat" DstPort 5 } Line { SrcBlock "To Register" SrcPort 1 DstBlock "Terminator" DstPort 1 } Line { SrcBlock "Slice1" SrcPort 1 DstBlock "Down Sample13" DstPort 1 } Line { SrcBlock "Down Sample13" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "Slice2" SrcPort 1 DstBlock "Down Sample14" DstPort 1 } Line { SrcBlock "Down Sample14" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "Slice3" SrcPort 1 DstBlock "Down Sample15" DstPort 1 } Line { SrcBlock "Down Sample15" SrcPort 1 DstBlock "Goto5" DstPort 1 } Line { SrcBlock "From Register2" SrcPort 1 Points [105, 0] Branch { Points [0, 45] DstBlock "16LSB+8" DstPort 1 } Branch { DstBlock "8LSB" DstPort 1 } } Line { SrcBlock "8LSB" SrcPort 1 DstBlock "To_UFix8_7" DstPort 1 } Line { SrcBlock "To_UFix8_7" SrcPort 1 DstBlock "Down Sample16" DstPort 1 } Line { SrcBlock "16LSB+8" SrcPort 1 DstBlock "To_UFix8_1" DstPort 1 } Line { SrcBlock "Down Sample16" SrcPort 1 DstBlock "Goto" DstPort 1 } Line { SrcBlock "Down Sample17" SrcPort 1 DstBlock "Goto8" DstPort 1 } Line { SrcBlock "To_UFix8_1" SrcPort 1 DstBlock "Down Sample17" DstPort 1 } Line { SrcBlock "From Register5" SrcPort 1 Points [55, 0] Branch { DstBlock "11LSB1" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "10LSB + 1" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "5LSB + 1" DstPort 1 } Branch { Points [0, 50] DstBlock "6LSB + 26" DstPort 1 } } } } Line { SrcBlock "11LSB1" SrcPort 1 DstBlock "Down Sample21" DstPort 1 } Line { SrcBlock "10LSB + 1" SrcPort 1 DstBlock "Down Sample18" DstPort 1 } Line { SrcBlock "Down Sample21" SrcPort 1 DstBlock "Goto7" DstPort 1 } Line { SrcBlock "Down Sample18" SrcPort 1 DstBlock "Goto9" DstPort 1 } Line { SrcBlock "5LSB + 1" SrcPort 1 DstBlock "Down Sample20" DstPort 1 } Line { SrcBlock "Down Sample20" SrcPort 1 DstBlock "Goto6" DstPort 1 } Line { SrcBlock "6LSB + 26" SrcPort 1 DstBlock "Down Sample19" DstPort 1 } Line { SrcBlock "Down Sample19" SrcPort 1 DstBlock "Goto10" DstPort 1 } Annotation { Name "0x1" Position [707, 49] } Annotation { Name "0x2" Position [707, 69] } Annotation { Name "0x4" Position [707, 89] } Annotation { Name "0x8" Position [707, 109] } Annotation { Name "0x10" Position [712, 129] } Annotation { Name "LSB" Position [250, 29] } Annotation { Name "0x20" Position [712, 149] } Annotation { Name "0x40" Position [712, 169] } Annotation { Name "0x80" Position [712, 194] } Annotation { Name "0x100" Position [712, 214] } Annotation { Name "0x200" Position [712, 234] } } } Block { BlockType Reference Name "Reinterpret1" SID "357" Ports [1, 1] Position [870, 225, 915, 245] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal b" "etween signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs no" "thing.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is force" "d to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outp" "ut of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "31" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor" "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret2" SID "358" Ports [1, 1] Position [870, 295, 915, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal b" "etween signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs no" "thing.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is force" "d to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outp" "ut of 56 (111000 in binary)." force_arith_type on arith_type "Signed (2's comp)" force_bin_pt on bin_pt "32" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor" "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret3" SID "359" Ports [1, 1] Position [270, 600, 315, 620] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal b" "etween signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs no" "thing.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is force" "d to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outp" "ut of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "12" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor" "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret4" SID "360" Ports [1, 1] Position [280, 800, 325, 820] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal b" "etween signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs no" "thing.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is force" "d to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outp" "ut of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "12" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor" "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret5" SID "361" Ports [1, 1] Position [270, 415, 315, 435] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal b" "etween signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs no" "thing.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is force" "d to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outp" "ut of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "8" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor" "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret6" SID "362" Ports [1, 1] Position [330, 910, 375, 930] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal b" "etween signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs no" "thing.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is force" "d to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outp" "ut of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "15" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor" "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret7" SID "363" Ports [1, 1] Position [330, 930, 375, 950] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal b" "etween signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs no" "thing.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is force" "d to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outp" "ut of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "15" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor" "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "To Register" SID "9303" Ports [2, 1] Position [1595, 50, 1655, 85] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_Gains'" init "0" ownership "Locally owned and initialized" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,35,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 35 35 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 35 35 0 ]);\npatch([18.875 26.1 31.1 36.1 41.1 31.1 23.875 18.875 ],[22." "55 22.55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([23.875 31.1 26.1 18.875 23.875 ],[17.55 17.55" " 22.55 22.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([18.875 26.1 31.1 23.875 18.875 ],[12.55 12.55 17.55 17.55 1" "2.55 ],[1 1 1 ]);\npatch([23.875 41.1 36.1 31.1 26.1 18.875 23.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label(" "'output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "To Register1" SID "9310" Ports [2, 1] Position [1605, 175, 1665, 210] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_BER_Errors'" init "0" ownership "Locally owned and initialized" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,35,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 35 35 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 35 35 0 ]);\npatch([18.875 26.1 31.1 36.1 41.1 31.1 23.875 18.875 ],[22." "55 22.55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([23.875 31.1 26.1 18.875 23.875 ],[17.55 17.55" " 22.55 22.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([18.875 26.1 31.1 23.875 18.875 ],[12.55 12.55 17.55 17.55 1" "2.55 ],[1 1 1 ]);\npatch([23.875 41.1 36.1 31.1 26.1 18.875 23.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label(" "'output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "To Register2" SID "9316" Ports [2, 1] Position [1605, 260, 1665, 295] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_BER_TotalBits'" init "0" ownership "Locally owned and initialized" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,35,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 35 35 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 35 35 0 ]);\npatch([18.875 26.1 31.1 36.1 41.1 31.1 23.875 18.875 ],[22." "55 22.55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([23.875 31.1 26.1 18.875 23.875 ],[17.55 17.55" " 22.55 22.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([18.875 26.1 31.1 23.875 18.875 ],[12.55 12.55 17.55 17.55 1" "2.55 ],[1 1 1 ]);\npatch([23.875 41.1 36.1 31.1 26.1 18.875 23.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label(" "'output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "To Register3" SID "9322" Ports [2, 1] Position [1605, 360, 1665, 395] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_pktDone_interruptStatus'" init "0" ownership "Locally owned and initialized" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,35,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 35 35 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 35 35 0 ]);\npatch([18.875 26.1 31.1 36.1 41.1 31.1 23.875 18.875 ],[22." "55 22.55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([23.875 31.1 26.1 18.875 23.875 ],[17.55 17.55" " 22.55 22.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([18.875 26.1 31.1 23.875 18.875 ],[12.55 12.55 17.55 17.55 1" "2.55 ],[1 1 1 ]);\npatch([23.875 41.1 36.1 31.1 26.1 18.875 23.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label(" "'output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "To Register4" SID "9328" Ports [2, 1] Position [1605, 465, 1665, 500] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_pilotCFOest'" init "0" ownership "Locally owned and initialized" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,35,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 35 35 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 35 35 0 ]);\npatch([18.875 26.1 31.1 36.1 41.1 31.1 23.875 18.875 ],[22." "55 22.55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([23.875 31.1 26.1 18.875 23.875 ],[17.55 17.55" " 22.55 22.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([18.875 26.1 31.1 23.875 18.875 ],[12.55 12.55 17.55 17.55 1" "2.55 ],[1 1 1 ]);\npatch([23.875 41.1 36.1 31.1 26.1 18.875 23.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label(" "'output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "To Register5" SID "9334" Ports [2, 1] Position [1605, 550, 1665, 585] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_coarseCFOest'" init "0" ownership "Locally owned and initialized" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,35,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 35 35 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 35 35 0 ]);\npatch([18.875 26.1 31.1 36.1 41.1 31.1 23.875 18.875 ],[22." "55 22.55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([23.875 31.1 26.1 18.875 23.875 ],[17.55 17.55" " 22.55 22.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([18.875 26.1 31.1 23.875 18.875 ],[12.55 12.55 17.55 17.55 1" "2.55 ],[1 1 1 ]);\npatch([23.875 41.1 36.1 31.1 26.1 18.875 23.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label(" "'output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "To Register6" SID "9340" Ports [2, 1] Position [1605, 620, 1665, 655] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_pktDetEventCount'" init "0" ownership "Locally owned and initialized" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,35,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 35 35 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 35 35 0 ]);\npatch([18.875 26.1 31.1 36.1 41.1 31.1 23.875 18.875 ],[22." "55 22.55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([23.875 31.1 26.1 18.875 23.875 ],[17.55 17.55" " 22.55 22.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([18.875 26.1 31.1 23.875 18.875 ],[12.55 12.55 17.55 17.55 1" "2.55 ],[1 1 1 ]);\npatch([23.875 41.1 36.1 31.1 26.1 18.875 23.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label(" "'output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "UFix32 " SID "9306" Ports [1, 1] Position [1500, 53, 1535, 67] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "UFix32 " Location [1452, 1134, 1742, 1218] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "9308" Position [25, 38, 55, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "9305" Ports [1, 1] Position [165, 30, 210, 60] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret" SID "9304" Ports [1, 1] Position [80, 29, 130, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can change the signal between s" "igned and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.
Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsig" "ned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111" "000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "reinterpret" sg_icon_stat "50,32,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[20.44 20.44 24" ".44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[16.44 16.44 20.44 20.44 16.44" " ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch(" "[20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "O" SID "9307" Position [235, 38, 265, 52] IconDisplay "Port number" } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "O" DstPort 1 } Line { SrcBlock "I" SrcPort 1 DstBlock "Reinterpret" DstPort 1 } } } Block { BlockType SubSystem Name "UFix32 1" SID "9311" Ports [1, 1] Position [1510, 178, 1545, 192] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "UFix32 1" Location [217, 310, 1975, 1392] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "9312" Position [25, 38, 55, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "9313" Ports [1, 1] Position [165, 30, 210, 60] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret" SID "9314" Ports [1, 1] Position [80, 29, 130, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can change the signal between s" "igned and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.
Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsig" "ned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111" "000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "reinterpret" sg_icon_stat "50,32,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[20.44 20.44 24" ".44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[16.44 16.44 20.44 20.44 16.44" " ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch(" "[20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "O" SID "9315" Position [235, 38, 265, 52] IconDisplay "Port number" } Line { SrcBlock "I" SrcPort 1 DstBlock "Reinterpret" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "O" DstPort 1 } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "Convert" DstPort 1 } } } Block { BlockType SubSystem Name "UFix32 2" SID "9317" Ports [1, 1] Position [1510, 263, 1545, 277] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "UFix32 2" Location [217, 310, 1975, 1392] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "9318" Position [25, 38, 55, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "9319" Ports [1, 1] Position [165, 30, 210, 60] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret" SID "9320" Ports [1, 1] Position [80, 29, 130, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can change the signal between s" "igned and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.
Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsig" "ned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111" "000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "reinterpret" sg_icon_stat "50,32,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[20.44 20.44 24" ".44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[16.44 16.44 20.44 20.44 16.44" " ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch(" "[20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "O" SID "9321" Position [235, 38, 265, 52] IconDisplay "Port number" } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "O" DstPort 1 } Line { SrcBlock "I" SrcPort 1 DstBlock "Reinterpret" DstPort 1 } } } Block { BlockType SubSystem Name "UFix32 3" SID "9323" Ports [1, 1] Position [1510, 363, 1545, 377] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "UFix32 3" Location [217, 310, 1975, 1392] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "9324" Position [25, 38, 55, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "9325" Ports [1, 1] Position [165, 30, 210, 60] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret" SID "9326" Ports [1, 1] Position [80, 29, 130, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can change the signal between s" "igned and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.
Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsig" "ned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111" "000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "reinterpret" sg_icon_stat "50,32,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[20.44 20.44 24" ".44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[16.44 16.44 20.44 20.44 16.44" " ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch(" "[20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "O" SID "9327" Position [235, 38, 265, 52] IconDisplay "Port number" } Line { SrcBlock "I" SrcPort 1 DstBlock "Reinterpret" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "O" DstPort 1 } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "Convert" DstPort 1 } } } Block { BlockType SubSystem Name "UFix32 4" SID "9329" Ports [1, 1] Position [1510, 468, 1545, 482] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "UFix32 4" Location [217, 310, 1975, 1392] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "9330" Position [25, 38, 55, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "9331" Ports [1, 1] Position [165, 30, 210, 60] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret" SID "9332" Ports [1, 1] Position [80, 29, 130, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can change the signal between s" "igned and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.
Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsig" "ned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111" "000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "reinterpret" sg_icon_stat "50,32,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[20.44 20.44 24" ".44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[16.44 16.44 20.44 20.44 16.44" " ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch(" "[20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "O" SID "9333" Position [235, 38, 265, 52] IconDisplay "Port number" } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "O" DstPort 1 } Line { SrcBlock "I" SrcPort 1 DstBlock "Reinterpret" DstPort 1 } } } Block { BlockType SubSystem Name "UFix32 5" SID "9335" Ports [1, 1] Position [1510, 553, 1545, 567] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "UFix32 5" Location [217, 310, 1975, 1392] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "9336" Position [25, 38, 55, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "9337" Ports [1, 1] Position [165, 30, 210, 60] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret" SID "9338" Ports [1, 1] Position [80, 29, 130, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can change the signal between s" "igned and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.
Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsig" "ned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111" "000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "reinterpret" sg_icon_stat "50,32,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[20.44 20.44 24" ".44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[16.44 16.44 20.44 20.44 16.44" " ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch(" "[20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "O" SID "9339" Position [235, 38, 265, 52] IconDisplay "Port number" } Line { SrcBlock "I" SrcPort 1 DstBlock "Reinterpret" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "O" DstPort 1 } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "Convert" DstPort 1 } } } Block { BlockType SubSystem Name "UFix32 6" SID "9341" Ports [1, 1] Position [1510, 623, 1545, 637] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "UFix32 6" Location [217, 310, 1975, 1392] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "9342" Position [25, 38, 55, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "9343" Ports [1, 1] Position [165, 30, 210, 60] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret" SID "9344" Ports [1, 1] Position [80, 29, 130, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can change the signal between s" "igned and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.
Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsig" "ned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111" "000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "reinterpret" sg_icon_stat "50,32,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[20.44 20.44 24" ".44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[16.44 16.44 20.44 20.44 16.44" " ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch(" "[20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "O" SID "9345" Position [235, 38, 265, 52] IconDisplay "Port number" } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "O" DstPort 1 } Line { SrcBlock "I" SrcPort 1 DstBlock "Reinterpret" DstPort 1 } } } Line { SrcBlock "From Register" SrcPort 1 DstBlock "Down Sample18" DstPort 1 } Line { SrcBlock "From Register2" SrcPort 1 DstBlock "Down Sample15" DstPort 1 } Line { SrcBlock "From Register4" SrcPort 1 Points [65, 0] Branch { DstBlock "7LSB" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "6LSB+7" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "5b+16" DstPort 1 } Branch { Points [0, 35] DstBlock "8MSB" DstPort 1 } } } } Line { SrcBlock "Down Sample9" SrcPort 1 DstBlock "Goto20" DstPort 1 } Line { SrcBlock "Down Sample15" SrcPort 1 Points [15, 0] Branch { Points [0, 30] DstBlock "24MSB" DstPort 1 } Branch { DstBlock "8LSB " DstPort 1 } } Line { SrcBlock "8LSB+8" SrcPort 1 DstBlock "Goto29" DstPort 1 } Line { SrcBlock "From Register13" SrcPort 1 DstBlock "Down Sample12" DstPort 1 } Line { SrcBlock "Down Sample12" SrcPort 1 Points [25, 0] Branch { DstBlock "8LSB+8" DstPort 1 } Branch { Points [0, -30] DstBlock "8LSB+0" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "8LSB+16" DstPort 1 } Branch { Points [0, 30] DstBlock "8LSB+24" DstPort 1 } } } Line { SrcBlock "24MSB" SrcPort 1 DstBlock "Goto27" DstPort 1 } Line { SrcBlock "7LSB" SrcPort 1 DstBlock "Down Sample9" DstPort 1 } Line { SrcBlock "6LSB+7" SrcPort 1 DstBlock "Down Sample17" DstPort 1 } Line { SrcBlock "Down Sample17" SrcPort 1 DstBlock "Goto7" DstPort 1 } Line { SrcBlock "Down Sample23" SrcPort 1 DstBlock "Goto41" DstPort 1 } Line { SrcBlock "5b+16" SrcPort 1 DstBlock "Down Sample23" DstPort 1 } Line { SrcBlock "Down Sample18" SrcPort 1 DstBlock "ControlBits Slices" DstPort 1 } Line { SrcBlock "8LSB " SrcPort 1 DstBlock "Goto5" DstPort 1 } Line { SrcBlock "From Register5" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "From Register8" SrcPort 1 DstBlock "18LSB" DstPort 1 } Line { SrcBlock "Reinterpret4" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "18LSB" SrcPort 1 DstBlock "Reinterpret4" DstPort 1 } Line { SrcBlock "8MSB" SrcPort 1 DstBlock "Reinterpret5" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "Reinterpret5" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "1LSB " SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "From Register10" SrcPort 1 Points [60, 0] Branch { DstBlock "1LSB " DstPort 1 } Branch { Points [0, 40] DstBlock "1LSB+1 " DstPort 1 } } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "From Register6" SrcPort 1 Points [50, 0] Branch { DstBlock "12LSB" DstPort 1 } Branch { Points [0, 40] DstBlock "3LSB+16" DstPort 1 } } Line { SrcBlock "Reinterpret3" SrcPort 1 DstBlock "Goto26" DstPort 1 } Line { SrcBlock "12LSB" SrcPort 1 DstBlock "Reinterpret3" DstPort 1 } Line { SrcBlock "3LSB+16" SrcPort 1 DstBlock "Goto11" DstPort 1 } Line { SrcBlock "1LSB+1 " SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Goto6" DstPort 1 } Line { SrcBlock "Reinterpret1" SrcPort 1 DstBlock "Goto8" DstPort 1 } Line { SrcBlock "From Register11" SrcPort 1 DstBlock "Reinterpret1" DstPort 1 } Line { SrcBlock "Reinterpret2" SrcPort 1 DstBlock "Goto9" DstPort 1 } Line { SrcBlock "From Register12" SrcPort 1 DstBlock "Reinterpret2" DstPort 1 } Line { SrcBlock "8LSB+0" SrcPort 1 DstBlock "Goto10" DstPort 1 } Line { SrcBlock "From Register7" SrcPort 1 DstBlock "Down Sample4" DstPort 1 } Line { SrcBlock "12LSB+16" SrcPort 1 DstBlock "Goto13" DstPort 1 } Line { SrcBlock "12LSB " SrcPort 1 DstBlock "Goto12" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 Points [40, 0] Branch { DstBlock "12LSB+16" DstPort 1 } Branch { Points [0, 20] DstBlock "12LSB " DstPort 1 } } Line { SrcBlock "Down Sample5" SrcPort 1 Points [10, 0] Branch { Points [0, 20] DstBlock "16LSB" DstPort 1 } Branch { DstBlock "16MSB " DstPort 1 } } Line { SrcBlock "From Register3" SrcPort 1 DstBlock "Down Sample5" DstPort 1 } Line { SrcBlock "16LSB" SrcPort 1 DstBlock "Reinterpret7" DstPort 1 } Line { SrcBlock "16MSB " SrcPort 1 DstBlock "Reinterpret6" DstPort 1 } Line { SrcBlock "Reinterpret6" SrcPort 1 DstBlock "Goto15" DstPort 1 } Line { SrcBlock "Reinterpret7" SrcPort 1 DstBlock "Goto14" DstPort 1 } Line { SrcBlock "From Register14" SrcPort 1 DstBlock "Down Sample6" DstPort 1 } Line { SrcBlock "Down Sample6" SrcPort 1 DstBlock "16LSB " DstPort 1 } Line { SrcBlock "16LSB " SrcPort 1 DstBlock "Goto16" DstPort 1 } Line { SrcBlock "8LSB+16" SrcPort 1 DstBlock "Goto17" DstPort 1 } Line { SrcBlock "8LSB+24" SrcPort 1 DstBlock "Goto18" DstPort 1 } Line { SrcBlock "From Register16" SrcPort 1 DstBlock "Down Sample7" DstPort 1 } Line { SrcBlock "1MSB" SrcPort 1 DstBlock "Goto19" DstPort 1 } Line { SrcBlock "12LSB " SrcPort 1 DstBlock "Goto21" DstPort 1 } Line { SrcBlock "Down Sample7" SrcPort 1 Points [50, 0] Branch { DstBlock "1MSB" DstPort 1 } Branch { Points [0, 50] DstBlock "12LSB " DstPort 1 } } Line { SrcBlock "From3" SrcPort 1 DstBlock "UFix32 " DstPort 1 } Line { SrcBlock "UFix32 " SrcPort 1 DstBlock "To Register" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "To Register" DstPort 2 } Line { SrcBlock "UFix32 1" SrcPort 1 DstBlock "To Register1" DstPort 1 } Line { SrcBlock "UFix32 2" SrcPort 1 DstBlock "To Register2" DstPort 1 } Line { SrcBlock "UFix32 3" SrcPort 1 DstBlock "To Register3" DstPort 1 } Line { SrcBlock "UFix32 4" SrcPort 1 DstBlock "To Register4" DstPort 1 } Line { SrcBlock "UFix32 5" SrcPort 1 DstBlock "To Register5" DstPort 1 } Line { SrcBlock "UFix32 6" SrcPort 1 DstBlock "To Register6" DstPort 1 } Line { SrcBlock "From9" SrcPort 1 DstBlock "UFix32 6" DstPort 1 } Line { SrcBlock "From7" SrcPort 1 DstBlock "UFix32 5" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 DstBlock "UFix32 4" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "UFix32 3" DstPort 1 } Line { SrcBlock "From25" SrcPort 1 DstBlock "UFix32 2" DstPort 1 } Line { SrcBlock "From12" SrcPort 1 DstBlock "UFix32 1" DstPort 1 } Line { SrcBlock "From13" SrcPort 1 DstBlock "To Register1" DstPort 2 } Line { SrcBlock "From14" SrcPort 1 DstBlock "To Register2" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 DstBlock "To Register3" DstPort 2 } Line { SrcBlock "From6" SrcPort 1 DstBlock "To Register4" DstPort 2 } Line { SrcBlock "From8" SrcPort 1 DstBlock "To Register5" DstPort 2 } Line { SrcBlock "From10" SrcPort 1 DstBlock "To Register6" DstPort 2 } } } Block { BlockType SubSystem Name "Static Parameters\n(might be registers someday)" SID "374" Ports [] Position [90, 12, 160, 52] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Static Parameters\n(might be registers someday)" Location [1207, 119, 1610, 349] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "112" Block { BlockType Reference Name "Constant" SID "375" Ports [0, 1] Position [25, 25, 70, 55] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "numSubcarriers" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(max_num_subcarriers)+1)" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,0,1,white,blue,0,04961a6a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'64');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant1" SID "376" Ports [0, 1] Position [25, 100, 70, 130] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "numSubcarriers+CPLength-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(max_num_subcarriers+CPLength)+1)" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,0,1,white,blue,0,ed27c8eb,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'79');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant2" SID "377" Ports [0, 1] Position [30, 153, 60, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "16" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "5" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,24,0,1,white,blue,0,eafdfd08,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[" "15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 1" "2.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33" " 9.33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ]," "[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('output',1,'16');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample8" SID "378" Ports [1, 1] Position [120, 151, 150, 179] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Goto Name "Goto4" SID "379" Position [180, 155, 335, 175] ShowName off GotoTag "regRX_CP_Length" TagVisibility "global" } Block { BlockType Goto Name "Goto6" SID "380" Position [130, 30, 285, 50] ShowName off GotoTag "regRX_numSubcarriers" TagVisibility "global" } Block { BlockType Goto Name "Goto9" SID "381" Position [130, 105, 285, 125] ShowName off GotoTag "regRX_sampsPerSymMinusOne" TagVisibility "global" } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Goto6" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Goto9" DstPort 1 } Line { SrcBlock "Down Sample8" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Down Sample8" DstPort 1 } Annotation { Name "Replace with registers someday\nto support dynamic transform and \ncyclic prefix sizes" Position [55, 78] } } } Block { BlockType SubSystem Name "Tx Registers" SID "382" Ports [] Position [95, 95, 165, 132] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Tx Registers" Location [2, 82, 1678, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "124" Block { BlockType SubSystem Name "Control Bits Slices" SID "383" Ports [1] Position [275, 213, 355, 247] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Control Bits Slices" Location [392, 183, 773, 410] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "145" Block { BlockType Inport Name "32b" SID "384" Position [190, 138, 220, 152] IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "385" Ports [1, 1] Position [440, 251, 470, 279] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "386" Ports [1, 1] Position [405, 171, 435, 199] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Goto Name "Goto1" SID "387" Position [505, 157, 625, 173] ShowName off GotoTag "TxReg_Alamouti_Mode" TagVisibility "global" } Block { BlockType Goto Name "Goto10" SID "388" Position [475, 462, 620, 478] ShowName off GotoTag "regTx_AutoTwoTx_En" TagVisibility "global" } Block { BlockType Goto Name "Goto11" SID "389" Position [475, 551, 640, 569] ShowName off GotoTag "TxReg_TxRunningOut_en1" TagVisibility "global" } Block { BlockType Goto Name "Goto12" SID "390" Position [475, 581, 640, 599] ShowName off GotoTag "TxReg_FilterSel" TagVisibility "global" } Block { BlockType Goto Name "Goto15" SID "391" Position [505, 177, 625, 193] ShowName off GotoTag "TxReg_DisableAntBPreamble" TagVisibility "global" } Block { BlockType Goto Name "Goto16" SID "392" Position [505, 197, 625, 213] ShowName off GotoTag "TxReg_PilotScrambling" TagVisibility "global" } Block { BlockType Goto Name "Goto17" SID "393" Position [555, 257, 675, 273] ShowName off GotoTag "TxReg_AntBPreambleShift" TagVisibility "global" } Block { BlockType Goto Name "Goto18" SID "394" Position [555, 687, 675, 703] ShowName off GotoTag "TxReg_PostIFFTCycShift" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "395" Position [505, 137, 625, 153] ShowName off GotoTag "TxReg_SISO_Mode" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "396" Position [495, 312, 615, 328] ShowName off GotoTag "TxReg_SwapAntennas" TagVisibility "global" } Block { BlockType Goto Name "Goto4" SID "397" Position [495, 337, 615, 353] ShowName off GotoTag "TxReg_SoftTxStart_TxEn" TagVisibility "global" } Block { BlockType Goto Name "Goto5" SID "398" Position [495, 282, 615, 298] ShowName off GotoTag "regTx_RandomPayload" TagVisibility "global" } Block { BlockType Goto Name "Goto6" SID "399" Position [475, 521, 640, 539] ShowName off GotoTag "TxReg_TxRunningOut_en0" TagVisibility "global" } Block { BlockType Goto Name "Goto7" SID "400" Position [475, 372, 620, 388] ShowName off GotoTag "TxReg_Enable_ExtTxEn" TagVisibility "global" } Block { BlockType Goto Name "Goto8" SID "401" Position [475, 397, 620, 413] ShowName off GotoTag "regTx_AlwaysUsePreSpin" TagVisibility "global" } Block { BlockType Goto Name "Goto9" SID "402" Position [475, 432, 620, 448] ShowName off GotoTag "regTx_CaptureRandomPayload" TagVisibility "global" } Block { BlockType Reference Name "Reinterpret" SID "403" Ports [1, 1] Position [365, 256, 400, 274] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal between " "signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.

<" "P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned" " with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000" " in binary)." force_arith_type on arith_type "Signed (2's comp)" force_bin_pt off bin_pt "13" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "35,18,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice1" SID "404" Ports [1, 1] Position [275, 136, 310, 154] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice10" SID "405" Ports [1, 1] Position [275, 521, 310, 539] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "15" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice11" SID "406" Ports [1, 1] Position [275, 396, 310, 414] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "12" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice12" SID "407" Ports [1, 1] Position [275, 431, 310, 449] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "13" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice13" SID "408" Ports [1, 1] Position [275, 461, 310, 479] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "14" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice14" SID "409" Ports [1, 1] Position [275, 551, 310, 569] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice15" SID "410" Ports [1, 1] Position [275, 581, 310, 599] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "17" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice16" SID "411" Ports [1, 1] Position [275, 611, 310, 629] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "18" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice17" SID "412" Ports [1, 1] Position [275, 641, 310, 659] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "19" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice18" SID "413" Ports [1, 1] Position [275, 686, 310, 704] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "6" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "20" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice2" SID "414" Ports [1, 1] Position [275, 156, 310, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice3" SID "415" Ports [1, 1] Position [275, 176, 310, 194] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice4" SID "416" Ports [1, 1] Position [275, 196, 310, 214] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice5" SID "417" Ports [1, 1] Position [275, 256, 310, 274] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "4" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice6" SID "418" Ports [1, 1] Position [275, 281, 310, 299] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice7" SID "419" Ports [1, 1] Position [275, 311, 310, 329] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "9" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice8" SID "420" Ports [1, 1] Position [275, 336, 310, 354] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "10" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice9" SID "421" Ports [1, 1] Position [275, 371, 310, 389] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "11" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Line { SrcBlock "Slice1" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "32b" SrcPort 1 Points [15, 0] Branch { Points [0, 20] Branch { DstBlock "Slice2" DstPort 1 } Branch { Points [0, 20] Branch { Points [0, 20] Branch { Points [0, 60] Branch { DstBlock "Slice5" DstPort 1 } Branch { Points [0, 25] Branch { DstBlock "Slice6" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "Slice7" DstPort 1 } Branch { Points [0, 25] Branch { DstBlock "Slice8" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "Slice9" DstPort 1 } Branch { Points [0, 25] Branch { Points [0, 35] Branch { DstBlock "Slice12" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "Slice13" DstPort 1 } Branch { Points [0, 60] Branch { DstBlock "Slice10" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "Slice14" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "Slice15" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "Slice16" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "Slice17" DstPort 1 } Branch { Points [0, 45] DstBlock "Slice18" DstPort 1 } } } } } } } } Branch { DstBlock "Slice11" DstPort 1 } } } } } } } Branch { DstBlock "Slice4" DstPort 1 } } Branch { DstBlock "Slice3" DstPort 1 } } } Branch { DstBlock "Slice1" DstPort 1 } } Line { SrcBlock "Slice3" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Slice4" SrcPort 1 DstBlock "Goto16" DstPort 1 } Line { SrcBlock "Slice5" SrcPort 1 DstBlock "Reinterpret" DstPort 1 } Line { SrcBlock "Slice6" SrcPort 1 DstBlock "Goto5" DstPort 1 } Line { SrcBlock "Slice2" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "Slice7" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "Slice8" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "Slice9" SrcPort 1 DstBlock "Goto7" DstPort 1 } Line { SrcBlock "Slice11" SrcPort 1 DstBlock "Goto8" DstPort 1 } Line { SrcBlock "Slice12" SrcPort 1 DstBlock "Goto9" DstPort 1 } Line { SrcBlock "Slice13" SrcPort 1 DstBlock "Goto10" DstPort 1 } Line { SrcBlock "Slice10" SrcPort 1 DstBlock "Goto6" DstPort 1 } Line { SrcBlock "Slice14" SrcPort 1 DstBlock "Goto11" DstPort 1 } Line { SrcBlock "Slice15" SrcPort 1 DstBlock "Goto12" DstPort 1 } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Goto17" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Goto15" DstPort 1 } Line { SrcBlock "Slice18" SrcPort 1 DstBlock "Goto18" DstPort 1 } Annotation { Name "LSB" Position [290, 124] } Annotation { Name "0x1" Position [646, 145] } Annotation { Name "0x2" Position [646, 165] } Annotation { Name "0x4" Position [646, 185] } Annotation { Name "0x8" Position [646, 205] } Annotation { Name "0xF0" Position [706, 265] } Annotation { Name "0x200" Position [651, 320] } Annotation { Name "0x400" Position [646, 345] } Annotation { Name "0x100" Position [646, 290] } Annotation { Name "0x800" Position [646, 380] } Annotation { Name "0x1000" Position [656, 405] } Annotation { Name "0x2000" Position [656, 440] } Annotation { Name "0x4000" Position [656, 470] } Annotation { Name "0x8000" Position [681, 530] } Annotation { Name "0x1_0000" Position [681, 560] } Annotation { Name "0x2_0000" Position [681, 590] } Annotation { Name "0x4_0000" Position [706, 620] } Annotation { Name "0x8_0000" Position [701, 650] } Annotation { Name "0x3F0_0000" Position [716, 695] } } } Block { BlockType Reference Name "Down Sample1" SID "422" Ports [1, 1] Position [195, 216, 225, 244] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "423" Ports [1, 1] Position [190, 26, 220, 54] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "424" Ports [1, 1] Position [215, 516, 245, 544] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample6" SID "425" Ports [1, 1] Position [215, 466, 245, 494] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register1" SID "9353" Ports [0, 1] Position [85, 375, 125, 405] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Tx_Scaling'" init "tx_scaling" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register10" SID "9352" Ports [0, 1] Position [80, 465, 120, 495] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Tx_Delays'" init "tx_delays" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register2" SID "9354" Ports [0, 1] Position [85, 215, 125, 245] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Tx_ControlBits'" init "tx_controlBits" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register3" SID "9355" Ports [0, 1] Position [85, 25, 125, 55] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Tx_Start_Reset_Control'" init "0" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From5" SID "426" Position [95, 636, 235, 654] ShowName off CloseFcn "tagdialog Close" GotoTag "regTx_PktRunning" TagVisibility "global" } Block { BlockType From Name "From6" SID "427" Position [95, 651, 230, 669] ShowName off CloseFcn "tagdialog Close" GotoTag "regTx_PktRunningEn" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "428" Position [465, 522, 615, 538] ShowName off GotoTag "TxReg_TxRunningOut_delay" TagVisibility "global" } Block { BlockType Goto Name "Goto11" SID "429" Position [470, 497, 615, 513] ShowName off GotoTag "regRx_AutoTx_ExtraDly" TagVisibility "global" } Block { BlockType Goto Name "Goto13" SID "430" Position [355, 32, 475, 48] ShowName off GotoTag "TxReg_TxReset" TagVisibility "global" } Block { BlockType Goto Name "Goto14" SID "431" Position [355, 57, 475, 73] ShowName off GotoTag "TxReg_TxStart" TagVisibility "global" } Block { BlockType Goto Name "Goto23" SID "432" Position [450, 362, 595, 378] ShowName off GotoTag "TxReg_PreambleScaling" TagVisibility "global" } Block { BlockType Goto Name "Goto4" SID "433" Position [450, 382, 595, 398] ShowName off GotoTag "TxReg_postIFFTScaling" TagVisibility "global" } Block { BlockType Goto Name "Goto6" SID "434" Position [470, 472, 615, 488] ShowName off GotoTag "TxReg_ExtAutoTxEn_Delay" TagVisibility "global" } Block { BlockType Reference Name "Reinterpret" SID "439" Ports [1, 1] Position [335, 360, 380, 380] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal b" "etween signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs no" "thing.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is force" "d to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outp" "ut of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "13" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor" "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret1" SID "440" Ports [1, 1] Position [335, 380, 380, 400] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal b" "etween signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs no" "thing.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is force" "d to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outp" "ut of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "13" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "45,20,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor" "('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice1" SID "441" Ports [1, 1] Position [310, 496, 345, 514] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice10" SID "442" Ports [1, 1] Position [310, 471, 345, 489] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice14" SID "443" Ports [1, 1] Position [275, 31, 310, 49] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice15" SID "444" Ports [1, 1] Position [275, 56, 310, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice2" SID "445" Ports [1, 1] Position [310, 521, 345, 539] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "12" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice7" SID "446" Ports [1, 1] Position [225, 361, 260, 379] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice8" SID "447" Ports [1, 1] Position [225, 381, 260, 399] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "To Register7" SID "9346" Ports [2, 1] Position [370, 635, 430, 670] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Tx_PktRunning'" init "0" ownership "Locally owned and initialized" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,35,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 35 35 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 35 35 0 ]);\npatch([18.875 26.1 31.1 36.1 41.1 31.1 23.875 18.875 ],[22." "55 22.55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([23.875 31.1 26.1 18.875 23.875 ],[17.55 17.55" " 22.55 22.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([18.875 26.1 31.1 23.875 18.875 ],[12.55 12.55 17.55 17.55 1" "2.55 ],[1 1 1 ]);\npatch([23.875 41.1 36.1 31.1 26.1 18.875 23.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label(" "'output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "UFix32 7" SID "9347" Ports [1, 1] Position [275, 638, 310, 652] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "UFix32 7" Location [217, 310, 1975, 1392] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "9348" Position [25, 38, 55, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "9349" Ports [1, 1] Position [165, 30, 210, 60] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret" SID "9350" Ports [1, 1] Position [80, 29, 130, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can change the signal between s" "igned and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.
Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsig" "ned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111" "000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "reinterpret" sg_icon_stat "50,32,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[20.44 20.44 24" ".44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[16.44 16.44 20.44 20.44 16.44" " ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch(" "[20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "O" SID "9351" Position [235, 38, 265, 52] IconDisplay "Port number" } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "O" DstPort 1 } Line { SrcBlock "I" SrcPort 1 DstBlock "Reinterpret" DstPort 1 } } } Line { SrcBlock "From Register2" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Slice14" SrcPort 1 DstBlock "Goto13" DstPort 1 } Line { SrcBlock "From Register3" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Slice15" SrcPort 1 DstBlock "Goto14" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 Points [20, 0] Branch { DstBlock "Slice14" DstPort 1 } Branch { Points [0, 25] DstBlock "Slice15" DstPort 1 } } Line { SrcBlock "From6" SrcPort 1 DstBlock "To Register7" DstPort 2 } Line { SrcBlock "From Register1" SrcPort 1 Points [65, 0] Branch { DstBlock "Slice8" DstPort 1 } Branch { Points [0, -20] DstBlock "Slice7" DstPort 1 } } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "Goto23" DstPort 1 } Line { SrcBlock "Slice7" SrcPort 1 DstBlock "Reinterpret" DstPort 1 } Line { SrcBlock "Reinterpret1" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "Slice8" SrcPort 1 DstBlock "Reinterpret1" DstPort 1 } Line { Labels [0, 0] SrcBlock "Down Sample1" SrcPort 1 DstBlock "Control Bits Slices" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 DstBlock "UFix32 7" DstPort 1 } Line { SrcBlock "Slice10" SrcPort 1 DstBlock "Goto6" DstPort 1 } Line { SrcBlock "Slice1" SrcPort 1 DstBlock "Goto11" DstPort 1 } Line { SrcBlock "Slice2" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "From Register10" SrcPort 1 Points [55, 0] Branch { DstBlock "Down Sample6" DstPort 1 } Branch { Points [0, 50] DstBlock "Down Sample4" DstPort 1 } } Line { SrcBlock "Down Sample6" SrcPort 1 Points [15, 0] Branch { Points [0, 25] DstBlock "Slice1" DstPort 1 } Branch { DstBlock "Slice10" DstPort 1 } } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock "Slice2" DstPort 1 } Line { SrcBlock "UFix32 7" SrcPort 1 DstBlock "To Register7" DstPort 1 } Annotation { Name "0x2" Position [486, 65] } Annotation { Name "0x1" Position [486, 40] } Annotation { Name "0x0000_00FF - 8 bits" Position [681, 480] } Annotation { Name "0x0000_0F00 - 4 bits" Position [681, 505] } Annotation { Name "0x000F_F000 - 8 bits" Position [681, 530] } } } Block { BlockType SubSystem Name "TxRx Registers" SID "449" Ports [] Position [15, 95, 85, 132] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "TxRx Registers" Location [2, 82, 1661, 987] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "145" Block { BlockType Reference Name "16LSB+8" SID "450" Ports [1, 1] Position [305, 268, 345, 282] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "16LSB1" SID "451" Ports [1, 1] Position [265, 573, 305, 587] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "ceil(log2(max_num_trainingSymbols))" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "16MSB1" SID "452" Ports [1, 1] Position [265, 588, 305, 602] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "ceil(log2(max_num_baseRateSymbols))" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "6LSB+6" SID "453" Ports [1, 1] Position [280, 61, 315, 79] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "6" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "6" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "6LSB1" SID "454" Ports [1, 1] Position [280, 31, 315, 49] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "6" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB" SID "455" Ports [1, 1] Position [300, 138, 340, 152] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "456" Ports [2, 1] Position [390, 579, 420, 606] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "1 + ceil(log2(max_num_trainingSymbols + max_num_baseRateSymbols))" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "188,532,356,338" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,27,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[" "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 1" "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13." "33 10.33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7" ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_la" "bel('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample1" SID "457" Ports [1, 1] Position [725, 81, 755, 109] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,368,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample11" SID "458" Ports [1, 1] Position [200, 576, 230, 604] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,368,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample25" SID "459" Ports [1, 1] Position [210, 26, 240, 54] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "460" Ports [1, 1] Position [210, 301, 240, 329] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample7" SID "461" Ports [1, 1] Position [210, 131, 240, 159] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register2" SID "9363" Ports [0, 1] Position [90, 25, 130, 55] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_FFT_Scaling'" init "TxRx_FFTScaling" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "12" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register3" SID "9364" Ports [0, 1] Position [90, 130, 130, 160] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_Interrupt_PktBuf_Ctrl'" init "reg_Interrupt_PktBuf_Control" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register4" SID "9365" Ports [0, 1] Position [80, 300, 120, 330] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_Pilots_Index'" init "pilot_indicies" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register5" SID "9366" Ports [0, 1] Position [80, 380, 120, 410] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TxRx_Pilots_Values'" init "pilotValues" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register6" SID "9367" Ports [0, 1] Position [80, 575, 120, 605] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Rx_OFDM_SymbolCounts'" init "(2^16 * numBaseRateSymbols) + numTrainingSymbols" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register7" SID "9368" Ports [0, 1] Position [80, 450, 120, 480] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Tx_OFDM_SymCounts'" init "txReg_symbolCounts" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register8" SID "9369" Ports [0, 1] Position [565, 80, 605, 110] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'FEC_Config'" init "FEC_Config" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Goto Name "Goto1" SID "462" Position [785, 86, 880, 104] ShowName off GotoTag "Coding_En" TagVisibility "global" } Block { BlockType Goto Name "Goto11" SID "463" Position [360, 633, 530, 657] ShowName off GotoTag "regRx_numBaseRateSymbols" TagVisibility "global" } Block { BlockType Goto Name "Goto12" SID "464" Position [470, 583, 640, 607] ShowName off GotoTag "regRx_numTrainPlusBaseRateSyms" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "465" Position [785, 141, 880, 159] ShowName off GotoTag "FEC_Reg" TagVisibility "global" } Block { BlockType Goto Name "Goto22" SID "466" Position [185, 457, 330, 473] ShowName off GotoTag "TxReg_OFDM_SymCounts" TagVisibility "global" } Block { BlockType Goto Name "Goto25" SID "467" Position [280, 307, 435, 323] ShowName off GotoTag "regTxRx_PilotToneIndex" TagVisibility "global" } Block { BlockType Goto Name "Goto28" SID "468" Position [200, 387, 355, 403] ShowName off GotoTag "regTx_PilotToneValues" TagVisibility "global" } Block { BlockType Goto Name "Goto34" SID "469" Position [420, 265, 575, 285] ShowName off GotoTag "regTxRx_PktBuffOffsets" TagVisibility "global" } Block { BlockType Goto Name "Goto43" SID "470" Position [395, 31, 490, 49] ShowName off GotoTag "Tx_FFTScaling" TagVisibility "global" } Block { BlockType Goto Name "Goto44" SID "471" Position [395, 61, 490, 79] ShowName off GotoTag "Rx_FFTScaling" TagVisibility "global" } Block { BlockType Goto Name "Goto8" SID "472" Position [360, 543, 530, 567] ShowName off GotoTag "regRx_numTrainingSymbols" TagVisibility "global" } Block { BlockType SubSystem Name "InterruptControl" SID "473" Ports [1] Position [415, 121, 475, 169] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "InterruptControl" Location [185, 106, 700, 378] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Reg_8b" SID "474" Position [120, 158, 150, 172] IconDisplay "Port number" } Block { BlockType Goto Name "Goto10" SID "475" Position [560, 320, 715, 340] ShowName off GotoTag "intrCtrl_RxGoodPkt_en" TagVisibility "global" } Block { BlockType Goto Name "Goto11" SID "476" Position [560, 375, 715, 395] ShowName off GotoTag "intrCtrl_RxBadPkt_en" TagVisibility "global" } Block { BlockType Goto Name "Goto12" SID "477" Position [565, 475, 720, 495] ShowName off GotoTag "intrCtrl_RxBadHeader_en" TagVisibility "global" } Block { BlockType Goto Name "Goto13" SID "478" Position [565, 425, 720, 445] ShowName off GotoTag "intrCtrl_RxGoodHeader_en" TagVisibility "global" } Block { BlockType Goto Name "Goto14" SID "479" Position [565, 525, 720, 545] ShowName off GotoTag "intrCtrl_TxDone_en" TagVisibility "global" } Block { BlockType Goto Name "Goto15" SID "480" Position [565, 265, 720, 285] ShowName off GotoTag "intrCtrl_TxDone_rst" TagVisibility "global" } Block { BlockType Goto Name "Goto8" SID "481" Position [565, 155, 720, 175] ShowName off GotoTag "intrCtrl_RxPktInterrupts_rst" TagVisibility "global" } Block { BlockType Goto Name "Goto9" SID "482" Position [565, 205, 720, 225] ShowName off GotoTag "intrCtrl_RxHeaderInterrupts_rst" TagVisibility "global" } Block { BlockType Reference Name "LSB+0" SID "483" Ports [1, 1] Position [250, 151, 295, 179] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18.44 22" ".44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18.44 14.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "LSB+1" SID "484" Ports [1, 1] Position [250, 201, 295, 229] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18.44 22" ".44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18.44 14.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "LSB+2" SID "485" Ports [1, 1] Position [250, 261, 295, 289] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18.44 22" ".44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18.44 14.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "LSB+3" SID "486" Ports [1, 1] Position [250, 316, 295, 344] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18.44 22" ".44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18.44 14.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "LSB+4" SID "487" Ports [1, 1] Position [250, 371, 295, 399] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "4" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18.44 22" ".44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18.44 14.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "LSB+5" SID "488" Ports [1, 1] Position [250, 421, 295, 449] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18.44 22" ".44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18.44 14.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "LSB+6" SID "489" Ports [1, 1] Position [250, 471, 295, 499] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "6" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18.44 22" ".44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18.44 14.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "LSB+7" SID "490" Ports [1, 1] Position [250, 521, 295, 549] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "7" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18.44 22" ".44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18.44 14.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge" SID "491" Ports [1, 1] Position [380, 153, 435, 177] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "492" Position [350, 158, 380, 172] IconDisplay "Port number" } Block { BlockType Reference Name "Inverter" SID "493" Ports [1, 1] Position [455, 156, 480, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,e69ac283,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\n" "ewline ','texmode','on');\ncolor('black');disp(' \\nnot');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "494" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "495" Position [610, 173, 640, 187] IconDisplay "Port number" } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [15, 0] Branch { Points [0, 25] DstBlock "Logical1" DstPort 2 } Branch { DstBlock "Inverter" DstPort 1 } } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Block { BlockType SubSystem Name "Posedge1" SID "496" Ports [1, 1] Position [380, 203, 435, 227] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge1" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "497" Position [350, 158, 380, 172] IconDisplay "Port number" } Block { BlockType Reference Name "Inverter" SID "498" Ports [1, 1] Position [455, 156, 480, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,e69ac283,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\n" "ewline ','texmode','on');\ncolor('black');disp(' \\nnot');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "499" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "500" Position [610, 173, 640, 187] IconDisplay "Port number" } Line { SrcBlock "D" SrcPort 1 Points [15, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 25] DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Block { BlockType SubSystem Name "Posedge2" SID "501" Ports [1, 1] Position [380, 263, 435, 287] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge2" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "502" Position [350, 158, 380, 172] IconDisplay "Port number" } Block { BlockType Reference Name "Inverter" SID "503" Ports [1, 1] Position [455, 156, 480, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,e69ac283,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\n" "ewline ','texmode','on');\ncolor('black');disp(' \\nnot');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "504" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "505" Position [610, 173, 640, 187] IconDisplay "Port number" } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [15, 0] Branch { Points [0, 25] DstBlock "Logical1" DstPort 2 } Branch { DstBlock "Inverter" DstPort 1 } } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Line { SrcBlock "LSB+0" SrcPort 1 DstBlock "Posedge" DstPort 1 } Line { SrcBlock "LSB+1" SrcPort 1 Points [0, 0] DstBlock "Posedge1" DstPort 1 } Line { SrcBlock "Reg_8b" SrcPort 1 Points [65, 0] Branch { DstBlock "LSB+0" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "LSB+1" DstPort 1 } Branch { Points [0, 60] Branch { DstBlock "LSB+2" DstPort 1 } Branch { Points [0, 55] Branch { Points [0, 55] Branch { DstBlock "LSB+4" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "LSB+5" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "LSB+6" DstPort 1 } Branch { Points [0, 50] DstBlock "LSB+7" DstPort 1 } } } } Branch { DstBlock "LSB+3" DstPort 1 } } } } } Line { SrcBlock "Posedge" SrcPort 1 DstBlock "Goto8" DstPort 1 } Line { SrcBlock "Posedge1" SrcPort 1 DstBlock "Goto9" DstPort 1 } Line { SrcBlock "LSB+4" SrcPort 1 DstBlock "Goto11" DstPort 1 } Line { SrcBlock "LSB+5" SrcPort 1 DstBlock "Goto13" DstPort 1 } Line { SrcBlock "LSB+6" SrcPort 1 DstBlock "Goto12" DstPort 1 } Line { SrcBlock "LSB+7" SrcPort 1 DstBlock "Goto14" DstPort 1 } Line { SrcBlock "LSB+3" SrcPort 1 DstBlock "Goto10" DstPort 1 } Line { SrcBlock "LSB+2" SrcPort 1 DstBlock "Posedge2" DstPort 1 } Line { SrcBlock "Posedge2" SrcPort 1 DstBlock "Goto15" DstPort 1 } } } Block { BlockType Reference Name "LSB" SID "506" Ports [1, 1] Position [655, 86, 690, 104] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,460,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Line { SrcBlock "From Register3" SrcPort 1 Points [50, 0] Branch { DstBlock "Down Sample7" DstPort 1 } Branch { Points [0, 130] DstBlock "16LSB+8" DstPort 1 } } Line { SrcBlock "Down Sample7" SrcPort 1 DstBlock "8LSB" DstPort 1 } Line { SrcBlock "From Register2" SrcPort 1 DstBlock "Down Sample25" DstPort 1 } Line { SrcBlock "Down Sample25" SrcPort 1 Points [10, 0] Branch { DstBlock "6LSB1" DstPort 1 } Branch { Points [0, 30] DstBlock "6LSB+6" DstPort 1 } } Line { SrcBlock "6LSB1" SrcPort 1 DstBlock "Goto43" DstPort 1 } Line { SrcBlock "6LSB+6" SrcPort 1 DstBlock "Goto44" DstPort 1 } Line { SrcBlock "16LSB+8" SrcPort 1 DstBlock "Goto34" DstPort 1 } Line { SrcBlock "8LSB" SrcPort 1 DstBlock "InterruptControl" DstPort 1 } Line { SrcBlock "From Register4" SrcPort 1 DstBlock "Down Sample4" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock "Goto25" DstPort 1 } Line { SrcBlock "From Register5" SrcPort 1 DstBlock "Goto28" DstPort 1 } Line { SrcBlock "From Register7" SrcPort 1 DstBlock "Goto22" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Goto12" DstPort 1 } Line { SrcBlock "16LSB1" SrcPort 1 Points [0, -25; 30, 0] Branch { DstBlock "Goto8" DstPort 1 } Branch { Points [0, 30] DstBlock "AddSub1" DstPort 1 } } Line { SrcBlock "16MSB1" SrcPort 1 Points [0, 50; 30, 0] Branch { DstBlock "Goto11" DstPort 1 } Branch { Points [0, -45] DstBlock "AddSub1" DstPort 2 } } Line { SrcBlock "From Register6" SrcPort 1 DstBlock "Down Sample11" DstPort 1 } Line { SrcBlock "Down Sample11" SrcPort 1 Points [5, 0] Branch { Points [0, 5] DstBlock "16MSB1" DstPort 1 } Branch { Points [0, -10] DstBlock "16LSB1" DstPort 1 } } Line { SrcBlock "From Register8" SrcPort 1 Points [25, 0] Branch { DstBlock "LSB" DstPort 1 } Branch { Points [0, 55] DstBlock "Goto2" DstPort 1 } } Line { SrcBlock "LSB" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Goto1" DstPort 1 } } } } } Block { BlockType SubSystem Name "OFDM Rx MIMO" SID "514" Ports [4] Position [325, 35, 370, 100] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "OFDM Rx MIMO" Location [0, 82, 1268, 1008] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "117" Block { BlockType Inport Name "AntA_I" SID "515" Position [15, 343, 45, 357] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "AntA_Q" SID "516" Position [15, 353, 45, 367] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "AntB_I" SID "517" Position [60, 388, 90, 402] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "AntB_Q" SID "518" Position [60, 398, 90, 412] Port "4" IconDisplay "Port number" } Block { BlockType SubSystem Name "ADC Inputs\n& Antenna Selection" SID "519" Ports [5, 4] Position [140, 330, 225, 390] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ADC Inputs\n& Antenna Selection" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "106" Block { BlockType Inport Name "PktDetReset" SID "520" Position [50, 333, 80, 347] IconDisplay "Port number" } Block { BlockType Inport Name "A I " SID "521" Position [55, 193, 85, 207] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "A Q " SID "522" Position [55, 228, 85, 242] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "B I " SID "523" Position [55, 263, 85, 277] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "B Q " SID "524" Position [55, 298, 85, 312] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType SubSystem Name "Antenna\nSelection" SID "525" Ports [5, 5] Position [420, 179, 540, 361] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Antenna\nSelection" Location [222, 180, 447, 278] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "112" Block { BlockType Inport Name "AntA_I" SID "526" Position [575, 103, 605, 117] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "AntA_Q" SID "527" Position [575, 208, 605, 222] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "AntB_I" SID "528" Position [575, 133, 605, 147] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "AntB_Q" SID "529" Position [575, 238, 605, 252] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "PktDetReset" SID "530" Position [40, 358, 70, 372] Port "5" IconDisplay "Port number" } Block { BlockType SubSystem Name "Ant Sel Logic" SID "531" Ports [2, 1] Position [415, 364, 515, 446] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Ant Sel Logic" Location [600, 324, 1082, 551] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "G(B) < G(A)" SID "532" Position [530, 443, 560, 457] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "B_Vin" SID "533" Position [530, 473, 560, 487] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "534" Ports [1, 1] Position [465, 379, 490, 401] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "8.2.02" sg_icon_stat "25,22,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "535" Position [190, 386, 315, 404] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType From Name "From2" SID "536" Position [245, 300, 410, 320] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_noSwitch_forceAntB" TagVisibility "global" } Block { BlockType From Name "From3" SID "537" Position [190, 371, 315, 389] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_SISOmode" TagVisibility "global" } Block { BlockType From Name "From9" SID "538" Position [290, 411, 415, 429] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_switchingDivEn" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "539" Ports [1, 1] Position [555, 351, 585, 369] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2.02" sg_icon_stat "30,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "540" Ports [4, 1] Position [640, 378, 685, 492] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,114,4,1,white,blue,0,50b60d37,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 114 114 0 ],[0.77 0." "82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 114 114 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[63." "66 63.66 69.66 63.66 69.66 69.66 69.66 63.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[57.66 57.66 63" ".66 63.66 57.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[51.66 51.66 57.66 57.66 51.66 ]," "[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[45.66 45.66 51.66 45.66 51.66 51.66 45.66 ],[0.93" "1 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical2" SID "541" Ports [3, 1] Position [640, 298, 685, 372] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,74,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 74 74 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 74 74 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[43.66 4" "3.66 49.66 43.66 49.66 49.66 49.66 43.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[37.66 37.66 43.66 " "43.66 37.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[31.66 31.66 37.66 37.66 31.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[25.66 25.66 31.66 25.66 31.66 31.66 25.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical3" SID "542" Ports [2, 1] Position [755, 395, 800, 450] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 55 55 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 3" "3.66 39.66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 " "33.66 27.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "543" Ports [2, 1] Position [370, 371, 415, 404] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,33,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 33 33 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "AntSel" SID "544" Position [880, 418, 910, 432] IconDisplay "Port number" } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "B_Vin" SrcPort 1 DstBlock "Logical1" DstPort 4 } Line { SrcBlock "G(B) < G(A)" SrcPort 1 DstBlock "Logical1" DstPort 3 } Line { SrcBlock "Down Sample1" SrcPort 1 Points [20, 0] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, -55] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "From9" SrcPort 1 Points [105, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -60] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "AntSel" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical2" DstPort 3 } Line { SrcBlock "Logical2" SrcPort 1 Points [25, 0; 0, 75] DstBlock "Logical3" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical4" DstPort 2 } Annotation { Name "Rx switching diversity is possible in Alamouti and SISO modes." Position [368, 264] } } } Block { BlockType SubSystem Name "AntA_Gains" SID "545" Ports [1, 2] Position [160, 335, 230, 390] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AntA_Gains" Location [254, 388, 880, 581] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Rst" SID "546" Position [420, 403, 450, 417] IconDisplay "Port number" } Block { BlockType Reference Name "Concat" SID "547" Ports [2, 1] Position [485, 362, 525, 398] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.02" sg_icon_stat "40,36,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}'," "'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Constant Name "Constant" SID "548" Position [175, 359, 200, 381] ShowName off } Block { BlockType Constant Name "Constant2" SID "549" Position [175, 379, 200, 401] ShowName off Value "15" } Block { BlockType Reference Name "Down Sample4" SID "550" Ports [1, 1] Position [355, 359, 380, 381] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "8.2.02" sg_icon_stat "25,22,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample5" SID "551" Ports [1, 1] Position [355, 379, 380, 401] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "8.2.02" sg_icon_stat "25,22,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From6" SID "552" Position [160, 437, 265, 453] ShowName off CloseFcn "tagdialog Close" GotoTag "AntA_AGC_Done" TagVisibility "global" } Block { BlockType Goto Name "Goto" SID "553" Position [865, 226, 980, 244] GotoTag "AntA_GainRF" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "554" Position [865, 261, 980, 279] GotoTag "AntA_GainBB" TagVisibility "global" } Block { BlockType SubSystem Name "Posedge" SID "555" Ports [1, 1] Position [475, 435, 530, 455] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge" Location [2, 74, 1278, 978] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "556" Position [280, 183, 310, 197] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "557" Ports [1, 1] Position [470, 153, 505, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "558" Ports [1, 1] Position [415, 156, 440, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "559" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "ToBool" SID "560" Ports [1, 1] Position [655, 171, 690, 189] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,375" block_type "convert" block_version "8.2.02" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "561" Position [735, 173, 765, 187] IconDisplay "Port number" } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "ToBool" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [70, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -25] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "ToBool" SrcPort 1 DstBlock "Q" DstPort 1 } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Block { BlockType Reference Name "Register" SID "562" Ports [3, 1] Position [585, 374, 630, 416] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "8.2.02" sg_icon_stat "45,42,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en')" ";\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "Rx_AntA_GainBB" SID "563" Ports [1, 1] Position [250, 384, 290, 396] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fi" "xed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "5" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 12 12 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 12 12 0 ]);\npatch([17.775 19.22 20.22 21.22 22.22 20.22 18.775 17.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([18.775 20.22 19.22 17.775 18.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.985 0.979 0.895 ]);\npatch([17.775 19.22 20.22 18.775 17.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([18.775 22.22 21.22 20.22 19.22 17.775 18.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0.979 0.8" "95 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_AntA_GainRF" SID "564" Ports [1, 1] Position [250, 364, 290, 376] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fi" "xed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 12 12 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 12 12 0 ]);\npatch([17.775 19.22 20.22 21.22 22.22 20.22 18.775 17.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([18.775 20.22 19.22 17.775 18.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.985 0.979 0.895 ]);\npatch([17.775 19.22 20.22 18.775 17.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([18.775 22.22 21.22 20.22 19.22 17.775 18.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0.979 0.8" "95 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "565" Ports [2, 1] Position [585, 338, 630, 367] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch" Location [-708, 675, -515, 767] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "566" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "567" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "568" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "569" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "570" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType Outport Name "Vout" SID "571" Position [685, 348, 715, 362] IconDisplay "Port number" } Block { BlockType Outport Name "GainVec" SID "572" Position [685, 388, 715, 402] Port "2" IconDisplay "Port number" } Line { SrcBlock "Constant" SrcPort 1 Points [0, 0] DstBlock "Rx_AntA_GainRF" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 Points [0, 0] DstBlock "Rx_AntA_GainBB" DstPort 1 } Line { SrcBlock "Rx_AntA_GainRF" SrcPort 1 DstBlock "Down Sample4" DstPort 1 } Line { SrcBlock "Rx_AntA_GainBB" SrcPort 1 DstBlock "Down Sample5" DstPort 1 } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Posedge" SrcPort 1 Points [15, 0; 0, -35] Branch { DstBlock "Register" DstPort 3 } Branch { Points [0, -65] DstBlock "S-R Latch" DstPort 1 } } Line { SrcBlock "Down Sample4" SrcPort 1 Points [70, 0] Branch { DstBlock "Concat" DstPort 1 } Branch { Points [0, -135] DstBlock "Goto" DstPort 1 } } Line { SrcBlock "Down Sample5" SrcPort 1 Points [75, 0] Branch { DstBlock "Concat" DstPort 2 } Branch { Points [0, -120] DstBlock "Goto1" DstPort 1 } } Line { SrcBlock "Rst" SrcPort 1 Points [100, -15] Branch { DstBlock "Register" DstPort 2 } Branch { Points [0, -35] DstBlock "S-R Latch" DstPort 2 } } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Vout" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock "GainVec" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Posedge" DstPort 1 } } } Block { BlockType SubSystem Name "AntB_Gains" SID "573" Ports [1, 2] Position [165, 511, 235, 569] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AntB_Gains" Location [258, 590, 880, 778] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Rst" SID "574" Position [490, 443, 520, 457] IconDisplay "Port number" } Block { BlockType Reference Name "Concat1" SID "575" Ports [2, 1] Position [540, 402, 580, 438] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.02" sg_icon_stat "40,36,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}'," "'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Constant Name "Constant1" SID "576" Position [235, 399, 260, 421] ShowName off } Block { BlockType Constant Name "Constant3" SID "577" Position [235, 419, 260, 441] ShowName off Value "17" } Block { BlockType Reference Name "Down Sample7" SID "578" Ports [1, 1] Position [415, 399, 440, 421] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "8.2.02" sg_icon_stat "25,22,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample8" SID "579" Ports [1, 1] Position [415, 419, 440, 441] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "8.2.02" sg_icon_stat "25,22,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From6" SID "580" Position [280, 472, 385, 488] ShowName off CloseFcn "tagdialog Close" GotoTag "AntB_AGC_Done" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "581" Position [870, 326, 985, 344] ShowName off GotoTag "AntB_GainRF" TagVisibility "global" } Block { BlockType SubSystem Name "Posedge1" SID "582" Ports [1, 1] Position [530, 470, 585, 490] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge1" Location [160, 70, 1165, 960] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "583" Position [280, 183, 310, 197] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "584" Ports [1, 1] Position [470, 153, 505, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "585" Ports [1, 1] Position [415, 156, 440, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "586" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "ToBool" SID "587" Ports [1, 1] Position [655, 171, 690, 189] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,375" block_type "convert" block_version "8.2.02" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "588" Position [725, 173, 755, 187] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [70, 0] Branch { Points [0, -25] DstBlock "Inverter" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "ToBool" DstPort 1 } Line { SrcBlock "ToBool" SrcPort 1 DstBlock "Q" DstPort 1 } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Block { BlockType Reference Name "Register1" SID "589" Ports [3, 1] Position [640, 414, 685, 456] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "8.2.02" sg_icon_stat "45,42,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en')" ";\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "Rx_AntB_GainBB" SID "590" Ports [1, 1] Position [310, 424, 350, 436] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fi" "xed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "5" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 12 12 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 12 12 0 ]);\npatch([17.775 19.22 20.22 21.22 22.22 20.22 18.775 17.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([18.775 20.22 19.22 17.775 18.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.985 0.979 0.895 ]);\npatch([17.775 19.22 20.22 18.775 17.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([18.775 22.22 21.22 20.22 19.22 17.775 18.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0.979 0.8" "95 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_AntB_GainRF" SID "591" Ports [1, 1] Position [310, 404, 350, 416] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fi" "xed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 12 12 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 12 12 0 ]);\npatch([17.775 19.22 20.22 21.22 22.22 20.22 18.775 17.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([18.775 20.22 19.22 17.775 18.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.985 0.979 0.895 ]);\npatch([17.775 19.22 20.22 18.775 17.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([18.775 22.22 21.22 20.22 19.22 17.775 18.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0.979 0.8" "95 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch1" SID "592" Ports [2, 1] Position [640, 378, 685, 407] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch1" Location [-708, 675, -515, 767] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "593" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "594" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "595" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "596" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "597" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Outport Name "Vout" SID "598" Position [775, 388, 805, 402] IconDisplay "Port number" } Block { BlockType Outport Name "GainVec" SID "599" Position [775, 428, 805, 442] Port "2" IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Rx_AntB_GainRF" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Rx_AntB_GainBB" DstPort 1 } Line { SrcBlock "Rx_AntB_GainRF" SrcPort 1 DstBlock "Down Sample7" DstPort 1 } Line { SrcBlock "Rx_AntB_GainBB" SrcPort 1 DstBlock "Down Sample8" DstPort 1 } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Posedge1" SrcPort 1 Points [15, 0; 0, -30] Branch { DstBlock "Register1" DstPort 3 } Branch { Points [0, -65] DstBlock "S-R Latch1" DstPort 1 } } Line { SrcBlock "Down Sample7" SrcPort 1 Points [55, 0] Branch { DstBlock "Concat1" DstPort 1 } Branch { Points [0, -75] DstBlock "Goto1" DstPort 1 } } Line { SrcBlock "Down Sample8" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Posedge1" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 Points [85, -15] Branch { DstBlock "Register1" DstPort 2 } Branch { Points [0, -35] DstBlock "S-R Latch1" DstPort 2 } } Line { SrcBlock "S-R Latch1" SrcPort 1 DstBlock "Vout" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "GainVec" DstPort 1 } } } Block { BlockType Reference Name "Concat2" SID "600" Ports [3, 1] Position [370, 652, 400, 698] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at z" "ero." num_inputs "3" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,46,3,1,white,blue,0,61ef8218,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 46 46 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 46 46 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[27.44 27.44 31.4" "4 27.44 31.44 31.44 31.44 27.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[23.44 23.44 27.44 27.44 23.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 15.44 19.44 19.44 15.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi" "');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\nfpr" "intf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant6" SID "601" Ports [0, 1] Position [320, 665, 345, 685] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14" ".22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22" " ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9." "55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Goto Name "Goto" SID "602" Position [555, 666, 670, 684] GotoTag "RxReg_RxGains" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "603" Position [560, 701, 675, 719] GotoTag "RxReg_RxGainsEn" TagVisibility "global" } Block { BlockType Reference Name "Mux" SID "604" Ports [3, 1] Position [695, 68, 745, 152] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "8.2.02" sg_icon_stat "50,84,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 12 72 84 0 ],[0.77 0.82 0." "91 ]);\nplot([0 50 50 0 0 ],[0 12 72 84 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[49.77 49" ".77 56.77 49.77 56.77 56.77 56.77 49.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[42.77 42.77 49.77 " "49.77 42.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[35.77 35.77 42.77 42.77 35.77 ],[1 " "1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[28.77 28.77 35.77 28.77 35.77 35.77 28.77 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d" "1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "605" Ports [3, 1] Position [695, 173, 745, 257] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "8.2.02" sg_icon_stat "50,84,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 12 72 84 0 ],[0.77 0.82 0." "91 ]);\nplot([0 50 50 0 0 ],[0 12 72 84 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[49.77 49" ".77 56.77 49.77 56.77 56.77 56.77 49.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[42.77 42.77 49.77 " "49.77 42.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[35.77 35.77 42.77 42.77 35.77 ],[1 " "1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[28.77 28.77 35.77 28.77 35.77 35.77 28.77 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d" "1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge2" SID "606" Ports [1, 1] Position [240, 700, 295, 720] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge2" Location [2, 74, 1278, 978] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "607" Position [280, 183, 310, 197] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "608" Ports [1, 1] Position [470, 153, 505, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "609" Ports [1, 1] Position [415, 156, 440, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "610" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "ToBool" SID "611" Ports [1, 1] Position [655, 171, 690, 189] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,375" block_type "convert" block_version "8.2.02" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "612" Position [735, 173, 765, 187] IconDisplay "Port number" } Line { SrcBlock "ToBool" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [70, 0] Branch { Points [0, -25] DstBlock "Inverter" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "ToBool" DstPort 1 } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Block { BlockType Reference Name "Register" SID "613" Ports [1, 1] Position [645, 459, 680, 491] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1" sg_icon_stat "35,32,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 32 32 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([12.1" " 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n" "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Reference Name "Register1" SID "614" Ports [1, 1] Position [705, 319, 740, 351] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1" sg_icon_stat "35,32,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 32 32 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([12.1" " 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n" "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Reference Name "Register2" SID "615" Ports [1, 1] Position [705, 284, 740, 316] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1" sg_icon_stat "35,32,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 32 32 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([12.1" " 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n" "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Reference Name "Relational" SID "616" Ports [2, 1] Position [300, 366, 355, 404] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "8.2.02" sg_icon_stat "55,38,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 55 55 0 0 ],[0 0 38 38 0 ]);\npatch([15.875 23.1 28.1 33.1 38.1 28.1 20.875 15.875 ],[24.55 24.55 2" "9.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([20.875 28.1 23.1 15.875 20.875 ],[19.55 19.55 24.55 24.55 " "19.55 ],[0.931 0.946 0.973 ]);\npatch([15.875 23.1 28.1 20.875 15.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1 1 ])" ";\npatch([20.875 38.1 33.1 28.1 23.1 15.875 20.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0.973 ]" ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label(" "'input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b','texm" "ode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_debug_antSel" SID "617" Ports [1, 1] Position [710, 470, 745, 480] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.985 0.979 0.895 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.985 0.979 0.895 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: e" "nd icon text');" } Block { BlockType Reference Name "Up Sample" SID "618" Ports [1, 1] Position [450, 661, 480, 689] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}\\" "bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "619" Ports [1, 1] Position [165, 696, 195, 724] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}\\" "bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "620" Ports [1, 1] Position [590, 461, 620, 489] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}\\" "bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "A I" SID "621" Position [790, 103, 820, 117] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "A Q" SID "622" Position [790, 208, 820, 222] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "B I" SID "623" Position [795, 293, 825, 307] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "B Q" SID "624" Position [795, 328, 825, 342] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "A_swapped" SID "625" Position [795, 378, 825, 392] Port "5" IconDisplay "Port number" } Line { SrcBlock "AntB_I" SrcPort 1 Points [0, 0; 55, 0] Branch { DstBlock "Mux" DstPort 3 } Branch { Points [0, 160] DstBlock "Register2" DstPort 1 } } Line { SrcBlock "AntB_Q" SrcPort 1 Points [0, 0; 50, 0] Branch { DstBlock "Mux1" DstPort 3 } Branch { Points [0, 90] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "AntA_I" SrcPort 1 Points [0, 0] DstBlock "Mux" DstPort 2 } Line { SrcBlock "AntA_Q" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 Points [0, 0] DstBlock "A I" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 Points [0, 0] DstBlock "A Q" DstPort 1 } Line { SrcBlock "PktDetReset" SrcPort 1 Points [65, 0] Branch { Points [0, 175] Branch { Points [0, 170] DstBlock "Up Sample1" DstPort 1 } Branch { DstBlock "AntB_Gains" DstPort 1 } } Branch { DstBlock "AntA_Gains" DstPort 1 } } Line { SrcBlock "AntA_Gains" SrcPort 2 Points [25, 0] Branch { DstBlock "Relational" DstPort 1 } Branch { Points [0, 315] DstBlock "Concat2" DstPort 3 } } Line { SrcBlock "AntB_Gains" SrcPort 2 Points [30, 0] Branch { Points [0, -160] DstBlock "Relational" DstPort 2 } Branch { Points [0, 105] DstBlock "Concat2" DstPort 1 } } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Ant Sel Logic" DstPort 1 } Line { SrcBlock "Ant Sel Logic" SrcPort 1 Points [35, 0] Branch { Points [0, 70] DstBlock "Up Sample2" DstPort 1 } Branch { Points [0, -20] Branch { Points [0, -200] Branch { Points [0, -105] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Mux1" DstPort 1 } } Branch { DstBlock "A_swapped" DstPort 1 } } } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "B I" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "B Q" DstPort 1 } Line { SrcBlock "AntB_Gains" SrcPort 1 Points [115, 0; 0, -100] DstBlock "Ant Sel Logic" DstPort 2 } Line { SrcBlock "Concat2" SrcPort 1 Points [0, 0] DstBlock "Up Sample" DstPort 1 } Line { SrcBlock "Up Sample" SrcPort 1 DstBlock "Goto" DstPort 1 } Line { SrcBlock "Posedge2" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "Concat2" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "Rx_debug_antSel" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Posedge2" DstPort 1 } Annotation { Position [198, 353] } } } Block { BlockType Constant Name "Constant4" SID "626" Position [70, 484, 95, 506] ShowName off } Block { BlockType Constant Name "Constant5" SID "627" Position [70, 544, 95, 566] ShowName off } Block { BlockType Reference Name "Convert" SID "628" Ports [1, 1] Position [350, 438, 380, 452] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "629" Ports [1, 1] Position [345, 518, 375, 532] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "630" Ports [1, 1] Position [280, 184, 310, 216] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "8.2.02" sg_icon_stat "30,32,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 " "20.44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 2" "0.44 16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "631" Ports [1, 1] Position [280, 219, 310, 251] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "8.2.02" sg_icon_stat "30,32,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 " "20.44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 2" "0.44 16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample2" SID "632" Ports [1, 1] Position [280, 254, 310, 286] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "8.2.02" sg_icon_stat "30,32,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 " "20.44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 2" "0.44 16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "633" Ports [1, 1] Position [280, 289, 310, 321] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "8.2.02" sg_icon_stat "30,32,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 " "20.44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 2" "0.44 16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample6" SID "634" Ports [1, 1] Position [255, 484, 280, 506] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "4" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,303" block_type "dsamp" block_version "8.2.02" sg_icon_stat "25,22,1,1,white,blue,0,f3c7e0d9,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bl" "ack');disp('z^{-4}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow" "}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample9" SID "635" Ports [1, 1] Position [255, 544, 280, 566] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "4" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,303" block_type "dsamp" block_version "8.2.02" sg_icon_stat "25,22,1,1,white,blue,0,f3c7e0d9,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bl" "ack');disp('z^{-4}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow" "}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Goto Name "Goto1" SID "636" Position [635, 152, 730, 168] ShowName off GotoTag "AntA_ADC_Q_Filt" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "637" Position [360, 546, 475, 564] ShowName off GotoTag "AntB_AGC_Done" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "638" Position [360, 486, 475, 504] ShowName off GotoTag "AntA_AGC_Done" TagVisibility "global" } Block { BlockType Goto Name "Goto6" SID "639" Position [635, 127, 730, 143] ShowName off GotoTag "AntA_ADC_I_Filt" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "640" Ports [1, 1] Position [415, 437, 450, 453] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "641" Ports [1, 1] Position [410, 517, 445, 533] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "642" Ports [1, 1] Position [570, 422, 605, 438] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "643" Ports [2, 1] Position [645, 424, 670, 451] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 27 27 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 27 27 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.3" "3 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\nc" "olor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "644" Ports [2, 1] Position [715, 420, 740, 500] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,80,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 80 80 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 80 80 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[43" ".33 43.33 46.33 43.33 46.33 46.33 46.33 43.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[40.33 40.33 " "43.33 43.33 40.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[37.33 37.33 40.33 40.33 37.3" "3 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[34.33 34.33 37.33 34.33 37.33 37.33 34.33 ]," "[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n" "\ncolor('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "645" Ports [2, 1] Position [645, 464, 670, 491] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 27 27 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 27 27 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.3" "3 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\nc" "olor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "646" Ports [2, 1] Position [840, 191, 885, 224] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "45,33,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 33 33 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 33 33 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.4" "4 20.44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.4" "4 20.44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1" " 1 1 ]);\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register1" SID "647" Ports [2, 1] Position [840, 226, 885, 259] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "45,33,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 33 33 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 33 33 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.4" "4 20.44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.4" "4 20.44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1" " 1 1 ]);\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register2" SID "648" Ports [2, 1] Position [840, 261, 885, 294] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "45,33,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 33 33 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 33 33 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.4" "4 20.44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.4" "4 20.44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1" " 1 1 ]);\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register3" SID "649" Ports [2, 1] Position [840, 296, 885, 329] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "45,33,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 33 33 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 33 33 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.4" "4 20.44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.4" "4 20.44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1" " 1 1 ]);\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Rx_AntA_ADCI" SID "650" Ports [1, 1] Position [190, 194, 230, 206] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx" " fixed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 12 12 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 12 12 0 ]);\npatch([17.775 19.22 20.22 21.22 22.22 20.22 18.775 17.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([18.775 20.22 19.22 17.775 18.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([17.775 19.22 20.22 18.775 17.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([18.775 22.22 21.22 20.22 19.22 17.775 18.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0." "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_AntA_ADCQ" SID "651" Ports [1, 1] Position [190, 229, 230, 241] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx" " fixed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 12 12 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 12 12 0 ]);\npatch([17.775 19.22 20.22 21.22 22.22 20.22 18.775 17.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([18.775 20.22 19.22 17.775 18.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([17.775 19.22 20.22 18.775 17.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([18.775 22.22 21.22 20.22 19.22 17.775 18.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0." "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_AntA_AGC_Done" SID "652" Ports [1, 1] Position [150, 489, 190, 501] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx" " fixed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 12 12 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 12 12 0 ]);\npatch([17.775 19.22 20.22 21.22 22.22 20.22 18.775 17.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([18.775 20.22 19.22 17.775 18.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([17.775 19.22 20.22 18.775 17.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([18.775 22.22 21.22 20.22 19.22 17.775 18.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0." "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_AntB_ADCI" SID "653" Ports [1, 1] Position [190, 264, 230, 276] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx" " fixed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 12 12 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 12 12 0 ]);\npatch([17.775 19.22 20.22 21.22 22.22 20.22 18.775 17.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([18.775 20.22 19.22 17.775 18.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([17.775 19.22 20.22 18.775 17.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([18.775 22.22 21.22 20.22 19.22 17.775 18.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0." "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_AntB_ADCQ" SID "654" Ports [1, 1] Position [190, 299, 230, 311] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx" " fixed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 12 12 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 12 12 0 ]);\npatch([17.775 19.22 20.22 21.22 22.22 20.22 18.775 17.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([18.775 20.22 19.22 17.775 18.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([17.775 19.22 20.22 18.775 17.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([18.775 22.22 21.22 20.22 19.22 17.775 18.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0." "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_AntB_AGC_Done" SID "655" Ports [1, 1] Position [150, 549, 190, 561] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx" " fixed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 12 12 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 12 12 0 ]);\npatch([17.775 19.22 20.22 21.22 22.22 20.22 18.775 17.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([18.775 20.22 19.22 17.775 18.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([17.775 19.22 20.22 18.775 17.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([18.775 22.22 21.22 20.22 19.22 17.775 18.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0." "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "A I" SID "656" Position [955, 203, 985, 217] IconDisplay "Port number" } Block { BlockType Outport Name "A Q" SID "657" Position [955, 238, 985, 252] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "B I" SID "658" Position [955, 273, 985, 287] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "B Q" SID "659" Position [955, 308, 985, 322] Port "4" IconDisplay "Port number" } Line { SrcBlock "B Q " SrcPort 1 DstBlock "Rx_AntB_ADCQ" DstPort 1 } Line { SrcBlock "B I " SrcPort 1 DstBlock "Rx_AntB_ADCI" DstPort 1 } Line { SrcBlock "A Q " SrcPort 1 DstBlock "Rx_AntA_ADCQ" DstPort 1 } Line { SrcBlock "A I " SrcPort 1 DstBlock "Rx_AntA_ADCI" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Antenna\nSelection" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Antenna\nSelection" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "Antenna\nSelection" DstPort 3 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Antenna\nSelection" DstPort 4 } Line { SrcBlock "Antenna\nSelection" SrcPort 1 Points [15, 0] Branch { Points [0, -65] DstBlock "Goto6" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Antenna\nSelection" SrcPort 2 Points [20, 0] Branch { Points [0, -75] DstBlock "Goto1" DstPort 1 } Branch { DstBlock "Register1" DstPort 1 } } Line { SrcBlock "PktDetReset" SrcPort 1 DstBlock "Antenna\nSelection" DstPort 5 } Line { SrcBlock "Constant5" SrcPort 1 DstBlock "Rx_AntB_AGC_Done" DstPort 1 } Line { SrcBlock "Rx_AntB_AGC_Done" SrcPort 1 DstBlock "Down Sample9" DstPort 1 } Line { SrcBlock "Down Sample9" SrcPort 1 Points [25, 0] Branch { DstBlock "Goto2" DstPort 1 } Branch { Points [0, -30] DstBlock "Convert1" DstPort 1 } } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Rx_AntA_AGC_Done" DstPort 1 } Line { SrcBlock "Rx_AntA_AGC_Done" SrcPort 1 DstBlock "Down Sample6" DstPort 1 } Line { SrcBlock "Down Sample6" SrcPort 1 Points [25, 0] Branch { DstBlock "Goto3" DstPort 1 } Branch { Points [0, -50] DstBlock "Convert" DstPort 1 } } Line { SrcBlock "Rx_AntA_ADCI" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Rx_AntA_ADCQ" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Rx_AntB_ADCI" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Rx_AntB_ADCQ" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock "A I" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "A Q" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "B I" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 DstBlock "B Q" DstPort 1 } Line { SrcBlock "Antenna\nSelection" SrcPort 4 DstBlock "Register3" DstPort 1 } Line { SrcBlock "Antenna\nSelection" SrcPort 3 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 Points [100, 0] Branch { Points [250, 0; 0, -205] Branch { Points [0, -35] DstBlock "Register2" DstPort 2 } Branch { DstBlock "Register3" DstPort 2 } } Branch { Points [0, -40] DstBlock "Logical3" DstPort 2 } } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Antenna\nSelection" SrcPort 5 Points [5, 0; 0, 90] Branch { DstBlock "Inverter2" DstPort 1 } Branch { Points [0, 40] DstBlock "Logical3" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 Points [30, 0; 0, -210] Branch { DstBlock "Register1" DstPort 2 } Branch { Points [0, -35] DstBlock "Register" DstPort 2 } } Annotation { Name "Extra latency to cover delay through\nMAX2829 amps -> ADC -> FPGA" Position [262, 609] } } } Block { BlockType SubSystem Name "AF Buffers" SID "660" Ports [4] Position [360, 417, 455, 478] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AF Buffers" Location [555, 521, 897, 622] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "PktDone" SID "661" Position [405, 448, 435, 462] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Payload" SID "662" Position [405, 398, 435, 412] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "AntA_I" SID "663" Position [405, 298, 435, 312] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "AntA_Q" SID "664" Position [405, 348, 435, 362] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType SubSystem Name "AF Buffers" SID "665" Ports [4, 4] Position [540, 283, 670, 477] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AF Buffers" Location [202, 268, 1502, 1003] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "AntA_I" SID "666" Position [700, 243, 730, 257] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "AntA_Q" SID "667" Position [700, 268, 730, 282] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Payload" SID "668" Position [285, 288, 315, 302] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "PktDone" SID "669" Position [290, 143, 320, 157] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType SubSystem Name "Buffers" SID "670" Ports [6, 2] Position [950, 141, 1025, 284] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Buffers" Location [952, 94, 1327, 516] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Wr_En" SID "671" Position [365, 277, 395, 293] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Wr_Addr" SID "672" Position [370, 227, 400, 243] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rd_Addr" SID "673" Position [430, 303, 460, 317] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "New Read" SID "674" Position [380, 573, 410, 587] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "I" SID "675" Position [430, 253, 460, 267] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "676" Position [430, 443, 460, 457] Port "6" IconDisplay "Port number" } Block { BlockType Scope Name "AF" SID "677" Ports [7] Position [1175, 649, 1220, 761] NamePlacement "alternate" Floating off Location [5, 45, 1925, 1127] Open off NumInputPorts "7" ZoomMode "yonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "392.7801724137931" YMin "-0.5~-0.25~-1~-1~0~0~0" YMax "0.5~0.15~1~1~1~3500~1" SaveName "ScopeData11" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "Blanking" SID "678" Ports [2, 1] Position [590, 556, 665, 589] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Blanking" Location [717, 702, 1212, 941] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Rd_Addr" SID "679" Position [405, 393, 435, 407] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "New Read" SID "680" Position [405, 408, 435, 422] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "681" Ports [2, 1] Position [625, 427, 660, 463] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "15" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "35,36,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a" " + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "682" Ports [2, 1] Position [625, 467, 660, 503] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "15" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "35,36,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a" " + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "683" Position [385, 486, 520, 504] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AF_BlankEnd" TagVisibility "global" } Block { BlockType From Name "From27" SID "684" Position [385, 446, 520, 464] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AF_BlankStart" TagVisibility "global" } Block { BlockType Reference Name "Logical2" SID "685" Ports [3, 1] Position [895, 415, 920, 535] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,120,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 120 120 0 ],[0.77 0." "82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 120 120 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[63" ".33 63.33 66.33 63.33 66.33 66.33 66.33 63.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[60.33 60.33 6" "3.33 63.33 60.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[57.33 57.33 60.33 60.33 57.33 " "],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[54.33 54.33 57.33 54.33 57.33 57.33 54.33 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "686" Ports [2, 1] Position [510, 392, 545, 423] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "35,31,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 31 31 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('bla" "ck');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Relational" SID "687" Ports [2, 1] Position [810, 416, 850, 454] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "40,38,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 38 38 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[24.55 24." "55 29.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[19.55 19.55 24.55 2" "4.55 19.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa " "\\geq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "688" Ports [2, 1] Position [810, 456, 850, 494] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a<=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "40,38,2,1,white,blue,0,52e4b236,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 38 38 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[24.55 24." "55 29.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[19.55 19.55 24.55 2" "4.55 19.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa " "\\leq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "689" Ports [2, 1] Position [810, 496, 850, 534] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a!=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "40,38,2,1,white,blue,0,850de6e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 38 38 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[24.55 24." "55 29.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[19.55 19.55 24.55 2" "4.55 19.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa " "\\neq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Blank" SID "690" Position [955, 468, 985, 482] IconDisplay "Port number" } Line { SrcBlock "New Read" SrcPort 1 DstBlock "Register" DstPort 2 } Line { SrcBlock "From27" SrcPort 1 Points [35, 0] Branch { DstBlock "AddSub" DstPort 2 } Branch { Points [0, 50] DstBlock "Relational2" DstPort 1 } } Line { SrcBlock "Register" SrcPort 1 Points [20, 0; 0, 25] Branch { DstBlock "AddSub" DstPort 1 } Branch { Points [0, 40] DstBlock "AddSub1" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 Points [30, 0] Branch { DstBlock "AddSub1" DstPort 2 } Branch { Points [0, 30] DstBlock "Relational2" DstPort 2 } } Line { SrcBlock "Rd_Addr" SrcPort 1 Points [45, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, -20; 290, 0; 0, 45] Branch { Points [0, 40] DstBlock "Relational1" DstPort 1 } Branch { DstBlock "Relational" DstPort 1 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Relational" DstPort 2 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Logical2" DstPort 3 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Blank" DstPort 1 } } } Block { BlockType Reference Name "Constant" SID "691" Ports [0, 1] Position [750, 351, 765, 369] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "15,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "I Buffer" SID "692" Ports [7, 2] Position [815, 227, 890, 393] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "32768" initVector "0" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b on en_a off en_b off latency "1" write_mode_A "Read Before Write" write_mode_B "Read Before Write" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,384,398" block_type "dpram" block_version "10.1.3" sg_icon_stat "75,166,7,2,white,blue,0,7d88b3c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 75 75 0 0 ],[0 0 166 166 0 ],[0.77 0." "82 0.91 ]);\nplot([0 75 75 0 0 ],[0 0 166 166 0 ]);\npatch([14.75 29.2 39.2 49.2 59.2 39.2 24.75 14.75 ],[94.1 9" "4.1 104.1 94.1 104.1 104.1 104.1 94.1 ],[1 1 1 ]);\npatch([24.75 39.2 29.2 14.75 24.75 ],[84.1 84.1 94.1 94.1 84" ".1 ],[0.931 0.946 0.973 ]);\npatch([14.75 29.2 39.2 24.75 14.75 ],[74.1 74.1 84.1 84.1 74.1 ],[1 1 1 ]);\npatch(" "[24.75 59.2 49.2 39.2 29.2 14.75 24.75 ],[64.1 64.1 74.1 64.1 74.1 74.1 64.1 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "addra');\ncolor('black');port_label('input',2,'dina');\ncolor('black');port_label('input',3,'wea');\ncolor('blac" "k');port_label('input',4,'addrb');\ncolor('black');port_label('input',5,'dinb');\ncolor('black');port_label('inp" "ut',6,'web');\ncolor('black');port_label('input',7,'rstb');\ncolor('black');port_label('output',1,'A');\ncolor('" "black');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Q Buffer" SID "693" Ports [7, 2] Position [815, 417, 890, 583] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "32768" initVector "0" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b on en_a off en_b off latency "1" write_mode_A "Read Before Write" write_mode_B "Read Before Write" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,384,398" block_type "dpram" block_version "10.1.3" sg_icon_stat "75,166,7,2,white,blue,0,7d88b3c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 75 75 0 0 ],[0 0 166 166 0 ],[0.77 0." "82 0.91 ]);\nplot([0 75 75 0 0 ],[0 0 166 166 0 ]);\npatch([14.75 29.2 39.2 49.2 59.2 39.2 24.75 14.75 ],[94.1 9" "4.1 104.1 94.1 104.1 104.1 104.1 94.1 ],[1 1 1 ]);\npatch([24.75 39.2 29.2 14.75 24.75 ],[84.1 84.1 94.1 94.1 84" ".1 ],[0.931 0.946 0.973 ]);\npatch([14.75 29.2 39.2 24.75 14.75 ],[74.1 74.1 84.1 84.1 74.1 ],[1 1 1 ]);\npatch(" "[24.75 59.2 49.2 39.2 29.2 14.75 24.75 ],[64.1 64.1 74.1 64.1 74.1 74.1 64.1 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "addra');\ncolor('black');port_label('input',2,'dina');\ncolor('black');port_label('input',3,'wea');\ncolor('blac" "k');port_label('input',4,'addrb');\ncolor('black');port_label('input',5,'dinb');\ncolor('black');port_label('inp" "ut',6,'web');\ncolor('black');port_label('input',7,'rstb');\ncolor('black');port_label('output',1,'A');\ncolor('" "black');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Terminator Name "Terminator" SID "694" Position [935, 260, 955, 280] ShowName off } Block { BlockType Terminator Name "Terminator1" SID "695" Position [935, 450, 955, 470] ShowName off } Block { BlockType Reference Name "done1" SID "696" Ports [1, 1] Position [1025, 685, 1060, 695] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "697" Ports [1, 1] Position [1025, 700, 1060, 710] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done3" SID "698" Ports [1, 1] Position [1025, 715, 1060, 725] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "699" Ports [1, 1] Position [1025, 655, 1060, 665] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "700" Ports [1, 1] Position [1025, 670, 1060, 680] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done6" SID "701" Ports [1, 1] Position [1025, 730, 1060, 740] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done7" SID "702" Ports [1, 1] Position [1025, 745, 1060, 755] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Outport Name " I" SID "703" Position [945, 348, 975, 362] IconDisplay "Port number" } Block { BlockType Outport Name " Q" SID "704" Position [945, 538, 975, 552] Port "2" IconDisplay "Port number" } Line { SrcBlock "Rd_Addr" SrcPort 1 Points [100, 0] Branch { DstBlock "I Buffer" DstPort 4 } Branch { Points [0, 190] Branch { DstBlock "Q Buffer" DstPort 4 } Branch { Points [0, 65] Branch { DstBlock "Blanking" DstPort 1 } Branch { Points [0, 95] DstBlock "done4" DstPort 1 } } } } Line { SrcBlock "Wr_En" SrcPort 1 Points [215, 0] Branch { DstBlock "I Buffer" DstPort 3 } Branch { Points [0, 190] Branch { DstBlock "Q Buffer" DstPort 3 } Branch { Points [0, 230] DstBlock "done2" DstPort 1 } } } Line { SrcBlock "Q Buffer" SrcPort 1 DstBlock "Terminator1" DstPort 1 } Line { SrcBlock "I Buffer" SrcPort 1 DstBlock "Terminator" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [20, 0] Branch { DstBlock "I Buffer" DstPort 6 } Branch { Points [0, 190] DstBlock "Q Buffer" DstPort 6 } } Line { SrcBlock "Wr_Addr" SrcPort 1 Points [215, 0] Branch { DstBlock "I Buffer" DstPort 1 } Branch { Points [0, 190] Branch { DstBlock "Q Buffer" DstPort 1 } Branch { Points [0, 295] DstBlock "done3" DstPort 1 } } } Line { SrcBlock "I" SrcPort 1 Points [105, 0] Branch { DstBlock "I Buffer" DstPort 2 } Branch { Points [0, 75] Branch { DstBlock "I Buffer" DstPort 5 } Branch { Points [0, 400] DstBlock "done6" DstPort 1 } } } Line { SrcBlock "Q" SrcPort 1 Points [95, 0] Branch { Points [0, 75] DstBlock "Q Buffer" DstPort 5 } Branch { DstBlock "Q Buffer" DstPort 2 } } Line { SrcBlock "I Buffer" SrcPort 2 Points [15, 0] Branch { DstBlock " I" DstPort 1 } Branch { Points [0, 395] DstBlock "done7" DstPort 1 } } Line { SrcBlock "Q Buffer" SrcPort 2 DstBlock " Q" DstPort 1 } Line { SrcBlock "done4" SrcPort 1 DstBlock "AF" DstPort 1 } Line { SrcBlock "done5" SrcPort 1 DstBlock "AF" DstPort 2 } Line { SrcBlock "done1" SrcPort 1 DstBlock "AF" DstPort 3 } Line { SrcBlock "done2" SrcPort 1 DstBlock "AF" DstPort 4 } Line { SrcBlock "done3" SrcPort 1 DstBlock "AF" DstPort 5 } Line { SrcBlock "done6" SrcPort 1 DstBlock "AF" DstPort 6 } Line { SrcBlock "done7" SrcPort 1 DstBlock "AF" DstPort 7 } Line { SrcBlock "New Read" SrcPort 1 Points [145, 0] Branch { DstBlock "Blanking" DstPort 2 } Branch { Points [0, 95] DstBlock "done5" DstPort 1 } } Line { SrcBlock "Blanking" SrcPort 1 Points [30, 0] Branch { Points [35, 0] Branch { DstBlock "Q Buffer" DstPort 7 } Branch { Points [0, -190] DstBlock "I Buffer" DstPort 7 } } Branch { Points [0, 115] DstBlock "done1" DstPort 1 } } } } Block { BlockType Reference Name "Convert2" SID "705" Ports [1, 1] Position [250, 182, 285, 198] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,375" block_type "convert" block_version "8.2.01" sg_icon_stat "35,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "706" Ports [1, 1] Position [180, 177, 210, 203] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.33 16.3" "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 16.33 16" ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 " "1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From26" SID "707" Position [15, 180, 130, 200] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AF_SavePkt" TagVisibility "global" } Block { BlockType SubSystem Name "Read Control" SID "708" Ports [3, 4] Position [400, 234, 535, 306] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Read Control" Location [352, 684, 842, 822] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Wr Addr" SID "709" Position [200, 278, 230, 292] IconDisplay "Port number" } Block { BlockType Inport Name "AF Record En" SID "710" Position [60, 278, 90, 292] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Payload" SID "711" Position [65, 238, 95, 252] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType SubSystem Name "AF Preamble\nCounter" SID "712" Ports [2, 1] Position [675, 421, 780, 459] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AF Preamble\nCounter" Location [667, 449, 1377, 655] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Rst" SID "713" Position [240, 313, 270, 327] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "TxEn" SID "714" Position [355, 363, 385, 377] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant2" SID "715" Ports [0, 1] Position [755, 435, 795, 455] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "length(preamble)-2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(length(preamble)))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "40,20,0,1,white,blue,0,c3bee7e7,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('output',1,'318');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Inverter" SID "716" Ports [1, 1] Position [605, 311, 630, 329] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "717" Ports [2, 1] Position [350, 311, 385, 344] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,33,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 33 33 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "PreambleEn" SID "718" Ports [2, 1] Position [500, 347, 555, 378] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "PreambleEn" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "719" Position [125, 223, 155, 237] IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "720" Position [155, 243, 185, 257] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "721" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "722" Ports [1, 1] Position [205, 223, 230, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "723" Ports [1, 1] Position [205, 243, 230, 257] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "724" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "725" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType Reference Name "Rd Addr Counter1" SID "726" Ports [2, 1] Position [660, 299, 710, 386] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "length(preamble)-1" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(length(preamble)))" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "50,87,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 87 87 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 87 87 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[50.7" "7 50.77 57.77 50.77 57.77 57.77 57.77 50.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[43.77 43.77 " "50.77 50.77 43.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[36.77 36.77 43.77 43.77 36." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[29.77 29.77 36.77 29.77 36.77 36.77 29.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{" "\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Relational1" SID "727" Ports [2, 1] Position [665, 415, 705, 455] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "40,40,2,1,white,blue,0,6218dc92,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\geq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "AF Pream Index" SID "728" Position [875, 338, 905, 352] IconDisplay "Port number" } Line { SrcBlock "Logical3" SrcPort 1 Points [55, 0; 0, 25] DstBlock "PreambleEn" DstPort 1 } Line { SrcBlock "PreambleEn" SrcPort 1 Points [15, 0] Branch { DstBlock "Rd Addr Counter1" DstPort 2 } Branch { Points [0, -45] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Relational1" SrcPort 1 Points [-365, 0; 0, -100] DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Rd Addr Counter1" SrcPort 1 Points [25, 0] Branch { Points [0, 80] DstBlock "Relational1" DstPort 1 } Branch { DstBlock "AF Pream Index" DstPort 1 } } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "TxEn" SrcPort 1 DstBlock "PreambleEn" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Rd Addr Counter1" DstPort 1 } } } Block { BlockType SubSystem Name "AF Tx Latch" SID "729" Ports [2, 1] Position [500, 538, 555, 607] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AF Tx Latch" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "730" Position [125, 223, 155, 237] IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "731" Position [155, 243, 185, 257] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "732" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "733" Ports [1, 1] Position [205, 223, 230, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "734" Ports [1, 1] Position [205, 243, 230, 257] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "735" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "736" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType Reference Name "AddSub" SID "737" Ports [2, 1] Position [535, 277, 570, 313] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "15" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "35,36,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a" " - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "738" Ports [0, 1] Position [455, 295, 495, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "length(preamble)" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(length(preamble)))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "40,20,0,1,white,blue,0,39dac2aa,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('output',1,'320');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Copy_Downsample" SID "739" Ports [1, 1] Position [210, 581, 275, 599] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Copy_Downsample" Location [202, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "740" Position [110, 353, 140, 367] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "741" Ports [1, 1] Position [210, 347, 235, 373] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "742" Ports [1, 1] Position [390, 355, 415, 385] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,30,1,1,white,blue,0,e5fb4045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 30 30 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[18.33 " "18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[15.33 15.33 18.33" " 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "743" Ports [2, 1] Position [280, 348, 325, 392] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "744" Position [475, 363, 505, 377] NamePlacement "alternate" IconDisplay "Port number" } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [30, 0] Branch { Points [0, 20] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical" DstPort 1 } } } Block { BlockType Reference Name "Delay1" SID "745" Ports [1, 1] Position [695, 178, 720, 202] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "746" Ports [1, 1] Position [315, 578, 340, 602] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "0" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,24450e6f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "747" Position [50, 580, 165, 600] ShowName off CloseFcn "tagdialog Close" GotoTag "AF_TxStart" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "748" Ports [1, 1] Position [65, 256, 90, 274] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "749" Ports [2, 1] Position [415, 537, 450, 568] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,31,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 31 31 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "750" Ports [2, 1] Position [1055, 367, 1090, 398] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,31,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 31 31 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "751" Ports [2, 1] Position [630, 307, 665, 338] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,31,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 31 31 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "752" Ports [3, 1] Position [145, 238, 180, 292] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,54,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 54 54 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 54 54 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[32.55 32." "55 37.55 32.55 37.55 37.55 37.55 32.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[27.55 27.55 32.55 3" "2.55 27.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[22.55 22.55 27.55 27.55 22.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 17.55 22.55 22.55 17.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Rd Addr Counter" SID "753" Ports [3, 1] Position [685, 252, 735, 338] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "15" bin_pt "0" load_pin on rst off en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "50,86,3,1,white,blue,0,4f561634,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 86 86 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 86 86 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[50.7" "7 50.77 57.77 50.77 57.77 57.77 57.77 50.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[43.77 43.77 " "50.77 50.77 43.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[36.77 36.77 43.77 43.77 36." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[29.77 29.77 36.77 29.77 36.77 36.77 29.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'load');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_la" "bel('input',3,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "754" Ports [2, 1] Position [515, 367, 550, 398] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "35,31,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 31 31 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('bla" "ck');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Relational" SID "755" Ports [2, 1] Position [955, 355, 995, 395] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "40,40,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "negedge" SID "756" Ports [1, 1] Position [320, 382, 360, 398] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "negedge" Location [202, 74, 1392, 1156] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "757" Position [200, 253, 230, 267] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "758" Ports [1, 1] Position [425, 223, 460, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "759" Ports [1, 1] Position [485, 251, 510, 269] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "760" Ports [2, 1] Position [540, 221, 585, 274] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "761" Position [610, 243, 640, 257] IconDisplay "Port number" } Line { SrcBlock "D" SrcPort 1 Points [165, 0] Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 2 } } } Block { BlockType SubSystem Name "posedge" SID "762" Ports [1, 1] Position [320, 257, 360, 273] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge" Location [202, 74, 1392, 1156] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "763" Position [200, 253, 230, 267] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "764" Ports [1, 1] Position [425, 223, 460, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "765" Ports [1, 1] Position [485, 226, 510, 244] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "766" Ports [2, 1] Position [540, 221, 585, 274] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "767" Position [610, 243, 640, 257] IconDisplay "Port number" } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [165, 0] Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } } } Block { BlockType SubSystem Name "posedge2" SID "768" Ports [1, 1] Position [1155, 377, 1195, 393] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge2" Location [202, 74, 1392, 1156] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "769" Position [200, 253, 230, 267] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "770" Ports [1, 1] Position [425, 223, 460, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "771" Ports [1, 1] Position [485, 226, 510, 244] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "772" Ports [2, 1] Position [540, 221, 585, 274] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "773" Position [610, 243, 640, 257] IconDisplay "Port number" } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [165, 0] Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } } } Block { BlockType Outport Name "Rd Addr" SID "774" Position [780, 288, 810, 302] IconDisplay "Port number" } Block { BlockType Outport Name "New Read" SID "775" Position [780, 183, 810, 197] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "AF Pream Index" SID "776" Position [855, 433, 885, 447] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "AFTx Done" SID "777" Position [1310, 378, 1340, 392] Port "4" IconDisplay "Port number" } Line { SrcBlock "Logical3" SrcPort 1 Points [105, 0] Branch { Points [0, 125] DstBlock "negedge" DstPort 1 } Branch { DstBlock "posedge" DstPort 1 } } Line { SrcBlock "posedge" SrcPort 1 Points [10, 0] Branch { Points [235, 0] Branch { DstBlock "Rd Addr Counter" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "Logical2" DstPort 1 } Branch { Labels [0, 0] Points [0, 115] DstBlock "AF Preamble\nCounter" DstPort 1 } } Branch { Points [0, -75] DstBlock "Delay1" DstPort 1 } } Branch { Points [0, 295] DstBlock "Logical" DstPort 2 } } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Rd Addr Counter" DstPort 2 } Line { SrcBlock "Wr Addr" SrcPort 1 Points [210, 0] Branch { DstBlock "AddSub" DstPort 1 } Branch { Points [0, 90] DstBlock "Register" DstPort 1 } } Line { SrcBlock "Rd Addr Counter" SrcPort 1 Points [15, 0] Branch { DstBlock "Rd Addr" DstPort 1 } Branch { Points [0, 70] DstBlock "Relational" DstPort 1 } } Line { SrcBlock "negedge" SrcPort 1 DstBlock "Register" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Copy_Downsample" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock "Relational" DstPort 2 } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "AF Tx Latch" DstPort 1 } Line { SrcBlock "AF Tx Latch" SrcPort 1 Points [45, 0] Branch { Points [420, 0; 0, -185] DstBlock "Logical1" DstPort 2 } Branch { Points [0, -245] DstBlock "Logical2" DstPort 2 } Branch { Points [0, 70; -575, 0; 0, -380] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Copy_Downsample" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "posedge2" SrcPort 1 Points [20, 0] Branch { Points [0, 120; -830, 0; 0, 40] DstBlock "Logical" DstPort 1 } Branch { DstBlock "AFTx Done" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "posedge2" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Rd Addr Counter" DstPort 3 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Payload" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "AF Record En" SrcPort 1 DstBlock "Logical3" DstPort 3 } Line { SrcBlock "AF Preamble\nCounter" SrcPort 1 DstBlock "AF Pream Index" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 Points [130, 0] Branch { DstBlock "AF Tx Latch" DstPort 2 } Branch { Labels [0, 0] Points [0, -140] DstBlock "AF Preamble\nCounter" DstPort 2 } } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "New Read" DstPort 1 } Annotation { Name "When payload is asserted, it has been length(preamble)\nsamples since the start of the packet. The re" "ad counter\nstarts at the first Rx sample and reads until the Tx PHY\ncontrol logic stops running." Position [512, 129] } Annotation { Name "Latency to align AF outputs\nwith non-AF outputs\n(actual Tx state machine takes\na few cycles to sta" "rt transmitting\nthe preamble)" Position [287, 536] } } } Block { BlockType SubSystem Name "Scaling" SID "778" Ports [2, 2] Position [1105, 145, 1150, 285] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Scaling" Location [982, 208, 1502, 459] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I " SID "779" Position [300, 38, 330, 52] IconDisplay "Port number" } Block { BlockType Inport Name "Q " SID "780" Position [300, 108, 330, 122] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample" SID "781" Ports [1, 1] Position [215, 193, 255, 227] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "40,34,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.44 21" ".44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.44 21." "44 17.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmod" "e','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From27" SID "782" Position [25, 199, 180, 221] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AF_TxScaling" TagVisibility "global" } Block { BlockType Reference Name "Mult" SID "783" Ports [2, 1] Position [355, 30, 410, 85] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "55,55,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[34" ".77 34.77 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[27.77 27." "77 34.77 34.77 27.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[20.77 20.77 27.77 27.7" "7 20.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[13.77 13.77 20.77 13.77 20.77 20.77" " 13.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_l" "abel('output',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncol" "or('black');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult1" SID "784" Ports [2, 1] Position [355, 100, 410, 155] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "55,55,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[34" ".77 34.77 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[27.77 27." "77 34.77 34.77 27.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[20.77 20.77 27.77 27.7" "7 20.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[13.77 13.77 20.77 13.77 20.77 20.77" " 13.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_l" "abel('output',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncol" "or('black');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "I" SID "785" Position [465, 53, 495, 67] IconDisplay "Port number" } Block { BlockType Outport Name "Q" SID "786" Position [455, 123, 485, 137] Port "2" IconDisplay "Port number" } Line { SrcBlock "Mult" SrcPort 1 DstBlock "I" DstPort 1 } Line { SrcBlock "From27" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 Points [30, 0; 0, -70] Branch { Points [0, -70] DstBlock "Mult" DstPort 2 } Branch { DstBlock "Mult1" DstPort 2 } } Line { SrcBlock "I " SrcPort 1 DstBlock "Mult" DstPort 1 } Line { SrcBlock "Q " SrcPort 1 DstBlock "Mult1" DstPort 1 } } } Block { BlockType SubSystem Name "Write Control" SID "787" Ports [2, 2] Position [400, 138, 495, 187] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Write Control" Location [242, 229, 492, 458] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "PktDone" SID "788" Position [245, 318, 275, 332] IconDisplay "Port number" } Block { BlockType Inport Name "AF Record En" SID "789" Position [205, 273, 235, 287] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "790" Ports [0, 1] Position [540, 547, 560, 563] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "791" Ports [1, 1] Position [515, 522, 545, 538] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "792" Ports [1, 1] Position [445, 187, 480, 203] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,375" block_type "convert" block_version "8.2.01" sg_icon_stat "35,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Copy_Downsample" SID "793" Ports [1, 1] Position [365, 316, 430, 334] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Copy_Downsample" Location [202, 82, 1478, 1016] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "794" Position [110, 353, 140, 367] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "795" Ports [1, 1] Position [210, 347, 235, 373] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "796" Ports [1, 1] Position [390, 355, 415, 385] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 30 30 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[18.33 " "18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[15.33 15.33 18.33" " 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "797" Ports [2, 1] Position [280, 348, 325, 392] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "798" Position [475, 363, 505, 377] NamePlacement "alternate" IconDisplay "Port number" } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [30, 0] Branch { Points [0, 20] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical" DstPort 1 } } } Block { BlockType Reference Name "Delay" SID "799" Ports [1, 1] Position [585, 317, 615, 333] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "800" Ports [1, 1] Position [775, 195, 800, 225] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 30 30 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[18.33 " "18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[15.33 15.33 18.33" " 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From2" SID "801" Position [155, 178, 275, 192] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_BadPkt" TagVisibility "global" } Block { BlockType From Name "From3" SID "802" Position [155, 158, 275, 172] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodPkt" TagVisibility "global" } Block { BlockType From Name "From4" SID "803" Position [155, 198, 275, 212] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodHeader" TagVisibility "global" } Block { BlockType From Name "From5" SID "804" Position [155, 218, 275, 232] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_BadHeader" TagVisibility "global" } Block { BlockType Reference Name "Logical" SID "805" Ports [2, 1] Position [585, 516, 630, 569] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "45,53,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "806" Ports [2, 1] Position [685, 181, 720, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 53 53 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[31.55 31." "55 36.55 31.55 36.55 36.55 36.55 31.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 3" "1.55 26.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[21.55 21.55 26.55 26.55 21.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[16.55 16.55 21.55 16.55 21.55 21.55 16.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "807" Ports [4, 1] Position [360, 152, 395, 238] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "NOR" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,86,4,1,white,blue,0,9b36d06a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 86 86 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 86 86 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[48.55 48." "55 53.55 48.55 53.55 53.55 53.55 48.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[43.55 43.55 48.55 4" "8.55 43.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[38.55 38.55 43.55 43.55 38.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 33.55 38.55 38.55 33.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\ncolo" "r('black');disp('nor');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "SR Latch" SID "808" Ports [2, 1] Position [845, 194, 885, 261] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "809" Position [155, 243, 185, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "810" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "811" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "812" Ports [1, 1] Position [205, 223, 230, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "813" Ports [1, 1] Position [205, 243, 230, 257] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "814" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "815" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType Reference Name "Wr Addr Counter" SID "816" Ports [1, 1] Position [710, 515, 770, 575] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "15" bin_pt "0" load_pin off rst off en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "60,60,1,1,white,blue,0,b089e9c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38" ".88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38." "88 30.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: e" "nd icon text');" } Block { BlockType Outport Name "We" SID "817" Position [960, 223, 990, 237] IconDisplay "Port number" } Block { BlockType Outport Name "Addr" SID "818" Position [875, 538, 905, 552] Port "2" IconDisplay "Port number" } Line { SrcBlock "Wr Addr Counter" SrcPort 1 DstBlock "Addr" DstPort 1 } Line { SrcBlock "PktDone" SrcPort 1 DstBlock "Copy_Downsample" DstPort 1 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Wr Addr Counter" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Logical5" DstPort 3 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Logical5" DstPort 4 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Copy_Downsample" SrcPort 1 Points [50, 0] Branch { Points [0, 205] DstBlock "Convert" DstPort 1 } Branch { DstBlock "Delay" DstPort 1 } } Line { SrcBlock "SR Latch" SrcPort 1 DstBlock "We" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "SR Latch" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 Points [80, 0; 0, -80] DstBlock "SR Latch" DstPort 2 } Line { SrcBlock "AF Record En" SrcPort 1 Points [420, 0; 0, -60] DstBlock "Logical4" DstPort 2 } Annotation { Name "Hack to keep flexible\nsampe period but have\ncounter enabled all the time" Position [593, 602] } Annotation { Name "Give the interrupts enough time to assert\nbefore using pktDone (also used to generate\nthe interrupt" "s) to stop capturing the waveform." Position [611, 366] } } } Block { BlockType Outport Name "I" SID "819" Position [1205, 173, 1235, 187] IconDisplay "Port number" } Block { BlockType Outport Name "Q" SID "820" Position [1205, 243, 1235, 257] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "AF Pream Index" SID "821" Position [590, 273, 620, 287] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "AFTx Done" SID "822" Position [590, 293, 620, 307] Port "4" IconDisplay "Port number" } Line { SrcBlock "Convert2" SrcPort 1 Points [70, 0] Branch { Points [0, -15] DstBlock "Write Control" DstPort 2 } Branch { Points [0, 80] DstBlock "Read Control" DstPort 2 } } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "From26" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Payload" SrcPort 1 DstBlock "Read Control" DstPort 3 } Line { SrcBlock "Write Control" SrcPort 2 Points [35, 0] Branch { Points [0, 40; -165, 0; 0, 30] DstBlock "Read Control" DstPort 1 } Branch { DstBlock "Buffers" DstPort 2 } } Line { SrcBlock "PktDone" SrcPort 1 DstBlock "Write Control" DstPort 1 } Line { SrcBlock "Buffers" SrcPort 2 DstBlock "Scaling" DstPort 2 } Line { SrcBlock "Buffers" SrcPort 1 DstBlock "Scaling" DstPort 1 } Line { SrcBlock "AntA_Q" SrcPort 1 DstBlock "Buffers" DstPort 6 } Line { SrcBlock "AntA_I" SrcPort 1 DstBlock "Buffers" DstPort 5 } Line { SrcBlock "Read Control" SrcPort 3 DstBlock "AF Pream Index" DstPort 1 } Line { SrcBlock "Read Control" SrcPort 4 DstBlock "AFTx Done" DstPort 1 } Line { Labels [0, 0] SrcBlock "Write Control" SrcPort 1 DstBlock "Buffers" DstPort 1 } Line { SrcBlock "Read Control" SrcPort 1 Points [15, 0; 0, -40] DstBlock "Buffers" DstPort 3 } Line { SrcBlock "Read Control" SrcPort 2 Points [20, 0; 0, -35] DstBlock "Buffers" DstPort 4 } Line { SrcBlock "Scaling" SrcPort 1 DstBlock "I" DstPort 1 } Line { SrcBlock "Scaling" SrcPort 2 DstBlock "Q" DstPort 1 } } } Block { BlockType Goto Name "Goto1" SID "823" Position [745, 347, 890, 363] ShowName off GotoTag "AF_OutputSamples_Q" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "824" Position [745, 397, 890, 413] ShowName off GotoTag "AF_PreambleIndex" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "825" Position [740, 447, 885, 463] ShowName off GotoTag "AF_TxDone" TagVisibility "global" } Block { BlockType Goto Name "Goto5" SID "826" Position [745, 297, 890, 313] ShowName off GotoTag "AF_OutputSamples_I" TagVisibility "global" } Line { SrcBlock "AntA_I" SrcPort 1 DstBlock "AF Buffers" DstPort 1 } Line { SrcBlock "AntA_Q" SrcPort 1 DstBlock "AF Buffers" DstPort 2 } Line { SrcBlock "Payload" SrcPort 1 DstBlock "AF Buffers" DstPort 3 } Line { SrcBlock "PktDone" SrcPort 1 DstBlock "AF Buffers" DstPort 4 } Line { SrcBlock "AF Buffers" SrcPort 1 DstBlock "Goto5" DstPort 1 } Line { SrcBlock "AF Buffers" SrcPort 2 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "AF Buffers" SrcPort 3 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "AF Buffers" SrcPort 4 DstBlock "Goto3" DstPort 1 } } } Block { BlockType SubSystem Name "Coarse Freq Correction" SID "873" Ports [6, 4] Position [325, 303, 470, 392] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Coarse Freq Correction" Location [2, 70, 1278, 960] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "124" Block { BlockType Inport Name "Reset" SID "874" Position [150, 228, 180, 242] IconDisplay "Port number" } Block { BlockType Inport Name "PktDet" SID "875" Position [150, 213, 180, 227] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "AntA I" SID "876" Position [95, 78, 125, 92] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "AntA Q" SID "877" Position [95, 93, 125, 107] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "AntB I" SID "878" Position [110, 293, 140, 307] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "AntB Q" SID "879" Position [110, 308, 140, 322] Port "6" IconDisplay "Port number" } Block { BlockType SubSystem Name "A*B" SID "880" Ports [4, 2] Position [725, 163, 800, 222] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "A*B" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[A]" SID "881" Position [55, 143, 85, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[A]" SID "882" Position [55, 168, 85, 182] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Im[B]" SID "883" Position [55, 328, 85, 342] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Re[B]" SID "884" Position [55, 303, 85, 317] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Add1" SID "885" Ports [2, 1] Position [565, 173, 610, 217] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "17" bin_pt "15" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter" SID "886" Ports [0, 1] Position [104, 40, 156, 90] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter i" "s implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "4" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "2" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "52,50,0,1,white,blue,0,7ac47ef5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 52 52 0 0 ],[0 0 50 50 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 52 52 0 0 ],[0 0 50 50 0 ]);\npatch([10.425 20.54 27.54 34.54 41.54 27.54 17.425 10.425 ],[32.77 32" ".77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([17.425 27.54 20.54 10.425 17.425 ],[25.77 25.77 32.77" " 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([10.425 20.54 27.54 17.425 10.425 ],[18.77 18.77 25.77 25.77 18.77 ]," "[1 1 1 ]);\npatch([17.425 41.54 34.54 27.54 20.54 10.425 17.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('" "black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "887" Ports [1, 1] Position [840, 177, 875, 213] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23.55 28." "55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 23.55 18." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\" "newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "888" Ports [1, 1] Position [895, 232, 930, 268] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23.55 28." "55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 23.55 18." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\" "newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult4" SID "889" Ports [2, 1] Position [395, 163, 440, 207] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipel" "ine for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "17" bin_pt "16" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\times b'," "'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "890" Ports [5, 1] Position [305, 267, 340, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,136,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 " "5.875 ],[73.55 73.55 78.55 73.55 78.55 78.55 78.55 73.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[68." "55 68.55 73.55 73.55 68.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[63.55 63.55 68.55 68.5" "5 63.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[58.55 58.55 63.55 58.55 63.55 63.55 58.55 " "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('in" "put',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('bl" "ack');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "891" Ports [5, 1] Position [305, 107, 340, 243] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,136,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 " "5.875 ],[73.55 73.55 78.55 73.55 78.55 78.55 78.55 73.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[68." "55 68.55 73.55 73.55 68.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[63.55 63.55 68.55 68.5" "5 63.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[58.55 58.55 63.55 58.55 63.55 63.55 58.55 " "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('in" "put',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('bl" "ack');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate" SID "892" Ports [1, 1] Position [205, 155, 245, 195] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "893" Ports [1, 1] Position [675, 183, 705, 207] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.2" sg_icon_stat "30,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.3" "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15" ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "894" Ports [1, 1] Position [730, 183, 760, 207] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.2" sg_icon_stat "30,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.3" "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15" ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "895" Ports [1, 1] Position [475, 193, 505, 217] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.2" sg_icon_stat "30,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.3" "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15" ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "896" Ports [1, 1] Position [200, 116, 235, 134] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "897" Ports [1, 1] Position [135, 164, 170, 186] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "898" Ports [1, 1] Position [140, 299, 175, 321] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample3" SID "899" Ports [1, 1] Position [135, 139, 170, 161] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample4" SID "900" Ports [1, 1] Position [140, 324, 175, 346] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Re" SID "901" Position [985, 188, 1015, 202] IconDisplay "Port number" } Block { BlockType Outport Name "Im1" SID "902" Position [985, 243, 1015, 257] Port "2" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [30, 0] Branch { Points [0, 160] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Mux1" DstPort 1 } } Line { SrcBlock "Counter" SrcPort 1 Points [0, 30] DstBlock "Slice" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Mult4" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Add1" DstPort 1 } Branch { Points [0, 20] DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Up Sample1" SrcPort 1 Points [5, 0] Branch { Points [0, 50] DstBlock "Mux1" DstPort 5 } Branch { DstBlock "Negate" DstPort 1 } } Line { SrcBlock "Up Sample4" SrcPort 1 Points [105, 0] Branch { Points [0, 25] DstBlock "Mux" DstPort 4 } Branch { DstBlock "Mux" DstPort 3 } } Line { SrcBlock "Up Sample2" SrcPort 1 Points [90, 0] Branch { DstBlock "Mux" DstPort 2 } Branch { Points [0, 75] DstBlock "Mux" DstPort 5 } } Line { SrcBlock "Up Sample3" SrcPort 1 Points [0, 0; 110, 0] Branch { Points [0, 50] DstBlock "Mux1" DstPort 4 } Branch { DstBlock "Mux1" DstPort 2 } } Line { SrcBlock "Re[A]" SrcPort 1 DstBlock "Up Sample3" DstPort 1 } Line { SrcBlock "Re[B]" SrcPort 1 DstBlock "Up Sample2" DstPort 1 } Line { SrcBlock "Im[A]" SrcPort 1 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "Im[B]" SrcPort 1 DstBlock "Up Sample4" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Mult4" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 Points [35, 0] DstBlock "Mult4" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock "Im1" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Re" DstPort 1 } Line { SrcBlock "Add1" SrcPort 1 Points [30, 0] Branch { Points [0, 55] DstBlock "Down Sample4" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Negate" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } } } Block { BlockType SubSystem Name "A*B1" SID "903" Ports [4, 2] Position [725, 263, 800, 322] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "A*B1" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[B]" SID "904" Position [55, 303, 85, 317] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[B]" SID "905" Position [55, 328, 85, 342] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Re[A]" SID "906" Position [55, 143, 85, 157] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Im[A]" SID "907" Position [55, 168, 85, 182] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Add1" SID "908" Ports [2, 1] Position [565, 173, 610, 217] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "17" bin_pt "15" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter" SID "909" Ports [0, 1] Position [104, 40, 156, 90] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter i" "s implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "4" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "2" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "52,50,0,1,white,blue,0,7ac47ef5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 52 52 0 0 ],[0 0 50 50 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 52 52 0 0 ],[0 0 50 50 0 ]);\npatch([10.425 20.54 27.54 34.54 41.54 27.54 17.425 10.425 ],[32.77 32" ".77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([17.425 27.54 20.54 10.425 17.425 ],[25.77 25.77 32.77" " 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([10.425 20.54 27.54 17.425 10.425 ],[18.77 18.77 25.77 25.77 18.77 ]," "[1 1 1 ]);\npatch([17.425 41.54 34.54 27.54 20.54 10.425 17.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('" "black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "910" Ports [1, 1] Position [470, 194, 500, 216] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.33 14.3" "3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 14.33 14" ".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('" "z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "911" Ports [1, 1] Position [680, 184, 710, 206] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 17 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.33 14.3" "3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 14.33 14" ".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('" "z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "912" Ports [1, 1] Position [770, 177, 805, 213] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23.55 28." "55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 23.55 18." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\" "newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "913" Ports [1, 1] Position [825, 232, 860, 268] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23.55 28." "55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 23.55 18." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\" "newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult4" SID "914" Ports [2, 1] Position [395, 163, 440, 207] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipel" "ine for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\times b'," "'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "915" Ports [5, 1] Position [305, 267, 340, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,136,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 " "5.875 ],[73.55 73.55 78.55 73.55 78.55 78.55 78.55 73.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[68." "55 68.55 73.55 73.55 68.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[63.55 63.55 68.55 68.5" "5 63.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[58.55 58.55 63.55 58.55 63.55 63.55 58.55 " "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('in" "put',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('bl" "ack');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "916" Ports [5, 1] Position [305, 107, 340, 243] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,136,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 " "5.875 ],[73.55 73.55 78.55 73.55 78.55 78.55 78.55 73.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[68." "55 68.55 73.55 73.55 68.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[63.55 63.55 68.55 68.5" "5 63.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[58.55 58.55 63.55 58.55 63.55 63.55 58.55 " "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('in" "put',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('bl" "ack');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate" SID "917" Ports [1, 1] Position [205, 155, 245, 195] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "32" bin_pt "30" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "918" Ports [1, 1] Position [200, 116, 235, 134] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "919" Ports [1, 1] Position [135, 164, 170, 186] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "920" Ports [1, 1] Position [140, 299, 175, 321] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample3" SID "921" Ports [1, 1] Position [135, 139, 170, 161] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample4" SID "922" Ports [1, 1] Position [140, 324, 175, 346] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Re" SID "923" Position [915, 188, 945, 202] IconDisplay "Port number" } Block { BlockType Outport Name "Im1" SID "924" Position [915, 243, 945, 257] Port "2" IconDisplay "Port number" } Line { SrcBlock "Add1" SrcPort 1 Points [30, 0] Branch { DstBlock "Delay2" DstPort 1 } Branch { Points [0, 55] DstBlock "Down Sample4" DstPort 1 } } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Re" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock "Im1" DstPort 1 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 Points [35, 0] DstBlock "Mult4" DstPort 2 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Mult4" DstPort 1 } Line { SrcBlock "Im[B]" SrcPort 1 DstBlock "Up Sample4" DstPort 1 } Line { SrcBlock "Im[A]" SrcPort 1 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "Re[B]" SrcPort 1 DstBlock "Up Sample2" DstPort 1 } Line { SrcBlock "Re[A]" SrcPort 1 DstBlock "Up Sample3" DstPort 1 } Line { SrcBlock "Up Sample3" SrcPort 1 Points [0, 0; 110, 0] Branch { DstBlock "Mux1" DstPort 2 } Branch { Points [0, 50] DstBlock "Mux1" DstPort 4 } } Line { SrcBlock "Up Sample2" SrcPort 1 Points [90, 0] Branch { Points [0, 75] DstBlock "Mux" DstPort 5 } Branch { DstBlock "Mux" DstPort 2 } } Line { SrcBlock "Up Sample4" SrcPort 1 Points [105, 0] Branch { DstBlock "Mux" DstPort 3 } Branch { Points [0, 25] DstBlock "Mux" DstPort 4 } } Line { SrcBlock "Up Sample1" SrcPort 1 Points [5, 0] Branch { Points [0, 50] DstBlock "Mux1" DstPort 5 } Branch { DstBlock "Negate" DstPort 1 } } Line { SrcBlock "Mult4" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Add1" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Counter" SrcPort 1 Points [0, 30] DstBlock "Slice" DstPort 1 } Line { SrcBlock "Slice" SrcPort 1 Points [30, 0] Branch { DstBlock "Mux1" DstPort 1 } Branch { Points [0, 160] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Negate" SrcPort 1 DstBlock "Mux1" DstPort 3 } } } Block { BlockType BusCreator Name "Bus\nCreator1" SID "925" Ports [2, 1] Position [960, 512, 965, 543] ShowName off Inputs "2" DisplayOption "bar" } Block { BlockType Scope Name "CFO" SID "926" Ports [5] Position [1035, 406, 1080, 584] NamePlacement "alternate" Floating off Location [775, 548, 2455, 1524] Open off NumInputPorts "5" ZoomMode "yonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" } TimeRange "14608" YMin "-0.25~-0.25~-1~-1~0" YMax "0.2~0.25~1~1~1" SaveName "ScopeData26" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "Coarse CFO Calc" SID "927" Ports [4, 1] Position [265, 180, 375, 245] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Coarse CFO Calc" Location [202, 74, 1910, 1156] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "87" Block { BlockType Inport Name "I In" SID "928" Position [255, 108, 285, 122] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Q In" SID "929" Position [255, 123, 285, 137] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "RxPkt Active" SID "930" Position [395, 233, 425, 247] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Reset" SID "931" Position [395, 173, 425, 187] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "ASR" SID "932" Ports [2, 1] Position [485, 294, 535, 336] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay\n\n line can be addressed and " " driven onto the output\n\n port.

Hardware notes: Implemented using SRL16s.\n\n If Virtex-4, V" "irtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,431" block_type "addrsr" block_version "8.2.02" sg_icon_stat "50,42,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 42 42 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[27.66 27.66" " 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[21.66 21.66 27.66 27.66" " 21.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 1 ])" ";\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprint" "f('','COMMENT: end icon text');" } Block { BlockType Reference Name "Accum" SID "933" Ports [1, 1] Position [825, 115, 890, 165] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. Output type and binary point position match the input.

" "Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to run at the" " system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "24+6+6" overflow "Flag as error" scale "1" rst off hasbypass on en off dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[17 33 0 32 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,457" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "65,50,1,1,white,blue,0,47915e64,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 50 50 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 65 65 0 0 ],[0 0 50 50 0 ]);\npatch([16.425 26.54 33.54 40.54 47.54 33.54 23.425 16.425 ],[32.77 32" ".77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([23.425 33.54 26.54 16.425 23.425 ],[25.77 25.77 32.77" " 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([16.425 26.54 33.54 23.425 16.425 ],[18.77 18.77 25.77 25.77 18.77 ]," "[1 1 1 ]);\npatch([23.425 47.54 40.54 33.54 26.54 16.425 23.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'b');\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprintf('','COM" "MENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "934" Ports [2, 1] Position [695, 112, 745, 163] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "24" bin_pt "24" quantization "Round (unbiased: +/- Inf)" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.77 32.7" "7 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 32.77 32" ".77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18.77 ],[1 1 " "1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{" "a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub2" SID "935" Ports [2, 1] Position [1360, 172, 1410, 223] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "32" bin_pt "32" quantization "Round (unbiased: +/- Inf)" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.77 32.7" "7 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 32.77 32" ".77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18.77 ],[1 1 " "1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{" "a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Arctan2" SID "936" Ports [2, 1] Position [340, 105, 395, 140] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Arctan2" Location [202, 70, 1788, 1051] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "937" Position [125, 73, 155, 87] IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "938" Position [125, 133, 155, 147] Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "CORDIC ATAN1" SID "939" Ports [2, 2] Position [415, 51, 515, 169] BackgroundColor "yellow" NamePlacement "alternate" CopyFcn "set_param(gcb, 'MaskSelfModifiable', 'on', 'LinkStatus', 'none');" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Xilinx CORDIC ATAN" MaskDescription "A parallel implementation, circular vectoring mode CORDIC processor for performing rectangu" "lar-to-polar conversion. The number of iteration stages (and resultant output accuracy) and the processor arith" "metic precision are controlled by the mask customization." MaskHelp "eval('');xlDoc('-book','sysgen','-topic','CORDIC_ATAN');" MaskPromptString "Number of Processing Elements (integer value starting from 1)|X, Y Data Width|X, Y Binary " "Point Position|Latency for each Processing Element [1 0 0 1]|Previous Number of Stages|Previous Pipeline Values" MaskStyleString "edit,edit,edit,edit,edit,edit" MaskVariables "stages=@1;pe_nbits=@2;pe_binpt=@3;pipeline_x=@4;prev_stages=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "on,on,on,on,off,off" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\nsav_gcb=gcb;\nstages =" " round(sum(abs(stages)));\nif (stages == 0)\n stages = prev_stages;\nend\nx = zeros(1,stages);\npipe_size = max(" "size(pipeline_x));\nif pipe_size >= stages\n x(1,1:stages) = pipeline_x(1,1:stages);\nelse\n x(1,1:pipe_size) = " "pipeline_x(1,1:pipe_size);\nend\n\nif (stages ~=prev_stages)\n pipeline=x;\n cordic_pe = find_system(gcb, 'lookU" "nderMasks', 'all', 'FollowLinks','on','masktype', 'CORDIC parallel PE');\n \n a=find_system(cordic_pe{1}, 'l" "ookUnderMasks', 'all', 'FollowLinks','on','masktype', 'CORDIC iteration PE');\n for i= 2:length(a)\n for j=1" ":3\n delete_line(cordic_pe{1}, ['CORDIC PE' int2str(i-1) '/' int2str(j)], ['CORDIC PE' int2str(i) '/' int2str(" "j)]);\n end\n end\n if length(a)>0,\n delete_line(cordic_pe{1}, 'x/1', 'CORDIC PE1/1');\n delet" "e_line(cordic_pe{1}, 'y/1', 'CORDIC PE1/2');\n delete_line(cordic_pe{1}, 'z/1', 'CORDIC PE1/3');\n del" "ete_line(cordic_pe{1}, ['CORDIC PE' int2str(length(a)) '/1'],'X/1');\n delete_line(cordic_pe{1}, ['CORDIC P" "E' int2str(length(a)) '/2'],'Terminator/1');\n delete_line(cordic_pe{1}, ['CORDIC PE' int2str(length(a)) '/" "3'],'Z/1');\n elseif length(a)==0\n temp_port=get_param([cordic_pe{1} '/x'],'porthandles');\n temp_" "line=get_param(temp_port.Outport,'line');\n if temp_line>=0 delete_line(temp_line); end\n temp_port=g" "et_param([cordic_pe{1} '/y'],'porthandles');\n temp_line=get_param(temp_port.Outport,'line');\n if tem" "p_line>=0 delete_line(temp_line); end\n temp_port=get_param([cordic_pe{1} '/z'],'porthandles');\n tem" "p_line=get_param(temp_port.Outport,'line');\n if temp_line>=0 delete_line(temp_line); end\n end\n\n " "for i=2:length(a)\n delete_block(a{i});\n end\n for i=2:stages,\n add_block([cordic_pe{1} '/CO" "RDIC PE1'], [cordic_pe{1} '/CORDIC PE' int2str(i)], 'ii', int2str(i-1),'pe_nbits', 'pe_nbits','pe_binpt', 'pe_bi" "npt','pipeline',['pipeline(1,' int2str(i) ')'],'position',[150+(i-1)*125, 70, 205+(i-1)*125, 130]);\n end\n\n" " for i= 2:stages,\n for j=1:3\n add_line(cordic_pe{1}, ['CORDIC PE' int2str(i-1) '/' int2str(j)], ['COR" "DIC PE' int2str(i) '/' int2str(j)], 'autorouting', 'on');\n end\n end\n\n if stages==0\n add_lin" "e(cordic_pe{1}, 'x/1', 'X/1', 'autorouting', 'on');\n add_line(cordic_pe{1}, 'y/1', 'Terminator/1', 'autoro" "uting', 'on');\n add_line(cordic_pe{1}, 'z/1', 'Z/1', 'autorouting', 'on');\n elseif stages>0\n add" "_line(cordic_pe{1}, 'x/1', 'CORDIC PE1/1', 'autorouting', 'on');\n add_line(cordic_pe{1}, 'y/1', 'CORDIC PE" "1/2', 'autorouting', 'on');\n add_line(cordic_pe{1}, 'z/1', 'CORDIC PE1/3', 'autorouting', 'on');\n\n " "set_param([cordic_pe{1} '/' 'X'], 'Position', [150+stages*125, 72, 180+stages*125, 86]);\n set_param([cordi" "c_pe{1} '/' 'Terminator'], 'Position', [210+stages*125, 92, 225+stages*125, 108]);\n set_param([cordic_pe{1" "} '/' 'Z'], 'Position', [240+stages*125, 113, 270+stages*125, 127]);\n\n add_line(cordic_pe{1}, ['CORDIC PE" "' int2str(stages) '/1'], 'X/1', 'autorouting', 'on');\n add_line(cordic_pe{1}, ['CORDIC PE' int2str(stages)" " '/2'], 'Terminator/1', 'autorouting', 'on');\n add_line(cordic_pe{1}, ['CORDIC PE' int2str(stages) '/3'],'" "Z/1', 'autorouting', 'on');\n\n % force a \"compile\" of the constituent constant blocks to\n % workar" "ound a data propagation problem\n find_system(cordic_pe{1}, 'lookUnderMasks', 'all', 'FollowLinks', 'on', '" "MaskType','Xilinx Constant Block');\n end\n set_param(sav_gcb, 'prev_stages', int2str(stages));\n set_param(sav" "_gcb, 'pipeline', [ '[' int2str(x) ']']);\nelse\n if (sum(pipeline~=x))\n set_param(gcb, 'pipeline', [ '[' int2" "str(x) ']']);\n end\nend\nstr = sprintf('-%d',sum(x) + 3);\n\n " MaskSelfModifiable on MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\ntext(iCx-6,i" "Cy,'z');\ntext(iCx,iCy+4,str);\nport_label('input',1,'x');\nport_label('input',2,'y');\nport_label('output',1,'m" "ag');\nport_label('output',2,'atan');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "23|18|15|[1 repmat([1 0],1,11)]|23|[1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0" " 1 0 1 0]" System { Name "CORDIC ATAN1" Location [325, 375, 1110, 1027] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" SIDHighWatermark "384" Block { BlockType Inport Name "x" SID "939:1" Position [35, 53, 65, 67] IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:2" Position [35, 98, 65, 112] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "CORDIC \nPipe Balance" SID "939:3" Ports [1, 1] Position [350, 170, 390, 190] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Delay line having configurable length.

Hardware notes: A delay line is a chain, each link o" "f which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-" "flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "sum(pipeline)" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,aa753640,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('z^{-12}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "CORDIC \nPipe Balance1" SID "939:4" Ports [1, 1] Position [350, 195, 390, 215] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Delay line having configurable length.

Hardware notes: A delay line is a chain, each link o" "f which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-" "flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "sum(pipeline)+1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,58c8c5ee,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('z^{-13}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "CORDIC \nPipe Balance2" SID "939:5" Ports [1, 1] Position [525, 45, 565, 65] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Delay line having configurable length.

Hardware notes: A delay line is a chain, each link o" "f which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-" "flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "CORDIC Fine Angle PE" SID "939:6" Ports [3, 2] Position [335, 38, 395, 102] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC parallel PE" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "CORDIC Fine Angle PE" Location [182, 93, 967, 745] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:7" Position [15, 73, 45, 87] IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:8" Position [40, 93, 70, 107] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:9" Position [65, 113, 95, 127] Port "3" IconDisplay "Port number" } Block { BlockType SubSystem Name "CORDIC PE1" SID "939:10" Ports [3, 3] Position [185, 67, 240, 133] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "0|pe_nbits|pe_binpt|atan||pipeline(1,1)" System { Name "CORDIC PE1" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:11" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:12" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:13" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:14" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline '" ",'texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";" } Block { BlockType Reference Name "AddSub1" SID "939:15" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "939:16" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "939:17" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,3da00a14,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0.785400390625');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:18" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:19" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,f61b5d0e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 0}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:20" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,f61b5d0e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 0}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:21" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:22" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:23" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:24" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [145, 0] Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "Shift1" DstPort 1 } } Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [115, 0] Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE10" SID "939:25" Ports [3, 3] Position [1275, 70, 1330, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "9|pe_nbits|pe_binpt|atan||pipeline(1,10)" System { Name "CORDIC PE10" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:26" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:27" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:28" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:29" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline '" ",'texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";" } Block { BlockType Reference Name "AddSub1" SID "939:30" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "939:31" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "939:32" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,2ab4629b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0.001953125');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:33" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:34" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,7a8acb92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 9}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:35" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,7a8acb92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 9}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:36" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:37" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:38" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:39" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE11" SID "939:40" Ports [3, 3] Position [1400, 70, 1455, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "10|pe_nbits|pe_binpt|atan||pipeline(1,11)" System { Name "CORDIC PE11" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:41" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:42" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:43" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:44" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "939:45" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "AddSub2" SID "939:46" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Constant" SID "939:47" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,4c089691,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0.0009765625');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:48" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:49" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,153141b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 10}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:50" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,153141b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 10}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:51" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:52" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:53" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:54" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE12" SID "939:55" Ports [3, 3] Position [1525, 70, 1580, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "11|pe_nbits|pe_binpt|atan||pipeline(1,12)" System { Name "CORDIC PE12" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:56" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:57" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:58" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:59" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline '" ",'texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";" } Block { BlockType Reference Name "AddSub1" SID "939:60" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "939:61" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "939:62" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,6ce4429f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0.00048828125');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:63" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:64" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,5d31f610,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 11}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:65" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,5d31f610,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 11}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:66" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:67" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:68" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:69" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE13" SID "939:70" Ports [3, 3] Position [1650, 70, 1705, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "12|pe_nbits|pe_binpt|atan||pipeline(1,13)" System { Name "CORDIC PE13" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:71" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:72" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:73" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:74" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "939:75" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "AddSub2" SID "939:76" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Constant" SID "939:77" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,747054a4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0.000244140625');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:78" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:79" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,04b1d21b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 12}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:80" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,04b1d21b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 12}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:81" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:82" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:83" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:84" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE14" SID "939:85" Ports [3, 3] Position [1775, 70, 1830, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "13|pe_nbits|pe_binpt|atan||pipeline(1,14)" System { Name "CORDIC PE14" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:86" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:87" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:88" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:89" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline '" ",'texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";" } Block { BlockType Reference Name "AddSub1" SID "939:90" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "939:91" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "939:92" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,631ce90a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0.0001220703125');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:93" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:94" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,829e9304,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 13}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:95" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,829e9304,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 13}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:96" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:97" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:98" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:99" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE15" SID "939:100" Ports [3, 3] Position [1900, 70, 1955, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "14|pe_nbits|pe_binpt|atan||pipeline(1,15)" System { Name "CORDIC PE15" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:101" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:102" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:103" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:104" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "939:105" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "AddSub2" SID "939:106" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Constant" SID "939:107" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,3f1ca338,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'6.103515625e-005');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:108" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:109" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,70926025,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 14}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:110" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,70926025,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 14}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:111" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:112" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:113" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:114" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE16" SID "939:115" Ports [3, 3] Position [2025, 70, 2080, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "15|pe_nbits|pe_binpt|atan||pipeline(1,16)" System { Name "CORDIC PE16" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:116" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:117" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:118" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:119" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline '" ",'texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";" } Block { BlockType Reference Name "AddSub1" SID "939:120" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "939:121" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "939:122" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,d0c8af49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'3.0517578125e-005');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:123" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:124" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,1a917d34,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 15}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:125" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,1a917d34,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 15}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:126" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:127" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:128" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:129" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE17" SID "939:130" Ports [3, 3] Position [2150, 70, 2205, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "16|pe_nbits|pe_binpt|atan||pipeline(1,17)" System { Name "CORDIC PE17" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:131" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:132" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:133" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:134" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "939:135" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "AddSub2" SID "939:136" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Constant" SID "939:137" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:138" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:139" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,fe7d19d0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 16}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:140" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,fe7d19d0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 16}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:141" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:142" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:143" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:144" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE18" SID "939:145" Ports [3, 3] Position [2275, 70, 2330, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "17|pe_nbits|pe_binpt|atan||pipeline(1,18)" System { Name "CORDIC PE18" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:146" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:147" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:148" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:149" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline '" ",'texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";" } Block { BlockType Reference Name "AddSub1" SID "939:150" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "939:151" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "939:152" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:153" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:154" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,af2f302a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 17}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:155" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,af2f302a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 17}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:156" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:157" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:158" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:159" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE19" SID "939:160" Ports [3, 3] Position [2400, 70, 2455, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "18|pe_nbits|pe_binpt|atan||pipeline(1,19)" System { Name "CORDIC PE19" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:161" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:162" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:163" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:164" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "939:165" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "AddSub2" SID "939:166" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Constant" SID "939:167" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:168" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:169" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,c662f687,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 18}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:170" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,c662f687,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 18}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:171" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:172" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:173" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:174" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE2" SID "939:175" Ports [3, 3] Position [275, 70, 330, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "1|pe_nbits|pe_binpt|atan||pipeline(1,2)" System { Name "CORDIC PE2" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:176" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:177" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:178" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:179" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline '" ",'texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";" } Block { BlockType Reference Name "AddSub1" SID "939:180" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "939:181" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "939:182" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,0291470a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0.463653564453125');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:183" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:184" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,77cd8d92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:185" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,77cd8d92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:186" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:187" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:188" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:189" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE20" SID "939:190" Ports [3, 3] Position [2525, 70, 2580, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "19|pe_nbits|pe_binpt|atan||pipeline(1,20)" System { Name "CORDIC PE20" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:191" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:192" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:193" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:194" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline '" ",'texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";" } Block { BlockType Reference Name "AddSub1" SID "939:195" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "939:196" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "939:197" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:198" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:199" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,5a61e306,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 19}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:200" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,5a61e306,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 19}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:201" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:202" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:203" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:204" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE21" SID "939:205" Ports [3, 3] Position [2650, 70, 2705, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "20|pe_nbits|pe_binpt|atan||pipeline(1,21)" System { Name "CORDIC PE21" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:206" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:207" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:208" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:209" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "939:210" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "AddSub2" SID "939:211" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Constant" SID "939:212" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:213" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:214" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,b86258ea,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 20}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:215" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,b86258ea,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 20}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:216" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:217" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:218" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:219" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE22" SID "939:220" Ports [3, 3] Position [2775, 70, 2830, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "21|pe_nbits|pe_binpt|atan||pipeline(1,22)" System { Name "CORDIC PE22" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:221" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:222" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:223" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:224" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline '" ",'texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";" } Block { BlockType Reference Name "AddSub1" SID "939:225" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "939:226" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "939:227" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:228" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:229" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,50c8512f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 21}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:230" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,50c8512f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 21}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:231" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:232" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:233" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:234" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE23" SID "939:235" Ports [3, 3] Position [2900, 70, 2955, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "22|pe_nbits|pe_binpt|atan||pipeline(1,23)" System { Name "CORDIC PE23" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:236" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:237" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:238" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:239" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "939:240" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "AddSub2" SID "939:241" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Constant" SID "939:242" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:243" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:244" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,58708766,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 22}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:245" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,58708766,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 22}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:246" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:247" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:248" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:249" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE3" SID "939:250" Ports [3, 3] Position [400, 70, 455, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "2|pe_nbits|pe_binpt|atan||pipeline(1,3)" System { Name "CORDIC PE3" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:251" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:252" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:253" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:254" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "939:255" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "AddSub2" SID "939:256" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Constant" SID "939:257" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,1f37424e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0.244964599609375');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:258" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:259" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,b3ac20f4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:260" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,b3ac20f4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:261" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:262" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:263" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:264" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE4" SID "939:265" Ports [3, 3] Position [525, 70, 580, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "3|pe_nbits|pe_binpt|atan||pipeline(1,4)" System { Name "CORDIC PE4" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:266" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:267" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:268" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:269" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline '" ",'texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";" } Block { BlockType Reference Name "AddSub1" SID "939:270" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "939:271" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "939:272" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,bc13d088,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0.124359130859375');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:273" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:274" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,42eb502d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 3}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:275" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,42eb502d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 3}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:276" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:277" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:278" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:279" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE5" SID "939:280" Ports [3, 3] Position [650, 70, 705, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "4|pe_nbits|pe_binpt|atan||pipeline(1,5)" System { Name "CORDIC PE5" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:281" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:282" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:283" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:284" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "939:285" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "AddSub2" SID "939:286" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Constant" SID "939:287" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,add59bf0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0.062408447265625');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:288" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:289" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,f24dc431,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 4}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:290" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,f24dc431,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 4}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:291" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:292" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:293" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:294" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE6" SID "939:295" Ports [3, 3] Position [775, 70, 830, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "5|pe_nbits|pe_binpt|atan||pipeline(1,6)" System { Name "CORDIC PE6" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:296" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:297" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:298" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:299" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline '" ",'texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";" } Block { BlockType Reference Name "AddSub1" SID "939:300" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "939:301" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "939:302" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,d8519326,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0.03125');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:303" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:304" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,265c313f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 5}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:305" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,265c313f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 5}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:306" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:307" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:308" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:309" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE7" SID "939:310" Ports [3, 3] Position [900, 70, 955, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "6|pe_nbits|pe_binpt|atan||pipeline(1,7)" System { Name "CORDIC PE7" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:311" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:312" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:313" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:314" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "939:315" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "AddSub2" SID "939:316" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Constant" SID "939:317" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,60ba886e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0.015625');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:318" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:319" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,57d4791a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 6}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:320" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,57d4791a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 6}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:321" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:322" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:323" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:324" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE8" SID "939:325" Ports [3, 3] Position [1025, 70, 1080, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "7|pe_nbits|pe_binpt|atan||pipeline(1,8)" System { Name "CORDIC PE8" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:326" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:327" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:328" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:329" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline '" ",'texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";" } Block { BlockType Reference Name "AddSub1" SID "939:330" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "939:331" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "939:332" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,6f4afd4f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0.0078125');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:333" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:334" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,aa1a47e4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 7}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:335" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,aa1a47e4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 7}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:336" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:337" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:338" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:339" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE9" SID "939:340" Ports [3, 3] Position [1150, 70, 1205, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "8|pe_nbits|pe_binpt|atan||pipeline(1,9)" System { Name "CORDIC PE9" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:341" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:342" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "939:343" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "939:344" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 2" "7.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 " "27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "939:345" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "AddSub2" SID "939:346" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Constant" SID "939:347" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,f8092ba0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0.00390625');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "939:348" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "939:349" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,6fdd366c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 8}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "939:350" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,6fdd366c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 8}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "939:351" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:352" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:353" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:354" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType Terminator Name "Terminator" SID "939:355" Position [3085, 92, 3100, 108] NamePlacement "alternate" ShowName off } Block { BlockType Outport Name "X" SID "939:356" Position [3025, 73, 3055, 87] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:357" Position [3115, 113, 3145, 127] Port "2" IconDisplay "Port number" } Line { SrcBlock "CORDIC PE23" SrcPort 3 DstBlock "Z" DstPort 1 } Line { SrcBlock "CORDIC PE23" SrcPort 2 DstBlock "Terminator" DstPort 1 } Line { SrcBlock "CORDIC PE23" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "CORDIC PE1" DstPort 3 } Line { SrcBlock "y" SrcPort 1 DstBlock "CORDIC PE1" DstPort 2 } Line { SrcBlock "x" SrcPort 1 DstBlock "CORDIC PE1" DstPort 1 } Line { SrcBlock "CORDIC PE22" SrcPort 3 DstBlock "CORDIC PE23" DstPort 3 } Line { SrcBlock "CORDIC PE22" SrcPort 2 DstBlock "CORDIC PE23" DstPort 2 } Line { SrcBlock "CORDIC PE22" SrcPort 1 DstBlock "CORDIC PE23" DstPort 1 } Line { SrcBlock "CORDIC PE21" SrcPort 3 DstBlock "CORDIC PE22" DstPort 3 } Line { SrcBlock "CORDIC PE21" SrcPort 2 DstBlock "CORDIC PE22" DstPort 2 } Line { SrcBlock "CORDIC PE21" SrcPort 1 DstBlock "CORDIC PE22" DstPort 1 } Line { SrcBlock "CORDIC PE20" SrcPort 3 DstBlock "CORDIC PE21" DstPort 3 } Line { SrcBlock "CORDIC PE20" SrcPort 2 DstBlock "CORDIC PE21" DstPort 2 } Line { SrcBlock "CORDIC PE20" SrcPort 1 DstBlock "CORDIC PE21" DstPort 1 } Line { SrcBlock "CORDIC PE19" SrcPort 3 DstBlock "CORDIC PE20" DstPort 3 } Line { SrcBlock "CORDIC PE19" SrcPort 2 DstBlock "CORDIC PE20" DstPort 2 } Line { SrcBlock "CORDIC PE19" SrcPort 1 DstBlock "CORDIC PE20" DstPort 1 } Line { SrcBlock "CORDIC PE18" SrcPort 3 DstBlock "CORDIC PE19" DstPort 3 } Line { SrcBlock "CORDIC PE18" SrcPort 2 DstBlock "CORDIC PE19" DstPort 2 } Line { SrcBlock "CORDIC PE18" SrcPort 1 DstBlock "CORDIC PE19" DstPort 1 } Line { SrcBlock "CORDIC PE17" SrcPort 3 DstBlock "CORDIC PE18" DstPort 3 } Line { SrcBlock "CORDIC PE17" SrcPort 2 DstBlock "CORDIC PE18" DstPort 2 } Line { SrcBlock "CORDIC PE17" SrcPort 1 DstBlock "CORDIC PE18" DstPort 1 } Line { SrcBlock "CORDIC PE16" SrcPort 3 DstBlock "CORDIC PE17" DstPort 3 } Line { SrcBlock "CORDIC PE16" SrcPort 2 DstBlock "CORDIC PE17" DstPort 2 } Line { SrcBlock "CORDIC PE16" SrcPort 1 DstBlock "CORDIC PE17" DstPort 1 } Line { SrcBlock "CORDIC PE15" SrcPort 3 DstBlock "CORDIC PE16" DstPort 3 } Line { SrcBlock "CORDIC PE15" SrcPort 2 DstBlock "CORDIC PE16" DstPort 2 } Line { SrcBlock "CORDIC PE15" SrcPort 1 DstBlock "CORDIC PE16" DstPort 1 } Line { SrcBlock "CORDIC PE14" SrcPort 3 DstBlock "CORDIC PE15" DstPort 3 } Line { SrcBlock "CORDIC PE14" SrcPort 2 DstBlock "CORDIC PE15" DstPort 2 } Line { SrcBlock "CORDIC PE14" SrcPort 1 DstBlock "CORDIC PE15" DstPort 1 } Line { SrcBlock "CORDIC PE13" SrcPort 3 DstBlock "CORDIC PE14" DstPort 3 } Line { SrcBlock "CORDIC PE13" SrcPort 2 DstBlock "CORDIC PE14" DstPort 2 } Line { SrcBlock "CORDIC PE13" SrcPort 1 DstBlock "CORDIC PE14" DstPort 1 } Line { SrcBlock "CORDIC PE12" SrcPort 3 DstBlock "CORDIC PE13" DstPort 3 } Line { SrcBlock "CORDIC PE12" SrcPort 2 DstBlock "CORDIC PE13" DstPort 2 } Line { SrcBlock "CORDIC PE12" SrcPort 1 DstBlock "CORDIC PE13" DstPort 1 } Line { SrcBlock "CORDIC PE11" SrcPort 3 DstBlock "CORDIC PE12" DstPort 3 } Line { SrcBlock "CORDIC PE11" SrcPort 2 DstBlock "CORDIC PE12" DstPort 2 } Line { SrcBlock "CORDIC PE11" SrcPort 1 DstBlock "CORDIC PE12" DstPort 1 } Line { SrcBlock "CORDIC PE10" SrcPort 3 DstBlock "CORDIC PE11" DstPort 3 } Line { SrcBlock "CORDIC PE10" SrcPort 2 DstBlock "CORDIC PE11" DstPort 2 } Line { SrcBlock "CORDIC PE10" SrcPort 1 DstBlock "CORDIC PE11" DstPort 1 } Line { SrcBlock "CORDIC PE9" SrcPort 3 DstBlock "CORDIC PE10" DstPort 3 } Line { SrcBlock "CORDIC PE9" SrcPort 2 DstBlock "CORDIC PE10" DstPort 2 } Line { SrcBlock "CORDIC PE9" SrcPort 1 DstBlock "CORDIC PE10" DstPort 1 } Line { SrcBlock "CORDIC PE8" SrcPort 3 DstBlock "CORDIC PE9" DstPort 3 } Line { SrcBlock "CORDIC PE8" SrcPort 2 DstBlock "CORDIC PE9" DstPort 2 } Line { SrcBlock "CORDIC PE8" SrcPort 1 DstBlock "CORDIC PE9" DstPort 1 } Line { SrcBlock "CORDIC PE7" SrcPort 3 DstBlock "CORDIC PE8" DstPort 3 } Line { SrcBlock "CORDIC PE7" SrcPort 2 DstBlock "CORDIC PE8" DstPort 2 } Line { SrcBlock "CORDIC PE7" SrcPort 1 DstBlock "CORDIC PE8" DstPort 1 } Line { SrcBlock "CORDIC PE6" SrcPort 3 DstBlock "CORDIC PE7" DstPort 3 } Line { SrcBlock "CORDIC PE6" SrcPort 2 DstBlock "CORDIC PE7" DstPort 2 } Line { SrcBlock "CORDIC PE6" SrcPort 1 DstBlock "CORDIC PE7" DstPort 1 } Line { SrcBlock "CORDIC PE5" SrcPort 3 DstBlock "CORDIC PE6" DstPort 3 } Line { SrcBlock "CORDIC PE5" SrcPort 2 DstBlock "CORDIC PE6" DstPort 2 } Line { SrcBlock "CORDIC PE5" SrcPort 1 DstBlock "CORDIC PE6" DstPort 1 } Line { SrcBlock "CORDIC PE4" SrcPort 3 DstBlock "CORDIC PE5" DstPort 3 } Line { SrcBlock "CORDIC PE4" SrcPort 2 DstBlock "CORDIC PE5" DstPort 2 } Line { SrcBlock "CORDIC PE4" SrcPort 1 DstBlock "CORDIC PE5" DstPort 1 } Line { SrcBlock "CORDIC PE3" SrcPort 3 DstBlock "CORDIC PE4" DstPort 3 } Line { SrcBlock "CORDIC PE3" SrcPort 2 DstBlock "CORDIC PE4" DstPort 2 } Line { SrcBlock "CORDIC PE3" SrcPort 1 DstBlock "CORDIC PE4" DstPort 1 } Line { SrcBlock "CORDIC PE2" SrcPort 3 DstBlock "CORDIC PE3" DstPort 3 } Line { SrcBlock "CORDIC PE2" SrcPort 2 DstBlock "CORDIC PE3" DstPort 2 } Line { SrcBlock "CORDIC PE2" SrcPort 1 DstBlock "CORDIC PE3" DstPort 1 } Line { SrcBlock "CORDIC PE1" SrcPort 3 DstBlock "CORDIC PE2" DstPort 3 } Line { SrcBlock "CORDIC PE1" SrcPort 2 DstBlock "CORDIC PE2" DstPort 2 } Line { SrcBlock "CORDIC PE1" SrcPort 1 DstBlock "CORDIC PE2" DstPort 1 } Annotation { Name "The fine angle rotation operation is performed iteratively in stages (0..stages-1). \nThe i-th PE rot" "ates its input vector by an angle +/- atan(1/2^i), driving its input y coordinate towards zero." Position [40, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" FontSize 14 } } } Block { BlockType Reference Name "Constant" SID "939:358" Ports [0, 1] Position [20, 147, 65, 163] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,16,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Quadrant Correct" SID "939:359" Ports [3, 1] Position [500, 71, 595, 149] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'Z in');\nport_label('input',2,'sgn(y)');\nport_label('input',3,'sgn(x)');\nport_label('output',1,'Z');" "\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Quadrant Correct" Location [-6, 124, 779, 776] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Z IN" SID "939:360" Position [105, 48, 135, 62] IconDisplay "Port number" } Block { BlockType Inport Name "PI_ addsub" SID "939:361" Position [15, 123, 45, 137] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Z MUX SEL" SID "939:362" Position [55, 28, 85, 42] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "+PI" SID "939:363" Ports [0, 1] Position [100, 158, 200, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "pi" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "100,24,0,1,white,blue,0,8a4b1ba4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 100 100 0 0 ],[0 0 24 24 0 ],[0.77 0." "82 0.91 ]);\nplot([0 100 100 0 0 ],[0 0 24 24 0 ]);\npatch([43.325 47.66 50.66 53.66 56.66 50.66 46.325 43.325 ]" ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([46.325 50.66 47.66 43.325 46.325 ],[12.33" " 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([43.325 47.66 50.66 46.325 43.325 ],[9.33 9.33 12.33 12" ".33 9.33 ],[1 1 1 ]);\npatch([46.325 56.66 53.66 50.66 47.66 43.325 46.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('output',1,'3.1416015625');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "-PI" SID "939:364" Ports [0, 1] Position [100, 198, 200, 222] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "-pi" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "100,24,0,1,white,blue,0,c63dff26,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 100 100 0 0 ],[0 0 24 24 0 ],[0.77 0." "82 0.91 ]);\nplot([0 100 100 0 0 ],[0 0 24 24 0 ]);\npatch([43.325 47.66 50.66 53.66 56.66 50.66 46.325 43.325 ]" ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([46.325 50.66 47.66 43.325 46.325 ],[12.33" " 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([43.325 47.66 50.66 46.325 43.325 ],[9.33 9.33 12.33 12" ".33 9.33 ],[1 1 1 ]);\npatch([46.325 56.66 53.66 50.66 47.66 43.325 46.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('output',1,'-3.1416015625');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub" SID "939:365" Ports [2, 1] Position [350, 152, 420, 228] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,76,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 76 76 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 76 76 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[49.1 49.1 " "59.1 49.1 59.1 59.1 59.1 49.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[39.1 39.1 49.1 49.1 39.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[29.1 29.1 39.1 39.1 29.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[19.1 19.1 29.1 19.1 29.1 29.1 19.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a - b}','texmode','on');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "939:366" Ports [1, 1] Position [105, 121, 145, 139] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "The input is presented at the output after quantization and overflow effects.

Hardware notes" ": Additional hardware is used when rounding or saturation is selected and output width is less than the input wi" "dth." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "8" bin_pt "6" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "939:367" Ports [3, 1] Position [470, 26, 510, 84] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,58,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 8.28571 49.7143 58 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 40 40 0 0 ],[0 8.28571 49.7143 58 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13." "875 8.875 ],[34.55 34.55 39.55 34.55 39.55 39.55 39.55 34.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 " "],[29.55 29.55 34.55 34.55 29.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[24.55 24.55 29" ".55 29.55 24.55 ],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[19.55 19.55 24.55 19.55 24.55 24" ".55 19.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Mux1" SID "939:368" Ports [3, 1] Position [235, 110, 275, 230] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,120,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 17.1429 102.857 120 0 " "],[0.77 0.82 0.91 ]);\nplot([0 40 40 0 0 ],[0 17.1429 102.857 120 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 1" "3.875 8.875 ],[65.55 65.55 70.55 65.55 70.55 70.55 70.55 65.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.87" "5 ],[60.55 60.55 65.55 65.55 60.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[55.55 55.55 " "60.55 60.55 55.55 ],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[50.55 50.55 55.55 50.55 55.55 " "55.55 50.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon" " text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black'" ");port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Outport Name "Z" SID "939:369" Position [595, 48, 625, 62] IconDisplay "Port number" } Line { SrcBlock "-PI" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "+PI" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Mux1" DstPort 1 } Line { SrcBlock "Z IN" SrcPort 1 Points [160, 0] Branch { DstBlock "Mux" DstPort 2 } Branch { Points [0, 155] DstBlock "AddSub" DstPort 2 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [15, 0; 0, -115] DstBlock "Mux" DstPort 3 } Line { SrcBlock "Z MUX SEL" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "PI_ addsub" SrcPort 1 DstBlock "Convert" DstPort 1 } Annotation { Name "The CORDIC algorithm coverges for angles between -pi/2 to +pi/2. The Quadrant Correct subsystem ref" "lects\nthe angle back to the 2nd and 3rd quadrant from the 1st and 4th quadarnt if reflection was applied during" " the\nquadarnt map stage. Reflection is applied by subtracting the output angle by pi if the original vector was" " in the\n2nd quadrant and -p if it was in the 3rd quadrant." Position [35, 325] HorizontalAlignment "left" DropShadow on FontName "Arial" FontSize 12 } } } Block { BlockType SubSystem Name "Quadrant Map" SID "939:370" Ports [2, 4] Position [140, 36, 235, 124] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('output',1,'X');\nport_label('output',2,'Y');\nport_label" "('output',3,'sgn(y)');\nport_label('output',4,'sgn(x)');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Quadrant Map" Location [215, 93, 860, 608] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "939:371" Position [55, 58, 85, 72] IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "939:372" Position [60, 158, 90, 172] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Delay3" SID "939:373" Ports [1, 1] Position [350, 154, 395, 176] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Delay line having configurable length.

Hardware notes: A delay line is a chain, each link o" "f which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-" "flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,22,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 22 22 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "939:374" Ports [1, 1] Position [135, 57, 160, 73] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Delay line having configurable length.

Hardware notes: A delay line is a chain, each link o" "f which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-" "flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,16,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','" "texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "939:375" Ports [3, 1] Position [455, 29, 495, 101] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,72,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 10.2857 61.7143 72 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 40 40 0 0 ],[0 10.2857 61.7143 72 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13." "875 8.875 ],[41.55 41.55 46.55 41.55 46.55 46.55 46.55 41.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 " "],[36.55 36.55 41.55 41.55 36.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[31.55 31.55 36" ".55 36.55 31.55 ],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[26.55 26.55 31.55 26.55 31.55 31" ".55 26.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Negate1" SID "939:376" Ports [1, 1] Position [310, 80, 340, 100] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "sgn(x)" SID "939:377" Ports [1, 1] Position [240, 30, 280, 50] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "sgn(y)" SID "939:378" Ports [1, 1] Position [475, 215, 515, 235] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "939:379" Position [565, 58, 595, 72] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "939:380" Position [575, 158, 605, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "sign(y)" SID "939:381" Position [570, 218, 600, 232] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "sign(x)" SID "939:382" Position [570, 263, 600, 277] Port "4" IconDisplay "Port number" } Line { SrcBlock "Delay3" SrcPort 1 Points [45, 0] Branch { DstBlock "Y" DstPort 1 } Branch { Points [0, 60] DstBlock "sgn(y)" DstPort 1 } } Line { SrcBlock "Negate1" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "x" SrcPort 1 DstBlock "Delay4" DstPort 1 } Line { SrcBlock "sgn(x)" SrcPort 1 Points [135, 0] Branch { DstBlock "Mux" DstPort 1 } Branch { Points [0, 230] DstBlock "sign(x)" DstPort 1 } } Line { SrcBlock "sgn(y)" SrcPort 1 DstBlock "sign(y)" DstPort 1 } Line { SrcBlock "Delay4" SrcPort 1 Points [0, 0; 30, 0] Branch { Points [0, -25] DstBlock "sgn(x)" DstPort 1 } Branch { Points [0, 25] DstBlock "Negate1" DstPort 1 } Branch { DstBlock "Mux" DstPort 2 } } Annotation { Name "The CORDIC algorithm converges for angles between -pi/2 to +pi/2. The Quadrant Map subsystem always" " maps the\nabsolute value for x-axis. This reflects the input vector from the 2nd and 3rd quadrant to the 1st an" "d 4th quadrant, resp." Position [45, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" FontSize 12 } } } Block { BlockType Outport Name "X" SID "939:383" Position [640, 48, 670, 62] IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "939:384" Position [640, 103, 670, 117] Port "2" IconDisplay "Port number" } Line { SrcBlock "CORDIC \nPipe Balance2" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "CORDIC Fine Angle PE" SrcPort 1 DstBlock "CORDIC \nPipe Balance2" DstPort 1 } Line { SrcBlock "Quadrant Correct" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "CORDIC Fine Angle PE" SrcPort 2 DstBlock "Quadrant Correct" DstPort 1 } Line { SrcBlock "CORDIC \nPipe Balance1" SrcPort 1 Points [65, 0; 0, -70] DstBlock "Quadrant Correct" DstPort 3 } Line { SrcBlock "CORDIC \nPipe Balance" SrcPort 1 Points [45, 0; 0, -70] DstBlock "Quadrant Correct" DstPort 2 } Line { SrcBlock "Quadrant Map" SrcPort 4 Points [10, 0; 0, 95] DstBlock "CORDIC \nPipe Balance1" DstPort 1 } Line { SrcBlock "Quadrant Map" SrcPort 3 Points [30, 0; 0, 90] DstBlock "CORDIC \nPipe Balance" DstPort 1 } Line { SrcBlock "y" SrcPort 1 DstBlock "Quadrant Map" DstPort 2 } Line { SrcBlock "x" SrcPort 1 DstBlock "Quadrant Map" DstPort 1 } Line { SrcBlock "Quadrant Map" SrcPort 2 Points [70, 0] DstBlock "CORDIC Fine Angle PE" DstPort 2 } Line { SrcBlock "Quadrant Map" SrcPort 1 Points [70, 0] DstBlock "CORDIC Fine Angle PE" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [220, 0; 0, -65] DstBlock "CORDIC Fine Angle PE" DstPort 3 } Annotation { Name "The CORDIC algorithm is implemented in 3 steps.\n\nStep 1: Coarse Angle Rotation. The algorithm conv" "erges only for angles between -pi/2 and pi/2, so if x < zero, the input vector is reflected \nto the 1st or 3rd " "quadrant by making the x-coordinate non-negative. \n\nStep 2: Fine Angle Rotation. For rectangular-to-polar con" "version, the resulting vector is rotated through progressively smaller angles, such that y goes\nto zero. In the" " i-th stage, the angular rotation is by either +/- atan(1/2^i), depending on whether or not its input y is less " "than or greater than zero. \n\nStep 3: Angle Correction. If there was a reflection applied in Step 1, this step " "applies the appropriate angle correction by subtracting it from +/- pi. " Position [20, 330] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType Reference Name "Convert" SID "940" Ports [1, 1] Position [290, 72, 335, 88] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "45,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "941" Ports [1, 1] Position [290, 132, 335, 148] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "45,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "942" Ports [1, 1] Position [715, 138, 755, 182] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "8.2.02" sg_icon_stat "40,44,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult1" SID "943" Ports [2, 1] Position [615, 120, 665, 200] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "24" quantization "Round (unbiased: +/- Inf)" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[52 69 0 102 0 2 0]" pipeline "off" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,80,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 80 80 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 80 80 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[47.7" "7 47.77 54.77 47.77 54.77 54.77 54.77 47.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[40.77 40.77 " "47.77 47.77 40.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[33.77 33.77 40.77 40.77 33." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[26.77 26.77 33.77 26.77 33.77 33.77 26.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('bl" "ack');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample" SID "944" Ports [1, 1] Position [200, 63, 230, 97] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "30,34,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 34 34 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[21.44 21.4" "4 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[17.44 17.44 21.44 21.44 " "17.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "945" Ports [1, 1] Position [200, 123, 230, 157] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "30,34,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 34 34 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[21.44 21.4" "4 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[17.44 17.44 21.44 21.44 " "17.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "inv 2pi" SID "946" Ports [0, 1] Position [510, 167, 580, 193] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1/(2*pi)" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "24" bin_pt "24" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,26,0,1,white,blue,0,fb79d71a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 26 26 0 ]);\npatch([28.325 32.66 35.66 38.66 41.66 35.66 31.325 28.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([31.325 35.66 32.66 28.325 31.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([28.325 32.66 35.66 31.325 28.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([31.325 41.66 38.66 35.66 32.66 28.325 31.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'0.15915495157241821');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "atan" SID "947" Position [820, 153, 850, 167] IconDisplay "Port number" } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "CORDIC ATAN1" DstPort 2 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "CORDIC ATAN1" DstPort 1 } Line { SrcBlock "Up Sample" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "CORDIC ATAN1" SrcPort 2 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "I" SrcPort 1 Points [0, 0] DstBlock "Up Sample" DstPort 1 } Line { SrcBlock "Q" SrcPort 1 Points [0, 0] DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "inv 2pi" SrcPort 1 DstBlock "Mult1" DstPort 2 } Line { SrcBlock "Mult1" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "atan" DstPort 1 } } } Block { BlockType Scope Name "CFO" SID "948" Ports [7] Position [620, 379, 665, 491] NamePlacement "alternate" Floating off Location [5, 45, 1925, 1171] Open off NumInputPorts "7" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "392.7801724137931" YMin "-0.5~-0.25~-1~-1~0~0~0" YMax "0.5~0.15~1~1~1~3500~1" SaveName "ScopeData17" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Scope Name "CFO1" SID "949" Ports [5] Position [1110, 483, 1155, 607] NamePlacement "alternate" Floating off Location [235, 102, 1915, 1078] Open off NumInputPorts "5" ZoomMode "yonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" } TimeRange "14608" YMin "-0.25~-0.25~-1~-1~0" YMax "0.2~0.25~1~1~1" SaveName "ScopeData27" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "Constant1" SID "9851" Ports [0, 1] Position [1550, 115, 1635, 155] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2e-5" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "32" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "4" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,40,0,1,white,blue,0,9f732294,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 85 85 0 0 ],[0 0 40 40 0 ]);\npatch([30.875 38.1 43.1 48.1 53.1 43.1 35.875 30.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([35.875 43.1 38.1 30.875 35.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([30.875 38.1 43.1 35.875 30.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([35.875 53.1 48.1 43.1 38.1 30.875 35.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'1.9999919459223747e-005');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "950" Ports [1, 1] Position [1470, 192, 1510, 208] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "32" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,375" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "951" Ports [1, 1] Position [575, 141, 615, 159] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "64" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,0603ebe1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-64}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "952" Ports [1, 1] Position [1095, 301, 1135, 319] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','te" "xmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample2" SID "953" Ports [1, 1] Position [1265, 86, 1295, 114] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "954" Position [385, 202, 510, 218] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_coarseCFO_en" TagVisibility "global" } Block { BlockType From Name "From2" SID "955" Position [285, 352, 410, 368] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_CFOCalc_Dly" TagVisibility "global" } Block { BlockType From Name "From3" SID "956" Position [105, 279, 280, 301] ShowName off CloseFcn "tagdialog Close" GotoTag "longCorrAboveThresh_Twice" TagVisibility "global" } Block { BlockType From Name "From4" SID "957" Position [1065, 92, 1190, 108] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_coarseCFO_correction" TagVisibility "global" } Block { BlockType From Name "From5" SID "958" Position [65, 399, 230, 411] ShowName off CloseFcn "tagdialog Close" GotoTag "RxPktTiming_SampleCount" TagVisibility "global" } Block { BlockType Reference Name "Gateway Out1" SID "959" Ports [1, 1] Position [960, 538, 995, 552] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\n" "color('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text'" ");" } Block { BlockType Reference Name "Gateway Out2" SID "960" Ports [1, 1] Position [960, 513, 995, 527] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\n" "color('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text'" ");" } Block { BlockType Reference Name "Gateway Out3" SID "961" Ports [1, 1] Position [960, 488, 995, 502] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\n" "color('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text'" ");" } Block { BlockType Reference Name "Gateway Out4" SID "962" Ports [1, 1] Position [960, 563, 995, 577] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\n" "color('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text'" ");" } Block { BlockType Reference Name "Gateway Out5" SID "963" Ports [1, 1] Position [960, 588, 995, 602] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\n" "color('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text'" ");" } Block { BlockType Reference Name "Gateway Out6" SID "9373" Ports [1, 1] Position [495, 383, 530, 397] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\n" "color('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text'" ");" } Block { BlockType Reference Name "Gateway Out7" SID "9374" Ports [1, 1] Position [495, 398, 530, 412] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\n" "color('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text'" ");" } Block { BlockType Reference Name "Gateway Out8" SID "9375" Ports [1, 1] Position [495, 413, 530, 427] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\n" "color('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text'" ");" } Block { BlockType Goto Name "Goto1" SID "964" Position [1615, 282, 1785, 298] ShowName off GotoTag "regRx_coarseCFOest" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "965" Position [1615, 302, 1785, 318] ShowName off GotoTag "regRx_coarseCFOest_en" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "966" Position [1620, 367, 1790, 383] ShowName off GotoTag "preSpin_coarseRxCFOest" TagVisibility "global" } Block { BlockType Goto Name "Goto4" SID "967" Position [1620, 387, 1790, 403] ShowName off GotoTag "preSpin_coarseRxCFOest_valid" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "968" Ports [1, 1] Position [555, 201, 580, 219] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "969" Ports [1, 1] Position [555, 231, 580, 249] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "970" Ports [2, 1] Position [640, 260, 680, 335] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2.01" sg_icon_stat "40,75,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 75 75 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 75 75 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[42.55 42.55 47." "55 42.55 47.55 47.55 47.55 42.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[37.55 37.55 42.55 42.55 37." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[32.55 32.55 37.55 37.55 32.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[27.55 27.55 32.55 27.55 32.55 32.55 27.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('a" "nd');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "971" Ports [3, 1] Position [640, 166, 680, 254] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2.01" sg_icon_stat "40,88,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 88 88 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 88 88 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[49.55 49.55 54." "55 49.55 54.55 54.55 54.55 49.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[44.55 44.55 49.55 49.55 44." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[39.55 39.55 44.55 44.55 39.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[34.55 34.55 39.55 34.55 39.55 39.55 34.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp(" "'or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical2" SID "972" Ports [2, 1] Position [370, 274, 410, 336] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2.01" sg_icon_stat "40,62,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 62 62 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 62 62 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[36.55 36.55 41." "55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[31.55 31.55 36.55 36.55 31." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('o" "r');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "PhaseDiff" SID "973" Ports [1, 1] Position [440, 106, 520, 144] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "PhaseDiff" Location [536, 711, 968, 805] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "p" SID "974" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "975" Ports [2, 1] Position [240, 27, 290, 78] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "24" quantization "Round (unbiased: +/- Inf)" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "976" Ports [1, 1] Position [115, 51, 160, 79] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "64" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,0603ebe1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('z^{-64}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Sanity Check" SID "977" Ports [1, 1] Position [380, 38, 455, 72] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Sanity Check" Location [1082, 737, 1702, 1020] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "diff" SID "978" Position [165, 263, 195, 277] IconDisplay "Port number" } Block { BlockType Reference Name "Concat" SID "979" Ports [2, 1] Position [440, 227, 480, 263] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.01" sg_icon_stat "40,36,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}'," "'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From3" SID "980" Position [75, 217, 200, 233] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_CFOCalc_maxPhaseDiff" TagVisibility "global" } Block { BlockType Reference Name "Mux2" SID "981" Ports [4, 1] Position [585, 339, 610, 406] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "24" quantization "Truncate" overflow "Flag as error" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,67,4,1,white,blue,3,58b3489d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 9.57143 57.4286 67 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 9.57143 57.4286 67 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[36.33 36.33 39.33 36.33 39.33 39.33 39.33 36.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[33.33 33.33 36.33 36.33 33.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[30.33 30.33 " "33.33 33.33 30.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33 27.33 30.33" " 30.33 27.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\n\ncolor('black');disp('\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Negate" SID "982" Ports [1, 1] Position [290, 214, 320, 236] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "10.1.3" sg_icon_stat "30,22,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "983" Ports [2, 1] Position [355, 213, 400, 257] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational5" SID "984" Ports [2, 1] Position [355, 258, 400, 302] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "safe diff" SID "985" Position [685, 368, 715, 382] IconDisplay "Port number" } Line { SrcBlock "diff" SrcPort 1 Points [15, 0] Branch { Points [0, 95] DstBlock "Mux2" DstPort 2 } Branch { Points [105, 0] Branch { Points [0, -25] DstBlock "Relational1" DstPort 2 } Branch { DstBlock "Relational5" DstPort 1 } } } Line { SrcBlock "From3" SrcPort 1 Points [45, 0] Branch { DstBlock "Negate" DstPort 1 } Branch { Points [0, 65] Branch { DstBlock "Relational5" DstPort 2 } Branch { Points [0, 90] DstBlock "Mux2" DstPort 3 } } } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "safe diff" DstPort 1 } Line { SrcBlock "Negate" SrcPort 1 Points [10, 0] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 170] DstBlock "Mux2" DstPort 4 } } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "Relational5" SrcPort 1 Points [10, 0; 0, -25] DstBlock "Concat" DstPort 2 } Line { SrcBlock "Concat" SrcPort 1 Points [20, 0; 0, 105] DstBlock "Mux2" DstPort 1 } } } Block { BlockType Outport Name "diff(p0,p63)" SID "986" Position [520, 48, 550, 62] IconDisplay "Port number" } Line { SrcBlock "Sanity Check" SrcPort 1 DstBlock "diff(p0,p63)" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Sanity Check" DstPort 1 } Line { SrcBlock "p" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 25] DstBlock "Delay3" DstPort 1 } Branch { DstBlock "AddSub1" DstPort 1 } } } } Block { BlockType SubSystem Name "PktDet-Only\nCoarseCFO Timing" SID "987" Ports [0, 1] Position [160, 304, 215, 336] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "PktDet-Only\nCoarseCFO Timing" Location [245, 416, 676, 520] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType From Name "From5" SID "988" Position [100, 219, 265, 231] ShowName off CloseFcn "tagdialog Close" GotoTag "RxPktTiming_SampleCount" TagVisibility "global" } Block { BlockType From Name "From6" SID "989" Position [100, 193, 270, 207] ShowName off CloseFcn "tagdialog Close" GotoTag "RxReg_PktDetCoarseCFOEn" TagVisibility "global" } Block { BlockType From Name "From7" SID "990" Position [100, 253, 270, 267] ShowName off CloseFcn "tagdialog Close" GotoTag "RxReg_PktDetCoarseCFO_CaptInd" TagVisibility "global" } Block { BlockType Reference Name "Logical3" SID "991" Ports [2, 1] Position [555, 191, 595, 229] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2.01" sg_icon_stat "40,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 38 38 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[24.55 24." "55 29.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[19.55 19.55 24.55 2" "4.55 19.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge3" SID "992" Ports [1, 1] Position [645, 198, 700, 222] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge3" Location [384, 656, 940, 879] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "993" Position [200, 253, 230, 267] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "994" Ports [1, 1] Position [425, 153, 460, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "995" Ports [1, 1] Position [490, 156, 515, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "996" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "997" Position [610, 173, 640, 187] IconDisplay "Port number" } Line { SrcBlock "D" SrcPort 1 Points [150, 0; 0, -70] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Block { BlockType Reference Name "Relational6" SID "998" Ports [2, 1] Position [465, 205, 505, 280] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,75,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 75 75 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[42.55 42." "55 47.55 42.55 47.55 47.55 47.55 42.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[37.55 37.55 42.55 4" "2.55 37.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[32.55 32.55 37.55 37.55 32.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[27.55 27.55 32.55 27.55 32.55 32.55 27.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Capt" SID "999" Position [740, 203, 770, 217] IconDisplay "Port number" } Line { SrcBlock "From6" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Relational6" DstPort 1 } Line { SrcBlock "Relational6" SrcPort 1 Points [30, 0] DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Posedge3" DstPort 1 } Line { SrcBlock "Posedge3" SrcPort 1 DstBlock "Capt" DstPort 1 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Relational6" DstPort 2 } } } Block { BlockType SubSystem Name "Posedge3" SID "1000" Ports [1, 1] Position [825, 283, 880, 307] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge3" Location [384, 656, 940, 879] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "1001" Position [200, 253, 230, 267] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "1002" Ports [1, 1] Position [425, 153, 460, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1003" Ports [1, 1] Position [490, 156, 515, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1004" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "1005" Position [610, 173, 640, 187] IconDisplay "Port number" } Line { SrcBlock "D" SrcPort 1 Points [150, 0; 0, -70] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Block { BlockType Reference Name "Register4" SID "1006" Ports [3, 1] Position [1095, 134, 1140, 286] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "8.2.01" sg_icon_stat "45,152,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 152 152 0 ],[0.77 0.82 0" ".91 ]);\nplot([0 45 45 0 0 ],[0 0 152 152 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[82.66 82." "66 88.66 82.66 88.66 88.66 88.66 82.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[76.66 76.66 82.66 82.6" "6 76.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[70.66 70.66 76.66 76.66 70.66 ],[1 1 1 ]);" "\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[64.66 64.66 70.66 64.66 70.66 70.66 64.66 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor" "('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end ico" "n text');" } Block { BlockType SubSystem Name "S-R Latch1" SID "1007" Ports [2, 1] Position [720, 278, 765, 307] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch1" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "1008" Position [140, 88, 170, 102] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "1009" Position [140, 103, 170, 117] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "1010" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "1011" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "1012" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Reference Name "Scale" SID "1013" Ports [1, 1] Position [1200, 198, 1235, 222] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting the binary point position.

Hardware notes: In hardwa" "re this block costs nothing." scale_factor "-12" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1.2" sg_icon_stat "35,24,1,1,white,blue,0,5033ba66,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15.33 15" ".33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('\\bf{2^{-12}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Phase Inc" SID "1014" Position [1645, 193, 1675, 207] IconDisplay "Port number" } Line { SrcBlock "I In" SrcPort 1 DstBlock "Arctan2" DstPort 1 } Line { SrcBlock "Q In" SrcPort 1 DstBlock "Arctan2" DstPort 2 } Line { SrcBlock "Arctan2" SrcPort 1 Points [20, 0] Branch { DstBlock "PhaseDiff" DstPort 1 } Branch { Points [0, 295] Branch { Points [0, 75] DstBlock "Gateway Out3" DstPort 1 } Branch { DstBlock "Gateway Out8" DstPort 1 } } } Line { SrcBlock "PhaseDiff" SrcPort 1 Points [25, 0] Branch { DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 25] Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, 370] DstBlock "Gateway Out2" DstPort 1 } } } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub1" SrcPort 1 Points [45, 0] Branch { DstBlock "Accum" DstPort 1 } Branch { Points [0, 405] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "Accum" SrcPort 1 Points [30, 0] Branch { Points [0, 430] DstBlock "Gateway Out4" DstPort 1 } Branch { Points [80, 0; 0, 20] DstBlock "Register4" DstPort 1 } } Line { SrcBlock "AddSub2" SrcPort 1 Points [30, 0] Branch { DstBlock "Convert1" DstPort 1 } Branch { Points [0, 245; -560, 0; 0, 150] DstBlock "Gateway Out5" DstPort 1 } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "ASR" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 Points [35, 0; 0, -35] DstBlock "ASR" DstPort 2 } Line { SrcBlock "ASR" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical1" DstPort 3 } Line { SrcBlock "Posedge3" SrcPort 1 Points [115, 0] Branch { Points [0, -35] DstBlock "Register4" DstPort 3 } Branch { Points [0, 15] DstBlock "Delay2" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register4" DstPort 2 } Branch { Points [0, 75] DstBlock "S-R Latch1" DstPort 1 } } Line { SrcBlock "RxPkt Active" SrcPort 1 Points [85, 0] Branch { DstBlock "Inverter2" DstPort 1 } Branch { Points [0, 40] DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Reset" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Register4" SrcPort 1 DstBlock "Scale" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "S-R Latch1" DstPort 2 } Line { SrcBlock "S-R Latch1" SrcPort 1 DstBlock "Posedge3" DstPort 1 } Line { SrcBlock "Delay2" SrcPort 1 Points [420, 0] Branch { DstBlock "Goto2" DstPort 1 } Branch { Points [0, 85] DstBlock "Goto4" DstPort 1 } } Line { SrcBlock "Scale" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Gateway Out2" SrcPort 1 DstBlock "CFO1" DstPort 2 } Line { SrcBlock "Gateway Out3" SrcPort 1 DstBlock "CFO1" DstPort 1 } Line { SrcBlock "Gateway Out1" SrcPort 1 DstBlock "CFO1" DstPort 3 } Line { SrcBlock "Gateway Out4" SrcPort 1 DstBlock "CFO1" DstPort 4 } Line { SrcBlock "Gateway Out5" SrcPort 1 DstBlock "CFO1" DstPort 5 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 Points [50, 0] Branch { Points [0, 90] Branch { DstBlock "Goto1" DstPort 1 } Branch { Points [0, 85] DstBlock "Goto3" DstPort 1 } } Branch { DstBlock "Phase Inc" DstPort 1 } } Line { SrcBlock "Down Sample2" SrcPort 1 Points [25, 0; 0, 85] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 Points [25, 0] Branch { DstBlock "Logical2" DstPort 1 } Branch { Points [0, 100] DstBlock "Gateway Out6" DstPort 1 } } Line { SrcBlock "PktDet-Only\nCoarseCFO Timing" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Gateway Out7" DstPort 1 } Line { SrcBlock "Gateway Out6" SrcPort 1 DstBlock "CFO" DstPort 1 } Line { SrcBlock "Gateway Out7" SrcPort 1 DstBlock "CFO" DstPort 2 } Line { SrcBlock "Gateway Out8" SrcPort 1 DstBlock "CFO" DstPort 3 } Line { SrcBlock "Constant1" SrcPort 1 Points [55, 0] } Annotation { Name "Running sum of last 64 samples\nFull-precision avoids overflow, which would\ntotally screw up this recur" "sive calculation." Position [771, 79] } Annotation { Name "(1/64) for avgLen\n(1/64) for time_diff" Position [1219, 162] } } } Block { BlockType ComplexToMagnitudeAngle Name "Complex to\nMagnitude-Angle" SID "1015" Ports [1, 2] Position [970, 550, 990, 570] ShowName off Output "Magnitude and angle" } Block { BlockType ComplexToRealImag Name "Complex to\nReal-Imag" SID "1016" Ports [1, 2] Position [760, 513, 790, 542] ShowName off Output "Real and imag" } Block { BlockType Reference Name "Convert" SID "1017" Ports [1, 1] Position [860, 172, 900, 188] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "9873" Ports [1, 1] Position [860, 202, 900, 218] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "9874" Ports [1, 1] Position [860, 272, 900, 288] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "9875" Ports [1, 1] Position [860, 302, 900, 318] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "DDS" SID "1021" Ports [3, 2] Position [450, 187, 550, 243] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "DDS" Location [2, 70, 1278, 976] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Tx_PhaseInc" SID "1022" Position [460, 498, 490, 512] IconDisplay "Port number" } Block { BlockType Inport Name "Rx_CoarseEst" SID "1023" Position [460, 438, 490, 452] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "1024" Position [460, 468, 490, 482] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Assert" SID "9371" Ports [1, 1] Position [780, 445, 825, 465] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this b" "lock costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "4" output_port on has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "assert" sg_icon_stat "45,20,1,1,white,blue,0,9657e937,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Assert" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert1" SID "9372" Ports [1, 1] Position [780, 490, 825, 510] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this b" "lock costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "4" output_port on has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "assert" sg_icon_stat "45,20,1,1,white,blue,0,9657e937,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Assert" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "DDS Compiler 4.0 " SID "9241" Ports [3, 2] Position [865, 386, 945, 524] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/DDS Compiler 4.0 " SourceType "Xilinx DDS Compiler 4.0 Block" partspresent "Phase_Generator_and_SIN_COS_LUT" dds_clock_rate "40" channels "1" parameter_entry "Hardware_Parameters" spurious_free_dynamic_range "36" frequency_resolution "0.4" noise_shaping "None" phase_width "27" output_width "16" output_selection "Sine_and_Cosine" negative_sine on negative_cosine off amplitude_mode "Full_Range" memory_type "Auto" optimization_goal "Auto" dsp48_use "Minimal" latency_configuration "Auto" latency "2" has_phase_out off sclr_pin on clock_enable off rfd off rdy off channel_pin off explicit_period off period "1" phase_increment "Programmable" output_frequency1 "0" output_frequency2 "0" output_frequency3 "0" output_frequency4 "0" output_frequency5 "0" output_frequency6 "0" output_frequency7 "0" output_frequency8 "0" output_frequency9 "0" output_frequency10 "0" output_frequency11 "0" output_frequency12 "0" output_frequency13 "0" output_frequency14 "0" output_frequency15 "0" output_frequency16 "0" pinc1 "'0'" pinc2 "'0'" pinc3 "'0'" pinc4 "'0'" pinc5 "'0'" pinc6 "'0'" pinc7 "'0'" pinc8 "'0'" pinc9 "'0'" pinc10 "'0'" pinc11 "'0'" pinc12 "'0'" pinc13 "'0'" pinc14 "'0'" pinc15 "'0'" pinc16 "'0'" phase_offset "None" phase_offset_angles1 "0" phase_offset_angles2 "0" phase_offset_angles3 "0" phase_offset_angles4 "0" phase_offset_angles5 "0" phase_offset_angles6 "0" phase_offset_angles7 "0" phase_offset_angles8 "0" phase_offset_angles9 "0" phase_offset_angles10 "0" phase_offset_angles11 "0" phase_offset_angles12 "0" phase_offset_angles13 "0" phase_offset_angles14 "0" phase_offset_angles15 "0" phase_offset_angles16 "0" poff1 "'0'" poff2 "'0'" poff3 "'0'" poff4 "'0'" poff5 "'0'" poff6 "'0'" poff7 "'0'" poff8 "'0'" poff9 "'0'" poff10 "'0'" poff11 "'0'" poff12 "'0'" poff13 "'0'" poff14 "'0'" poff15 "'0'" poff16 "'0'" por_mode "false" gui_behaviour "Sysgen" ip_name "DDS Compiler" ip_version "4.0" dsptool_ready "true" wrapper_available "true" port_translation_map "{ 'ce' => 'en', 'sclr' => 'rst' }" ipcore_xco_need_fpga_part "true" ipcore_fpga_part "xlipgetpartsetting(gcb, {'virtex4', 'xc4vsx35', '-10', 'ff668'})" ipcore_usecache "true" ipcore_useipmodelcache "true" ipcore_verbose "false" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dds_compiler_v4_0" sg_icon_stat "80,138,3,2,white,blue,0,efa67d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 138 138 0 ],[0.77 0.82 0" ".91 ]);\nplot([0 80 80 0 0 ],[0 0 138 138 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[81.2" "1 81.21 92.21 81.21 92.21 92.21 92.21 81.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[70.21 70.21 8" "1.21 81.21 70.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[59.21 59.21 70.21 70.21 59.2" "1 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[48.21 48.21 59.21 48.21 59.21 59.21 48.21 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'we');\ncolor('black');port_label('input',2,'data');\ncolor('black');port_label('in" "put',3,'rst');\ncolor('black');port_label('output',1,'sine');\ncolor('black');port_label('output',2,'cosine');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Goto Name "Goto3" SID "1026" Position [1150, 532, 1245, 548] ShowName off GotoTag "CFO_DDSOut_I" TagVisibility "global" } Block { BlockType Goto Name "Goto4" SID "1027" Position [1150, 547, 1245, 563] ShowName off GotoTag "CFO_DDSOut_Q" TagVisibility "global" } Block { BlockType SubSystem Name "Indeterminate\nChecker" SID "9702" Ports [2, 2] Position [1015, 385, 1080, 525] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Indeterminate\nChecker" Location [875, 196, 2354, 1049] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "-sin" SID "9703" Position [90, 153, 120, 167] IconDisplay "Port number" } Block { BlockType Inport Name "cos" SID "9704" Position [80, 313, 110, 327] Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "Indeterminate Check" SID "9705" Ports [1, 1] Position [265, 116, 345, 154] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Indeterminate Check" Location [875, 196, 2354, 1049] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "237" Block { BlockType Inport Name "In1" SID "9706" Position [25, 85, 55, 100] BlockRotation 270 IconDisplay "Port number" } Block { BlockType Reference Name "Constant" SID "9707" Ports [0, 1] Position [75, 79, 100, 101] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disregard Subsystem" SID "9708" Tag "discardX" Ports [] Position [56, 130, 114, 188] ShowName off AttributesFormatString "Disregard Subsystem\\nFor Generation" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Disregard Subsystem" SourceType "Xilinx Disregard Subsystem For Generation Block" infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code gener" "ation. This block can be used in combination with the Simulation Multiplexer block to provide an alternative sim" "ulation model for another subsystem (e.g., to provide a simulation model for a black box)." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "disregard" block_version "10.1.3" sg_icon_stat "58,58,-1,-1,darkgray,black,0,0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 ],[0 0 58 58 ],[0.1 0.1 0.1])" ";\npatch([14 4 18 4 14 29 33 37 53 40 28 19 33 19 28 40 53 37 33 29 14 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 " "16 7 19 6 6 10 6 6 ],[0.33 0.33 0.33]);\nplot([0 58 58 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon gra" "phics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Gateway In" SID "9709" Ports [1, 1] Position [135, 33, 175, 47] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fi" "xed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "4" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,348,406" block_type "gatewayin" block_version "10.1.3" sg_icon_stat "40,14,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.895 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Indeterminate Probe1" SID "9710" Ports [1, 1] Position [70, 27, 95, 53] ForegroundColor "red" BackgroundColor "yellow" ShowName off LibraryVersion "1.2" LinkData { BlockName "Gateway Out" DialogParameters { sg_icon_stat "40,20,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.964 0.964 0.964 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.964 0.964 " "0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf" "('','COMMENT: end icon text');" } } SourceBlock "xbsIndex_r4/Indeterminate Probe" SourceType "Xilinx Indeterminate Probe Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" GeneratePreprocessorConditionals off infoedit "Produces an output 1 of type double when input data is indeterminate. Output is 0 otherwise.

Hardware notes: This block and any downstream blocks will be trimmed when hardware is generated." has_advanced_control "0" sggui_pos "20,20,409,249" block_type "indetprobe" block_version "10.1.3" sg_icon_stat "25,26,1,1,white,yellow,4,1c4257669fa6f259d9bb3743f2c8140f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([25 24.7598 24.0485 22.8934 21.3388 19.4" "446 17.2835 14.9386 12.5 10.0614 7.71646 5.55537 3.66117 2.10663 0.951506 0.240184 0 0.240184 0.951506 2.10663 3" ".66117 5.55537 7.71646 10.0614 12.5 14.9386 17.2835 19.4446 21.3388 22.8934 24.0485 24.7598 25 25 ],[13 15.5362 " "17.9749 20.2224 22.1924 23.8091 25.0104 25.7502 26 25.7502 25.0104 23.8091 22.1924 20.2224 17.9749 15.5362 13 10" ".4638 8.02512 5.77759 3.80761 2.1909 0.989566 0.249791 0 0.249791 0.989566 2.1909 3.80761 5.77759 8.02512 10.463" "8 13 13 ],[0.95 0.93 0.65 ]);\nplot([25 24.7598 24.0485 22.8934 21.3388 19.4446 17.2835 14.9386 12.5 10.0614 7.7" "1646 5.55537 3.66117 2.10663 0.951506 0.240184 0 0.240184 0.951506 2.10663 3.66117 5.55537 7.71646 10.0614 12.5 " "14.9386 17.2835 19.4446 21.3388 22.8934 24.0485 24.7598 25 25 ],[13 15.5362 17.9749 20.2224 22.1924 23.8091 25.0" "104 25.7502 26 25.7502 25.0104 23.8091 22.1924 20.2224 17.9749 15.5362 13 10.4638 8.02512 5.77759 3.80761 2.1909" " 0.989566 0.249791 0 0.249791 0.989566 2.1909 3.80761 5.77759 8.02512 10.4638 13 13 ]);\npatch([5.325 9.66 12.66" " 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12." "66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 13.33 ],[0.985 0.979 0.895 ]);\npatch([5.325 9.66 12.66 8.325 5.3" "25 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 1" "0.33 7.33 10.33 10.33 7.33 ],[0.985 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\nfprintf('','COMMENT: end icon text');disp('!def');\n" } Block { BlockType Reference Name "Mux1" SID "9711" Ports [3, 1] Position [210, 27, 240, 103] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "30,76,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 10.8571 65.1429 76 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 10.8571 65.1429 76 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 46.44 42.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[38" ".44 38.44 42.44 42.44 38.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[34.44 34.44 38.44 38.44" " 34.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[30.44 30.44 34.44 30.44 34.44 34.44 30.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out1" SID "9712" Position [265, 58, 295, 72] IconDisplay "Port number" } Line { SrcBlock "Gateway In" SrcPort 1 DstBlock "Mux1" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 Points [0, -15] Branch { DstBlock "Mux1" DstPort 2 } Branch { Points [0, -25] DstBlock "Indeterminate Probe1" DstPort 1 } } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Indeterminate Probe1" SrcPort 1 DstBlock "Gateway In" DstPort 1 } } } Block { BlockType SubSystem Name "Indeterminate Check " SID "9713" Ports [1, 1] Position [255, 276, 335, 314] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Indeterminate Check " Location [2, 70, 1278, 976] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "297" Block { BlockType Inport Name "In1" SID "9714" Position [25, 85, 55, 100] BlockRotation 270 IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "9715" Ports [0, 1] Position [75, 79, 100, 101] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,170720a6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0.999969482421875');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disregard Subsystem" SID "9716" Tag "discardX" Ports [] Position [56, 130, 114, 188] ShowName off AttributesFormatString "Disregard Subsystem\\nFor Generation" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Disregard Subsystem" SourceType "Xilinx Disregard Subsystem For Generation Block" infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code gener" "ation. This block can be used in combination with the Simulation Multiplexer block to provide an alternative sim" "ulation model for another subsystem (e.g., to provide a simulation model for a black box)." has_advanced_control "0" sggui_pos "20,20,170,217" block_type "disregard" block_version "10.1.3" sg_icon_stat "58,58,-1,-1,darkgray,black,0,0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 ],[0 0 58 58 ],[0.1 0.1 0.1])" ";\npatch([14 4 18 4 14 29 33 37 53 40 28 19 33 19 28 40 53 37 33 29 14 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 " "16 7 19 6 6 10 6 6 ],[0.33 0.33 0.33]);\nplot([0 58 58 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon gra" "phics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Gateway In" SID "9717" Ports [1, 1] Position [135, 33, 175, 47] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fi" "xed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "4" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,348,406" block_type "gatewayin" block_version "10.1.3" sg_icon_stat "40,14,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.895 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Indeterminate Probe1" SID "9718" Ports [1, 1] Position [70, 27, 95, 53] ForegroundColor "red" BackgroundColor "yellow" ShowName off LibraryVersion "1.2" LinkData { BlockName "Gateway Out" DialogParameters { sg_icon_stat "40,20,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 " "0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } } SourceBlock "xbsIndex_r4/Indeterminate Probe" SourceType "Xilinx Indeterminate Probe Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" GeneratePreprocessorConditionals off infoedit "Produces an output 1 of type double when input data is indeterminate. Output is 0 otherwise.

Hardware notes: This block and any downstream blocks will be trimmed when hardware is generated." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "indetprobe" block_version "10.1.3" sg_icon_stat "25,26,1,1,white,yellow,4,1c4257669fa6f259d9bb3743f2c8140f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([25 24.7598 24.0485 22.8934 21.3388 19.4" "446 17.2835 14.9386 12.5 10.0614 7.71646 5.55537 3.66117 2.10663 0.951506 0.240184 0 0.240184 0.951506 2.10663 3" ".66117 5.55537 7.71646 10.0614 12.5 14.9386 17.2835 19.4446 21.3388 22.8934 24.0485 24.7598 25 25 ],[13 15.5362 " "17.9749 20.2224 22.1924 23.8091 25.0104 25.7502 26 25.7502 25.0104 23.8091 22.1924 20.2224 17.9749 15.5362 13 10" ".4638 8.02512 5.77759 3.80761 2.1909 0.989566 0.249791 0 0.249791 0.989566 2.1909 3.80761 5.77759 8.02512 10.463" "8 13 13 ],[0.95 0.93 0.65 ]);\nplot([25 24.7598 24.0485 22.8934 21.3388 19.4446 17.2835 14.9386 12.5 10.0614 7.7" "1646 5.55537 3.66117 2.10663 0.951506 0.240184 0 0.240184 0.951506 2.10663 3.66117 5.55537 7.71646 10.0614 12.5 " "14.9386 17.2835 19.4446 21.3388 22.8934 24.0485 24.7598 25 25 ],[13 15.5362 17.9749 20.2224 22.1924 23.8091 25.0" "104 25.7502 26 25.7502 25.0104 23.8091 22.1924 20.2224 17.9749 15.5362 13 10.4638 8.02512 5.77759 3.80761 2.1909" " 0.989566 0.249791 0 0.249791 0.989566 2.1909 3.80761 5.77759 8.02512 10.4638 13 13 ]);\npatch([5.325 9.66 12.66" " 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12." "66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 13.33 ],[0.985 0.979 0.895 ]);\npatch([5.325 9.66 12.66 8.325 5.3" "25 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 1" "0.33 7.33 10.33 10.33 7.33 ],[0.985 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\nfprintf('','COMMENT: end icon text');disp('!def');\n" } Block { BlockType Reference Name "Mux1" SID "9719" Ports [3, 1] Position [210, 27, 240, 103] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "30,76,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 10.8571 65.1429 76 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 10.8571 65.1429 76 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 46.44 42.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[38" ".44 38.44 42.44 42.44 38.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[34.44 34.44 38.44 38.44" " 34.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[30.44 30.44 34.44 30.44 34.44 34.44 30.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out1" SID "9720" Position [265, 58, 295, 72] IconDisplay "Port number" } Line { SrcBlock "Indeterminate Probe1" SrcPort 1 DstBlock "Gateway In" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "In1" SrcPort 1 Points [0, -15] Branch { Points [0, -25] DstBlock "Indeterminate Probe1" DstPort 1 } Branch { DstBlock "Mux1" DstPort 2 } } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Gateway In" SrcPort 1 DstBlock "Mux1" DstPort 1 } } } Block { BlockType Reference Name "Simulation Multiplexer" SID "9721" Ports [2, 1] Position [445, 122, 495, 173] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "20,20,336,197" block_type "simmux" block_version "10.1.3" sg_icon_stat "50,51,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n" "\n\nfprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX" ",hwSwLineY);\n" } Block { BlockType Reference Name "Simulation Multiplexer1" SID "9722" Ports [2, 1] Position [435, 282, 485, 333] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "20,20,336,197" block_type "simmux" block_version "10.1.3" sg_icon_stat "50,51,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n" "\n\nfprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX" ",hwSwLineY);\n" } Block { BlockType Outport Name " -sin" SID "9723" Position [575, 143, 605, 157] IconDisplay "Port number" } Block { BlockType Outport Name " cos" SID "9724" Position [565, 303, 595, 317] Port "2" IconDisplay "Port number" } Line { SrcBlock "Simulation Multiplexer" SrcPort 1 DstBlock " -sin" DstPort 1 } Line { SrcBlock "Simulation Multiplexer1" SrcPort 1 DstBlock " cos" DstPort 1 } Line { SrcBlock "cos" SrcPort 1 Points [55, 0] Branch { DstBlock "Simulation Multiplexer1" DstPort 2 } Branch { Points [0, -25] DstBlock "Indeterminate Check " DstPort 1 } } Line { SrcBlock "-sin" SrcPort 1 Points [50, 0] Branch { DstBlock "Simulation Multiplexer" DstPort 2 } Branch { Points [0, -25] DstBlock "Indeterminate Check" DstPort 1 } } Line { SrcBlock "Indeterminate Check " SrcPort 1 DstBlock "Simulation Multiplexer1" DstPort 1 } Line { SrcBlock "Indeterminate Check" SrcPort 1 DstBlock "Simulation Multiplexer" DstPort 1 } Annotation { Name "Work around for a stupid Sysgen bug, where the DDS\nblock outputs an indeterminate value early in the" " simulation." Position [293, 429] } } } Block { BlockType SubSystem Name "Phase Inc Sel" SID "1051" Ports [3, 2] Position [585, 431, 730, 519] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Phase Inc Sel" Location [197, 386, 1017, 656] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Rx_CoarseEst" SID "1052" Position [650, 228, 680, 242] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "1053" Position [415, 388, 445, 402] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Tx_PhaseInc" SID "1054" Position [650, 263, 680, 277] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "1055" Ports [1, 1] Position [750, 226, 775, 244] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "27" bin_pt "27" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "1056" Ports [1, 1] Position [750, 261, 775, 279] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "27" bin_pt "27" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "1057" Ports [1, 1] Position [255, 162, 285, 178] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "1058" Ports [1, 1] Position [255, 147, 285, 163] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "1059" Ports [1, 1] Position [255, 197, 285, 213] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "1060" Ports [1, 1] Position [320, 145, 345, 165] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,20,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12" ".22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12." "22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample2" SID "1061" Ports [1, 1] Position [320, 160, 345, 180] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,20,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12" ".22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12." "22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "1062" Position [345, 401, 465, 419] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_freqCorrBypass" TagVisibility "global" } Block { BlockType From Name "From2" SID "1063" Position [40, 148, 215, 162] ShowName off CloseFcn "tagdialog Close" GotoTag "RxAutoReplyProc_UsePreCFO" TagVisibility "global" } Block { BlockType From Name "From4" SID "1064" Position [35, 198, 210, 212] ShowName off CloseFcn "tagdialog Close" GotoTag "Tx_Running" TagVisibility "global" } Block { BlockType From Name "From5" SID "1065" Position [40, 163, 215, 177] ShowName off CloseFcn "tagdialog Close" GotoTag "regTx_AlwaysUsePreSpin" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "1066" Ports [1, 1] Position [580, 371, 605, 389] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1067" Ports [2, 1] Position [510, 388, 545, 417] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,29,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 29 29 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "1068" Ports [2, 1] Position [640, 369, 675, 416] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,47,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 47 47 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 47 47 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[28.55 28." "55 33.55 28.55 33.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 2" "8.55 23.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[18.55 18.55 23.55 23.55 18.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[13.55 13.55 18.55 13.55 18.55 18.55 13.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "1069" Ports [2, 1] Position [370, 148, 405, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,29,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 29 29 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "1070" Ports [2, 1] Position [450, 183, 485, 212] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 29 29 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1071" Ports [3, 1] Position [940, 181, 965, 289] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "8.2.01" sg_icon_stat "25,108,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 15.4286 92.5714 108 0 " "],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 15.4286 92.5714 108 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12." "66 8.325 5.325 ],[57.33 57.33 60.33 57.33 60.33 60.33 60.33 57.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8." "325 ],[54.33 54.33 57.33 57.33 54.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[51.33 51.3" "3 54.33 54.33 51.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[48.33 48.33 51.33 48.33 51." "33 51.33 48.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i" "con text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('bla" "ck');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon" " text');" } Block { BlockType Outport Name "DDS_PhaseInc" SID "1074" Position [1135, 228, 1165, 242] IconDisplay "Port number" } Block { BlockType Outport Name "DDS_Rst" SID "1075" Position [960, 388, 990, 402] Port "2" IconDisplay "Port number" } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Rx_CoarseEst" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "DDS_PhaseInc" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 Points [5, 0; 0, 25] DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Convert4" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "DDS_Rst" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 Points [65, 0] Branch { Points [0, 180] DstBlock "Inverter" DstPort 1 } Branch { DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Tx_PhaseInc" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Convert4" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "Logical3" DstPort 2 } } } Block { BlockType Reference Name "inv 2pi2" SID "1076" Ports [0, 1] Position [780, 401, 805, 419] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "32" bin_pt "32" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "4" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "1077" Position [1150, 413, 1180, 427] IconDisplay "Port number" } Block { BlockType Outport Name "I" SID "1078" Position [1150, 483, 1180, 497] Port "2" IconDisplay "Port number" } Line { SrcBlock "inv 2pi2" SrcPort 1 DstBlock "DDS Compiler 4.0 " DstPort 1 } Line { SrcBlock "Phase Inc Sel" SrcPort 1 DstBlock "Assert" DstPort 1 } Line { SrcBlock "Phase Inc Sel" SrcPort 2 DstBlock "Assert1" DstPort 1 } Line { SrcBlock "Rx_CoarseEst" SrcPort 1 DstBlock "Phase Inc Sel" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Phase Inc Sel" DstPort 2 } Line { SrcBlock "Tx_PhaseInc" SrcPort 1 DstBlock "Phase Inc Sel" DstPort 3 } Line { SrcBlock "Assert" SrcPort 1 DstBlock "DDS Compiler 4.0 " DstPort 2 } Line { SrcBlock "Assert1" SrcPort 1 DstBlock "DDS Compiler 4.0 " DstPort 3 } Line { SrcBlock "DDS Compiler 4.0 " SrcPort 1 DstBlock "Indeterminate\nChecker" DstPort 1 } Line { SrcBlock "DDS Compiler 4.0 " SrcPort 2 DstBlock "Indeterminate\nChecker" DstPort 2 } Line { SrcBlock "Indeterminate\nChecker" SrcPort 1 Points [30, 0] Branch { DstBlock "Q" DstPort 1 } Branch { Points [0, 135] DstBlock "Goto4" DstPort 1 } } Line { SrcBlock "Indeterminate\nChecker" SrcPort 2 Points [35, 0] Branch { DstBlock "I" DstPort 1 } Branch { Points [0, 50] DstBlock "Goto3" DstPort 1 } } } } Block { BlockType From Name "From5" SID "1079" Position [640, 521, 710, 539] ShowName off CloseFcn "tagdialog Close" GotoTag "freqOffset" TagVisibility "global" } Block { BlockType Reference Name "Gateway Out" SID "1080" Ports [1, 1] Position [775, 498, 810, 512] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.96" "4 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out1" SID "1081" Ports [1, 1] Position [775, 478, 810, 492] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.96" "4 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out2" SID "1082" Ports [1, 1] Position [880, 453, 915, 467] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.96" "4 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out3" SID "1083" Ports [1, 1] Position [880, 418, 915, 432] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.96" "4 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Goto Name "Goto1" SID "1084" Position [420, 277, 515, 293] ShowName off GotoTag "CFO_PhaseInc" TagVisibility "global" } Block { BlockType Mux Name "Mux2" SID "1085" Ports [2, 1] Position [980, 476, 985, 514] ShowName off Inputs "2" DisplayOption "bar" } Block { BlockType SubSystem Name "PreSpin CFO Sel" SID "1086" Ports [1, 1] Position [265, 126, 375, 174] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "PreSpin CFO Sel" Location [572, 82, 1442, 564] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Rst" SID "1087" Position [185, 388, 215, 402] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "5LSB+8" SID "1088" Ports [1, 1] Position [655, 248, 695, 262] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.5" "5 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "1089" Ports [2, 1] Position [945, 372, 995, 463] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "32" bin_pt "32" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,91,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 91 91 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 91 91 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[52.77 52.7" "7 59.77 52.77 59.77 59.77 59.77 52.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[45.77 45.77 52.77 52" ".77 45.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[38.77 38.77 45.77 45.77 38.77 ],[1 1 " "1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[31.77 31.77 38.77 31.77 38.77 38.77 31.77 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{" "a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "1090" Ports [0, 1] Position [670, 144, 700, 166] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "8.2.02" sg_icon_stat "30,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.33 14.3" "3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 14.33 14" ".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "1091" Ports [1, 1] Position [545, 542, 575, 558] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert5" SID "1092" Ports [1, 1] Position [545, 422, 575, 438] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "1093" Ports [1, 1] Position [950, 641, 990, 659] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','te" "xmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "1094" Ports [1, 1] Position [1465, 405, 1495, 435] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType From Name "From" SID "1095" Position [235, 480, 395, 500] ShowName off CloseFcn "tagdialog Close" GotoTag "preSpin_coarseRxCFOest" TagVisibility "global" } Block { BlockType From Name "From1" SID "1096" Position [235, 520, 395, 540] ShowName off CloseFcn "tagdialog Close" GotoTag "preSpin_coarseRxCFOest_valid" TagVisibility "global" } Block { BlockType From Name "From10" SID "1097" Position [360, 245, 505, 265] ShowName off CloseFcn "tagdialog Close" GotoTag "regTxRx_PktBuffOffsets" TagVisibility "global" } Block { BlockType From Name "From2" SID "1098" Position [355, 360, 515, 380] ShowName off CloseFcn "tagdialog Close" GotoTag "preSpin_pilotCFOest" TagVisibility "global" } Block { BlockType From Name "From3" SID "1099" Position [230, 400, 390, 420] ShowName off CloseFcn "tagdialog Close" GotoTag "preSpin_pilotCFOest_valid" TagVisibility "global" } Block { BlockType From Name "From4" SID "1100" Position [235, 540, 395, 560] ShowName off CloseFcn "tagdialog Close" GotoTag "RxReg_PreCFO_UseCoarse" TagVisibility "global" } Block { BlockType From Name "From6" SID "1101" Position [230, 420, 390, 440] ShowName off CloseFcn "tagdialog Close" GotoTag "RxReg_PreCFO_UsePilots" TagVisibility "global" } Block { BlockType From Name "From7" SID "1102" Position [360, 280, 505, 300] ShowName off CloseFcn "tagdialog Close" GotoTag "PreSpin_TxBufIndex" TagVisibility "global" } Block { BlockType From Name "From8" SID "1103" Position [360, 213, 480, 227] ShowName off CloseFcn "tagdialog Close" GotoTag "Tx_Running" TagVisibility "global" } Block { BlockType Reference Name "Gateway Out1" SID "1104" Ports [1, 1] Position [1305, 148, 1340, 162] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\n" "color('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text'" ");" } Block { BlockType Reference Name "Gateway Out2" SID "1105" Ports [1, 1] Position [1305, 128, 1340, 142] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\n" "color('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text'" ");" } Block { BlockType Reference Name "Gateway Out3" SID "1106" Ports [1, 1] Position [1305, 108, 1340, 122] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\n" "color('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text'" ");" } Block { BlockType Reference Name "Gateway Out4" SID "1107" Ports [1, 1] Position [1305, 168, 1340, 182] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\n" "color('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text'" ");" } Block { BlockType Reference Name "Gateway Out5" SID "1108" Ports [1, 1] Position [1305, 188, 1340, 202] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\n" "color('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text'" ");" } Block { BlockType Reference Name "Inverter" SID "1109" Ports [1, 1] Position [725, 651, 750, 669] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1110" Ports [1, 1] Position [725, 691, 750, 709] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "1111" Ports [1, 1] Position [1010, 611, 1035, 629] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1112" Ports [2, 1] Position [645, 399, 680, 441] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,42,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26.55 31." "55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 26.55 21." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('a" "nd');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "1113" Ports [2, 1] Position [645, 519, 680, 561] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,42,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26.55 31." "55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 26.55 21." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('a" "nd');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "1114" Ports [3, 1] Position [880, 592, 915, 708] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,116,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 116 116 0 ],[0.77 0.82 0" ".91 ]);\nplot([0 35 35 0 0 ],[0 0 116 116 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[63.55 63.55" " 68.55 63.55 68.55 68.55 68.55 63.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[58.55 58.55 63.55 63.55" " 58.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[53.55 53.55 58.55 58.55 53.55 ],[1 1 1 ]);" "\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[48.55 48.55 53.55 48.55 53.55 53.55 48.55 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');d" "isp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "1115" Ports [2, 1] Position [790, 629, 825, 671] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,42,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26.55 31." "55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 26.55 21." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('a" "nd');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "1116" Ports [2, 1] Position [790, 669, 825, 711] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,42,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26.55 31." "55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 26.55 21." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('a" "nd');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "1117" Ports [2, 1] Position [790, 589, 825, 631] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,42,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26.55 31." "55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 26.55 21." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('a" "nd');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "1118" Ports [2, 1] Position [1075, 603, 1110, 667] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,64,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 64 64 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 64 64 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[37.55 37.55 42." "55 37.55 42.55 42.55 42.55 37.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[32.55 32.55 37.55 37.55 32." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[27.55 27.55 32.55 32.55 27.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[22.55 22.55 27.55 22.55 27.55 27.55 22.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('a" "nd');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1119" Ports [3, 1] Position [765, 201, 790, 309] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "8.2.01" sg_icon_stat "25,108,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 15.4286 92.5714 108 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 15.4286 92.5714 108 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.3" "25 5.325 ],[57.33 57.33 60.33 57.33 60.33 60.33 60.33 57.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[5" "4.33 54.33 57.33 57.33 54.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[51.33 51.33 54.33 54" ".33 51.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[48.33 48.33 51.33 48.33 51.33 51.33 48." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge" SID "1120" Ports [1, 1] Position [1175, 626, 1220, 644] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge" Location [384, 656, 940, 879] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "1121" Position [200, 253, 230, 267] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "1122" Ports [1, 1] Position [425, 153, 460, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1123" Ports [1, 1] Position [490, 156, 515, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1124" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "1125" Position [610, 173, 640, 187] IconDisplay "Port number" } Line { SrcBlock "D" SrcPort 1 Points [150, 0; 0, -70] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Block { BlockType Reference Name "Register1" SID "1126" Ports [3, 1] Position [730, 477, 780, 553] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "8.2.01" sg_icon_stat "50,76,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 76 76 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 76 76 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[45.77 45.7" "7 52.77 45.77 52.77 52.77 52.77 45.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[38.77 38.77 45.77 45" ".77 38.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[31.77 31.77 38.77 38.77 31.77 ],[1 1 " "1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[24.77 24.77 31.77 24.77 31.77 31.77 24.77 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en')" ";\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT:" " end icon text');" } Block { BlockType Reference Name "Register4" SID "1127" Ports [3, 1] Position [730, 357, 780, 433] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "8.2.01" sg_icon_stat "50,76,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 76 76 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 76 76 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[45.77 45.7" "7 52.77 45.77 52.77 52.77 52.77 45.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[38.77 38.77 45.77 45" ".77 38.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[31.77 31.77 38.77 38.77 31.77 ],[1 1 " "1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[24.77 24.77 31.77 24.77 31.77 31.77 24.77 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en')" ";\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT:" " end icon text');" } Block { BlockType Reference Name "Shared Memory" SID "1128" Ports [3, 1] Position [1315, 375, 1395, 465] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shared Memory" SourceType "Xilinx Shared Memory Random Access Memory Block" shared_memory_name "'PktBufFreqOffsets'" depth "32" ownership "Locally Owned and Initialized" initVector "0" en off mutex "Unprotected" mode "Read and Write" write_mode "Read After Write" time_out "0" latency "1" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "32" preci_type "Single" xl_use_area off xl_area "[0,0,0,0,0,0,0]" implementation "Block RAM" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,384,381" block_type "shmem" block_version "10.1.3" sg_icon_stat "80,90,3,1,white,blue,0,bf435243,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 90 90 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[57.21 57" ".21 68.21 57.21 68.21 68.21 68.21 57.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[46.21 46.21 57.21" " 57.21 46.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[35.21 35.21 46.21 46.21 35.21 ]," "[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[24.21 24.21 35.21 24.21 35.21 35.21 24.21 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input" "',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Simulation Multiplexer1" SID "1129" Ports [2, 1] Position [745, 143, 790, 192] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified For" " Simulation will be used during Simulink simulation. The input specified For Generation will be used during code " "generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim subsyst" "em.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "20,20,336,197" block_type "simmux" block_version "10.1.3" sg_icon_stat "45,49,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 49 49 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 49 49 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 30.66 3" "6.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 30.66 24" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\nfprintf('','COMMENT: " "end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX,hwSwLineY);\n" } Block { BlockType Reference Name "Up Sample" SID "1130" Ports [1, 1] Position [490, 418, 510, 442] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14.22 16." "22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22 12.22 ]" ",[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7." "55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "1131" Ports [1, 1] Position [490, 478, 510, 502] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14.22 16." "22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22 12.22 ]" ",[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7." "55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "1132" Ports [1, 1] Position [490, 518, 510, 542] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14.22 16." "22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22 12.22 ]" ",[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7." "55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample3" SID "1133" Ports [1, 1] Position [490, 538, 510, 562] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14.22 16." "22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22 12.22 ]" ",[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7." "55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample4" SID "1134" Ports [1, 1] Position [585, 208, 605, 232] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14.22 16." "22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22 12.22 ]" ",[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7." "55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt" "}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Tx_PhaseInc" SID "1135" Position [1545, 413, 1575, 427] IconDisplay "Port number" } Line { SrcBlock "From2" SrcPort 1 DstBlock "Register4" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "From" SrcPort 1 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Up Sample2" DstPort 1 } Line { SrcBlock "Register4" SrcPort 1 Points [95, 0] Branch { DstBlock "AddSub1" DstPort 1 } Branch { Points [0, -260] DstBlock "Gateway Out2" DstPort 1 } } Line { SrcBlock "Register1" SrcPort 1 Points [30, 0; 0, -75; 70, 0] Branch { DstBlock "AddSub1" DstPort 2 } Branch { Points [0, -285] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "AddSub1" SrcPort 1 Points [70, 0] Branch { Points [0, -245] DstBlock "Gateway Out4" DstPort 1 } Branch { DstBlock "Shared Memory" DstPort 2 } } Line { SrcBlock "From10" SrcPort 1 DstBlock "5LSB+8" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [10, 0] Branch { DstBlock "Register4" DstPort 3 } Branch { Points [0, 180] Branch { Points [0, 40] DstBlock "Logical4" DstPort 1 } Branch { DstBlock "Logical6" DstPort 1 } } } Line { SrcBlock "Logical2" SrcPort 1 Points [5, 0] Branch { DstBlock "Register1" DstPort 3 } Branch { Points [0, 140] DstBlock "Logical5" DstPort 1 } } Line { SrcBlock "From4" SrcPort 1 DstBlock "Up Sample3" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Up Sample" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "Posedge" SrcPort 1 Points [55, 0; 0, -185] Branch { DstBlock "Shared Memory" DstPort 3 } Branch { Points [0, -255] DstBlock "Gateway Out5" DstPort 1 } } Line { SrcBlock "From8" SrcPort 1 DstBlock "Up Sample4" DstPort 1 } Line { SrcBlock "5LSB+8" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Mux" SrcPort 1 Points [250, 0] Branch { Points [0, 135] DstBlock "Shared Memory" DstPort 1 } Branch { Points [0, -140] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "Rst" SrcPort 1 Points [490, 0] Branch { DstBlock "Register4" DstPort 2 } Branch { Points [0, 120] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "Shared Memory" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 Points [25, 0] Branch { DstBlock "Logical2" DstPort 2 } Branch { Points [0, 70] Branch { Points [0, 40] DstBlock "Inverter" DstPort 1 } Branch { DstBlock "Logical6" DstPort 2 } } } Line { SrcBlock "Convert5" SrcPort 1 Points [20, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, 270] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Gateway Out2" SrcPort 1 Points [105, 0] } Line { SrcBlock "Gateway Out3" SrcPort 1 Points [105, 0] } Line { SrcBlock "Gateway Out1" SrcPort 1 Points [105, 0] } Line { SrcBlock "Gateway Out4" SrcPort 1 Points [105, 0] } Line { SrcBlock "Gateway Out5" SrcPort 1 Points [105, 0] } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "Logical3" DstPort 3 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "Posedge" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Simulation Multiplexer1" DstPort 1 } Line { SrcBlock "Simulation Multiplexer1" SrcPort 1 Points [125, 0; 0, 450] DstBlock "Inverter2" DstPort 1 } Line { SrcBlock "Up Sample" SrcPort 1 DstBlock "Convert5" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Up Sample3" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Up Sample4" SrcPort 1 Points [50, 0] Branch { DstBlock "Mux" DstPort 1 } Branch { Points [0, -40] DstBlock "Simulation Multiplexer1" DstPort 2 } } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Tx_PhaseInc" DstPort 1 } Annotation { Name "If:\nUsePilots and UseCoarse, capture after pilots are valid\nUsePilots but NOT UseCoarse, capture after" " pilots are valid\nNOT UsePilots but UseCoarse, capture after coarse is valid\nIf neither, don't capture" Position [791, 757] } Annotation { Name "Safety check: never capture when Tx is running\n(shouldn't happen)" Position [1060, 585] } } } Block { BlockType Product Name "Product" SID "1136" Ports [2, 1] Position [925, 550, 945, 570] ShowName off InputSameDT off OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType RealImagToComplex Name "Real-Imag to\nComplex" SID "1137" Ports [2, 1] Position [870, 547, 890, 563] ShowName off Input "Real and imag" } Block { BlockType Outport Name "AntA I " SID "1138" Position [950, 173, 980, 187] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "AntA Q " SID "1139" Position [950, 203, 980, 217] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "AntB I " SID "1140" Position [955, 273, 985, 287] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "AntB Q " SID "1141" Position [955, 303, 985, 317] Port "4" IconDisplay "Port number" } Line { SrcBlock "A*B" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "A*B" SrcPort 2 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "A*B1" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "A*B1" SrcPort 2 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "DDS" SrcPort 1 Points [95, 0] Branch { Points [0, 85] Branch { Points [0, 220] DstBlock "Gateway Out" DstPort 1 } Branch { DstBlock "A*B1" DstPort 2 } } Branch { DstBlock "A*B" DstPort 3 } } Line { SrcBlock "DDS" SrcPort 2 Points [100, 0] Branch { Points [0, 40] Branch { Points [0, 215] DstBlock "Gateway Out1" DstPort 1 } Branch { DstBlock "A*B1" DstPort 1 } } Branch { Points [55, 0] DstBlock "A*B" DstPort 4 } } Line { SrcBlock "Gateway Out1" SrcPort 1 Points [15, 0] Branch { DstBlock "Mux2" DstPort 1 } Branch { Points [0, 65] DstBlock "Real-Imag to\nComplex" DstPort 1 } } Line { SrcBlock "Gateway Out" SrcPort 1 Points [10, 0] Branch { DstBlock "Mux2" DstPort 2 } Branch { Points [0, 55] DstBlock "Real-Imag to\nComplex" DstPort 2 } } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "CFO" DstPort 3 } Line { SrcBlock "Bus\nCreator1" SrcPort 1 DstBlock "CFO" DstPort 4 } Line { SrcBlock "From5" SrcPort 1 Points [25, 0] Branch { DstBlock "Complex to\nReal-Imag" DstPort 1 } Branch { Points [0, 35] DstBlock "Product" DstPort 2 } } Line { SrcBlock "Complex to\nReal-Imag" SrcPort 1 DstBlock "Bus\nCreator1" DstPort 1 } Line { SrcBlock "Complex to\nReal-Imag" SrcPort 2 DstBlock "Bus\nCreator1" DstPort 2 } Line { SrcBlock "Gateway Out2" SrcPort 1 DstBlock "CFO" DstPort 2 } Line { SrcBlock "Gateway Out3" SrcPort 1 DstBlock "CFO" DstPort 1 } Line { SrcBlock "AntB I" SrcPort 1 DstBlock "A*B1" DstPort 3 } Line { SrcBlock "AntB Q" SrcPort 1 DstBlock "A*B1" DstPort 4 } Line { SrcBlock "AntA I" SrcPort 1 Points [100, 0] Branch { Points [360, 0; 0, 85] DstBlock "A*B" DstPort 1 } Branch { Points [0, 105] DstBlock "Coarse CFO Calc" DstPort 1 } } Line { SrcBlock "AntA Q" SrcPort 1 Points [95, 0] Branch { Points [360, 0; 0, 85] DstBlock "A*B" DstPort 2 } Branch { Points [0, 105] DstBlock "Coarse CFO Calc" DstPort 2 } } Line { SrcBlock "Convert" SrcPort 1 DstBlock "AntA I " DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "AntA Q " DstPort 1 } Line { SrcBlock "Real-Imag to\nComplex" SrcPort 1 DstBlock "Product" DstPort 1 } Line { SrcBlock "Product" SrcPort 1 DstBlock "Complex to\nMagnitude-Angle" DstPort 1 } Line { SrcBlock "Complex to\nMagnitude-Angle" SrcPort 2 DstBlock "CFO" DstPort 5 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "AntB I " DstPort 1 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "AntB Q " DstPort 1 } Line { SrcBlock "Reset" SrcPort 1 Points [55, 0] Branch { DstBlock "Coarse CFO Calc" DstPort 4 } Branch { Points [0, 25; 160, 0; 0, -25] DstBlock "DDS" DstPort 3 } Branch { Labels [0, 0] Points [0, -85] DstBlock "PreSpin CFO Sel" DstPort 1 } } Line { SrcBlock "PktDet" SrcPort 1 Points [45, 0] Branch { Points [0, 240] DstBlock "Gateway Out2" DstPort 1 } Branch { DstBlock "Coarse CFO Calc" DstPort 3 } } Line { Labels [1, 0] SrcBlock "Coarse CFO Calc" SrcPort 1 Points [10, 0] Branch { Points [0, 70] Branch { Points [0, 140] DstBlock "Gateway Out3" DstPort 1 } Branch { DstBlock "Goto1" DstPort 1 } } Branch { DstBlock "DDS" DstPort 2 } } Line { SrcBlock "PreSpin CFO Sel" SrcPort 1 Points [45, 0; 0, 45] DstBlock "DDS" DstPort 1 } Annotation { Name "Potential for overflow pre-AGC\n(but not post? I think it's ok)\n|\nV" Position [878, 126] } } } Block { BlockType Display Name "Display" SID "9684" Ports [1] Position [690, 553, 770, 577] ShowName off Decimation "1" Lockdown off } Block { BlockType Display Name "Display1" SID "9685" Ports [1] Position [690, 578, 770, 602] ShowName off Decimation "1" Lockdown off } Block { BlockType Display Name "Display2" SID "9686" Ports [1] Position [690, 603, 770, 627] ShowName off Decimation "1" Lockdown off } Block { BlockType Product Name "Divide" SID "9687" Ports [2, 1] Position [610, 545, 640, 580] NamePlacement "alternate" ShowName off Inputs "*/" InputSameDT off OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType SubSystem Name "Equalizer & Packetizer" SID "1146" Ports [10, 1] Position [700, 288, 820, 382] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Equalizer & Packetizer" Location [2, 78, 1678, 1000] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "112" Block { BlockType Inport Name "Payload" SID "1147" Position [185, 518, 215, 532] IconDisplay "Port number" } Block { BlockType Inport Name "Y_I" SID "1148" Position [40, 363, 70, 377] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Y_Q" SID "1149" Position [40, 383, 70, 397] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "H-I" SID "1150" Position [110, 403, 140, 417] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "H-Q" SID "1151" Position [110, 423, 140, 437] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "SubCar Index" SID "1152" Position [75, 483, 105, 497] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Sym Index" SID "1153" Position [75, 463, 105, 477] NamePlacement "alternate" Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "1154" Position [15, 443, 45, 457] NamePlacement "alternate" Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "Phases I" SID "1155" Position [110, 323, 140, 337] NamePlacement "alternate" Port "9" IconDisplay "Port number" } Block { BlockType Inport Name "Phases Q" SID "1156" Position [110, 343, 140, 357] Port "10" IconDisplay "Port number" } Block { BlockType Reference Name "Convert4" SID "1157" Ports [1, 1] Position [650, 272, 685, 288] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert5" SID "1158" Ports [1, 1] Position [650, 291, 685, 309] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "Eq" SID "1159" Ports [7] Position [655, 594, 700, 706] NamePlacement "alternate" Floating off Location [6, 50, 1676, 1016] Open off NumInputPorts "7" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } YMin "-0.4~-0.4~0~0~27.5~0.95~-1" YMax "0.4~0.4~70~1~50~1.05~1" SaveName "ScopeData14" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "Equalizer" SID "1160" Ports [9, 5] Position [285, 321, 375, 499] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Equalizer" Location [-15, 74, 1018, 940] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "112" Block { BlockType Inport Name "Phases I" SID "1161" Position [85, 363, 115, 377] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Phases Q" SID "1162" Position [85, 398, 115, 412] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Y_I" SID "1163" Position [85, 423, 115, 437] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Y_Q" SID "1164" Position [85, 453, 115, 467] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "H-I" SID "1165" Position [85, 523, 115, 537] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "H-Q" SID "1166" Position [85, 583, 115, 597] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "1167" Position [30, 18, 60, 32] NamePlacement "alternate" Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "Sym Index" SID "1168" Position [30, 63, 60, 77] Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "SubCar Index" SID "1169" Position [25, 188, 55, 202] NamePlacement "alternate" Port "9" IconDisplay "Port number" } Block { BlockType Reference Name "1LSB1" SID "1170" Ports [1, 1] Position [175, 313, 210, 327] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Add1" SID "1171" Ports [2, 1] Position [635, 353, 680, 397] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Add2" SID "1172" Ports [2, 1] Position [635, 263, 680, 307] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Bus Selector" SID "1173" Ports [2, 8] Position [165, 498, 225, 617] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Bus Selector" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "H-I" SID "1174" Position [60, 223, 90, 237] IconDisplay "Port number" } Block { BlockType Inport Name "H-Q" SID "1175" Position [80, 563, 110, 577] Port "2" IconDisplay "Port number" } Block { BlockType BusSelector Name "Bus\nSelector" SID "1176" Ports [1, 4] Position [155, 107, 160, 353] ShowName off OutputSignals "signal1,signal2,signal3,signal4" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 2 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 3 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 4 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector1" SID "1177" Ports [1, 4] Position [155, 447, 160, 693] ShowName off OutputSignals "signal1,signal2,signal3,signal4" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 2 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 3 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 4 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Concat" SID "1178" Ports [2, 1] Position [355, 418, 390, 447] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1.3" sg_icon_stat "35,29,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 29 29 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','" "on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "1179" Ports [0, 1] Position [355, 329, 380, 351] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "1180" Ports [0, 1] Position [355, 209, 380, 231] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "1181" Ports [0, 1] Position [310, 329, 335, 351] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1/2" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,79c36af6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0.5');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "1182" Position [175, 416, 290, 434] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType From Name "From3" SID "1183" Position [175, 431, 290, 449] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_SISOmode" TagVisibility "global" } Block { BlockType Reference Name "Mux1" SID "1184" Ports [4, 1] Position [775, 286, 800, 374] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,88,4,1,white,blue,3,58b3489d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 12.5714 75.4286 88 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 12.5714 75.4286 88 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[47.33 47.33 50.33 47.33 50.33 50.33 50.33 47.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[44.33 44.33 47.33 47.33 44.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[41.33 41.33 " "44.33 44.33 41.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[38.33 38.33 41.33 38.33 41.33" " 41.33 38.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\n\ncolor('black');disp('\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "1185" Ports [4, 1] Position [775, 626, 800, 714] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,88,4,1,white,blue,3,58b3489d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 12.5714 75.4286 88 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 12.5714 75.4286 88 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[47.33 47.33 50.33 47.33 50.33 50.33 50.33 47.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[44.33 44.33 47.33 47.33 44.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[41.33 41.33 " "44.33 44.33 41.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[38.33 38.33 41.33 38.33 41.33" " 41.33 38.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\n\ncolor('black');disp('\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux3" SID "1186" Ports [4, 1] Position [775, 506, 800, 594] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,88,4,1,white,blue,3,58b3489d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 12.5714 75.4286 88 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 12.5714 75.4286 88 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[47.33 47.33 50.33 47.33 50.33 50.33 50.33 47.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[44.33 44.33 47.33 47.33 44.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[41.33 41.33 " "44.33 44.33 41.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[38.33 38.33 41.33 38.33 41.33" " 41.33 38.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\n\ncolor('black');disp('\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux6" SID "1187" Ports [4, 1] Position [775, 166, 800, 254] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,88,4,1,white,blue,3,58b3489d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 12.5714 75.4286 88 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 12.5714 75.4286 88 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[47.33 47.33 50.33 47.33 50.33 50.33 50.33 47.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[44.33 44.33 47.33 47.33 44.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[41.33 41.33 " "44.33 44.33 41.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[38.33 38.33 41.33 38.33 41.33" " 41.33 38.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\n\ncolor('black');disp('\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate1" SID "1188" Ports [1, 1] Position [660, 690, 695, 710] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate2" SID "1189" Ports [1, 1] Position [660, 570, 695, 590] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "AA_I" SID "1190" Position [875, 133, 905, 147] IconDisplay "Port number" } Block { BlockType Outport Name "AA_Q" SID "1191" Position [875, 473, 905, 487] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "BB_I" SID "1192" Position [875, 323, 905, 337] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "BB_Q" SID "1193" Position [875, 663, 905, 677] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "AB_I" SID "1194" Position [875, 203, 905, 217] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "AB_Q" SID "1195" Position [875, 543, 905, 557] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "BA_I" SID "1196" Position [875, 253, 905, 267] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "BA_Q" SID "1197" Position [875, 593, 905, 607] Port "8" IconDisplay "Port number" } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector" SrcPort 1 Points [360, 0] Branch { DstBlock "AA_I" DstPort 1 } Branch { Points [0, 220] DstBlock "Mux1" DstPort 4 } } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector" SrcPort 4 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "H-I" SrcPort 1 DstBlock "Bus\nSelector" DstPort 1 } Line { SrcBlock "H-Q" SrcPort 1 DstBlock "Bus\nSelector1" DstPort 1 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector" SrcPort 3 Points [370, 0] Branch { DstBlock "BA_I" DstPort 1 } Branch { Points [0, -20] DstBlock "Mux6" DstPort 4 } } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector" SrcPort 2 DstBlock "Mux6" DstPort 2 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "BB_I" DstPort 1 } Line { SrcBlock "Concat" SrcPort 1 Points [75, 0] Branch { Points [0, -135] Branch { DstBlock "Mux1" DstPort 1 } Branch { Points [0, -120] DstBlock "Mux6" DstPort 1 } } Branch { Points [0, 85] Branch { Points [0, 120] DstBlock "Mux2" DstPort 1 } Branch { DstBlock "Mux3" DstPort 1 } } } Line { SrcBlock "From1" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [120, 0] Branch { DstBlock "Mux1" DstPort 3 } Branch { Points [0, 340; -5, 0] } } Line { SrcBlock "Mux6" SrcPort 1 DstBlock "AB_I" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 Points [130, 0] Branch { DstBlock "Mux6" DstPort 3 } Branch { Points [0, 340] Branch { DstBlock "Mux3" DstPort 3 } Branch { Points [0, 120] DstBlock "Mux2" DstPort 3 } } } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector1" SrcPort 1 Points [360, 0] Branch { DstBlock "AA_Q" DstPort 1 } Branch { Points [0, 220] DstBlock "Negate1" DstPort 1 } } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector1" SrcPort 2 DstBlock "Mux3" DstPort 2 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector1" SrcPort 3 Points [375, 0] Branch { DstBlock "BA_Q" DstPort 1 } Branch { Points [0, -20] DstBlock "Negate2" DstPort 1 } } Line { SrcBlock "Mux3" SrcPort 1 DstBlock "AB_Q" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "BB_Q" DstPort 1 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector1" SrcPort 4 DstBlock "Mux2" DstPort 2 } Line { SrcBlock "Negate2" SrcPort 1 DstBlock "Mux3" DstPort 4 } Line { SrcBlock "Negate1" SrcPort 1 DstBlock "Mux2" DstPort 4 } } } Block { BlockType SubSystem Name "Bus Selector1" SID "1198" Ports [2, 4] Position [145, 411, 205, 474] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Bus Selector1" Location [187, 530, 352, 707] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Y_I" SID "1199" Position [285, 148, 315, 162] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Y_Q" SID "1200" Position [285, 223, 315, 237] Port "2" IconDisplay "Port number" } Block { BlockType BusSelector Name "Bus\nSelector1" SID "1201" Ports [1, 2] Position [365, 125, 370, 185] ShowName off OutputSignals "signal1,signal2" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 2 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector2" SID "1202" Ports [1, 2] Position [365, 200, 370, 260] ShowName off OutputSignals "signal1,signal2" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 2 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Outport Name "YA_I" SID "1203" Position [450, 163, 480, 177] IconDisplay "Port number" } Block { BlockType Outport Name "YA_Q" SID "1204" Position [450, 238, 480, 252] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "YB_I" SID "1205" Position [450, 133, 480, 147] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "YB_Q" SID "1206" Position [450, 208, 480, 222] Port "4" IconDisplay "Port number" } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector1" SrcPort 1 DstBlock "YB_I" DstPort 1 } Line { SrcBlock "Y_I" SrcPort 1 DstBlock "Bus\nSelector1" DstPort 1 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector1" SrcPort 2 DstBlock "YA_I" DstPort 1 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector2" SrcPort 1 DstBlock "YB_Q" DstPort 1 } Line { SrcBlock "Y_Q" SrcPort 1 Points [0, 0] DstBlock "Bus\nSelector2" DstPort 1 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector2" SrcPort 2 DstBlock "YA_Q" DstPort 1 } } } Block { BlockType SubSystem Name "Complex Divider" SID "1207" Ports [4, 2] Position [870, 470, 945, 605] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Complex Divider" Location [202, 70, 1678, 1002] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "148" Block { BlockType Inport Name "Re[A]" SID "1208" Position [80, 363, 110, 377] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[A]" SID "1209" Position [80, 373, 110, 387] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Re[B]" SID "1210" Position [80, 423, 110, 437] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Im[B]" SID "1211" Position [80, 438, 110, 452] Port "4" IconDisplay "Port number" } Block { BlockType SubSystem Name "ComplexConjMult_x2" SID "1212" Ports [4, 2] Position [240, 365, 305, 405] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ComplexConjMult_x2" Location [202, 70, 1678, 1002] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[A]" SID "1213" Position [55, 528, 85, 542] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[A]" SID "1214" Position [55, 553, 85, 567] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Re[B]" SID "1215" Position [55, 613, 85, 627] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Im[B]" SID "1216" Position [55, 638, 85, 652] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Add1" SID "1217" Ports [2, 1] Position [560, 713, 605, 757] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "22" bin_pt "20" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Add2" SID "1218" Ports [2, 1] Position [565, 533, 610, 577] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "22" bin_pt "20" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "1219" Ports [0, 1] Position [104, 400, 156, 450] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "4" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "1" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "52,50,0,1,white,blue,0,7ac47ef5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 52 52 0 0 ],[0 0 50 50 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 52 52 0 0 ],[0 0 50 50 0 ]);\npatch([10.425 20.54 27.54 34.54 41.54 27.54 17.425 10.425 ],[32" ".77 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([17.425 27.54 20.54 10.425 17.425 ],[25.77 25." "77 32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([10.425 20.54 27.54 17.425 10.425 ],[18.77 18.77 25.77 25.7" "7 18.77 ],[1 1 1 ]);\npatch([17.425 41.54 34.54 27.54 20.54 10.425 17.425 ],[11.77 11.77 18.77 11.77 18.77 18.77" " 11.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "1220" Ports [1, 1] Position [470, 554, 500, 576] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "1221" Ports [1, 1] Position [495, 734, 525, 756] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "1222" Ports [1, 1] Position [755, 717, 790, 753] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "1223" Ports [1, 1] Position [760, 537, 795, 573] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult1" SID "1224" Ports [2, 1] Position [395, 523, 440, 567] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "22" bin_pt "20" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult2" SID "1225" Ports [2, 1] Position [400, 703, 445, 747] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "22" bin_pt "20" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "1226" Ports [3, 1] Position [305, 579, 340, 661] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux3" SID "1227" Ports [3, 1] Position [305, 494, 340, 576] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux4" SID "1228" Ports [3, 1] Position [305, 759, 340, 841] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux5" SID "1229" Ports [3, 1] Position [305, 674, 340, 756] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Negate2" SID "1230" Ports [1, 1] Position [205, 540, 245, 580] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate3" SID "1231" Ports [1, 1] Position [200, 625, 240, 665] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample5" SID "1232" Ports [1, 1] Position [135, 549, 170, 571] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample6" SID "1233" Ports [1, 1] Position [135, 634, 170, 656] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample7" SID "1234" Ports [1, 1] Position [135, 524, 170, 546] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample8" SID "1235" Ports [1, 1] Position [135, 609, 170, 631] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Re" SID "1236" Position [880, 548, 910, 562] IconDisplay "Port number" } Block { BlockType Outport Name "Im1" SID "1237" Position [880, 728, 910, 742] Port "2" IconDisplay "Port number" } Line { SrcBlock "Counter1" SrcPort 1 Points [0, 30; 140, 0; 0, 25] Branch { Points [0, 0] DstBlock "Mux3" DstPort 1 } Branch { Points [0, 85] Branch { DstBlock "Mux2" DstPort 1 } Branch { Points [0, 95] Branch { DstBlock "Mux5" DstPort 1 } Branch { Points [0, 85] DstBlock "Mux4" DstPort 1 } } } } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Add2" DstPort 2 } Line { SrcBlock "Mult1" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Add2" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay3" DstPort 1 } } Line { SrcBlock "Up Sample5" SrcPort 1 Points [10, 0] Branch { DstBlock "Negate2" DstPort 1 } Branch { Points [0, 180] DstBlock "Mux5" DstPort 3 } } Line { SrcBlock "Up Sample6" SrcPort 1 DstBlock "Negate3" DstPort 1 } Line { SrcBlock "Mux3" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 Points [35, 0] DstBlock "Mult1" DstPort 2 } Line { SrcBlock "Mux5" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Mux4" SrcPort 1 Points [25, 0; 0, -65] DstBlock "Mult2" DstPort 2 } Line { SrcBlock "Up Sample7" SrcPort 1 Points [110, 0] Branch { DstBlock "Mux3" DstPort 2 } Branch { Points [0, 180] DstBlock "Mux5" DstPort 2 } } Line { SrcBlock "Up Sample8" SrcPort 1 Points [5, 0] Branch { DstBlock "Mux2" DstPort 2 } Branch { Points [0, 205] DstBlock "Mux4" DstPort 3 } } Line { SrcBlock "Re[A]" SrcPort 1 DstBlock "Up Sample7" DstPort 1 } Line { SrcBlock "Im[A]" SrcPort 1 DstBlock "Up Sample5" DstPort 1 } Line { SrcBlock "Re[B]" SrcPort 1 DstBlock "Up Sample8" DstPort 1 } Line { SrcBlock "Im[B]" SrcPort 1 DstBlock "Up Sample6" DstPort 1 } Line { SrcBlock "Negate2" SrcPort 1 DstBlock "Mux3" DstPort 3 } Line { SrcBlock "Negate3" SrcPort 1 Points [35, 0] Branch { DstBlock "Mux2" DstPort 3 } Branch { Points [0, 155] DstBlock "Mux4" DstPort 2 } } Line { SrcBlock "Mult2" SrcPort 1 Points [25, 0] Branch { Points [0, 20] DstBlock "Delay5" DstPort 1 } Branch { DstBlock "Add1" DstPort 1 } } Line { SrcBlock "Delay5" SrcPort 1 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Add1" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Add2" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Re" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Im1" DstPort 1 } } } Block { BlockType Reference Name "Convert" SID "1238" Ports [1, 1] Position [660, 376, 695, 394] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "17" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "1239" Ports [1, 1] Position [660, 416, 695, 434] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "17" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,375" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "1240" Ports [1, 1] Position [255, 404, 295, 426] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "1241" Ports [1, 1] Position [255, 424, 295, 446] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Division" SID "1242" Ports [4, 2] Position [515, 364, 590, 446] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Division" Location [202, 70, 1678, 1002] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "132" Block { BlockType Inport Name "Re[CP]" SID "1243" Position [15, 388, 45, 402] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[CP]" SID "1244" Position [15, 418, 45, 432] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Re[B]" SID "1245" Position [15, 208, 45, 222] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Im[B]" SID "1246" Position [15, 238, 45, 252] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Add2" SID "1247" Ports [2, 1] Position [585, 213, 630, 257] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "21" bin_pt "19" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "CORDIC DIVIDER" SID "1248" Ports [2, 1] Position [775, 209, 855, 316] CopyFcn "set_param(gcb, 'MaskSelfModifiable', 'on', 'LinkStatus', 'none');" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Xilinx CORDIC Divider" MaskDescription "This design implements a divider circuit using a fully parallel CORDIC (COordinate Rotatio" "n DIgital Computer) algorithm in linear vectoring mode with pre and post compensation. Using pre and post compen" "sation techniques, this design can compute any arbitrary ratio y/x. " MaskHelp "eval('');xlDoc('-book','sysgen','-topic','CORDIC_DIVIDER');" MaskPromptString "Number of Processing Elements (integer value starting from 1)|X, Y, Data Width|X,Y Binary " "Point Position|Latency for each Processing Element [1 0 0 1]|Previous Number of Stages|Previous Pipeline Value|P" "revious Number of Bits" MaskStyleString "edit,edit,edit,edit,edit,edit,edit" MaskVariables "stages=@1;num_width=@2;num_binpt=@3;pipeline_x=@4;prev_stages=@5;pipeline=@6;prev_bits=@7;" MaskTunableValueString "on,on,on,on,on,on,on" MaskCallbackString "||||||" MaskEnableString "on,on,on,on,on,on,on" MaskVisibilityString "on,on,on,on,off,off,off" MaskToolTipString "on,on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\nsav_gcb=gcb;\nstages =" " round(sum(abs(stages)));\nif (stages == 0)\n stages = prev_stages;\nend\nx = zeros(1,stages);\npipe_size = max(" "size(pipeline_x));\nif pipe_size >= stages\n x(1,1:stages) = pipeline_x(1,1:stages);\nelse\n x(1,1:pipe_size) = " "pipeline_x(1,1:pipe_size);\nend\n\nnum_width = round(sum(abs(num_width)));\nif (num_width < 2)\n num_width = pre" "v_bits;\nend\n\nif ((num_width-1) ~=prev_bits)\n % Draw the Normalization X Stage\n norm_x = find_system(s" "av_gcb, 'lookUnderMasks', 'all', 'FollowLinks','on','masktype', 'Normalize X');\n a=find_system(norm_x{1}, 'look" "UnderMasks', 'all', 'FollowLinks','on','masktype', 'Normalize Shift Stage');\n for i= 2:length(a)\n for j=1:3\n" " delete_line(norm_x{1}, ['Shift' int2str(i-1) '/' int2str(j)], ['Shift' int2str(i) '/' int2str(j)]);\n end" "\n end\n delete_line(norm_x{1}, ['Shift' int2str(length(a)) '/1'],'norm/1');\n delete_line(norm_x{1}, ['Shift' i" "nt2str(length(a)) '/2'],'shift/1');\n delete_line(norm_x{1}, ['Shift' int2str(length(a)) '/3'],'Terminator1/1');" "\n \n for i=2:length(a)\n delete_block(a{i});\n end\n for i=2:(num_width-1),\n add_block([norm_x{1} " "'/Shift1'], [norm_x{1} '/Shift' int2str(i)],'position',[150+(i-1)*125, 70, 205+(i-1)*125, 130]);\n end\n set_" "param([norm_x{1} '/' 'norm'], 'Position', [150+i*125, 72, 180+i*125, 86]);\n set_param([norm_x{1} '/' 'shift'" "], 'Position', [210+i*125, 92, 225+i*125, 108]);\n set_param([norm_x{1} '/' 'Terminator1'], 'Position', [240+" "i*125, 113, 270+i*125, 127]);\n for i= 2:(num_width-1)\n for j=1:3\n add_line(norm_x{1}, ['Shift' int2s" "tr(i-1) '/' int2str(j)], ['Shift' int2str(i) '/' int2str(j)]);\n end\n end\n add_line(norm_x{1}, ['Shift' in" "t2str((num_width-1)) '/1'],'norm/1');\n add_line(norm_x{1}, ['Shift' int2str((num_width-1)) '/2'],'shift/1');\n " "add_line(norm_x{1}, ['Shift' int2str((num_width-1)) '/3'],'Terminator1/1');\n \n % Draw the Normalization " "Y Stage\n norm_y = find_system(sav_gcb, 'lookUnderMasks', 'all', 'FollowLinks','on','masktype', 'Normalize Y'" ");\n a=find_system(norm_y{1}, 'lookUnderMasks', 'all', 'FollowLinks','on','masktype', 'Normalize Shift Stage');\n" " for i= 2:length(a)\n for j=1:3\n delete_line(norm_y{1}, ['Shift' int2str(i-1) '/' int2str(j)], ['Shift' i" "nt2str(i) '/' int2str(j)]);\n end\n end\n delete_line(norm_y{1}, ['Shift' int2str(length(a)) '/1'],'norm/1');\n" " delete_line(norm_y{1}, ['Shift' int2str(length(a)) '/2'],'shift/1');\n delete_line(norm_y{1}, ['Shift' int2str(" "length(a)) '/3'],'Terminator1/1');\n \n for i=2:length(a)\n delete_block(a{i});\n end\n for i=2:(num_width-" "1)\n add_block([norm_y{1} '/Shift1'], [norm_y{1} '/Shift' int2str(i)],'position',[150+(i-1)*125, 70, 205+" "(i-1)*125, 130]);\n end\n set_param([norm_y{1} '/' 'norm'], 'Position', [150+i*125, 72, 180+i*125, 86]);\n " " set_param([norm_y{1} '/' 'shift'], 'Position', [210+i*125, 92, 225+i*125, 108]);\n set_param([norm_y{1} '/' " "'Terminator1'], 'Position', [240+i*125, 113, 270+i*125, 127]);\n for i= 2:(num_width-1)\n for j=1:3\n a" "dd_line(norm_y{1}, ['Shift' int2str(i-1) '/' int2str(j)], ['Shift' int2str(i) '/' int2str(j)]);\n end\n end\n " " add_line(norm_y{1}, ['Shift' int2str((num_width-1)) '/1'],'norm/1');\n add_line(norm_y{1}, ['Shift' int2str((n" "um_width-1)) '/2'],'shift/1');\n add_line(norm_y{1}, ['Shift' int2str((num_width-1)) '/3'],'Terminator1/1');\n f" "ind_system(sav_gcb, 'lookUnderMasks', 'all', 'FollowLinks', 'on', 'MaskType','Xilinx Multiplexer Block');\n set_" "param(sav_gcb, 'prev_bits',int2str((num_width-1)));\nend\nif (stages ~=prev_stages)\n pipeline=x;\n iterative" "_divider = find_system(sav_gcb, 'lookUnderMasks', 'all', 'FollowLinks','on','masktype', 'CORDIC Iterative Divide" "r');\n a=find_system(iterative_divider{1}, 'lookUnderMasks', 'all', 'FollowLinks','on','masktype', 'CORDIC iter" "ation Divider');\n for i= 2:length(a)\n for j=1:3\n delete_line(iterative_divider{1}, ['CORDIC PE' int2str" "(i-1) '/' int2str(j)], ['CORDIC PE' int2str(i) '/' int2str(j)]);\n end\n end\n delete_line(iterative_divide" "r{1}, ['CORDIC PE' int2str(length(a)) '/1'],'Terminator1/1');\n delete_line(iterative_divider{1}, ['CORDIC PE' " "int2str(length(a)) '/2'],'Terminator2/1');\n delete_line(iterative_divider{1}, ['CORDIC PE' int2str(length(a)) " "'/3'],'Z/1');\n for i=2:length(a)\n delete_block(a{i});\n end\n for i=2:stages,\n add_block([iterati" "ve_divider{1} '/CORDIC PE1'], [iterative_divider{1} '/CORDIC PE' int2str(i)], 'ii', int2str(i-1),'pipeline',['pi" "peline(1,' int2str(i) ')'],'position',[150+(i-1)*125, 70, 205+(i-1)*125, 130]);\n end\n for i= 2:stages,\n " " for j=1:3\n add_line(iterative_divider{1}, ['CORDIC PE' int2str(i-1) '/' int2str(j)], ['CORDIC PE' int2str" "(i) '/' int2str(j)], 'autorouting', 'on');\n end\n end\n set_param([iterative_divider{1} '/' 'Terminator1'" "], 'Position', [150+stages*125, 72, 180+stages*125, 86]);\n set_param([iterative_divider{1} '/' 'Terminator2']," " 'Position', [210+stages*125, 92, 225+stages*125, 108]);\n set_param([iterative_divider{1} '/' 'Z'], 'Position'" ", [240+stages*125, 113, 270+stages*125, 127]);\n\n add_line(iterative_divider{1}, ['CORDIC PE' int2str(stages) " "'/1'], 'Terminator1/1', 'autorouting', 'on');\n add_line(iterative_divider{1}, ['CORDIC PE' int2str(stages) '/2" "'], 'Terminator2/1', 'autorouting', 'on');\n add_line(iterative_divider{1}, ['CORDIC PE' int2str(stages) '/3']," "'Z/1', 'autorouting', 'on');\n % force a \"compile\" of the constituent constant blocks to\n % workaround a " "data propagation problem\n find_system(iterative_divider{1}, 'lookUnderMasks', 'all', 'FollowLinks', 'on', 'Ma" "skType','Xilinx Constant Block');\n set_param(sav_gcb, 'prev_stages', int2str(stages));\n set_param(sav_gcb," " 'pipeline', [ '[' int2str(x) ']']);\nelse\n if (sum(pipeline~=x))\n set_param(sav_gcb, 'pipeline', [ '[' int2s" "tr(x) ']']);\n end\nend\n\nstr = sprintf('-%d',sum(x) + num_width + 4);" MaskSelfModifiable on MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\ntext(iCx-6,i" "Cy,'z');\ntext(iCx,iCy+4,str);\nport_label('input',1,'x');\nport_label('input',2,'y');\nport_label('output',1,'y" "/x');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque off MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "14|21|19|[1 1 1 1 1 1 1 1 1 1 1 1 1 1]|14|[1 1 1 1 1 1 1 1 1 1 1 1 1 1]|20" System { Name "CORDIC DIVIDER" Location [589, 139, 1302, 634] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" SIDHighWatermark "51" Block { BlockType Inport Name "x" SID "1248:1" Position [15, 68, 45, 82] IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:2" Position [20, 153, 50, 167] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant2" SID "1248:3" Ports [0, 1] Position [205, 111, 230, 129] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "1248:4" Ports [1, 1] Position [380, 131, 425, 149] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Delay line having configurable length.

Hardware notes: A delay line is a chain, each link o" "f which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-" "flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "sum(pipeline)" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,18,1,1,white,blue,0,b993dfc9,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-14}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "1248:5" Ports [1, 1] Position [385, 176, 430, 194] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Delay line having configurable length.

Hardware notes: A delay line is a chain, each link o" "f which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-" "flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "sum(pipeline)" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,18,1,1,white,blue,0,b993dfc9,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-14}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Iterative Divider" SID "1248:6" Ports [3, 1] Position [270, 56, 345, 134] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC Iterative Divider" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskSelfModifiable on MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'Z');\nplot([0 0 i" "Width iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Iterative Divider" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" SIDHighWatermark "202" Block { BlockType Inport Name "x" SID "1248:6:1" Position [15, 73, 45, 87] IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:6:2" Position [40, 93, 70, 107] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "1248:6:3" Position [70, 113, 100, 127] Port "3" IconDisplay "Port number" } Block { BlockType SubSystem Name "CORDIC PE1" SID "1248:6:4" Ports [3, 3] Position [130, 70, 185, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration Divider" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Pipeline Latency|stages" MaskStyleString "edit,edit,edit,edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;pipeline=@4;stages=@5;" MaskTunableValueString "on,on,on,on,on" MaskCallbackString "||||" MaskEnableString "on,on,on,on,on" MaskVisibilityString "on,on,on,on,on" MaskToolTipString "on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "0|num_width|num_binpt|pipeline(1,1)|stages" System { Name "CORDIC PE1" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "1248:6:5" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:6:6" Position [45, 98, 75, 112] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "1248:6:7" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "1248:6:8" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "1248:6:9" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "1248:6:10" Ports [0, 1] Position [160, 235, 240, 255] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^-ii" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "80,20,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 20 20 0 ]);\npatch([35.55 38.44 40.44 42.44 44.44 40.44 37.55 35.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([37.55 40.44 38.44 35.55 37.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([35.55 38.44 40.44 37.55 35.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([37.55 44.44 42.44 40.44 38.44 35.55 37.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('output',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:6:11" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "1248:6:12" Ports [1, 1] Position [450, 55, 490, 95] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:6:13" Ports [1, 1] Position [345, 158, 390, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,f61b5d0e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 0}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:6:14" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "1248:6:15" Position [570, 68, 600, 82] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "1248:6:16" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "1248:6:17" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [115, 0; 0, 125] DstBlock "AddSub2" DstPort 3 } } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 Points [160, 0] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [45, 0] Branch { Points [0, 30] DstBlock "Slice" DstPort 1 } Branch { Points [150, 0; 0, 45] DstBlock "AddSub1" DstPort 1 } } Line { SrcBlock "x" SrcPort 1 Points [220, 0; 0, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Register" SrcPort 1 DstBlock "X" DstPort 1 } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE10" SID "1248:6:18" Ports [3, 3] Position [1275, 70, 1330, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration Divider" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Pipeline Latency|stages" MaskStyleString "edit,edit,edit,edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;pipeline=@4;stages=@5;" MaskTunableValueString "on,on,on,on,on" MaskCallbackString "||||" MaskEnableString "on,on,on,on,on" MaskVisibilityString "on,on,on,on,on" MaskToolTipString "on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "9|num_width|num_binpt|pipeline(1,10)|stages" System { Name "CORDIC PE10" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "1248:6:19" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:6:20" Position [45, 98, 75, 112] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "1248:6:21" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "1248:6:22" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "1248:6:23" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "1248:6:24" Ports [0, 1] Position [160, 235, 240, 255] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^-ii" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "80,20,0,1,white,blue,0,2ab4629b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 20 20 0 ]);\npatch([35.55 38.44 40.44 42.44 44.44 40.44 37.55 35.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([37.55 40.44 38.44 35.55 37.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([35.55 38.44 40.44 37.55 35.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([37.55 44.44 42.44 40.44 38.44 35.55 37.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('output',1,'0.001953125');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:6:25" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "1248:6:26" Ports [1, 1] Position [450, 55, 490, 95] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:6:27" Ports [1, 1] Position [345, 158, 390, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,7a8acb92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 9}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:6:28" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "1248:6:29" Position [570, 68, 600, 82] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "1248:6:30" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "1248:6:31" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "x" SrcPort 1 Points [220, 0; 0, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [45, 0] Branch { Points [150, 0; 0, 45] DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 30] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [160, 0] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0; 0, 125] DstBlock "AddSub2" DstPort 3 } Branch { DstBlock "Inverter" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE11" SID "1248:6:32" Ports [3, 3] Position [1400, 70, 1455, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration Divider" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Pipeline Latency|stages" MaskStyleString "edit,edit,edit,edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;pipeline=@4;stages=@5;" MaskTunableValueString "on,on,on,on,on" MaskCallbackString "||||" MaskEnableString "on,on,on,on,on" MaskVisibilityString "on,on,on,on,on" MaskToolTipString "on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "10|num_width|num_binpt|pipeline(1,11)|stages" System { Name "CORDIC PE11" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "1248:6:33" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:6:34" Position [45, 98, 75, 112] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "1248:6:35" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "1248:6:36" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "1248:6:37" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "1248:6:38" Ports [0, 1] Position [160, 235, 240, 255] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^-ii" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "80,20,0,1,white,blue,0,4c089691,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 20 20 0 ]);\npatch([35.55 38.44 40.44 42.44 44.44 40.44 37.55 35.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([37.55 40.44 38.44 35.55 37.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([35.55 38.44 40.44 37.55 35.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([37.55 44.44 42.44 40.44 38.44 35.55 37.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('output',1,'0.0009765625');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:6:39" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "1248:6:40" Ports [1, 1] Position [450, 55, 490, 95] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:6:41" Ports [1, 1] Position [345, 158, 390, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,153141b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 10}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:6:42" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "1248:6:43" Position [570, 68, 600, 82] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "1248:6:44" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "1248:6:45" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "x" SrcPort 1 Points [220, 0; 0, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [45, 0] Branch { Points [150, 0; 0, 45] DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 30] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [160, 0] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0; 0, 125] DstBlock "AddSub2" DstPort 3 } Branch { DstBlock "Inverter" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE12" SID "1248:6:46" Ports [3, 3] Position [1525, 70, 1580, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration Divider" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Pipeline Latency|stages" MaskStyleString "edit,edit,edit,edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;pipeline=@4;stages=@5;" MaskTunableValueString "on,on,on,on,on" MaskCallbackString "||||" MaskEnableString "on,on,on,on,on" MaskVisibilityString "on,on,on,on,on" MaskToolTipString "on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "11|num_width|num_binpt|pipeline(1,12)|stages" System { Name "CORDIC PE12" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "1248:6:47" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:6:48" Position [45, 98, 75, 112] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "1248:6:49" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "1248:6:50" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "1248:6:51" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "1248:6:52" Ports [0, 1] Position [160, 235, 240, 255] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^-ii" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "80,20,0,1,white,blue,0,6ce4429f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 20 20 0 ]);\npatch([35.55 38.44 40.44 42.44 44.44 40.44 37.55 35.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([37.55 40.44 38.44 35.55 37.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([35.55 38.44 40.44 37.55 35.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([37.55 44.44 42.44 40.44 38.44 35.55 37.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('output',1,'0.00048828125');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:6:53" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "1248:6:54" Ports [1, 1] Position [450, 55, 490, 95] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:6:55" Ports [1, 1] Position [345, 158, 390, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,5d31f610,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 11}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:6:56" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "1248:6:57" Position [570, 68, 600, 82] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "1248:6:58" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "1248:6:59" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "x" SrcPort 1 Points [220, 0; 0, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [45, 0] Branch { Points [150, 0; 0, 45] DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 30] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [160, 0] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0; 0, 125] DstBlock "AddSub2" DstPort 3 } Branch { DstBlock "Inverter" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE13" SID "1248:6:60" Ports [3, 3] Position [1650, 70, 1705, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration Divider" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Pipeline Latency|stages" MaskStyleString "edit,edit,edit,edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;pipeline=@4;stages=@5;" MaskTunableValueString "on,on,on,on,on" MaskCallbackString "||||" MaskEnableString "on,on,on,on,on" MaskVisibilityString "on,on,on,on,on" MaskToolTipString "on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "12|num_width|num_binpt|pipeline(1,13)|stages" System { Name "CORDIC PE13" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "1248:6:61" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:6:62" Position [45, 98, 75, 112] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "1248:6:63" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "1248:6:64" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "1248:6:65" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "1248:6:66" Ports [0, 1] Position [160, 235, 240, 255] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^-ii" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "80,20,0,1,white,blue,0,747054a4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 20 20 0 ]);\npatch([35.55 38.44 40.44 42.44 44.44 40.44 37.55 35.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([37.55 40.44 38.44 35.55 37.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([35.55 38.44 40.44 37.55 35.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([37.55 44.44 42.44 40.44 38.44 35.55 37.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('output',1,'0.000244140625');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:6:67" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "1248:6:68" Ports [1, 1] Position [450, 55, 490, 95] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:6:69" Ports [1, 1] Position [345, 158, 390, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,04b1d21b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 12}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:6:70" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "1248:6:71" Position [570, 68, 600, 82] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "1248:6:72" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "1248:6:73" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "x" SrcPort 1 Points [220, 0; 0, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [45, 0] Branch { Points [150, 0; 0, 45] DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 30] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [160, 0] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0; 0, 125] DstBlock "AddSub2" DstPort 3 } Branch { DstBlock "Inverter" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE14" SID "1248:6:74" Ports [3, 3] Position [1775, 70, 1830, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration Divider" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Pipeline Latency|stages" MaskStyleString "edit,edit,edit,edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;pipeline=@4;stages=@5;" MaskTunableValueString "on,on,on,on,on" MaskCallbackString "||||" MaskEnableString "on,on,on,on,on" MaskVisibilityString "on,on,on,on,on" MaskToolTipString "on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "13|num_width|num_binpt|pipeline(1,14)|stages" System { Name "CORDIC PE14" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "1248:6:75" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:6:76" Position [45, 98, 75, 112] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "1248:6:77" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "1248:6:78" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "1248:6:79" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "1248:6:80" Ports [0, 1] Position [160, 235, 240, 255] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^-ii" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "80,20,0,1,white,blue,0,631ce90a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 20 20 0 ]);\npatch([35.55 38.44 40.44 42.44 44.44 40.44 37.55 35.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([37.55 40.44 38.44 35.55 37.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([35.55 38.44 40.44 37.55 35.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([37.55 44.44 42.44 40.44 38.44 35.55 37.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('output',1,'0.0001220703125');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:6:81" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "1248:6:82" Ports [1, 1] Position [450, 55, 490, 95] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:6:83" Ports [1, 1] Position [345, 158, 390, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,829e9304,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 13}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:6:84" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "1248:6:85" Position [570, 68, 600, 82] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "1248:6:86" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "1248:6:87" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "x" SrcPort 1 Points [220, 0; 0, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [45, 0] Branch { Points [150, 0; 0, 45] DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 30] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [160, 0] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0; 0, 125] DstBlock "AddSub2" DstPort 3 } Branch { DstBlock "Inverter" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE2" SID "1248:6:88" Ports [3, 3] Position [275, 70, 330, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration Divider" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Pipeline Latency|stages" MaskStyleString "edit,edit,edit,edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;pipeline=@4;stages=@5;" MaskTunableValueString "on,on,on,on,on" MaskCallbackString "||||" MaskEnableString "on,on,on,on,on" MaskVisibilityString "on,on,on,on,on" MaskToolTipString "on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "1|num_width|num_binpt|pipeline(1,2)|stages" System { Name "CORDIC PE2" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "1248:6:89" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:6:90" Position [45, 98, 75, 112] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "1248:6:91" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "1248:6:92" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "1248:6:93" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "1248:6:94" Ports [0, 1] Position [160, 235, 240, 255] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^-ii" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "80,20,0,1,white,blue,0,79c36af6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 20 20 0 ]);\npatch([35.55 38.44 40.44 42.44 44.44 40.44 37.55 35.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([37.55 40.44 38.44 35.55 37.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([35.55 38.44 40.44 37.55 35.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([37.55 44.44 42.44 40.44 38.44 35.55 37.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('output',1,'0.5');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:6:95" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "1248:6:96" Ports [1, 1] Position [450, 55, 490, 95] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:6:97" Ports [1, 1] Position [345, 158, 390, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,77cd8d92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:6:98" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "1248:6:99" Position [570, 68, 600, 82] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "1248:6:100" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "1248:6:101" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "x" SrcPort 1 Points [220, 0; 0, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [45, 0] Branch { Points [150, 0; 0, 45] DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 30] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [160, 0] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0; 0, 125] DstBlock "AddSub2" DstPort 3 } Branch { DstBlock "Inverter" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE3" SID "1248:6:102" Ports [3, 3] Position [400, 70, 455, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration Divider" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Pipeline Latency|stages" MaskStyleString "edit,edit,edit,edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;pipeline=@4;stages=@5;" MaskTunableValueString "on,on,on,on,on" MaskCallbackString "||||" MaskEnableString "on,on,on,on,on" MaskVisibilityString "on,on,on,on,on" MaskToolTipString "on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "2|num_width|num_binpt|pipeline(1,3)|stages" System { Name "CORDIC PE3" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "1248:6:103" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:6:104" Position [45, 98, 75, 112] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "1248:6:105" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "1248:6:106" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "1248:6:107" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "1248:6:108" Ports [0, 1] Position [160, 235, 240, 255] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^-ii" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "80,20,0,1,white,blue,0,e9bd18fb,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 20 20 0 ]);\npatch([35.55 38.44 40.44 42.44 44.44 40.44 37.55 35.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([37.55 40.44 38.44 35.55 37.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([35.55 38.44 40.44 37.55 35.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([37.55 44.44 42.44 40.44 38.44 35.55 37.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('output',1,'0.25');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:6:109" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "1248:6:110" Ports [1, 1] Position [450, 55, 490, 95] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:6:111" Ports [1, 1] Position [345, 158, 390, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,b3ac20f4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:6:112" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "1248:6:113" Position [570, 68, 600, 82] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "1248:6:114" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "1248:6:115" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "x" SrcPort 1 Points [220, 0; 0, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [45, 0] Branch { Points [150, 0; 0, 45] DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 30] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [160, 0] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0; 0, 125] DstBlock "AddSub2" DstPort 3 } Branch { DstBlock "Inverter" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE4" SID "1248:6:116" Ports [3, 3] Position [525, 70, 580, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration Divider" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Pipeline Latency|stages" MaskStyleString "edit,edit,edit,edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;pipeline=@4;stages=@5;" MaskTunableValueString "on,on,on,on,on" MaskCallbackString "||||" MaskEnableString "on,on,on,on,on" MaskVisibilityString "on,on,on,on,on" MaskToolTipString "on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "3|num_width|num_binpt|pipeline(1,4)|stages" System { Name "CORDIC PE4" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "1248:6:117" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:6:118" Position [45, 98, 75, 112] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "1248:6:119" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "1248:6:120" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "1248:6:121" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "1248:6:122" Ports [0, 1] Position [160, 235, 240, 255] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^-ii" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "80,20,0,1,white,blue,0,2df3b2e9,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 20 20 0 ]);\npatch([35.55 38.44 40.44 42.44 44.44 40.44 37.55 35.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([37.55 40.44 38.44 35.55 37.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([35.55 38.44 40.44 37.55 35.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([37.55 44.44 42.44 40.44 38.44 35.55 37.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('output',1,'0.125');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:6:123" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "1248:6:124" Ports [1, 1] Position [450, 55, 490, 95] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:6:125" Ports [1, 1] Position [345, 158, 390, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,42eb502d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 3}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:6:126" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "1248:6:127" Position [570, 68, 600, 82] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "1248:6:128" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "1248:6:129" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "x" SrcPort 1 Points [220, 0; 0, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [45, 0] Branch { Points [150, 0; 0, 45] DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 30] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [160, 0] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0; 0, 125] DstBlock "AddSub2" DstPort 3 } Branch { DstBlock "Inverter" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE5" SID "1248:6:130" Ports [3, 3] Position [650, 70, 705, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration Divider" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Pipeline Latency|stages" MaskStyleString "edit,edit,edit,edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;pipeline=@4;stages=@5;" MaskTunableValueString "on,on,on,on,on" MaskCallbackString "||||" MaskEnableString "on,on,on,on,on" MaskVisibilityString "on,on,on,on,on" MaskToolTipString "on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "4|num_width|num_binpt|pipeline(1,5)|stages" System { Name "CORDIC PE5" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "1248:6:131" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:6:132" Position [45, 98, 75, 112] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "1248:6:133" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "1248:6:134" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "1248:6:135" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "1248:6:136" Ports [0, 1] Position [160, 235, 240, 255] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^-ii" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "80,20,0,1,white,blue,0,b5d1f3c3,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 20 20 0 ]);\npatch([35.55 38.44 40.44 42.44 44.44 40.44 37.55 35.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([37.55 40.44 38.44 35.55 37.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([35.55 38.44 40.44 37.55 35.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([37.55 44.44 42.44 40.44 38.44 35.55 37.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('output',1,'0.0625');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:6:137" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "1248:6:138" Ports [1, 1] Position [450, 55, 490, 95] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:6:139" Ports [1, 1] Position [345, 158, 390, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,f24dc431,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 4}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:6:140" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "1248:6:141" Position [570, 68, 600, 82] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "1248:6:142" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "1248:6:143" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "x" SrcPort 1 Points [220, 0; 0, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [45, 0] Branch { Points [150, 0; 0, 45] DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 30] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [160, 0] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0; 0, 125] DstBlock "AddSub2" DstPort 3 } Branch { DstBlock "Inverter" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE6" SID "1248:6:144" Ports [3, 3] Position [775, 70, 830, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration Divider" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Pipeline Latency|stages" MaskStyleString "edit,edit,edit,edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;pipeline=@4;stages=@5;" MaskTunableValueString "on,on,on,on,on" MaskCallbackString "||||" MaskEnableString "on,on,on,on,on" MaskVisibilityString "on,on,on,on,on" MaskToolTipString "on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "5|num_width|num_binpt|pipeline(1,6)|stages" System { Name "CORDIC PE6" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "1248:6:145" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:6:146" Position [45, 98, 75, 112] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "1248:6:147" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "1248:6:148" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "1248:6:149" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "1248:6:150" Ports [0, 1] Position [160, 235, 240, 255] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^-ii" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "80,20,0,1,white,blue,0,d8519326,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 20 20 0 ]);\npatch([35.55 38.44 40.44 42.44 44.44 40.44 37.55 35.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([37.55 40.44 38.44 35.55 37.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([35.55 38.44 40.44 37.55 35.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([37.55 44.44 42.44 40.44 38.44 35.55 37.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('output',1,'0.03125');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:6:151" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "1248:6:152" Ports [1, 1] Position [450, 55, 490, 95] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:6:153" Ports [1, 1] Position [345, 158, 390, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,265c313f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 5}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:6:154" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "1248:6:155" Position [570, 68, 600, 82] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "1248:6:156" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "1248:6:157" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "x" SrcPort 1 Points [220, 0; 0, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [45, 0] Branch { Points [150, 0; 0, 45] DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 30] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [160, 0] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0; 0, 125] DstBlock "AddSub2" DstPort 3 } Branch { DstBlock "Inverter" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE7" SID "1248:6:158" Ports [3, 3] Position [900, 70, 955, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration Divider" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Pipeline Latency|stages" MaskStyleString "edit,edit,edit,edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;pipeline=@4;stages=@5;" MaskTunableValueString "on,on,on,on,on" MaskCallbackString "||||" MaskEnableString "on,on,on,on,on" MaskVisibilityString "on,on,on,on,on" MaskToolTipString "on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "6|num_width|num_binpt|pipeline(1,7)|stages" System { Name "CORDIC PE7" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "1248:6:159" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:6:160" Position [45, 98, 75, 112] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "1248:6:161" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "1248:6:162" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "1248:6:163" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "1248:6:164" Ports [0, 1] Position [160, 235, 240, 255] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^-ii" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "80,20,0,1,white,blue,0,60ba886e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 20 20 0 ]);\npatch([35.55 38.44 40.44 42.44 44.44 40.44 37.55 35.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([37.55 40.44 38.44 35.55 37.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([35.55 38.44 40.44 37.55 35.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([37.55 44.44 42.44 40.44 38.44 35.55 37.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('output',1,'0.015625');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:6:165" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "1248:6:166" Ports [1, 1] Position [450, 55, 490, 95] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:6:167" Ports [1, 1] Position [345, 158, 390, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,57d4791a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 6}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:6:168" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "1248:6:169" Position [570, 68, 600, 82] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "1248:6:170" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "1248:6:171" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "x" SrcPort 1 Points [220, 0; 0, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [45, 0] Branch { Points [150, 0; 0, 45] DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 30] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [160, 0] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0; 0, 125] DstBlock "AddSub2" DstPort 3 } Branch { DstBlock "Inverter" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE8" SID "1248:6:172" Ports [3, 3] Position [1025, 70, 1080, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration Divider" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Pipeline Latency|stages" MaskStyleString "edit,edit,edit,edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;pipeline=@4;stages=@5;" MaskTunableValueString "on,on,on,on,on" MaskCallbackString "||||" MaskEnableString "on,on,on,on,on" MaskVisibilityString "on,on,on,on,on" MaskToolTipString "on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "7|num_width|num_binpt|pipeline(1,8)|stages" System { Name "CORDIC PE8" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "1248:6:173" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:6:174" Position [45, 98, 75, 112] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "1248:6:175" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "1248:6:176" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "1248:6:177" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "1248:6:178" Ports [0, 1] Position [160, 235, 240, 255] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^-ii" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "80,20,0,1,white,blue,0,6f4afd4f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 20 20 0 ]);\npatch([35.55 38.44 40.44 42.44 44.44 40.44 37.55 35.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([37.55 40.44 38.44 35.55 37.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([35.55 38.44 40.44 37.55 35.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([37.55 44.44 42.44 40.44 38.44 35.55 37.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('output',1,'0.0078125');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:6:179" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "1248:6:180" Ports [1, 1] Position [450, 55, 490, 95] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:6:181" Ports [1, 1] Position [345, 158, 390, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,aa1a47e4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 7}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:6:182" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "1248:6:183" Position [570, 68, 600, 82] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "1248:6:184" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "1248:6:185" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "x" SrcPort 1 Points [220, 0; 0, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [45, 0] Branch { Points [150, 0; 0, 45] DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 30] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [160, 0] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0; 0, 125] DstBlock "AddSub2" DstPort 3 } Branch { DstBlock "Inverter" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE9" SID "1248:6:186" Ports [3, 3] Position [1150, 70, 1205, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration Divider" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Pipeline Latency|stages" MaskStyleString "edit,edit,edit,edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;pipeline=@4;stages=@5;" MaskTunableValueString "on,on,on,on,on" MaskCallbackString "||||" MaskEnableString "on,on,on,on,on" MaskVisibilityString "on,on,on,on,on" MaskToolTipString "on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "8|num_width|num_binpt|pipeline(1,9)|stages" System { Name "CORDIC PE9" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "1248:6:187" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:6:188" Position [45, 98, 75, 112] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "1248:6:189" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "1248:6:190" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "AddSub2" SID "1248:6:191" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 16 0 16 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Constant" SID "1248:6:192" Ports [0, 1] Position [160, 235, 240, 255] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^-ii" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "stages+2" bin_pt "stages" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "80,20,0,1,white,blue,0,f8092ba0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 20 20 0 ]);\npatch([35.55 38.44 40.44 42.44 44.44 40.44 37.55 35.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([37.55 40.44 38.44 35.55 37.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([35.55 38.44 40.44 37.55 35.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([37.55 44.44 42.44 40.44 38.44 35.55 37.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('output',1,'0.00390625');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:6:193" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "1248:6:194" Ports [1, 1] Position [450, 55, 490, 95] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:6:195" Ports [1, 1] Position [345, 158, 390, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,6fdd366c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{X >> 8}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:6:196" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "1248:6:197" Position [570, 68, 600, 82] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "1248:6:198" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "1248:6:199" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "x" SrcPort 1 Points [220, 0; 0, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [45, 0] Branch { Points [150, 0; 0, 45] DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 30] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [160, 0] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [115, 0; 0, 125] DstBlock "AddSub2" DstPort 3 } Branch { DstBlock "Inverter" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType Terminator Name "Terminator1" SID "1248:6:200" Position [1900, 73, 1930, 87] ShowName off } Block { BlockType Terminator Name "Terminator2" SID "1248:6:201" Position [1960, 92, 1975, 108] ShowName off } Block { BlockType Outport Name "Z" SID "1248:6:202" Position [1990, 113, 2020, 127] IconDisplay "Port number" } Line { SrcBlock "x" SrcPort 1 DstBlock "CORDIC PE1" DstPort 1 } Line { SrcBlock "y" SrcPort 1 DstBlock "CORDIC PE1" DstPort 2 } Line { SrcBlock "z" SrcPort 1 DstBlock "CORDIC PE1" DstPort 3 } Line { SrcBlock "CORDIC PE1" SrcPort 1 DstBlock "CORDIC PE2" DstPort 1 } Line { SrcBlock "CORDIC PE1" SrcPort 2 DstBlock "CORDIC PE2" DstPort 2 } Line { SrcBlock "CORDIC PE1" SrcPort 3 DstBlock "CORDIC PE2" DstPort 3 } Line { SrcBlock "CORDIC PE2" SrcPort 1 DstBlock "CORDIC PE3" DstPort 1 } Line { SrcBlock "CORDIC PE2" SrcPort 2 DstBlock "CORDIC PE3" DstPort 2 } Line { SrcBlock "CORDIC PE2" SrcPort 3 DstBlock "CORDIC PE3" DstPort 3 } Line { SrcBlock "CORDIC PE3" SrcPort 1 DstBlock "CORDIC PE4" DstPort 1 } Line { SrcBlock "CORDIC PE3" SrcPort 2 DstBlock "CORDIC PE4" DstPort 2 } Line { SrcBlock "CORDIC PE3" SrcPort 3 DstBlock "CORDIC PE4" DstPort 3 } Line { SrcBlock "CORDIC PE4" SrcPort 1 DstBlock "CORDIC PE5" DstPort 1 } Line { SrcBlock "CORDIC PE4" SrcPort 2 DstBlock "CORDIC PE5" DstPort 2 } Line { SrcBlock "CORDIC PE4" SrcPort 3 DstBlock "CORDIC PE5" DstPort 3 } Line { SrcBlock "CORDIC PE5" SrcPort 1 DstBlock "CORDIC PE6" DstPort 1 } Line { SrcBlock "CORDIC PE5" SrcPort 2 DstBlock "CORDIC PE6" DstPort 2 } Line { SrcBlock "CORDIC PE5" SrcPort 3 DstBlock "CORDIC PE6" DstPort 3 } Line { SrcBlock "CORDIC PE6" SrcPort 1 DstBlock "CORDIC PE7" DstPort 1 } Line { SrcBlock "CORDIC PE6" SrcPort 2 DstBlock "CORDIC PE7" DstPort 2 } Line { SrcBlock "CORDIC PE6" SrcPort 3 DstBlock "CORDIC PE7" DstPort 3 } Line { SrcBlock "CORDIC PE7" SrcPort 1 DstBlock "CORDIC PE8" DstPort 1 } Line { SrcBlock "CORDIC PE7" SrcPort 2 DstBlock "CORDIC PE8" DstPort 2 } Line { SrcBlock "CORDIC PE7" SrcPort 3 DstBlock "CORDIC PE8" DstPort 3 } Line { SrcBlock "CORDIC PE8" SrcPort 1 DstBlock "CORDIC PE9" DstPort 1 } Line { SrcBlock "CORDIC PE8" SrcPort 2 DstBlock "CORDIC PE9" DstPort 2 } Line { SrcBlock "CORDIC PE8" SrcPort 3 DstBlock "CORDIC PE9" DstPort 3 } Line { SrcBlock "CORDIC PE9" SrcPort 1 DstBlock "CORDIC PE10" DstPort 1 } Line { SrcBlock "CORDIC PE9" SrcPort 2 DstBlock "CORDIC PE10" DstPort 2 } Line { SrcBlock "CORDIC PE9" SrcPort 3 DstBlock "CORDIC PE10" DstPort 3 } Line { SrcBlock "CORDIC PE10" SrcPort 1 DstBlock "CORDIC PE11" DstPort 1 } Line { SrcBlock "CORDIC PE10" SrcPort 2 DstBlock "CORDIC PE11" DstPort 2 } Line { SrcBlock "CORDIC PE10" SrcPort 3 DstBlock "CORDIC PE11" DstPort 3 } Line { SrcBlock "CORDIC PE11" SrcPort 1 DstBlock "CORDIC PE12" DstPort 1 } Line { SrcBlock "CORDIC PE11" SrcPort 2 DstBlock "CORDIC PE12" DstPort 2 } Line { SrcBlock "CORDIC PE11" SrcPort 3 DstBlock "CORDIC PE12" DstPort 3 } Line { SrcBlock "CORDIC PE12" SrcPort 1 DstBlock "CORDIC PE13" DstPort 1 } Line { SrcBlock "CORDIC PE12" SrcPort 2 DstBlock "CORDIC PE13" DstPort 2 } Line { SrcBlock "CORDIC PE12" SrcPort 3 DstBlock "CORDIC PE13" DstPort 3 } Line { SrcBlock "CORDIC PE13" SrcPort 1 DstBlock "CORDIC PE14" DstPort 1 } Line { SrcBlock "CORDIC PE13" SrcPort 2 DstBlock "CORDIC PE14" DstPort 2 } Line { SrcBlock "CORDIC PE13" SrcPort 3 DstBlock "CORDIC PE14" DstPort 3 } Line { SrcBlock "CORDIC PE14" SrcPort 1 DstBlock "Terminator1" DstPort 1 } Line { SrcBlock "CORDIC PE14" SrcPort 2 DstBlock "Terminator2" DstPort 1 } Line { SrcBlock "CORDIC PE14" SrcPort 3 DstBlock "Z" DstPort 1 } Annotation { Name "The input vector is rotated through progressively smaller angles, such that y goes\nto zero resulting" " in the final output z = y/x." Position [109, 203] HorizontalAlignment "left" } } } Block { BlockType SubSystem Name "Quadrant Correct" SID "1248:7" Ports [3, 1] Position [470, 74, 530, 206] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Data Width|Data Binary Point" MaskStyleString "edit,edit" MaskVariables "num_width=@1;num_binpt=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'z');\nport_label('input',2,'sign');\nport_label('input',3,'norm');\nport_label('output',1,'y/x');\nplo" "t([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_width|num_binpt" System { Name "Quadrant Correct" Location [370, 93, 1167, 609] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "z" SID "1248:8" Position [25, 58, 55, 72] IconDisplay "Port number" } Block { BlockType Inport Name "sign" SID "1248:9" Position [25, 28, 55, 42] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "norm" SID "1248:10" Position [20, 193, 50, 207] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Mult" SID "1248:11" Ports [2, 1] Position [360, 45, 410, 125] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Multiplies two values.

Hardware notes: To use the internal pipeline stage of the dedicated m" "ultiplier you must select 'Pipeline to Greatest Extent Possible'." precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" en off latency "3" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[32 64 0 0 0 1 0]" pipeline "off" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,80,2,1,white,blue,0,7028354c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 80 80 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 80 80 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[47.7" "7 47.77 54.77 47.77 54.77 54.77 54.77 47.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[40.77 40.77 " "47.77 47.77 40.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[33.77 33.77 40.77 40.77 33." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[26.77 26.77 33.77 26.77 33.77 33.77 26.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-3}\\newline ','texmode','on');\ncolor('bl" "ack');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:12" Ports [3, 1] Position [235, 22, 280, 108] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "num_width-1" bin_pt "num_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 0 0 16 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,86,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 12.2857 73.7143 86 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 12.2857 73.7143 86 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[49.66 49.66 55.66 49.66 55.66 55.66 55.66 49.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[43.66 43.66 49.66 49.66 43.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[37.66 37.66 43" ".66 43.66 37.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[31.66 31.66 37.66 31.66 37.66 3" "7.66 31.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "Negate" SID "1248:13" Ports [1, 1] Position [140, 85, 185, 105] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "num_width" bin_pt "num_binpt" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[8 0 0 16 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,20,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "ROM" SID "1248:14" Ports [1, 1] Position [115, 182, 170, 218] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "2^ceil(log2(num_width))" initVector "2.^(0:(2^ceil(log2(num_width))-1))" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "num_width" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[8 0 0 16 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,36,1,1,white,blue,0,eff69a7e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 36 36 0 ]);\npatch([15.875 23.1 28.1 33.1 38.1 28.1 20.875 15.875 ],[23.55 2" "3.55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([20.875 28.1 23.1 15.875 20.875 ],[18.55 18.55 23.5" "5 23.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([15.875 23.1 28.1 20.875 15.875 ],[13.55 13.55 18.55 18.55 13.55 ]" ",[1 1 1 ]);\npatch([20.875 38.1 33.1 28.1 23.1 15.875 20.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'addr');\n\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Z" SID "1248:15" Position [505, 78, 535, 92] IconDisplay "Port number" } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Mult" DstPort 1 } Line { SrcBlock "sign" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "z" SrcPort 1 Points [55, 0] Branch { DstBlock "Mux" DstPort 2 } Branch { Points [0, 30] DstBlock "Negate" DstPort 1 } } Line { SrcBlock "Negate" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "norm" SrcPort 1 DstBlock "ROM" DstPort 1 } Line { SrcBlock "Mult" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "ROM" SrcPort 1 Points [120, 0; 0, -95] DstBlock "Mult" DstPort 2 } Annotation { Name "Co-ordinate Correction. If the axis was rotated Step 1 and a relative shift was applied to Y over X, " "this step assigns the appropriate\nsign to the resulting ratio and multiplies it with 2^(relative_shift of Y ove" "r X). " Position [10, 305] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "Quadrant Map" SID "1248:16" Ports [2, 4] Position [90, 30, 175, 205] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Num_Width|Num_bin_pt" MaskStyleString "edit,edit" MaskVariables "num_width=@1;num_binpt=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('output',1,'norm_x');\nport_label('output',2,'norm_y');\n" "port_label('output',3,'sign');\nport_label('output',4,'index');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight " "0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_width|num_binpt" System { Name "Quadrant Map" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "1248:17" Position [15, 53, 45, 67] IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:18" Position [15, 133, 45, 147] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:19" Ports [2, 1] Position [435, 114, 475, 156] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "ceil(log2(num_width))" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,42,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "1248:20" Ports [1, 1] Position [385, 118, 415, 132] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "The input is presented at the output after quantization and overflow effects.

Hardware notes" ": Additional hardware is used when rounding or saturation is selected and output width is less than the input wi" "dth." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(num_width+1))" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "1248:21" Ports [1, 1] Position [385, 138, 415, 152] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "The input is presented at the output after quantization and overflow effects.

Hardware notes" ": Additional hardware is used when rounding or saturation is selected and output width is less than the input wi" "dth." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(num_width+1))" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "1248:22" Ports [1, 1] Position [440, 72, 470, 88] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "The input is presented at the output after quantization and overflow effects.

Hardware notes" ": Additional hardware is used when rounding or saturation is selected and output width is less than the input wi" "dth." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "num_width" bin_pt "num_binpt" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "1248:23" Ports [1, 1] Position [445, 198, 475, 212] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "The input is presented at the output after quantization and overflow effects.

Hardware notes" ": Additional hardware is used when rounding or saturation is selected and output width is less than the input wi" "dth." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "num_width" bin_pt "num_binpt" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "1248:24" Ports [1, 1] Position [430, 30, 470, 50] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Delay line having configurable length.

Hardware notes: A delay line is a chain, each link o" "f which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-" "flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "num_width" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,721bfb8f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('z^{-21}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Normalize X" SID "1248:25" Ports [3, 2] Position [250, 57, 315, 143] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize X" MaskPromptString "Number of bits|Binary Point Position|Previous Number of bits" MaskStyleString "edit,edit,edit" MaskVariables "num_bits=@1;bin_point=@2;prev_bits=@3;" MaskTunableValueString "on,on,on" MaskCallbackString "||" MaskEnableString "on,on,on" MaskVisibilityString "on,on,off" MaskToolTipString "on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskSelfModifiable on MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'abs');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'norm');\npo" "rt_label('output',2,'shift');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_width-1|num_binpt|15" System { Name "Normalize X" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" SIDHighWatermark "326" Block { BlockType Inport Name "abs" SID "1248:25:1" Position [45, 73, 75, 87] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:2" Position [70, 93, 100, 107] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:3" Position [105, 113, 135, 127] Port "3" IconDisplay "Port number" } Block { BlockType SubSystem Name "Shift1" SID "1248:25:4" Ports [3, 3] Position [175, 68, 230, 132] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift1" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:5" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:6" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:7" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:8" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:9" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:10" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:11" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:12" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:13" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:14" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:15" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:16" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:17" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:18" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:19" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift10" SID "1248:25:20" Ports [3, 3] Position [1275, 70, 1330, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift10" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:21" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:22" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:23" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:24" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:25" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:26" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:27" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:28" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:29" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:30" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:31" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:32" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:33" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:34" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:35" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift11" SID "1248:25:36" Ports [3, 3] Position [1400, 70, 1455, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift11" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:37" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:38" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:39" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:40" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:41" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:42" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:43" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:44" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:45" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:46" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:47" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:48" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:49" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:50" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:51" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift12" SID "1248:25:52" Ports [3, 3] Position [1525, 70, 1580, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift12" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:53" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:54" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:55" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:56" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:57" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:58" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:59" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:60" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:61" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:62" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:63" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:64" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:65" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:66" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:67" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift13" SID "1248:25:68" Ports [3, 3] Position [1650, 70, 1705, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift13" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:69" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:70" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:71" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:72" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:73" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:74" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:75" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:76" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:77" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:78" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:79" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:80" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:81" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:82" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:83" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift14" SID "1248:25:84" Ports [3, 3] Position [1775, 70, 1830, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift14" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:85" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:86" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:87" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:88" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:89" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:90" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:91" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:92" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:93" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:94" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:95" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:96" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:97" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:98" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:99" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift15" SID "1248:25:100" Ports [3, 3] Position [1900, 70, 1955, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift15" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:101" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:102" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:103" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:104" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:105" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:106" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:107" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:108" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:109" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:110" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:111" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:112" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:113" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:114" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:115" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift16" SID "1248:25:116" Ports [3, 3] Position [2025, 70, 2080, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift16" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:117" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:118" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:119" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:120" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:121" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:122" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:123" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:124" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:125" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:126" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:127" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:128" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:129" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:130" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:131" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift17" SID "1248:25:132" Ports [3, 3] Position [2150, 70, 2205, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift17" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:133" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:134" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:135" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:136" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:137" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:138" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:139" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:140" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:141" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:142" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:143" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:144" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:145" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:146" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:147" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift18" SID "1248:25:148" Ports [3, 3] Position [2275, 70, 2330, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift18" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:149" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:150" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:151" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:152" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:153" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:154" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:155" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:156" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:157" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:158" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:159" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:160" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:161" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:162" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:163" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift19" SID "1248:25:164" Ports [3, 3] Position [2400, 70, 2455, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift19" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:165" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:166" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:167" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:168" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:169" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:170" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:171" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:172" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:173" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:174" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:175" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:176" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:177" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:178" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:179" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift2" SID "1248:25:180" Ports [3, 3] Position [275, 70, 330, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift2" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:181" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:182" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:183" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:184" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:185" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:186" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:187" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:188" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:189" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:190" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:191" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:192" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:193" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:194" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:195" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift20" SID "1248:25:196" Ports [3, 3] Position [2525, 70, 2580, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift20" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:197" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:198" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:199" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:200" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:201" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:202" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:203" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:204" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:205" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:206" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:207" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:208" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:209" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:210" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:211" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift3" SID "1248:25:212" Ports [3, 3] Position [400, 70, 455, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift3" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:213" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:214" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:215" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:216" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:217" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:218" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:219" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:220" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:221" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:222" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:223" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:224" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:225" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:226" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:227" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift4" SID "1248:25:228" Ports [3, 3] Position [525, 70, 580, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift4" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:229" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:230" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:231" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:232" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:233" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:234" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:235" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:236" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:237" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:238" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:239" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:240" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:241" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:242" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:243" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift5" SID "1248:25:244" Ports [3, 3] Position [650, 70, 705, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift5" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:245" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:246" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:247" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:248" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:249" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:250" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:251" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:252" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:253" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:254" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:255" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:256" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:257" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:258" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:259" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift6" SID "1248:25:260" Ports [3, 3] Position [775, 70, 830, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift6" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:261" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:262" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:263" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:264" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:265" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:266" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:267" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:268" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:269" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:270" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:271" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:272" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:273" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:274" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:275" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift7" SID "1248:25:276" Ports [3, 3] Position [900, 70, 955, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift7" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:277" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:278" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:279" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:280" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:281" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:282" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:283" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:284" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:285" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:286" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:287" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:288" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:289" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:290" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:291" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift8" SID "1248:25:292" Ports [3, 3] Position [1025, 70, 1080, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift8" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:293" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:294" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:295" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:296" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:297" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:298" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:299" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:300" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:301" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:302" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:303" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:304" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:305" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:306" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:307" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift9" SID "1248:25:308" Ports [3, 3] Position [1150, 70, 1205, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift9" Location [245, 118, 1057, 787] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:25:309" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:25:310" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:25:311" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:25:312" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:25:313" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:25:314" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:25:315" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:25:316" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:25:317" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:25:318" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:25:319" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:25:320" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:25:321" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:25:322" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:25:323" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType Terminator Name "Terminator1" SID "1248:25:324" Position [2740, 113, 2770, 127] ShowName off } Block { BlockType Outport Name "norm" SID "1248:25:325" Position [2650, 73, 2680, 87] IconDisplay "Port number" } Block { BlockType Outport Name "shift" SID "1248:25:326" Position [2710, 92, 2725, 108] Port "2" IconDisplay "Port number" } Line { SrcBlock "abs" SrcPort 1 DstBlock "Shift1" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "Shift1" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 DstBlock "Shift1" DstPort 3 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "Shift2" DstPort 1 } Line { SrcBlock "Shift1" SrcPort 2 DstBlock "Shift2" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 3 DstBlock "Shift2" DstPort 3 } Line { SrcBlock "Shift2" SrcPort 1 DstBlock "Shift3" DstPort 1 } Line { SrcBlock "Shift2" SrcPort 2 DstBlock "Shift3" DstPort 2 } Line { SrcBlock "Shift2" SrcPort 3 DstBlock "Shift3" DstPort 3 } Line { SrcBlock "Shift3" SrcPort 1 DstBlock "Shift4" DstPort 1 } Line { SrcBlock "Shift3" SrcPort 2 DstBlock "Shift4" DstPort 2 } Line { SrcBlock "Shift3" SrcPort 3 DstBlock "Shift4" DstPort 3 } Line { SrcBlock "Shift4" SrcPort 1 DstBlock "Shift5" DstPort 1 } Line { SrcBlock "Shift4" SrcPort 2 DstBlock "Shift5" DstPort 2 } Line { SrcBlock "Shift4" SrcPort 3 DstBlock "Shift5" DstPort 3 } Line { SrcBlock "Shift5" SrcPort 1 DstBlock "Shift6" DstPort 1 } Line { SrcBlock "Shift5" SrcPort 2 DstBlock "Shift6" DstPort 2 } Line { SrcBlock "Shift5" SrcPort 3 DstBlock "Shift6" DstPort 3 } Line { SrcBlock "Shift6" SrcPort 1 DstBlock "Shift7" DstPort 1 } Line { SrcBlock "Shift6" SrcPort 2 DstBlock "Shift7" DstPort 2 } Line { SrcBlock "Shift6" SrcPort 3 DstBlock "Shift7" DstPort 3 } Line { SrcBlock "Shift7" SrcPort 1 DstBlock "Shift8" DstPort 1 } Line { SrcBlock "Shift7" SrcPort 2 DstBlock "Shift8" DstPort 2 } Line { SrcBlock "Shift7" SrcPort 3 DstBlock "Shift8" DstPort 3 } Line { SrcBlock "Shift8" SrcPort 1 DstBlock "Shift9" DstPort 1 } Line { SrcBlock "Shift8" SrcPort 2 DstBlock "Shift9" DstPort 2 } Line { SrcBlock "Shift8" SrcPort 3 DstBlock "Shift9" DstPort 3 } Line { SrcBlock "Shift9" SrcPort 1 DstBlock "Shift10" DstPort 1 } Line { SrcBlock "Shift9" SrcPort 2 DstBlock "Shift10" DstPort 2 } Line { SrcBlock "Shift9" SrcPort 3 DstBlock "Shift10" DstPort 3 } Line { SrcBlock "Shift10" SrcPort 1 DstBlock "Shift11" DstPort 1 } Line { SrcBlock "Shift10" SrcPort 2 DstBlock "Shift11" DstPort 2 } Line { SrcBlock "Shift10" SrcPort 3 DstBlock "Shift11" DstPort 3 } Line { SrcBlock "Shift11" SrcPort 1 DstBlock "Shift12" DstPort 1 } Line { SrcBlock "Shift11" SrcPort 2 DstBlock "Shift12" DstPort 2 } Line { SrcBlock "Shift11" SrcPort 3 DstBlock "Shift12" DstPort 3 } Line { SrcBlock "Shift12" SrcPort 1 DstBlock "Shift13" DstPort 1 } Line { SrcBlock "Shift12" SrcPort 2 DstBlock "Shift13" DstPort 2 } Line { SrcBlock "Shift12" SrcPort 3 DstBlock "Shift13" DstPort 3 } Line { SrcBlock "Shift13" SrcPort 1 DstBlock "Shift14" DstPort 1 } Line { SrcBlock "Shift13" SrcPort 2 DstBlock "Shift14" DstPort 2 } Line { SrcBlock "Shift13" SrcPort 3 DstBlock "Shift14" DstPort 3 } Line { SrcBlock "Shift14" SrcPort 1 DstBlock "Shift15" DstPort 1 } Line { SrcBlock "Shift14" SrcPort 2 DstBlock "Shift15" DstPort 2 } Line { SrcBlock "Shift14" SrcPort 3 DstBlock "Shift15" DstPort 3 } Line { SrcBlock "Shift15" SrcPort 1 DstBlock "Shift16" DstPort 1 } Line { SrcBlock "Shift15" SrcPort 2 DstBlock "Shift16" DstPort 2 } Line { SrcBlock "Shift15" SrcPort 3 DstBlock "Shift16" DstPort 3 } Line { SrcBlock "Shift16" SrcPort 1 DstBlock "Shift17" DstPort 1 } Line { SrcBlock "Shift16" SrcPort 2 DstBlock "Shift17" DstPort 2 } Line { SrcBlock "Shift16" SrcPort 3 DstBlock "Shift17" DstPort 3 } Line { SrcBlock "Shift17" SrcPort 1 DstBlock "Shift18" DstPort 1 } Line { SrcBlock "Shift17" SrcPort 2 DstBlock "Shift18" DstPort 2 } Line { SrcBlock "Shift17" SrcPort 3 DstBlock "Shift18" DstPort 3 } Line { SrcBlock "Shift18" SrcPort 1 DstBlock "Shift19" DstPort 1 } Line { SrcBlock "Shift18" SrcPort 2 DstBlock "Shift19" DstPort 2 } Line { SrcBlock "Shift18" SrcPort 3 DstBlock "Shift19" DstPort 3 } Line { SrcBlock "Shift19" SrcPort 1 DstBlock "Shift20" DstPort 1 } Line { SrcBlock "Shift19" SrcPort 2 DstBlock "Shift20" DstPort 2 } Line { SrcBlock "Shift19" SrcPort 3 DstBlock "Shift20" DstPort 3 } Line { SrcBlock "Shift20" SrcPort 1 DstBlock "norm" DstPort 1 } Line { SrcBlock "Shift20" SrcPort 2 DstBlock "shift" DstPort 1 } Line { SrcBlock "Shift20" SrcPort 3 DstBlock "Terminator1" DstPort 1 } Annotation { Name "Normalizing X : The absolute value of X is shifted left till we have a 1\non the most significant bit" " and the number of shifts are recorded." Position [285, 245] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "Normalize Y" SID "1248:26" Ports [3, 2] Position [250, 182, 315, 268] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Y" MaskPromptString "Number of bits|Binary Point Position|Previous Number of bits" MaskStyleString "edit,edit,edit" MaskVariables "num_bits=@1;bin_point=@2;prev_bits=@3;" MaskTunableValueString "on,on,on" MaskCallbackString "||" MaskEnableString "on,on,on" MaskVisibilityString "on,on,off" MaskToolTipString "on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskSelfModifiable on MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'abs');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'norm');\npo" "rt_label('output',2,'shift');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_width-1|num_binpt|15" System { Name "Normalize Y" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" SIDHighWatermark "326" Block { BlockType Inport Name "abs" SID "1248:26:1" Position [25, 73, 55, 87] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:2" Position [60, 93, 90, 107] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:3" Position [95, 113, 125, 127] Port "3" IconDisplay "Port number" } Block { BlockType SubSystem Name "Shift1" SID "1248:26:4" Ports [3, 3] Position [165, 68, 220, 132] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift1" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:5" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:6" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:7" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:8" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:9" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:10" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:11" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:12" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:13" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:14" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:15" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:16" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:17" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:18" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:19" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 240] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } } } Block { BlockType SubSystem Name "Shift10" SID "1248:26:20" Ports [3, 3] Position [1275, 70, 1330, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift10" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:21" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:22" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:23" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:24" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:25" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:26" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:27" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:28" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:29" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:30" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:31" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:32" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:33" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:34" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:35" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift11" SID "1248:26:36" Ports [3, 3] Position [1400, 70, 1455, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift11" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:37" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:38" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:39" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:40" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:41" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:42" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:43" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:44" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:45" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:46" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:47" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:48" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:49" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:50" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:51" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift12" SID "1248:26:52" Ports [3, 3] Position [1525, 70, 1580, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift12" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:53" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:54" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:55" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:56" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:57" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:58" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:59" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:60" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:61" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:62" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:63" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:64" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:65" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:66" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:67" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift13" SID "1248:26:68" Ports [3, 3] Position [1650, 70, 1705, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift13" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:69" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:70" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:71" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:72" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:73" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:74" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:75" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:76" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:77" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:78" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:79" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:80" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:81" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:82" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:83" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift14" SID "1248:26:84" Ports [3, 3] Position [1775, 70, 1830, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift14" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:85" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:86" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:87" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:88" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:89" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:90" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:91" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:92" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:93" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:94" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:95" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:96" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:97" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:98" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:99" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift15" SID "1248:26:100" Ports [3, 3] Position [1900, 70, 1955, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift15" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:101" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:102" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:103" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:104" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:105" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:106" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:107" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:108" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:109" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:110" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:111" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:112" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:113" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:114" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:115" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift16" SID "1248:26:116" Ports [3, 3] Position [2025, 70, 2080, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift16" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:117" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:118" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:119" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:120" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:121" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:122" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:123" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:124" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:125" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:126" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:127" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:128" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:129" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:130" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:131" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift17" SID "1248:26:132" Ports [3, 3] Position [2150, 70, 2205, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift17" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:133" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:134" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:135" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:136" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:137" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:138" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:139" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:140" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:141" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:142" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:143" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:144" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:145" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:146" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:147" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift18" SID "1248:26:148" Ports [3, 3] Position [2275, 70, 2330, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift18" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:149" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:150" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:151" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:152" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:153" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:154" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:155" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:156" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:157" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:158" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:159" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:160" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:161" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:162" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:163" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift19" SID "1248:26:164" Ports [3, 3] Position [2400, 70, 2455, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift19" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:165" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:166" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:167" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:168" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:169" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:170" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:171" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:172" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:173" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:174" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:175" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:176" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:177" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:178" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:179" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift2" SID "1248:26:180" Ports [3, 3] Position [275, 70, 330, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift2" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:181" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:182" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:183" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:184" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:185" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:186" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:187" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:188" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:189" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:190" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:191" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:192" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:193" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:194" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:195" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift20" SID "1248:26:196" Ports [3, 3] Position [2525, 70, 2580, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift20" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:197" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:198" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:199" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:200" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:201" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:202" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:203" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:204" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:205" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:206" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:207" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:208" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:209" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:210" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:211" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift3" SID "1248:26:212" Ports [3, 3] Position [400, 70, 455, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift3" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:213" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:214" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:215" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:216" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:217" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:218" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:219" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:220" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:221" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:222" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:223" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:224" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:225" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:226" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:227" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift4" SID "1248:26:228" Ports [3, 3] Position [525, 70, 580, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift4" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:229" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:230" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:231" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:232" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:233" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:234" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:235" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:236" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:237" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:238" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:239" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:240" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:241" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:242" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:243" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift5" SID "1248:26:244" Ports [3, 3] Position [650, 70, 705, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift5" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:245" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:246" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:247" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:248" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:249" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:250" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:251" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:252" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:253" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:254" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:255" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:256" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:257" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:258" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:259" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift6" SID "1248:26:260" Ports [3, 3] Position [775, 70, 830, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift6" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:261" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:262" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:263" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:264" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:265" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:266" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:267" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:268" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:269" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:270" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:271" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:272" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:273" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:274" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:275" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift7" SID "1248:26:276" Ports [3, 3] Position [900, 70, 955, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift7" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:277" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:278" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:279" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:280" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:281" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:282" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:283" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:284" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:285" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:286" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:287" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:288" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:289" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:290" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:291" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift8" SID "1248:26:292" Ports [3, 3] Position [1025, 70, 1080, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift8" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:293" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:294" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:295" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:296" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:297" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:298" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:299" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:300" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:301" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:302" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:303" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:304" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:305" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:306" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:307" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType SubSystem Name "Shift9" SID "1248:26:308" Ports [3, 3] Position [1150, 70, 1205, 130] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Normalize Shift Stage" MaskPromptString "Number of Bits|Binary Point Position" MaskStyleString "edit,edit" MaskVariables "num_bits=@1;bin_point=@2;" MaskTunableValueString "on,on" MaskCallbackString "|" MaskEnableString "on,on" MaskVisibilityString "on,on" MaskToolTipString "on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'din');\nport_label('input',2,'cin');\nport_label('input',3,'msb');\nport_label('output',1,'dout');\npo" "rt_label('output',2,'sum');\nport_label('output',3,'latch');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0" "]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "num_bits|bin_point" System { Name "Shift9" Location [370, 79, 1167, 595] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "din" SID "1248:26:309" Position [15, 52, 45, 68] IconDisplay "Port number" } Block { BlockType Inport Name "cin" SID "1248:26:310" Position [15, 157, 45, 173] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "msb" SID "1248:26:311" Position [70, 282, 100, 298] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "1248:26:312" Ports [2, 1] Position [340, 110, 410, 185] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 3 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,75,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 75 75 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[48.1 48.1 " "58.1 48.1 58.1 58.1 58.1 48.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[38.1 38.1 48.1 48.1 38.1 ],[0." "931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[28.1 28.1 38.1 38.1 28.1 ],[1 1 1 ]);\npatch([22.75 5" "7.2 47.2 37.2 27.2 12.75 22.75 ],[18.1 18.1 28.1 18.1 28.1 28.1 18.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nco" "lor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "1248:26:313" Ports [1, 1] Position [165, 120, 200, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1248:26:314" Ports [1, 1] Position [160, 205, 195, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:26:315" Ports [2, 1] Position [220, 191, 260, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1248:26:316" Ports [2, 1] Position [255, 258, 295, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" overflow "Wrap" quantization "Truncate" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:26:317" Ports [3, 1] Position [355, 338, 400, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32" " 14.65 8.65 ],[38.66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65" " ],[32.66 32.66 38.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32" ".66 32.66 26.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 2" "6.66 20.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon " "text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black')" ";port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end " "icon text');" } Block { BlockType Reference Name "Register" SID "1248:26:318" Ports [1, 1] Position [380, 260, 420, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1248:26:319" Ports [1, 1] Position [225, 356, 270, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "num_bits" bin_pt "bin_point" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:26:320" Ports [1, 1] Position [75, 116, 120, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "dout" SID "1248:26:321" Position [445, 363, 475, 377] IconDisplay "Port number" } Block { BlockType Outport Name "sum" SID "1248:26:322" Position [445, 143, 475, 157] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:26:323" Position [455, 273, 485, 287] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "dout" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [55, 0; 0, -80] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "msb" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -75] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "cin" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "sum" DstPort 1 } Line { SrcBlock "din" SrcPort 1 Points [5, 0; 0, 70] Branch { Points [0, 240] Branch { Points [0, 20] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [20, 0] Branch { Points [0, 140] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType Terminator Name "Terminator1" SID "1248:26:324" Position [2740, 113, 2770, 127] ShowName off } Block { BlockType Outport Name "norm" SID "1248:26:325" Position [2650, 73, 2680, 87] IconDisplay "Port number" } Block { BlockType Outport Name "shift" SID "1248:26:326" Position [2710, 92, 2725, 108] Port "2" IconDisplay "Port number" } Line { SrcBlock "msb" SrcPort 1 DstBlock "Shift1" DstPort 3 } Line { SrcBlock "cin" SrcPort 1 DstBlock "Shift1" DstPort 2 } Line { SrcBlock "abs" SrcPort 1 DstBlock "Shift1" DstPort 1 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "Shift2" DstPort 1 } Line { SrcBlock "Shift1" SrcPort 2 DstBlock "Shift2" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 3 DstBlock "Shift2" DstPort 3 } Line { SrcBlock "Shift2" SrcPort 1 DstBlock "Shift3" DstPort 1 } Line { SrcBlock "Shift2" SrcPort 2 DstBlock "Shift3" DstPort 2 } Line { SrcBlock "Shift2" SrcPort 3 DstBlock "Shift3" DstPort 3 } Line { SrcBlock "Shift3" SrcPort 1 DstBlock "Shift4" DstPort 1 } Line { SrcBlock "Shift3" SrcPort 2 DstBlock "Shift4" DstPort 2 } Line { SrcBlock "Shift3" SrcPort 3 DstBlock "Shift4" DstPort 3 } Line { SrcBlock "Shift4" SrcPort 1 DstBlock "Shift5" DstPort 1 } Line { SrcBlock "Shift4" SrcPort 2 DstBlock "Shift5" DstPort 2 } Line { SrcBlock "Shift4" SrcPort 3 DstBlock "Shift5" DstPort 3 } Line { SrcBlock "Shift5" SrcPort 1 DstBlock "Shift6" DstPort 1 } Line { SrcBlock "Shift5" SrcPort 2 DstBlock "Shift6" DstPort 2 } Line { SrcBlock "Shift5" SrcPort 3 DstBlock "Shift6" DstPort 3 } Line { SrcBlock "Shift6" SrcPort 1 DstBlock "Shift7" DstPort 1 } Line { SrcBlock "Shift6" SrcPort 2 DstBlock "Shift7" DstPort 2 } Line { SrcBlock "Shift6" SrcPort 3 DstBlock "Shift7" DstPort 3 } Line { SrcBlock "Shift7" SrcPort 1 DstBlock "Shift8" DstPort 1 } Line { SrcBlock "Shift7" SrcPort 2 DstBlock "Shift8" DstPort 2 } Line { SrcBlock "Shift7" SrcPort 3 DstBlock "Shift8" DstPort 3 } Line { SrcBlock "Shift8" SrcPort 1 DstBlock "Shift9" DstPort 1 } Line { SrcBlock "Shift8" SrcPort 2 DstBlock "Shift9" DstPort 2 } Line { SrcBlock "Shift8" SrcPort 3 DstBlock "Shift9" DstPort 3 } Line { SrcBlock "Shift9" SrcPort 1 DstBlock "Shift10" DstPort 1 } Line { SrcBlock "Shift9" SrcPort 2 DstBlock "Shift10" DstPort 2 } Line { SrcBlock "Shift9" SrcPort 3 DstBlock "Shift10" DstPort 3 } Line { SrcBlock "Shift10" SrcPort 1 DstBlock "Shift11" DstPort 1 } Line { SrcBlock "Shift10" SrcPort 2 DstBlock "Shift11" DstPort 2 } Line { SrcBlock "Shift10" SrcPort 3 DstBlock "Shift11" DstPort 3 } Line { SrcBlock "Shift11" SrcPort 1 DstBlock "Shift12" DstPort 1 } Line { SrcBlock "Shift11" SrcPort 2 DstBlock "Shift12" DstPort 2 } Line { SrcBlock "Shift11" SrcPort 3 DstBlock "Shift12" DstPort 3 } Line { SrcBlock "Shift12" SrcPort 1 DstBlock "Shift13" DstPort 1 } Line { SrcBlock "Shift12" SrcPort 2 DstBlock "Shift13" DstPort 2 } Line { SrcBlock "Shift12" SrcPort 3 DstBlock "Shift13" DstPort 3 } Line { SrcBlock "Shift13" SrcPort 1 DstBlock "Shift14" DstPort 1 } Line { SrcBlock "Shift13" SrcPort 2 DstBlock "Shift14" DstPort 2 } Line { SrcBlock "Shift13" SrcPort 3 DstBlock "Shift14" DstPort 3 } Line { SrcBlock "Shift14" SrcPort 1 DstBlock "Shift15" DstPort 1 } Line { SrcBlock "Shift14" SrcPort 2 DstBlock "Shift15" DstPort 2 } Line { SrcBlock "Shift14" SrcPort 3 DstBlock "Shift15" DstPort 3 } Line { SrcBlock "Shift15" SrcPort 1 DstBlock "Shift16" DstPort 1 } Line { SrcBlock "Shift15" SrcPort 2 DstBlock "Shift16" DstPort 2 } Line { SrcBlock "Shift15" SrcPort 3 DstBlock "Shift16" DstPort 3 } Line { SrcBlock "Shift16" SrcPort 1 DstBlock "Shift17" DstPort 1 } Line { SrcBlock "Shift16" SrcPort 2 DstBlock "Shift17" DstPort 2 } Line { SrcBlock "Shift16" SrcPort 3 DstBlock "Shift17" DstPort 3 } Line { SrcBlock "Shift17" SrcPort 1 DstBlock "Shift18" DstPort 1 } Line { SrcBlock "Shift17" SrcPort 2 DstBlock "Shift18" DstPort 2 } Line { SrcBlock "Shift17" SrcPort 3 DstBlock "Shift18" DstPort 3 } Line { SrcBlock "Shift18" SrcPort 1 DstBlock "Shift19" DstPort 1 } Line { SrcBlock "Shift18" SrcPort 2 DstBlock "Shift19" DstPort 2 } Line { SrcBlock "Shift18" SrcPort 3 DstBlock "Shift19" DstPort 3 } Line { SrcBlock "Shift19" SrcPort 1 DstBlock "Shift20" DstPort 1 } Line { SrcBlock "Shift19" SrcPort 2 DstBlock "Shift20" DstPort 2 } Line { SrcBlock "Shift19" SrcPort 3 DstBlock "Shift20" DstPort 3 } Line { SrcBlock "Shift20" SrcPort 1 DstBlock "norm" DstPort 1 } Line { SrcBlock "Shift20" SrcPort 2 DstBlock "shift" DstPort 1 } Line { SrcBlock "Shift20" SrcPort 3 DstBlock "Terminator1" DstPort 1 } Annotation { Name "Normalizing X : The absolute value of X is shifted left till we have a 1\non the most significant bit" " and the number of shifts are recorded." Position [285, 245] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "map" SID "1248:27" Ports [2, 5] Position [70, 21, 155, 179] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "map" Location [370, 93, 1167, 609] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "1248:28" Position [20, 68, 50, 82] IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "1248:29" Position [25, 178, 55, 192] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "1248:30" Ports [0, 1] Position [480, 328, 515, 352] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "1248:31" Ports [1, 1] Position [480, 268, 515, 292] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "The input is presented at the output after quantization and overflow effects.

Hardware notes" ": Additional hardware is used when rounding or saturation is selected and output width is less than the input wi" "dth." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncol" "or('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "1248:32" Ports [2, 1] Position [395, 16, 430, 49] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp off dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,33,2,1,white,blue,0,dc21e094,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 33 33 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('xo" "r');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1248:33" Ports [3, 1] Position [310, 63, 340, 127] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "User Defined" arith_type "Unsigned" n_bits "num_width-1" bin_pt "num_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,64,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 9.14286 54.8571 64 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 9.14286 54.8571 64 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[36.44 36.44 40.44 36.44 40.44 40.44 40.44 36.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[32" ".44 32.44 36.44 36.44 32.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[28.44 28.44 32.44 32.44" " 28.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[24.44 24.44 28.44 24.44 28.44 28.44 24.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "1248:34" Ports [3, 1] Position [310, 174, 340, 236] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "User Defined" arith_type "Unsigned" n_bits "num_width-1" bin_pt "num_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 15 0 15 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,62,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 8.85714 53.1429 62 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 8.85714 53.1429 62 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[35.44 35.44 39.44 35.44 39.44 39.44 39.44 35.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[31" ".44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[27.44 27.44 31.44 31.44" " 27.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[23.44 23.44 27.44 23.44 27.44 27.44 23.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate" SID "1248:35" Ports [1, 1] Position [205, 105, 250, 125] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Unsigned" n_bits "num_width" bin_pt "num_binpt" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[16 0 0 32 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,20,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate1" SID "1248:36" Ports [1, 1] Position [210, 215, 255, 235] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Unsigned" n_bits "num_width" bin_pt "num_binpt" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[16 0 0 32 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,20,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "1248:37" Ports [1, 1] Position [85, 64, 115, 86] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmod" "e','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "1248:38" Ports [1, 1] Position [90, 174, 120, 196] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmod" "e','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "1248:39" Ports [2, 1] Position [395, 258, 440, 302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[8 1 0 16 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\geq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "1248:40" Ports [1, 1] Position [200, 61, 245, 89] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice1" SID "1248:41" Ports [1, 1] Position [205, 171, 250, 199] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "output_mapping" SID "1248:42" Position [480, 28, 510, 42] IconDisplay "Port number" } Block { BlockType Outport Name "abs_x" SID "1248:43" Position [530, 88, 560, 102] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "cout" SID "1248:44" Position [555, 333, 585, 347] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "latch" SID "1248:45" Position [545, 273, 575, 287] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "abs_y" SID "1248:46" Position [545, 198, 575, 212] Port "5" IconDisplay "Port number" } Line { SrcBlock "Register1" SrcPort 1 Points [55, 0] Branch { DstBlock "Slice1" DstPort 1 } Branch { Points [0, 20] Branch { DstBlock "Mux1" DstPort 2 } Branch { Points [0, 20] DstBlock "Negate1" DstPort 1 } } } Line { SrcBlock "Register" SrcPort 1 Points [55, 0] Branch { Points [0, 20] Branch { Points [0, 20] DstBlock "Negate" DstPort 1 } Branch { DstBlock "Mux" DstPort 2 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "latch" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "output_mapping" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 Points [30, 0] Branch { DstBlock "abs_y" DstPort 1 } Branch { Points [0, 85] DstBlock "Relational" DstPort 2 } } Line { SrcBlock "Negate1" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Slice1" SrcPort 1 Points [25, 0] Branch { Points [0, -145] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Mux1" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "cout" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 Points [10, 0] Branch { DstBlock "abs_x" DstPort 1 } Branch { Points [0, 175] DstBlock "Relational" DstPort 1 } } Line { SrcBlock "Negate" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Slice" SrcPort 1 Points [15, 0] Branch { Points [0, -50] DstBlock "Logical" DstPort 1 } Branch { DstBlock "Mux" DstPort 1 } } Line { SrcBlock "x" SrcPort 1 DstBlock "Register" DstPort 1 } Annotation { Name "Quadrant Mapping : The CORDIC algorithm converges only for positive values of x, so if x < zero, the " "input vector is reflected \nto the 1st or 3rd quadrant by making the x-coordinate non-negative. For normalizing " "X and Y, Y is also always mapped to a\nnon-negative value. The algorithm converges for all values of X and Y, ex" "cept for the most negative value." Position [40, 425] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType Outport Name "norm_X" SID "1248:47" Position [525, 73, 555, 87] IconDisplay "Port number" } Block { BlockType Outport Name "norm_Y" SID "1248:48" Position [540, 198, 570, 212] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "sign" SID "1248:49" Position [525, 33, 555, 47] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "index" SID "1248:50" Position [530, 128, 560, 142] Port "4" IconDisplay "Port number" } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "norm_Y" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "norm_X" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "sign" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "index" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "map" SrcPort 5 Points [55, 0; 0, 35] DstBlock "Normalize Y" DstPort 1 } Line { SrcBlock "map" SrcPort 4 Points [0, 0; 25, 0] Branch { Points [0, 125] DstBlock "Normalize Y" DstPort 3 } Branch { DstBlock "Normalize X" DstPort 3 } } Line { SrcBlock "map" SrcPort 3 Points [40, 0] Branch { Points [0, 125] DstBlock "Normalize Y" DstPort 2 } Branch { DstBlock "Normalize X" DstPort 2 } } Line { SrcBlock "map" SrcPort 2 DstBlock "Normalize X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 DstBlock "map" DstPort 2 } Line { SrcBlock "Normalize Y" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Normalize Y" SrcPort 2 Points [25, 0; 0, -105] DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Normalize X" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Normalize X" SrcPort 2 DstBlock "Convert" DstPort 1 } Line { SrcBlock "x" SrcPort 1 DstBlock "map" DstPort 1 } Line { SrcBlock "map" SrcPort 1 DstBlock "Delay" DstPort 1 } Annotation { Name "Quadrant Mapping and Normalization\n\nThe CORDIC algorithm converges only for positive values of x, s" "o if x < zero, the input vector is reflected \nto the 1st or 3rd quadrant by making the x-coordinate non-negativ" "e. For normalizing X and Y, Y is also \nalways mapped to a non-negative value. The algorithm converges for all v" "alues of X and Y, except the most negative.\nAfter map stage both the absolute inputs X and Y are shifted to the" " left till they have a 1 in the most significant \nbit (MSB). The relative shift of Y over X is recorded and pas" "sed on to the Quadrant Correct Stage. " Position [75, 385] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType Outport Name "div" SID "1248:51" Position [575, 133, 605, 147] IconDisplay "Port number" } Line { SrcBlock "Quadrant Correct" SrcPort 1 DstBlock "div" DstPort 1 } Line { SrcBlock "y" SrcPort 1 DstBlock "Quadrant Map" DstPort 2 } Line { SrcBlock "x" SrcPort 1 DstBlock "Quadrant Map" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Quadrant Correct" DstPort 3 } Line { SrcBlock "Quadrant Map" SrcPort 4 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Quadrant Correct" DstPort 2 } Line { SrcBlock "Quadrant Map" SrcPort 3 DstBlock "Delay" DstPort 1 } Line { SrcBlock "Iterative Divider" SrcPort 1 DstBlock "Quadrant Correct" DstPort 1 } Line { SrcBlock "Quadrant Map" SrcPort 2 DstBlock "Iterative Divider" DstPort 2 } Line { SrcBlock "Quadrant Map" SrcPort 1 Points [35, 0; 0, 20] DstBlock "Iterative Divider" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Iterative Divider" DstPort 3 } Annotation { Name "The CORDIC Divider algorithm is implemented in 4 steps.\n\nStep 1: Co-ordinate Rotation. The CORDIC " "algorithm converges only for positive values of x, so if x < zero, the input vector is\nreflected to the 1st or " "3rd quadrant by making the x-coordinate non-negative. For normalizing X and Y, Y is always mapped to\na non-nega" "tive value. The Divider circuit has been designed to converge for all values of X and Y, except for the most neg" "ative value . \n\nStep 2: Normalization. The CORDIC algorithm converges only for y <= 2 x. For x > y, both the" " inputs X and Y are shifted to the\nleft till they have a 1 in the most significant bit (MSB). The relative shi" "ft of Y over X is recorded and passed on to the Quadrant\nCorrect Stage. \n\nStep 3: Linear Rotations. For rati" "o calculation, the resulting vector is rotated through progressively smaller angles, such that y goes\nto zero. " "In the i-th stage, the rotation yields +/- y/x, depending on whether the input y is less than or greater than ze" "ro. \n\nStep 4: Co-ordinate Correction. If the axis was rotated Step 1 and a relative shift was applied to Y ove" "r X, this step assigns the appropriate\nsign to the resulting ratio and multiplies it with 2^(relative_shift of " "Y over X). " Position [85, 390] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType Reference Name "Constant3" SID "1249" Ports [0, 1] Position [670, 280, 690, 300] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "21" bin_pt "19" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,20,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 20 20 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[12.22 12." "22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output" "',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "1250" Ports [1, 1] Position [750, 456, 785, 474] BlockMirror on ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "34" bin_pt "20" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,375" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "1251" Ports [1, 1] Position [300, 501, 335, 519] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "17" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "1252" Ports [0, 1] Position [190, 175, 235, 195] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "3" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "1" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,20,0,1,white,blue,0,7ac47ef5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "1253" Ports [1, 1] Position [100, 414, 140, 436] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "17+2+1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,22,1,1,white,blue,0,5e785580,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-20}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay10" SID "1254" Ports [1, 1] Position [510, 234, 540, 256] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay11" SID "1255" Ports [1, 1] Position [535, 394, 565, 416] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay12" SID "1256" Ports [1, 1] Position [535, 414, 565, 436] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay8" SID "1257" Ports [1, 1] Position [100, 384, 140, 406] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "17+2+1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,22,1,1,white,blue,0,5e785580,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-20}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "Div Guts" SID "1258" Ports [7] Position [530, 19, 575, 131] NamePlacement "alternate" Floating off Location [6, 45, 1686, 1021] Open off NumInputPorts "7" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "392.7801724137931" YMin "-0.5~-0.25~-1~-1~0~0~0" YMax "0.5~0.15~1~1~1~3500~1" SaveName "ScopeData23" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "Down Sample2" SID "1259" Ports [1, 1] Position [610, 392, 635, 418] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "1260" Ports [1, 1] Position [610, 412, 635, 438] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "1261" Position [220, 21, 335, 39] ShowName off CloseFcn "tagdialog Close" GotoTag "TMP_scIndex" TagVisibility "global" } Block { BlockType From Name "From3" SID "1262" Position [585, 471, 700, 489] BlockMirror on NamePlacement "alternate" ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_DivisionBypass" TagVisibility "global" } Block { BlockType Reference Name "Mult1" SID "1263" Ports [2, 1] Position [425, 203, 470, 247] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "20" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult2" SID "1264" Ports [2, 1] Position [430, 383, 475, 427] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "23" bin_pt "20" quantization "Truncate" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux3" SID "1265" Ports [3, 1] Position [330, 171, 360, 259] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,88,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 12.5714 75.4286 88 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 12.5714 75.4286 88 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[48.44 48.44 52.44 48.44 52.44 52.44 52.44 48.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[44" ".44 44.44 48.44 48.44 44.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[40.44 40.44 44.44 44.44" " 40.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[36.44 36.44 40.44 36.44 40.44 40.44 36.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux5" SID "1266" Ports [3, 1] Position [330, 351, 360, 439] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,88,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 12.5714 75.4286 88 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 12.5714 75.4286 88 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[48.44 48.44 52.44 48.44 52.44 52.44 52.44 48.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[44" ".44 44.44 48.44 48.44 44.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[40.44 40.44 44.44 44.44" " 40.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[36.44 36.44 40.44 36.44 40.44 40.44 36.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "1267" Ports [3, 1] Position [430, 455, 475, 505] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,50,3,1,white,blue,0,30546de1,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 50 50 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 50 50 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[31.66 3" "1.66 37.66 31.66 37.66 37.66 37.66 31.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[25.66 25.66 31.66 " "31.66 25.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[19.66 19.66 25.66 25.66 19.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[13.66 13.66 19.66 13.66 19.66 19.66 13.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "1268" Ports [1, 1] Position [175, 204, 210, 226] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "1269" Ports [1, 1] Position [175, 234, 210, 256] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample3" SID "1270" Ports [1, 1] Position [520, 469, 555, 491] BlockMirror on ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample5" SID "1271" Ports [1, 1] Position [175, 384, 210, 406] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample6" SID "1272" Ports [1, 1] Position [175, 414, 210, 436] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done1" SID "1273" Ports [1, 1] Position [380, 55, 415, 65] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "1274" Ports [1, 1] Position [380, 70, 415, 80] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done3" SID "1275" Ports [1, 1] Position [380, 85, 415, 95] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "1276" Ports [1, 1] Position [380, 25, 415, 35] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "1277" Ports [1, 1] Position [380, 40, 415, 50] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done6" SID "1278" Ports [1, 1] Position [380, 100, 415, 110] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done7" SID "1279" Ports [1, 1] Position [380, 115, 415, 125] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Outport Name "Re[A/B]" SID "1280" Position [685, 398, 715, 412] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "Im[A/B]" SID "1281" Position [685, 418, 715, 432] Port "2" IconDisplay "Port number" } Line { SrcBlock "Re[CP]" SrcPort 1 DstBlock "Delay8" DstPort 1 } Line { SrcBlock "Im[CP]" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "Delay8" SrcPort 1 Points [5, 0] Branch { DstBlock "Up Sample5" DstPort 1 } Branch { Points [0, -305] DstBlock "done3" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 Points [10, 0] Branch { DstBlock "Up Sample6" DstPort 1 } Branch { Points [0, -320] DstBlock "done6" DstPort 1 } } Line { SrcBlock "Mux3" SrcPort 1 Points [30, 0] Branch { DstBlock "Mult1" DstPort 1 } Branch { Points [0, 20] DstBlock "Mult1" DstPort 2 } } Line { SrcBlock "Counter1" SrcPort 1 Points [40, 0] Branch { DstBlock "Mux3" DstPort 1 } Branch { Points [0, 180] Branch { DstBlock "Mux5" DstPort 1 } Branch { Points [0, 145] DstBlock "Convert1" DstPort 1 } } } Line { SrcBlock "Re[B]" SrcPort 1 Points [15, 0] Branch { DstBlock "Up Sample1" DstPort 1 } Branch { Points [0, -170] DstBlock "done5" DstPort 1 } } Line { SrcBlock "Im[B]" SrcPort 1 Points [20, 0] Branch { DstBlock "Up Sample2" DstPort 1 } Branch { Points [0, -185] DstBlock "done1" DstPort 1 } } Line { SrcBlock "Mux5" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Up Sample5" SrcPort 1 DstBlock "Mux5" DstPort 2 } Line { SrcBlock "Up Sample6" SrcPort 1 DstBlock "Mux5" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 Points [-25, 0; 0, -65] DstBlock "Mult2" DstPort 2 } Line { SrcBlock "Mult1" SrcPort 1 Points [20, 0] Branch { DstBlock "Add2" DstPort 1 } Branch { DstBlock "Delay10" DstPort 1 } } Line { SrcBlock "Delay10" SrcPort 1 DstBlock "Add2" DstPort 2 } Line { SrcBlock "Add2" SrcPort 1 DstBlock "CORDIC DIVIDER" DstPort 1 } Line { SrcBlock "CORDIC DIVIDER" SrcPort 1 Points [25, 0] Branch { Points [0, 200] DstBlock "Convert" DstPort 1 } Branch { Points [0, -125; -680, 0; 0, -65] DstBlock "done2" DstPort 1 } } Line { SrcBlock "Mult2" SrcPort 1 Points [30, 0] Branch { DstBlock "Delay11" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay12" DstPort 1 } Branch { Points [0, -95; -210, 0; 0, -190] DstBlock "done7" DstPort 1 } } Line { SrcBlock "Delay11" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Delay12" SrcPort 1 DstBlock "Down Sample4" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "Re[A/B]" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock "Im[A/B]" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Mux3" DstPort 2 } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Mux3" DstPort 3 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "CORDIC DIVIDER" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 Points [160, 0; 0, -15] DstBlock "Register1" DstPort 3 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Up Sample3" DstPort 1 } Line { SrcBlock "Up Sample3" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "done4" SrcPort 1 DstBlock "Div Guts" DstPort 1 } Line { SrcBlock "done5" SrcPort 1 DstBlock "Div Guts" DstPort 2 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Div Guts" DstPort 3 } Line { SrcBlock "done2" SrcPort 1 DstBlock "Div Guts" DstPort 4 } Line { SrcBlock "done3" SrcPort 1 DstBlock "Div Guts" DstPort 5 } Line { SrcBlock "done6" SrcPort 1 DstBlock "Div Guts" DstPort 6 } Line { SrcBlock "done7" SrcPort 1 DstBlock "Div Guts" DstPort 7 } Line { SrcBlock "From1" SrcPort 1 DstBlock "done4" DstPort 1 } Annotation { Name "This output multiplier saturates on purpose. To be totally safe, the number\nof integer bits in the o" "utput should equal the number of fractional bits\nin the input to the divider (1/(2^-15) = 2^15). But the chance" "s of getting an\nanswer this big are very slim. This multiplier saturates so that in this rare case,\nthe answer" " at least has the right sign." Position [346, 581] HorizontalAlignment "left" } Annotation { Name "Apparently this divider implementation\ndoesn't support latency vectors that aren't\nall 1's." Position [989, 247] } } } Block { BlockType Outport Name "Re[A/B]" SID "1282" Position [760, 378, 790, 392] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "Im[A/B]" SID "1283" Position [760, 418, 790, 432] Port "2" IconDisplay "Port number" } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "Division" DstPort 4 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Division" DstPort 3 } Line { SrcBlock "Im[B]" SrcPort 1 Points [65, 0; 0, -10] Branch { DstBlock "Delay2" DstPort 1 } Branch { Points [0, -35] DstBlock "ComplexConjMult_x2" DstPort 4 } } Line { SrcBlock "Re[B]" SrcPort 1 Points [50, 0; 0, -15] Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, -25] DstBlock "ComplexConjMult_x2" DstPort 3 } } Line { SrcBlock "Im[A]" SrcPort 1 DstBlock "ComplexConjMult_x2" DstPort 2 } Line { SrcBlock "Re[A]" SrcPort 1 DstBlock "ComplexConjMult_x2" DstPort 1 } Line { SrcBlock "ComplexConjMult_x2" SrcPort 2 DstBlock "Division" DstPort 2 } Line { SrcBlock "ComplexConjMult_x2" SrcPort 1 DstBlock "Division" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Re[A/B]" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Im[A/B]" DstPort 1 } Line { SrcBlock "Division" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Division" SrcPort 2 DstBlock "Convert2" DstPort 1 } } } Block { BlockType Reference Name "Delay1" SID "1284" Ports [1, 1] Position [475, 183, 500, 207] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay10" SID "1285" Ports [1, 1] Position [1010, 13, 1035, 37] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay11" SID "1286" Ports [1, 1] Position [1010, 58, 1035, 82] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay12" SID "1287" Ports [1, 1] Position [1005, 183, 1030, 207] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay13" SID "1288" Ports [1, 1] Position [665, 13, 690, 37] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay14" SID "1289" Ports [1, 1] Position [665, 58, 690, 82] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay15" SID "1290" Ports [1, 1] Position [655, 543, 680, 567] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay16" SID "1291" Ports [1, 1] Position [655, 578, 680, 602] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay17" SID "1292" Ports [1, 1] Position [665, 183, 690, 207] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay18" SID "1293" Ports [1, 1] Position [255, 13, 280, 37] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay19" SID "1294" Ports [1, 1] Position [255, 58, 280, 82] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "1295" Ports [1, 1] Position [885, 58, 910, 82] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "19+2+1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,d8ff96de,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-22}','" "texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay20" SID "1296" Ports [1, 1] Position [260, 183, 285, 207] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay21" SID "1297" Ports [1, 1] Position [255, 308, 280, 332] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay22" SID "1298" Ports [1, 1] Position [250, 493, 275, 517] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay23" SID "1299" Ports [1, 1] Position [250, 508, 275, 532] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay24" SID "1300" Ports [1, 1] Position [250, 523, 275, 547] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay25" SID "1301" Ports [1, 1] Position [250, 538, 275, 562] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay26" SID "1302" Ports [1, 1] Position [250, 553, 275, 577] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay27" SID "1303" Ports [1, 1] Position [250, 568, 275, 592] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay28" SID "1304" Ports [1, 1] Position [250, 583, 275, 607] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay29" SID "1305" Ports [1, 1] Position [250, 598, 275, 622] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "1306" Ports [1, 1] Position [710, 13, 735, 37] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay30" SID "1307" Ports [1, 1] Position [250, 678, 275, 702] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay31" SID "1308" Ports [1, 1] Position [250, 758, 275, 782] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay32" SID "1309" Ports [1, 1] Position [675, 803, 700, 827] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay33" SID "1310" Ports [1, 1] Position [455, 758, 480, 782] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "1311" Ports [1, 1] Position [710, 58, 735, 82] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "1312" Ports [1, 1] Position [470, 58, 495, 82] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "1313" Ports [1, 1] Position [710, 183, 735, 207] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "1314" Ports [1, 1] Position [885, 183, 910, 207] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "19+2+1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,d8ff96de,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-22}','" "texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay8" SID "1315" Ports [1, 1] Position [885, 13, 910, 37] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "19+2+1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,d8ff96de,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-22}','" "texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay9" SID "1316" Ports [1, 1] Position [470, 13, 495, 37] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Determinant" SID "1317" Ports [8, 2] Position [460, 497, 520, 618] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Determinant" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[a]" SID "1318" Position [245, 213, 275, 227] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[a]" SID "1319" Position [245, 238, 275, 252] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Re[d]" SID "1320" Position [150, 263, 180, 277] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Im[d]" SID "1321" Position [150, 288, 180, 302] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Re[b]" SID "1322" Position [245, 358, 275, 372] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Im[b]" SID "1323" Position [245, 383, 275, 397] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Re[c]" SID "1324" Position [150, 408, 180, 422] NamePlacement "alternate" Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "Im[c]" SID "1325" Position [150, 433, 180, 447] Port "8" IconDisplay "Port number" } Block { BlockType Reference Name "Add1" SID "1326" Ports [3, 1] Position [905, 408, 950, 452] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "22" bin_pt "17" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Add2" SID "1327" Ports [3, 1] Position [910, 228, 955, 272] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "22" bin_pt "17" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType SubSystem Name "ComplexMult_x1" SID "1328" Ports [4, 2] Position [700, 352, 765, 453] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ComplexMult_x1" Location [202, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[A]" SID "1329" Position [55, 528, 85, 542] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[A]" SID "1330" Position [55, 553, 85, 567] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Re[B]" SID "1331" Position [55, 613, 85, 627] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Im[B]" SID "1332" Position [55, 638, 85, 652] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Add1" SID "1333" Ports [2, 1] Position [560, 713, 605, 757] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "22" bin_pt "19" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Add2" SID "1334" Ports [2, 1] Position [565, 533, 610, 577] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "22" bin_pt "19" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "1335" Ports [0, 1] Position [104, 400, 156, 450] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "4" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "1" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "52,50,0,1,white,blue,0,7ac47ef5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 52 52 0 0 ],[0 0 50 50 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 52 52 0 0 ],[0 0 50 50 0 ]);\npatch([10.425 20.54 27.54 34.54 41.54 27.54 17.425 10.425 ],[32" ".77 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([17.425 27.54 20.54 10.425 17.425 ],[25.77 25." "77 32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([10.425 20.54 27.54 17.425 10.425 ],[18.77 18.77 25.77 25.7" "7 18.77 ],[1 1 1 ]);\npatch([17.425 41.54 34.54 27.54 20.54 10.425 17.425 ],[11.77 11.77 18.77 11.77 18.77 18.77" " 11.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "1336" Ports [1, 1] Position [470, 554, 500, 576] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "1337" Ports [1, 1] Position [495, 734, 525, 756] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "1338" Ports [1, 1] Position [755, 717, 790, 753] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "1339" Ports [1, 1] Position [760, 537, 795, 573] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult1" SID "1340" Ports [2, 1] Position [395, 523, 440, 567] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "22" bin_pt "19" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult2" SID "1341" Ports [2, 1] Position [400, 703, 445, 747] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "22" bin_pt "19" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "1342" Ports [3, 1] Position [305, 579, 340, 661] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux3" SID "1343" Ports [3, 1] Position [305, 494, 340, 576] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux4" SID "1344" Ports [3, 1] Position [305, 759, 340, 841] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux5" SID "1345" Ports [3, 1] Position [305, 674, 340, 756] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Negate2" SID "1346" Ports [1, 1] Position [205, 540, 245, 580] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample5" SID "1347" Ports [1, 1] Position [135, 549, 170, 571] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample6" SID "1348" Ports [1, 1] Position [135, 634, 170, 656] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample7" SID "1349" Ports [1, 1] Position [135, 524, 170, 546] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample8" SID "1350" Ports [1, 1] Position [135, 609, 170, 631] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Re" SID "1351" Position [880, 548, 910, 562] IconDisplay "Port number" } Block { BlockType Outport Name "Im" SID "1352" Position [880, 728, 910, 742] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Im" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Re" DstPort 1 } Line { SrcBlock "Add2" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Add1" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Delay5" SrcPort 1 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Mult2" SrcPort 1 Points [25, 0] Branch { DstBlock "Add1" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay5" DstPort 1 } } Line { SrcBlock "Negate2" SrcPort 1 DstBlock "Mux3" DstPort 3 } Line { SrcBlock "Im[B]" SrcPort 1 DstBlock "Up Sample6" DstPort 1 } Line { SrcBlock "Re[B]" SrcPort 1 DstBlock "Up Sample8" DstPort 1 } Line { SrcBlock "Im[A]" SrcPort 1 DstBlock "Up Sample5" DstPort 1 } Line { SrcBlock "Re[A]" SrcPort 1 DstBlock "Up Sample7" DstPort 1 } Line { SrcBlock "Up Sample8" SrcPort 1 Points [5, 0] Branch { Points [0, 205] DstBlock "Mux4" DstPort 3 } Branch { DstBlock "Mux2" DstPort 2 } } Line { SrcBlock "Up Sample7" SrcPort 1 Points [110, 0] Branch { Points [0, 180] DstBlock "Mux5" DstPort 2 } Branch { DstBlock "Mux3" DstPort 2 } } Line { SrcBlock "Mux4" SrcPort 1 Points [25, 0; 0, -65] DstBlock "Mult2" DstPort 2 } Line { SrcBlock "Mux5" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 Points [35, 0] DstBlock "Mult1" DstPort 2 } Line { SrcBlock "Mux3" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Up Sample6" SrcPort 1 Points [105, 0] Branch { Points [0, 155] DstBlock "Mux4" DstPort 2 } Branch { DstBlock "Mux2" DstPort 3 } } Line { SrcBlock "Up Sample5" SrcPort 1 Points [10, 0] Branch { Points [0, 180] DstBlock "Mux5" DstPort 3 } Branch { DstBlock "Negate2" DstPort 1 } } Line { SrcBlock "Mult1" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [0, 20] DstBlock "Delay3" DstPort 1 } Branch { DstBlock "Add2" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Add2" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 Points [0, 30; 140, 0; 0, 25] Branch { Points [0, 85] Branch { Points [0, 95] Branch { Points [0, 85] DstBlock "Mux4" DstPort 1 } Branch { DstBlock "Mux5" DstPort 1 } } Branch { DstBlock "Mux2" DstPort 1 } } Branch { Points [0, 0] DstBlock "Mux3" DstPort 1 } } } } Block { BlockType SubSystem Name "ComplexMult_x2" SID "1353" Ports [4, 2] Position [700, 207, 765, 308] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ComplexMult_x2" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[A]" SID "1354" Position [55, 528, 85, 542] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[A]" SID "1355" Position [55, 553, 85, 567] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Re[B]" SID "1356" Position [55, 613, 85, 627] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Im[B]" SID "1357" Position [55, 638, 85, 652] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Add1" SID "1358" Ports [2, 1] Position [560, 713, 605, 757] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "22" bin_pt "19" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Add2" SID "1359" Ports [2, 1] Position [565, 533, 610, 577] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "22" bin_pt "19" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "1360" Ports [0, 1] Position [104, 400, 156, 450] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "4" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "1" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "52,50,0,1,white,blue,0,7ac47ef5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 52 52 0 0 ],[0 0 50 50 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 52 52 0 0 ],[0 0 50 50 0 ]);\npatch([10.425 20.54 27.54 34.54 41.54 27.54 17.425 10.425 ],[32" ".77 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([17.425 27.54 20.54 10.425 17.425 ],[25.77 25." "77 32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([10.425 20.54 27.54 17.425 10.425 ],[18.77 18.77 25.77 25.7" "7 18.77 ],[1 1 1 ]);\npatch([17.425 41.54 34.54 27.54 20.54 10.425 17.425 ],[11.77 11.77 18.77 11.77 18.77 18.77" " 11.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "1361" Ports [1, 1] Position [470, 554, 500, 576] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "1362" Ports [1, 1] Position [495, 734, 525, 756] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "1363" Ports [1, 1] Position [755, 717, 790, 753] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "1364" Ports [1, 1] Position [760, 537, 795, 573] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult1" SID "1365" Ports [2, 1] Position [395, 523, 440, 567] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "22" bin_pt "19" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult2" SID "1366" Ports [2, 1] Position [400, 703, 445, 747] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "22" bin_pt "19" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "1367" Ports [3, 1] Position [305, 579, 340, 661] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux3" SID "1368" Ports [3, 1] Position [305, 494, 340, 576] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux4" SID "1369" Ports [3, 1] Position [305, 759, 340, 841] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux5" SID "1370" Ports [3, 1] Position [305, 674, 340, 756] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Negate2" SID "1371" Ports [1, 1] Position [205, 540, 245, 580] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample5" SID "1372" Ports [1, 1] Position [135, 549, 170, 571] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample6" SID "1373" Ports [1, 1] Position [135, 634, 170, 656] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample7" SID "1374" Ports [1, 1] Position [135, 524, 170, 546] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample8" SID "1375" Ports [1, 1] Position [135, 609, 170, 631] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Re" SID "1376" Position [880, 548, 910, 562] IconDisplay "Port number" } Block { BlockType Outport Name "Im" SID "1377" Position [880, 728, 910, 742] Port "2" IconDisplay "Port number" } Line { SrcBlock "Counter1" SrcPort 1 Points [0, 30; 140, 0; 0, 25] Branch { Points [0, 0] DstBlock "Mux3" DstPort 1 } Branch { Points [0, 85] Branch { DstBlock "Mux2" DstPort 1 } Branch { Points [0, 95] Branch { DstBlock "Mux5" DstPort 1 } Branch { Points [0, 85] DstBlock "Mux4" DstPort 1 } } } } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Add2" DstPort 2 } Line { SrcBlock "Mult1" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Add2" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay3" DstPort 1 } } Line { SrcBlock "Up Sample5" SrcPort 1 Points [10, 0] Branch { DstBlock "Negate2" DstPort 1 } Branch { Points [0, 180] DstBlock "Mux5" DstPort 3 } } Line { SrcBlock "Up Sample6" SrcPort 1 Points [105, 0] Branch { DstBlock "Mux2" DstPort 3 } Branch { Points [0, 155] DstBlock "Mux4" DstPort 2 } } Line { SrcBlock "Mux3" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 Points [35, 0] DstBlock "Mult1" DstPort 2 } Line { SrcBlock "Mux5" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Mux4" SrcPort 1 Points [25, 0; 0, -65] DstBlock "Mult2" DstPort 2 } Line { SrcBlock "Up Sample7" SrcPort 1 Points [110, 0] Branch { DstBlock "Mux3" DstPort 2 } Branch { Points [0, 180] DstBlock "Mux5" DstPort 2 } } Line { SrcBlock "Up Sample8" SrcPort 1 Points [5, 0] Branch { DstBlock "Mux2" DstPort 2 } Branch { Points [0, 205] DstBlock "Mux4" DstPort 3 } } Line { SrcBlock "Re[A]" SrcPort 1 DstBlock "Up Sample7" DstPort 1 } Line { SrcBlock "Im[A]" SrcPort 1 DstBlock "Up Sample5" DstPort 1 } Line { SrcBlock "Re[B]" SrcPort 1 DstBlock "Up Sample8" DstPort 1 } Line { SrcBlock "Im[B]" SrcPort 1 DstBlock "Up Sample6" DstPort 1 } Line { SrcBlock "Negate2" SrcPort 1 DstBlock "Mux3" DstPort 3 } Line { SrcBlock "Mult2" SrcPort 1 Points [25, 0] Branch { Points [0, 20] DstBlock "Delay5" DstPort 1 } Branch { DstBlock "Add1" DstPort 1 } } Line { SrcBlock "Delay5" SrcPort 1 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Add1" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Add2" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Re" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Im" DstPort 1 } } } Block { BlockType From Name "From1" SID "1378" Position [520, 321, 670, 339] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "1379" Ports [1, 1] Position [710, 321, 745, 339] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "35,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Re" SID "1380" Position [1030, 243, 1060, 257] IconDisplay "Port number" } Block { BlockType Outport Name "Im" SID "1381" Position [1025, 423, 1055, 437] Port "2" IconDisplay "Port number" } Line { SrcBlock "ComplexMult_x2" SrcPort 1 DstBlock "Add2" DstPort 1 } Line { SrcBlock "ComplexMult_x1" SrcPort 1 Points [75, 0; 0, -130] DstBlock "Add2" DstPort 2 } Line { SrcBlock "ComplexMult_x2" SrcPort 2 Points [85, 0; 0, 130] DstBlock "Add1" DstPort 1 } Line { SrcBlock "ComplexMult_x1" SrcPort 2 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Re[a]" SrcPort 1 DstBlock "ComplexMult_x2" DstPort 1 } Line { SrcBlock "Im[a]" SrcPort 1 DstBlock "ComplexMult_x2" DstPort 2 } Line { SrcBlock "Add2" SrcPort 1 DstBlock "Re" DstPort 1 } Line { SrcBlock "Re[b]" SrcPort 1 DstBlock "ComplexMult_x1" DstPort 1 } Line { SrcBlock "Add1" SrcPort 1 DstBlock "Im" DstPort 1 } Line { SrcBlock "Im[b]" SrcPort 1 DstBlock "ComplexMult_x1" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 Points [120, 0] Branch { Points [0, -65] DstBlock "Add2" DstPort 3 } Branch { Points [0, 115] DstBlock "Add1" DstPort 3 } } Line { SrcBlock "Re[c]" SrcPort 1 DstBlock "ComplexMult_x1" DstPort 3 } Line { SrcBlock "Im[c]" SrcPort 1 DstBlock "ComplexMult_x1" DstPort 4 } Line { SrcBlock "Re[d]" SrcPort 1 DstBlock "ComplexMult_x2" DstPort 3 } Line { SrcBlock "Im[d]" SrcPort 1 DstBlock "ComplexMult_x2" DstPort 4 } Annotation { Name "In SISO and Multiplexing mode, this block\ncalculates the determinant of the 2x2 matrix: \ndet([a b; " "c d]) = ad - bc\nwhere a,b,c,d are all complex\nIn Alamouti mode, it calculates the sum of\nthe magnitude of the" " two channel coefficients\n|a|^2 + |b|^2" Position [275, 575] } } } Block { BlockType Scope Name "Eq Guts" SID "1382" Ports [7] Position [850, 669, 895, 781] NamePlacement "alternate" Floating off Location [6, 45, 1686, 1021] Open off NumInputPorts "7" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "392.7801724137931" YMin "-0.5~-0.25~-1~-1~0~0~0" YMax "0.5~0.15~1~1~1~3500~1" SaveName "ScopeData20" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Goto Name "Goto2" SID "1383" Position [725, 807, 820, 823] ShowName off GotoTag "TMP_scIndex" TagVisibility "global" } Block { BlockType Goto Name "Goto5" SID "1384" Position [335, 637, 430, 653] ShowName off GotoTag "ChanEstBA_I" TagVisibility "global" } Block { BlockType SubSystem Name "Phase Corr" SID "1385" Ports [8, 4] Position [245, 360, 290, 465] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Phase Corr" Location [353, 507, 584, 658] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Vin" SID "1386" Position [595, 648, 625, 662] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "xk_ind" SID "1387" Position [595, 663, 625, 677] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Phases I" SID "1388" Position [285, 463, 315, 477] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Phases Q" SID "1389" Position [285, 528, 315, 542] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "YI_A" SID "1390" Position [380, 303, 410, 317] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "YQ_A" SID "1391" Position [380, 318, 410, 332] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "YI_B" SID "1392" Position [380, 373, 410, 387] NamePlacement "alternate" Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "YQ_B" SID "1393" Position [380, 388, 410, 402] Port "8" IconDisplay "Port number" } Block { BlockType BusSelector Name "Bus\nSelector1" SID "1394" Ports [1, 2] Position [385, 440, 390, 500] ShowName off OutputSignals "signal1,signal2" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 2 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector2" SID "1395" Ports [1, 2] Position [385, 505, 390, 565] ShowName off OutputSignals "signal1,signal2" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 2 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType SubSystem Name "ComplexMult_x3" SID "1396" Ports [4, 2] Position [995, 301, 1070, 364] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ComplexMult_x3" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[A]" SID "1397" Position [55, 528, 85, 542] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[A]" SID "1398" Position [55, 553, 85, 567] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Re[B]" SID "1399" Position [55, 613, 85, 627] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Im[B]" SID "1400" Position [55, 638, 85, 652] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Add1" SID "1401" Ports [2, 1] Position [560, 713, 605, 757] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "20" bin_pt "18" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Add2" SID "1402" Ports [2, 1] Position [565, 533, 610, 577] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "20" bin_pt "18" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "1403" Ports [0, 1] Position [104, 400, 156, 450] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "4" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "1" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "52,50,0,1,white,blue,0,7ac47ef5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 52 52 0 0 ],[0 0 50 50 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 52 52 0 0 ],[0 0 50 50 0 ]);\npatch([10.425 20.54 27.54 34.54 41.54 27.54 17.425 10.425 ],[32" ".77 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([17.425 27.54 20.54 10.425 17.425 ],[25.77 25." "77 32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([10.425 20.54 27.54 17.425 10.425 ],[18.77 18.77 25.77 25.7" "7 18.77 ],[1 1 1 ]);\npatch([17.425 41.54 34.54 27.54 20.54 10.425 17.425 ],[11.77 11.77 18.77 11.77 18.77 18.77" " 11.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "1404" Ports [1, 1] Position [470, 554, 500, 576] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "1405" Ports [1, 1] Position [495, 734, 525, 756] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "1406" Ports [1, 1] Position [755, 717, 790, 753] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "1407" Ports [1, 1] Position [760, 537, 795, 573] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult1" SID "1408" Ports [2, 1] Position [395, 523, 440, 567] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "20" bin_pt "18" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult2" SID "1409" Ports [2, 1] Position [400, 703, 445, 747] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "20" bin_pt "18" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "1410" Ports [3, 1] Position [305, 579, 340, 661] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux3" SID "1411" Ports [3, 1] Position [305, 494, 340, 576] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux4" SID "1412" Ports [3, 1] Position [305, 759, 340, 841] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux5" SID "1413" Ports [3, 1] Position [305, 674, 340, 756] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Negate2" SID "1414" Ports [1, 1] Position [205, 540, 245, 580] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample5" SID "1415" Ports [1, 1] Position [135, 549, 170, 571] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample6" SID "1416" Ports [1, 1] Position [135, 634, 170, 656] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample7" SID "1417" Ports [1, 1] Position [135, 524, 170, 546] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample8" SID "1418" Ports [1, 1] Position [135, 609, 170, 631] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Re" SID "1419" Position [880, 548, 910, 562] IconDisplay "Port number" } Block { BlockType Outport Name "Im" SID "1420" Position [880, 728, 910, 742] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Im" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Re" DstPort 1 } Line { SrcBlock "Add2" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Add1" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Delay5" SrcPort 1 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Mult2" SrcPort 1 Points [25, 0] Branch { DstBlock "Add1" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay5" DstPort 1 } } Line { SrcBlock "Negate2" SrcPort 1 DstBlock "Mux3" DstPort 3 } Line { SrcBlock "Im[B]" SrcPort 1 DstBlock "Up Sample6" DstPort 1 } Line { SrcBlock "Re[B]" SrcPort 1 DstBlock "Up Sample8" DstPort 1 } Line { SrcBlock "Im[A]" SrcPort 1 DstBlock "Up Sample5" DstPort 1 } Line { SrcBlock "Re[A]" SrcPort 1 DstBlock "Up Sample7" DstPort 1 } Line { SrcBlock "Up Sample8" SrcPort 1 Points [5, 0] Branch { Points [0, 205] DstBlock "Mux4" DstPort 3 } Branch { DstBlock "Mux2" DstPort 2 } } Line { SrcBlock "Up Sample7" SrcPort 1 Points [110, 0] Branch { Points [0, 180] DstBlock "Mux5" DstPort 2 } Branch { DstBlock "Mux3" DstPort 2 } } Line { SrcBlock "Mux4" SrcPort 1 Points [25, 0; 0, -65] DstBlock "Mult2" DstPort 2 } Line { SrcBlock "Mux5" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 Points [35, 0] DstBlock "Mult1" DstPort 2 } Line { SrcBlock "Mux3" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Up Sample6" SrcPort 1 Points [105, 0] Branch { Points [0, 155] DstBlock "Mux4" DstPort 2 } Branch { DstBlock "Mux2" DstPort 3 } } Line { SrcBlock "Up Sample5" SrcPort 1 Points [10, 0] Branch { Points [0, 180] DstBlock "Mux5" DstPort 3 } Branch { DstBlock "Negate2" DstPort 1 } } Line { SrcBlock "Mult1" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [0, 20] DstBlock "Delay3" DstPort 1 } Branch { DstBlock "Add2" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Add2" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 Points [0, 30; 140, 0; 0, 25] Branch { Points [0, 85] Branch { Points [0, 95] Branch { Points [0, 85] DstBlock "Mux4" DstPort 1 } Branch { DstBlock "Mux5" DstPort 1 } } Branch { DstBlock "Mux2" DstPort 1 } } Branch { Points [0, 0] DstBlock "Mux3" DstPort 1 } } } } Block { BlockType SubSystem Name "ComplexMult_x4" SID "1421" Ports [4, 2] Position [995, 371, 1070, 434] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ComplexMult_x4" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[A]" SID "1422" Position [55, 528, 85, 542] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[A]" SID "1423" Position [55, 553, 85, 567] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Re[B]" SID "1424" Position [55, 613, 85, 627] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Im[B]" SID "1425" Position [55, 638, 85, 652] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Add1" SID "1426" Ports [2, 1] Position [560, 713, 605, 757] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "20" bin_pt "18" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Add2" SID "1427" Ports [2, 1] Position [565, 533, 610, 577] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "20" bin_pt "18" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "1428" Ports [0, 1] Position [104, 400, 156, 450] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "4" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "1" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "52,50,0,1,white,blue,0,7ac47ef5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 52 52 0 0 ],[0 0 50 50 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 52 52 0 0 ],[0 0 50 50 0 ]);\npatch([10.425 20.54 27.54 34.54 41.54 27.54 17.425 10.425 ],[32" ".77 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([17.425 27.54 20.54 10.425 17.425 ],[25.77 25." "77 32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([10.425 20.54 27.54 17.425 10.425 ],[18.77 18.77 25.77 25.7" "7 18.77 ],[1 1 1 ]);\npatch([17.425 41.54 34.54 27.54 20.54 10.425 17.425 ],[11.77 11.77 18.77 11.77 18.77 18.77" " 11.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "1429" Ports [1, 1] Position [470, 554, 500, 576] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "1430" Ports [1, 1] Position [495, 734, 525, 756] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "1431" Ports [1, 1] Position [755, 717, 790, 753] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "1432" Ports [1, 1] Position [760, 537, 795, 573] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult1" SID "1433" Ports [2, 1] Position [395, 523, 440, 567] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "20" bin_pt "18" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult2" SID "1434" Ports [2, 1] Position [400, 703, 445, 747] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "20" bin_pt "18" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "1435" Ports [3, 1] Position [305, 579, 340, 661] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux3" SID "1436" Ports [3, 1] Position [305, 494, 340, 576] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux4" SID "1437" Ports [3, 1] Position [305, 759, 340, 841] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux5" SID "1438" Ports [3, 1] Position [305, 674, 340, 756] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Negate2" SID "1439" Ports [1, 1] Position [205, 540, 245, 580] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample5" SID "1440" Ports [1, 1] Position [135, 549, 170, 571] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample6" SID "1441" Ports [1, 1] Position [135, 634, 170, 656] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample7" SID "1442" Ports [1, 1] Position [135, 524, 170, 546] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample8" SID "1443" Ports [1, 1] Position [135, 609, 170, 631] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Re" SID "1444" Position [880, 548, 910, 562] IconDisplay "Port number" } Block { BlockType Outport Name "Im" SID "1445" Position [880, 728, 910, 742] Port "2" IconDisplay "Port number" } Line { SrcBlock "Counter1" SrcPort 1 Points [0, 30; 140, 0; 0, 25] Branch { Points [0, 0] DstBlock "Mux3" DstPort 1 } Branch { Points [0, 85] Branch { DstBlock "Mux2" DstPort 1 } Branch { Points [0, 95] Branch { DstBlock "Mux5" DstPort 1 } Branch { Points [0, 85] DstBlock "Mux4" DstPort 1 } } } } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Add2" DstPort 2 } Line { SrcBlock "Mult1" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Add2" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay3" DstPort 1 } } Line { SrcBlock "Up Sample5" SrcPort 1 Points [10, 0] Branch { DstBlock "Negate2" DstPort 1 } Branch { Points [0, 180] DstBlock "Mux5" DstPort 3 } } Line { SrcBlock "Up Sample6" SrcPort 1 Points [105, 0] Branch { DstBlock "Mux2" DstPort 3 } Branch { Points [0, 155] DstBlock "Mux4" DstPort 2 } } Line { SrcBlock "Mux3" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 Points [35, 0] DstBlock "Mult1" DstPort 2 } Line { SrcBlock "Mux5" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Mux4" SrcPort 1 Points [25, 0; 0, -65] DstBlock "Mult2" DstPort 2 } Line { SrcBlock "Up Sample7" SrcPort 1 Points [110, 0] Branch { DstBlock "Mux3" DstPort 2 } Branch { Points [0, 180] DstBlock "Mux5" DstPort 2 } } Line { SrcBlock "Up Sample8" SrcPort 1 Points [5, 0] Branch { DstBlock "Mux2" DstPort 2 } Branch { Points [0, 205] DstBlock "Mux4" DstPort 3 } } Line { SrcBlock "Re[A]" SrcPort 1 DstBlock "Up Sample7" DstPort 1 } Line { SrcBlock "Im[A]" SrcPort 1 DstBlock "Up Sample5" DstPort 1 } Line { SrcBlock "Re[B]" SrcPort 1 DstBlock "Up Sample8" DstPort 1 } Line { SrcBlock "Im[B]" SrcPort 1 DstBlock "Up Sample6" DstPort 1 } Line { SrcBlock "Negate2" SrcPort 1 DstBlock "Mux3" DstPort 3 } Line { SrcBlock "Mult2" SrcPort 1 Points [25, 0] Branch { Points [0, 20] DstBlock "Delay5" DstPort 1 } Branch { DstBlock "Add1" DstPort 1 } } Line { SrcBlock "Delay5" SrcPort 1 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Add1" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Add2" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Re" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Im" DstPort 1 } } } Block { BlockType Outport Name " YI_A" SID "1446" Position [1160, 313, 1190, 327] IconDisplay "Port number" } Block { BlockType Outport Name " YQ_A" SID "1447" Position [1160, 343, 1190, 357] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name " YI_B" SID "1448" Position [1160, 383, 1190, 397] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name " YQ_B" SID "1449" Position [1160, 413, 1190, 427] Port "4" IconDisplay "Port number" } Line { SrcBlock "ComplexMult_x4" SrcPort 1 DstBlock " YI_B" DstPort 1 } Line { SrcBlock "ComplexMult_x4" SrcPort 2 DstBlock " YQ_B" DstPort 1 } Line { SrcBlock "YI_B" SrcPort 1 DstBlock "ComplexMult_x4" DstPort 1 } Line { SrcBlock "YQ_B" SrcPort 1 DstBlock "ComplexMult_x4" DstPort 2 } Line { SrcBlock "YI_A" SrcPort 1 DstBlock "ComplexMult_x3" DstPort 1 } Line { SrcBlock "YQ_A" SrcPort 1 DstBlock "ComplexMult_x3" DstPort 2 } Line { SrcBlock "ComplexMult_x3" SrcPort 1 DstBlock " YI_A" DstPort 1 } Line { SrcBlock "ComplexMult_x3" SrcPort 2 DstBlock " YQ_A" DstPort 1 } Line { SrcBlock "Phases I" SrcPort 1 DstBlock "Bus\nSelector1" DstPort 1 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector1" SrcPort 1 Points [415, 0; 0, -115] DstBlock "ComplexMult_x3" DstPort 3 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector1" SrcPort 2 Points [425, 0; 0, -75] DstBlock "ComplexMult_x4" DstPort 3 } Line { SrcBlock "Phases Q" SrcPort 1 DstBlock "Bus\nSelector2" DstPort 1 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector2" SrcPort 1 Points [435, 0; 0, -165] DstBlock "ComplexMult_x3" DstPort 4 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector2" SrcPort 2 Points [450, 0; 0, -125] DstBlock "ComplexMult_x4" DstPort 4 } Annotation { Position [22, 832] } Annotation { Name "For SISO/Multiplexing, update the phase correction\nvalue for each new symbol.\nFor Alamouti, update " "it every other symbol\n(since in Alamouti mode the sym index increments\ntwice for each pair of coincident symbo" "ls)." Position [344, 790] } } } Block { BlockType Reference Name "Register" SID "1450" Ports [2, 1] Position [1100, 493, 1140, 537] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27.55 32." "55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 27.55 22." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('blac" "k');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "1451" Ports [2, 1] Position [1100, 558, 1140, 602] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27.55 32." "55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 27.55 22." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('blac" "k');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "1452" Ports [2, 1] Position [750, 276, 790, 314] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "8.2.02" sg_icon_stat "40,38,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 38 38 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[24.55 24.55 29." "55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[19.55 19.55 24.55 24.55 19." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input" "',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');" "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register3" SID "1453" Ports [2, 1] Position [755, 366, 795, 404] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "8.2.02" sg_icon_stat "40,38,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 38 38 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[24.55 24.55 29." "55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[19.55 19.55 24.55 24.55 19." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input" "',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');" "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "YA*[HBB,-HAB]" SID "1454" Ports [7, 2] Position [445, 255, 535, 325] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "YA*[HBB,-HAB]" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[y]" SID "1455" Position [510, 218, 540, 232] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[y]" SID "1456" Position [510, 243, 540, 257] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Re[h1]" SID "1457" Position [210, 248, 240, 262] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Im[h1]" SID "1458" Position [115, 423, 145, 437] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Re[h2]" SID "1459" Position [210, 268, 240, 282] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Im[h2]" SID "1460" Position [115, 443, 145, 457] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Slot" SID "1461" Position [205, 173, 235, 187] Port "7" IconDisplay "Port number" } Block { BlockType SubSystem Name "ComplexMult_x1" SID "1462" Ports [4, 2] Position [600, 210, 665, 315] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ComplexMult_x1" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[A]" SID "1463" Position [55, 528, 85, 542] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[A]" SID "1464" Position [55, 553, 85, 567] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Re[B]" SID "1465" Position [55, 613, 85, 627] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Im[B]" SID "1466" Position [55, 638, 85, 652] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Add1" SID "1467" Ports [2, 1] Position [560, 713, 605, 757] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "20" bin_pt "18" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Add2" SID "1468" Ports [2, 1] Position [565, 533, 610, 577] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "20" bin_pt "18" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "1469" Ports [0, 1] Position [104, 400, 156, 450] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "4" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "1" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "52,50,0,1,white,blue,0,7ac47ef5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 52 52 0 0 ],[0 0 50 50 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 52 52 0 0 ],[0 0 50 50 0 ]);\npatch([10.425 20.54 27.54 34.54 41.54 27.54 17.425 10.425 ],[32" ".77 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([17.425 27.54 20.54 10.425 17.425 ],[25.77 25." "77 32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([10.425 20.54 27.54 17.425 10.425 ],[18.77 18.77 25.77 25.7" "7 18.77 ],[1 1 1 ]);\npatch([17.425 41.54 34.54 27.54 20.54 10.425 17.425 ],[11.77 11.77 18.77 11.77 18.77 18.77" " 11.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "1470" Ports [1, 1] Position [470, 554, 500, 576] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "1471" Ports [1, 1] Position [495, 734, 525, 756] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "1472" Ports [1, 1] Position [755, 717, 790, 753] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "1473" Ports [1, 1] Position [760, 537, 795, 573] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult1" SID "1474" Ports [2, 1] Position [395, 523, 440, 567] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "20" bin_pt "18" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult2" SID "1475" Ports [2, 1] Position [400, 703, 445, 747] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "20" bin_pt "18" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "1476" Ports [3, 1] Position [305, 579, 340, 661] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux3" SID "1477" Ports [3, 1] Position [305, 494, 340, 576] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux4" SID "1478" Ports [3, 1] Position [305, 759, 340, 841] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux5" SID "1479" Ports [3, 1] Position [305, 674, 340, 756] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Negate2" SID "1480" Ports [1, 1] Position [205, 540, 245, 580] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample5" SID "1481" Ports [1, 1] Position [135, 549, 170, 571] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample6" SID "1482" Ports [1, 1] Position [135, 634, 170, 656] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample7" SID "1483" Ports [1, 1] Position [135, 524, 170, 546] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample8" SID "1484" Ports [1, 1] Position [135, 609, 170, 631] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Re" SID "1485" Position [880, 548, 910, 562] IconDisplay "Port number" } Block { BlockType Outport Name "Im" SID "1486" Position [880, 728, 910, 742] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Im" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Re" DstPort 1 } Line { SrcBlock "Add2" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Add1" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Delay5" SrcPort 1 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Mult2" SrcPort 1 Points [25, 0] Branch { DstBlock "Add1" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay5" DstPort 1 } } Line { SrcBlock "Negate2" SrcPort 1 DstBlock "Mux3" DstPort 3 } Line { SrcBlock "Im[B]" SrcPort 1 DstBlock "Up Sample6" DstPort 1 } Line { SrcBlock "Re[B]" SrcPort 1 DstBlock "Up Sample8" DstPort 1 } Line { SrcBlock "Im[A]" SrcPort 1 DstBlock "Up Sample5" DstPort 1 } Line { SrcBlock "Re[A]" SrcPort 1 DstBlock "Up Sample7" DstPort 1 } Line { SrcBlock "Up Sample8" SrcPort 1 Points [5, 0] Branch { Points [0, 205] DstBlock "Mux4" DstPort 3 } Branch { DstBlock "Mux2" DstPort 2 } } Line { SrcBlock "Up Sample7" SrcPort 1 Points [110, 0] Branch { Points [0, 180] DstBlock "Mux5" DstPort 2 } Branch { DstBlock "Mux3" DstPort 2 } } Line { SrcBlock "Mux4" SrcPort 1 Points [25, 0; 0, -65] DstBlock "Mult2" DstPort 2 } Line { SrcBlock "Mux5" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 Points [35, 0] DstBlock "Mult1" DstPort 2 } Line { SrcBlock "Mux3" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Up Sample6" SrcPort 1 Points [105, 0] Branch { Points [0, 155] DstBlock "Mux4" DstPort 2 } Branch { DstBlock "Mux2" DstPort 3 } } Line { SrcBlock "Up Sample5" SrcPort 1 Points [10, 0] Branch { Points [0, 180] DstBlock "Mux5" DstPort 3 } Branch { DstBlock "Negate2" DstPort 1 } } Line { SrcBlock "Mult1" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [0, 20] DstBlock "Delay3" DstPort 1 } Branch { DstBlock "Add2" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Add2" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 Points [0, 30; 140, 0; 0, 25] Branch { Points [0, 85] Branch { Points [0, 95] Branch { Points [0, 85] DstBlock "Mux4" DstPort 1 } Branch { DstBlock "Mux5" DstPort 1 } } Branch { DstBlock "Mux2" DstPort 1 } } Branch { Points [0, 0] DstBlock "Mux3" DstPort 1 } } } } Block { BlockType Reference Name "Concat" SID "1487" Ports [2, 1] Position [290, 157, 325, 188] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1.3" sg_icon_stat "35,31,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 31 31 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','" "on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "1488" Position [85, 156, 235, 174] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType Reference Name "Mux1" SID "1489" Ports [5, 1] Position [430, 403, 460, 497] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,94,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 55.44 51.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[47" ".44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[43.44 43.44 47.44 47.44" " 43.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 39.44 43.44 43.44 39.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolo" "r('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "1490" Ports [5, 1] Position [430, 228, 460, 322] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,94,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 55.44 51.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[47" ".44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[43.44 43.44 47.44 47.44" " 43.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 39.44 43.44 43.44 39.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolo" "r('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate1" SID "1491" Ports [1, 1] Position [225, 440, 260, 460] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate2" SID "1492" Ports [1, 1] Position [305, 265, 340, 285] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Re" SID "1493" Position [830, 233, 860, 247] IconDisplay "Port number" } Block { BlockType Outport Name "Im" SID "1494" Position [830, 283, 860, 297] Port "2" IconDisplay "Port number" } Line { SrcBlock "Re[y]" SrcPort 1 DstBlock "ComplexMult_x1" DstPort 1 } Line { SrcBlock "ComplexMult_x1" SrcPort 1 DstBlock "Re" DstPort 1 } Line { SrcBlock "Im[y]" SrcPort 1 DstBlock "ComplexMult_x1" DstPort 2 } Line { SrcBlock "Re[h1]" SrcPort 1 Points [120, 0] Branch { Points [0, 40] DstBlock "Mux2" DstPort 4 } Branch { DstBlock "Mux2" DstPort 2 } } Line { SrcBlock "ComplexMult_x1" SrcPort 2 DstBlock "Im" DstPort 1 } Line { SrcBlock "Re[h2]" SrcPort 1 Points [35, 0] Branch { DstBlock "Negate2" DstPort 1 } Branch { Points [0, 40] DstBlock "Mux2" DstPort 5 } } Line { SrcBlock "Im[h2]" SrcPort 1 Points [50, 0] Branch { DstBlock "Negate1" DstPort 1 } Branch { Points [0, 40] DstBlock "Mux1" DstPort 5 } } Line { SrcBlock "Negate2" SrcPort 1 DstBlock "Mux2" DstPort 3 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "Slot" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "Concat" SrcPort 1 Points [75, 0; 0, 60] Branch { Points [0, 175] DstBlock "Mux1" DstPort 1 } Branch { DstBlock "Mux2" DstPort 1 } } Line { SrcBlock "Im[h1]" SrcPort 1 Points [165, 0] Branch { DstBlock "Mux1" DstPort 2 } Branch { Points [0, 40] DstBlock "Mux1" DstPort 4 } } Line { SrcBlock "Mux1" SrcPort 1 Points [30, 0; 0, -150] DstBlock "ComplexMult_x1" DstPort 4 } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "ComplexMult_x1" DstPort 3 } Line { SrcBlock "Negate1" SrcPort 1 DstBlock "Mux1" DstPort 3 } } } Block { BlockType SubSystem Name "YB*[-HBA,HAA]" SID "1495" Ports [7, 2] Position [445, 330, 535, 400] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "YB*[-HBA,HAA]" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[y]" SID "1496" Position [350, 393, 380, 407] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[y]" SID "1497" Position [350, 428, 380, 442] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Re[h1]" SID "1498" Position [350, 488, 380, 502] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Im[h1]" SID "1499" Position [350, 583, 380, 597] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Re[h2]" SID "1500" Position [350, 508, 380, 522] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Im[h2]" SID "1501" Position [350, 603, 380, 617] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Slot" SID "1502" Position [420, 258, 450, 272] Port "7" IconDisplay "Port number" } Block { BlockType SubSystem Name "ComplexMult_x2" SID "1503" Ports [4, 2] Position [815, 386, 885, 514] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ComplexMult_x2" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[A]" SID "1504" Position [55, 528, 85, 542] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[A]" SID "1505" Position [55, 553, 85, 567] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Re[B]" SID "1506" Position [55, 613, 85, 627] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Im[B]" SID "1507" Position [55, 638, 85, 652] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Add1" SID "1508" Ports [2, 1] Position [560, 713, 605, 757] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "20" bin_pt "18" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Add2" SID "1509" Ports [2, 1] Position [565, 533, 610, 577] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "20" bin_pt "18" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "1510" Ports [0, 1] Position [104, 400, 156, 450] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "4" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "1" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "52,50,0,1,white,blue,0,7ac47ef5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 52 52 0 0 ],[0 0 50 50 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 52 52 0 0 ],[0 0 50 50 0 ]);\npatch([10.425 20.54 27.54 34.54 41.54 27.54 17.425 10.425 ],[32" ".77 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([17.425 27.54 20.54 10.425 17.425 ],[25.77 25." "77 32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([10.425 20.54 27.54 17.425 10.425 ],[18.77 18.77 25.77 25.7" "7 18.77 ],[1 1 1 ]);\npatch([17.425 41.54 34.54 27.54 20.54 10.425 17.425 ],[11.77 11.77 18.77 11.77 18.77 18.77" " 11.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "1511" Ports [1, 1] Position [470, 554, 500, 576] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "1512" Ports [1, 1] Position [495, 734, 525, 756] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "1513" Ports [1, 1] Position [755, 717, 790, 753] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "1514" Ports [1, 1] Position [760, 537, 795, 573] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult1" SID "1515" Ports [2, 1] Position [395, 523, 440, 567] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "20" bin_pt "18" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult2" SID "1516" Ports [2, 1] Position [400, 703, 445, 747] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "20" bin_pt "18" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "1517" Ports [3, 1] Position [305, 579, 340, 661] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux3" SID "1518" Ports [3, 1] Position [305, 494, 340, 576] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux4" SID "1519" Ports [3, 1] Position [305, 759, 340, 841] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux5" SID "1520" Ports [3, 1] Position [305, 674, 340, 756] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Negate2" SID "1521" Ports [1, 1] Position [205, 540, 245, 580] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample5" SID "1522" Ports [1, 1] Position [135, 549, 170, 571] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample6" SID "1523" Ports [1, 1] Position [135, 634, 170, 656] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample7" SID "1524" Ports [1, 1] Position [135, 524, 170, 546] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample8" SID "1525" Ports [1, 1] Position [135, 609, 170, 631] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Re" SID "1526" Position [880, 548, 910, 562] IconDisplay "Port number" } Block { BlockType Outport Name "Im" SID "1527" Position [880, 728, 910, 742] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Im" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Re" DstPort 1 } Line { SrcBlock "Add2" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Add1" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Delay5" SrcPort 1 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Mult2" SrcPort 1 Points [25, 0] Branch { DstBlock "Add1" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay5" DstPort 1 } } Line { SrcBlock "Negate2" SrcPort 1 DstBlock "Mux3" DstPort 3 } Line { SrcBlock "Im[B]" SrcPort 1 DstBlock "Up Sample6" DstPort 1 } Line { SrcBlock "Re[B]" SrcPort 1 DstBlock "Up Sample8" DstPort 1 } Line { SrcBlock "Im[A]" SrcPort 1 DstBlock "Up Sample5" DstPort 1 } Line { SrcBlock "Re[A]" SrcPort 1 DstBlock "Up Sample7" DstPort 1 } Line { SrcBlock "Up Sample8" SrcPort 1 Points [5, 0] Branch { Points [0, 205] DstBlock "Mux4" DstPort 3 } Branch { DstBlock "Mux2" DstPort 2 } } Line { SrcBlock "Up Sample7" SrcPort 1 Points [110, 0] Branch { Points [0, 180] DstBlock "Mux5" DstPort 2 } Branch { DstBlock "Mux3" DstPort 2 } } Line { SrcBlock "Mux4" SrcPort 1 Points [25, 0; 0, -65] DstBlock "Mult2" DstPort 2 } Line { SrcBlock "Mux5" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 Points [35, 0] DstBlock "Mult1" DstPort 2 } Line { SrcBlock "Mux3" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Up Sample6" SrcPort 1 Points [105, 0] Branch { Points [0, 155] DstBlock "Mux4" DstPort 2 } Branch { DstBlock "Mux2" DstPort 3 } } Line { SrcBlock "Up Sample5" SrcPort 1 Points [10, 0] Branch { Points [0, 180] DstBlock "Mux5" DstPort 3 } Branch { DstBlock "Negate2" DstPort 1 } } Line { SrcBlock "Mult1" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [0, 20] DstBlock "Delay3" DstPort 1 } Branch { DstBlock "Add2" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Add2" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 Points [0, 30; 140, 0; 0, 25] Branch { Points [0, 85] Branch { Points [0, 95] Branch { Points [0, 85] DstBlock "Mux4" DstPort 1 } Branch { DstBlock "Mux5" DstPort 1 } } Branch { DstBlock "Mux2" DstPort 1 } } Branch { Points [0, 0] DstBlock "Mux3" DstPort 1 } } } } Block { BlockType Reference Name "Concat" SID "1528" Ports [2, 1] Position [505, 242, 540, 273] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1.3" sg_icon_stat "35,31,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 31 31 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','" "on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "1529" Position [300, 241, 450, 259] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType Reference Name "Mux1" SID "1530" Ports [3, 1] Position [645, 404, 675, 466] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,62,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 8.85714 53.1429 62 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 8.85714 53.1429 62 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[35.44 35.44 39.44 35.44 39.44 39.44 39.44 35.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[31" ".44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[27.44 27.44 31.44 31.44" " 27.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[23.44 23.44 27.44 23.44 27.44 27.44 23.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "1531" Ports [5, 1] Position [645, 563, 675, 657] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,94,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 55.44 51.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[47" ".44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[43.44 43.44 47.44 47.44" " 43.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 39.44 43.44 43.44 39.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolo" "r('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux3" SID "1532" Ports [5, 1] Position [645, 468, 675, 562] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,94,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 55.44 51.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[47" ".44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[43.44 43.44 47.44 47.44" " 43.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 39.44 43.44 43.44 39.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolo" "r('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate1" SID "1533" Ports [1, 1] Position [515, 485, 550, 505] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate2" SID "1534" Ports [1, 1] Position [510, 580, 545, 600] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate3" SID "1535" Ports [1, 1] Position [510, 545, 545, 565] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate4" SID "1536" Ports [1, 1] Position [510, 640, 545, 660] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate5" SID "1537" Ports [1, 1] Position [515, 445, 550, 465] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Re" SID "1538" Position [950, 413, 980, 427] IconDisplay "Port number" } Block { BlockType Outport Name "Im" SID "1539" Position [950, 483, 980, 497] Port "2" IconDisplay "Port number" } Line { SrcBlock "Im[h1]" SrcPort 1 Points [105, 0] Branch { DstBlock "Negate2" DstPort 1 } Branch { Points [0, 40] DstBlock "Mux2" DstPort 4 } } Line { SrcBlock "ComplexMult_x2" SrcPort 2 Points [0, 5] DstBlock "Im" DstPort 1 } Line { SrcBlock "Re[h1]" SrcPort 1 Points [110, 0] Branch { DstBlock "Negate1" DstPort 1 } Branch { Points [0, 40] DstBlock "Mux3" DstPort 4 } } Line { SrcBlock "ComplexMult_x2" SrcPort 1 DstBlock "Re" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 Points [20, 0] Branch { DstBlock "Concat" DstPort 1 } Branch { Points [0, 165] DstBlock "Mux1" DstPort 1 } } Line { SrcBlock "Slot" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "Concat" SrcPort 1 Points [75, 0; 0, 215] Branch { DstBlock "Mux3" DstPort 1 } Branch { Points [0, 95] DstBlock "Mux2" DstPort 1 } } Line { SrcBlock "Negate1" SrcPort 1 DstBlock "Mux3" DstPort 2 } Line { SrcBlock "Negate2" SrcPort 1 DstBlock "Mux2" DstPort 2 } Line { SrcBlock "Re[h2]" SrcPort 1 Points [95, 0] Branch { DstBlock "Mux3" DstPort 3 } Branch { Points [0, 40] DstBlock "Negate3" DstPort 1 } } Line { SrcBlock "Im[h2]" SrcPort 1 Points [95, 0] Branch { DstBlock "Mux2" DstPort 3 } Branch { Points [0, 40] DstBlock "Negate4" DstPort 1 } } Line { SrcBlock "Negate3" SrcPort 1 DstBlock "Mux3" DstPort 5 } Line { SrcBlock "Negate4" SrcPort 1 DstBlock "Mux2" DstPort 5 } Line { SrcBlock "Re[y]" SrcPort 1 Points [415, 0] DstBlock "ComplexMult_x2" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "ComplexMult_x2" DstPort 2 } Line { SrcBlock "Im[y]" SrcPort 1 Points [90, 0] Branch { DstBlock "Mux1" DstPort 2 } Branch { Points [0, 20] DstBlock "Negate5" DstPort 1 } } Line { SrcBlock "Negate5" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Mux3" SrcPort 1 Points [80, 0; 0, -50] DstBlock "ComplexMult_x2" DstPort 3 } Line { SrcBlock "Mux2" SrcPort 1 Points [90, 0; 0, -115] DstBlock "ComplexMult_x2" DstPort 4 } } } Block { BlockType Reference Name "done1" SID "1540" Ports [1, 1] Position [700, 705, 735, 715] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done2" SID "1541" Ports [1, 1] Position [700, 720, 735, 730] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done3" SID "1542" Ports [1, 1] Position [700, 735, 735, 745] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done4" SID "1543" Ports [1, 1] Position [700, 675, 735, 685] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done5" SID "1544" Ports [1, 1] Position [700, 690, 735, 700] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done6" SID "1545" Ports [1, 1] Position [700, 750, 735, 760] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done7" SID "1546" Ports [1, 1] Position [700, 765, 735, 775] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Outport Name "I-eq" SID "1547" Position [1190, 508, 1220, 522] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "Q-eq" SID "1548" Position [1190, 573, 1220, 587] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name " Xk_index" SID "1549" Position [1170, 188, 1200, 202] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Vout" SID "1550" Position [1180, 18, 1210, 32] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name " Sym Index" SID "1551" Position [1180, 63, 1210, 77] Port "5" IconDisplay "Port number" } Line { SrcBlock "H-I" SrcPort 1 DstBlock "Bus Selector" DstPort 1 } Line { SrcBlock "H-Q" SrcPort 1 DstBlock "Bus Selector" DstPort 2 } Line { SrcBlock "SubCar Index" SrcPort 1 Points [0, 0; 10, 0] Branch { Points [75, 0] Branch { DstBlock "Delay20" DstPort 1 } Branch { Points [0, 180] DstBlock "Phase Corr" DstPort 2 } } Branch { Points [0, 575] DstBlock "Delay31" DstPort 1 } } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "Vin" SrcPort 1 Points [90, 0] Branch { DstBlock "Delay18" DstPort 1 } Branch { Points [0, 335] DstBlock "Phase Corr" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Delay8" DstPort 1 } Line { SrcBlock "Delay4" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "Delay7" SrcPort 1 DstBlock "Delay12" DstPort 1 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "Delay11" DstPort 1 } Line { SrcBlock "Delay8" SrcPort 1 Points [60, 0] Branch { Points [0, 500] Branch { Points [0, 65] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register" DstPort 2 } } Branch { DstBlock "Delay10" DstPort 1 } } Line { SrcBlock "Sym Index" SrcPort 1 Points [0, 0; 10, 0] Branch { DstBlock "Delay19" DstPort 1 } Branch { Points [0, 250] Branch { DstBlock "1LSB1" DstPort 1 } Branch { Points [0, 370] DstBlock "Delay30" DstPort 1 } } } Line { SrcBlock "Bus Selector" SrcPort 1 DstBlock "Delay22" DstPort 1 } Line { SrcBlock "Bus Selector" SrcPort 2 DstBlock "Delay23" DstPort 1 } Line { SrcBlock "Bus Selector" SrcPort 3 DstBlock "Delay24" DstPort 1 } Line { SrcBlock "Bus Selector" SrcPort 4 DstBlock "Delay25" DstPort 1 } Line { SrcBlock "Bus Selector" SrcPort 5 DstBlock "Delay26" DstPort 1 } Line { SrcBlock "Bus Selector" SrcPort 6 DstBlock "Delay27" DstPort 1 } Line { SrcBlock "Bus Selector" SrcPort 7 DstBlock "Delay28" DstPort 1 } Line { SrcBlock "Bus Selector" SrcPort 8 DstBlock "Delay29" DstPort 1 } Line { SrcBlock "Determinant" SrcPort 1 Points [65, 0; 0, 25] DstBlock "Delay15" DstPort 1 } Line { SrcBlock "Determinant" SrcPort 2 DstBlock "Delay16" DstPort 1 } Line { SrcBlock "Y_I" SrcPort 1 DstBlock "Bus Selector1" DstPort 1 } Line { SrcBlock "Y_Q" SrcPort 1 DstBlock "Bus Selector1" DstPort 2 } Line { SrcBlock "Bus Selector1" SrcPort 1 DstBlock "Phase Corr" DstPort 5 } Line { SrcBlock "Bus Selector1" SrcPort 2 DstBlock "Phase Corr" DstPort 6 } Line { SrcBlock "Bus Selector1" SrcPort 3 DstBlock "Phase Corr" DstPort 7 } Line { SrcBlock "Bus Selector1" SrcPort 4 DstBlock "Phase Corr" DstPort 8 } Line { SrcBlock "YA*[HBB,-HAB]" SrcPort 1 Points [40, 0] Branch { DstBlock "Add2" DstPort 1 } Branch { Points [0, 465] DstBlock "done3" DstPort 1 } } Line { SrcBlock "YB*[-HBA,HAA]" SrcPort 1 Points [50, 0; 0, -55] DstBlock "Add2" DstPort 2 } Line { SrcBlock "YA*[HBB,-HAB]" SrcPort 2 Points [35, 0] Branch { Points [20, 0; 0, 55] DstBlock "Add1" DstPort 1 } Branch { Points [0, 445] DstBlock "done6" DstPort 1 } } Line { SrcBlock "YB*[-HBA,HAA]" SrcPort 2 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Delay17" DstPort 1 } Line { SrcBlock "Delay5" SrcPort 1 DstBlock "Delay14" DstPort 1 } Line { SrcBlock "Delay9" SrcPort 1 Points [135, 0] Branch { DstBlock "Delay13" DstPort 1 } Branch { Points [0, 210; 95, 0; 0, 70] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, 90] DstBlock "Register3" DstPort 2 } } } Line { SrcBlock "Complex Divider" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock "I-eq" DstPort 1 } Line { Labels [0, 0] SrcBlock "Complex Divider" SrcPort 2 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q-eq" DstPort 1 } Line { SrcBlock "Delay10" SrcPort 1 DstBlock "Vout" DstPort 1 } Line { SrcBlock "Delay11" SrcPort 1 DstBlock " Sym Index" DstPort 1 } Line { SrcBlock "Delay12" SrcPort 1 DstBlock " Xk_index" DstPort 1 } Line { SrcBlock "1LSB1" SrcPort 1 DstBlock "Delay21" DstPort 1 } Line { SrcBlock "Add2" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Add1" SrcPort 1 DstBlock "Register3" DstPort 1 } Line { SrcBlock "Delay14" SrcPort 1 DstBlock "Delay4" DstPort 1 } Line { SrcBlock "Delay13" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 Points [35, 0; 0, 190] DstBlock "Complex Divider" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 Points [25, 0; 0, 135] DstBlock "Complex Divider" DstPort 2 } Line { SrcBlock "Delay15" SrcPort 1 DstBlock "Complex Divider" DstPort 3 } Line { SrcBlock "Delay16" SrcPort 1 DstBlock "Complex Divider" DstPort 4 } Line { SrcBlock "Delay17" SrcPort 1 DstBlock "Delay6" DstPort 1 } Line { SrcBlock "Phase Corr" SrcPort 1 Points [10, 0; 0, -115; 110, 0] Branch { DstBlock "YA*[HBB,-HAB]" DstPort 1 } Branch { Points [0, 420] DstBlock "done4" DstPort 1 } } Line { SrcBlock "Phase Corr" SrcPort 2 Points [15, 0; 0, -130; 100, 0] Branch { DstBlock "YA*[HBB,-HAB]" DstPort 2 } Branch { Points [0, 425] DstBlock "done5" DstPort 1 } } Line { SrcBlock "Phase Corr" SrcPort 3 Points [25, 0; 0, -90] DstBlock "YB*[-HBA,HAA]" DstPort 1 } Line { SrcBlock "Phase Corr" SrcPort 4 Points [30, 0; 0, -105] DstBlock "YB*[-HBA,HAA]" DstPort 2 } Line { SrcBlock "Delay18" SrcPort 1 DstBlock "Delay9" DstPort 1 } Line { SrcBlock "Delay19" SrcPort 1 DstBlock "Delay5" DstPort 1 } Line { SrcBlock "Delay20" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "Delay21" SrcPort 1 Points [135, 0] Branch { DstBlock "YA*[HBB,-HAB]" DstPort 7 } Branch { Points [0, 75] DstBlock "YB*[-HBA,HAA]" DstPort 7 } } Line { SrcBlock "Phases I" SrcPort 1 Points [0, 20] DstBlock "Phase Corr" DstPort 3 } Line { SrcBlock "Delay22" SrcPort 1 Points [10, 0] Branch { Points [95, 0] Branch { DstBlock "Determinant" DstPort 1 } Branch { Points [0, -130] DstBlock "YB*[-HBA,HAA]" DstPort 5 } Branch { Points [0, 205] DstBlock "done1" DstPort 1 } } Branch { Points [0, 125; 40, 0] } } Line { SrcBlock "Delay23" SrcPort 1 Points [110, 0] Branch { DstBlock "Determinant" DstPort 2 } Branch { Points [0, -135] DstBlock "YB*[-HBA,HAA]" DstPort 6 } Branch { Points [0, 205] DstBlock "done2" DstPort 1 } } Line { SrcBlock "Delay24" SrcPort 1 Points [50, 0] Branch { DstBlock "Determinant" DstPort 3 } Branch { Points [0, -255] DstBlock "YA*[HBB,-HAB]" DstPort 3 } } Line { SrcBlock "Delay25" SrcPort 1 Points [55, 0] Branch { DstBlock "Determinant" DstPort 4 } Branch { Points [0, -260] DstBlock "YA*[HBB,-HAB]" DstPort 4 } } Line { SrcBlock "Delay26" SrcPort 1 Points [70, 0] Branch { DstBlock "Determinant" DstPort 5 } Branch { Points [0, -265] DstBlock "YA*[HBB,-HAB]" DstPort 5 } } Line { SrcBlock "Delay27" SrcPort 1 Points [75, 0] Branch { DstBlock "Determinant" DstPort 6 } Branch { Points [0, -270] DstBlock "YA*[HBB,-HAB]" DstPort 6 } } Line { SrcBlock "Delay28" SrcPort 1 Points [15, 0] Branch { Points [75, 0] Branch { DstBlock "Determinant" DstPort 7 } Branch { Points [0, -240] DstBlock "YB*[-HBA,HAA]" DstPort 3 } } Branch { Points [0, 50] DstBlock "Goto5" DstPort 1 } } Line { SrcBlock "Delay29" SrcPort 1 Points [95, 0] Branch { DstBlock "Determinant" DstPort 8 } Branch { Points [0, -245] DstBlock "YB*[-HBA,HAA]" DstPort 4 } } Line { SrcBlock "Phases Q" SrcPort 1 DstBlock "Phase Corr" DstPort 4 } Line { SrcBlock "done4" SrcPort 1 DstBlock "Eq Guts" DstPort 1 } Line { SrcBlock "done5" SrcPort 1 DstBlock "Eq Guts" DstPort 2 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Eq Guts" DstPort 3 } Line { SrcBlock "done2" SrcPort 1 DstBlock "Eq Guts" DstPort 4 } Line { SrcBlock "done3" SrcPort 1 DstBlock "Eq Guts" DstPort 5 } Line { SrcBlock "done6" SrcPort 1 DstBlock "Eq Guts" DstPort 6 } Line { SrcBlock "done7" SrcPort 1 DstBlock "Eq Guts" DstPort 7 } Line { SrcBlock "Delay31" SrcPort 1 DstBlock "Delay33" DstPort 1 } Line { SrcBlock "Delay32" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "Delay33" SrcPort 1 Points [10, 0] Branch { DstBlock "done7" DstPort 1 } Branch { Points [0, 45] DstBlock "Delay32" DstPort 1 } } Annotation { Position [993, 737] } } } Block { BlockType SubSystem Name "Packet_Constructor" SID "1552" Ports [6, 1] Position [660, 325, 780, 530] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Packet_Constructor" Location [2, 82, 1661, 987] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "112" Block { BlockType Inport Name "I" SID "1553" Position [160, 798, 190, 812] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "1554" Position [160, 823, 190, 837] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Xk_index" SID "1555" Position [25, 683, 55, 697] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "1556" Position [15, 1048, 45, 1062] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Sym Index" SID "1557" Position [15, 703, 45, 717] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Start" SID "1558" Position [455, 728, 485, 742] NamePlacement "alternate" Port "6" IconDisplay "Port number" } Block { BlockType SubSystem Name " " SID "1559" Ports [1, 1] Position [1530, 839, 1590, 881] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Period" MaskStyleString "edit" MaskVariables "period=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "1" System { Name " " Location [259, 639, 1112, 927] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "signal" SID "1560" Position [15, 38, 45, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Delay1" SID "1561" Ports [1, 1] Position [145, 57, 190, 103] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,46,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 46 46 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 46 46 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 2" "9.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 " "29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bl" "ack');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1562" Ports [1, 1] Position [75, 63, 120, 97] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,34,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 34 34 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[21.44 21" ".44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[17.44 17.44 21.44 21." "44 17.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1563" Ports [2, 1] Position [210, 48, 255, 92] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "pulse" SID "1564" Position [275, 63, 305, 77] IconDisplay "Port number" } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "signal" SrcPort 1 Points [10, 0] Branch { DstBlock "Inverter1" DstPort 1 } Branch { Points [135, 0] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "pulse" DstPort 1 } } } Block { BlockType SubSystem Name " 2" SID "1565" Ports [1, 1] Position [1550, 433, 1605, 457] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Period" MaskStyleString "edit" MaskVariables "period=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "1" System { Name " 2" Location [259, 639, 1112, 927] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "signal" SID "1566" Position [15, 38, 45, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Delay1" SID "1567" Ports [1, 1] Position [145, 57, 190, 103] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,46,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 46 46 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 46 46 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 2" "9.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 " "29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bl" "ack');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1568" Ports [1, 1] Position [75, 63, 120, 97] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,34,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 34 34 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[21.44 21" ".44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[17.44 17.44 21.44 21." "44 17.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1569" Ports [2, 1] Position [210, 48, 255, 92] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "pulse" SID "1570" Position [275, 63, 305, 77] IconDisplay "Port number" } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "pulse" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "signal" SrcPort 1 Points [10, 0] Branch { Points [135, 0] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Delay1" DstPort 1 } } } Block { BlockType Reference Name ">=8?" SID "1571" Ports [1, 1] Position [1031, 565, 1059, 610] BlockRotation 270 LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "28,45,1,1,white,blue,0,1fd851a7,up,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 28 28 0 0 ],[0 0 45 45 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 28 28 0 0 ],[0 0 45 45 0 ]);\npatch([5.1 10.88 14.88 18.88 22.88 14.88 9.1 5.1 ],[26.44 26.44 30.44" " 26.44 30.44 30.44 30.44 26.44 ],[1 1 1 ]);\npatch([9.1 14.88 10.88 5.1 9.1 ],[22.44 22.44 26.44 26.44 22.44 ],[0." "931 0.946 0.973 ]);\npatch([5.1 10.88 14.88 9.1 5.1 ],[18.44 18.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([9.1 22.8" "8 18.88 14.88 10.88 5.1 9.1 ],[14.44 14.44 18.44 14.44 18.44 18.44 14.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COM" "MENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a:b]" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "1572" Ports [2, 1] Position [690, 622, 740, 673] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "4" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.77 32.7" "7 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 32.77 32" ".77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18.77 ],[1 1 " "1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{" "a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub3" SID "1573" Ports [2, 1] Position [935, 597, 985, 648] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "4" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.77 32.7" "7 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 32.77 32" ".77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18.77 ],[1 1 " "1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{" "a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert1" SID "1574" Ports [1, 1] Position [1285, 1146, 1315, 1164] BlockMirror on ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this blo" "ck costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,432" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Assert');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert10" SID "1575" Ports [1, 1] Position [670, 181, 710, 199] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this blo" "ck costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "1" output_port on has_advanced_control "0" sggui_pos "20,20,336,432" block_type "assert" block_version "10.1.3" sg_icon_stat "40,18,1,1,white,blue,0,9657e937,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Assert');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert2" SID "1576" Ports [1, 1] Position [1005, 616, 1035, 634] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this blo" "ck costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,423" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,9657e937,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Assert');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert3" SID "1577" Ports [1, 1] Position [670, 151, 710, 169] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this blo" "ck costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "1" output_port on has_advanced_control "0" sggui_pos "20,20,336,432" block_type "assert" block_version "10.1.3" sg_icon_stat "40,18,1,1,white,blue,0,9657e937,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Assert');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert4" SID "1578" Ports [1, 1] Position [670, 211, 710, 229] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this blo" "ck costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "1" output_port on has_advanced_control "0" sggui_pos "20,20,336,432" block_type "assert" block_version "10.1.3" sg_icon_stat "40,18,1,1,white,blue,0,9657e937,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Assert');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert5" SID "1579" Ports [1, 1] Position [670, 241, 710, 259] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this blo" "ck costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "1" output_port on has_advanced_control "0" sggui_pos "20,20,336,432" block_type "assert" block_version "10.1.3" sg_icon_stat "40,18,1,1,white,blue,0,9657e937,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Assert');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert6" SID "1580" Ports [1, 1] Position [670, 271, 710, 289] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this blo" "ck costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "1" output_port on has_advanced_control "0" sggui_pos "20,20,336,432" block_type "assert" block_version "10.1.3" sg_icon_stat "40,18,1,1,white,blue,0,9657e937,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Assert');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert7" SID "1581" Ports [1, 1] Position [670, 301, 710, 319] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this blo" "ck costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "1" output_port on has_advanced_control "0" sggui_pos "20,20,336,432" block_type "assert" block_version "10.1.3" sg_icon_stat "40,18,1,1,white,blue,0,9657e937,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Assert');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert8" SID "1582" Ports [1, 1] Position [670, 331, 710, 349] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this blo" "ck costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "1" output_port on has_advanced_control "0" sggui_pos "20,20,336,432" block_type "assert" block_version "10.1.3" sg_icon_stat "40,18,1,1,white,blue,0,9657e937,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Assert');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert9" SID "1583" Ports [1, 1] Position [670, 361, 710, 379] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this blo" "ck costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "1" output_port on has_advanced_control "0" sggui_pos "20,20,336,432" block_type "assert" block_version "10.1.3" sg_icon_stat "40,18,1,1,white,blue,0,9657e937,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Assert');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Barrel Shifter" SID "1584" Ports [3, 1] Position [570, 876, 635, 934] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Barrel Shifter" Location [2, 82, 1278, 988] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "ShiftSel" SID "1585" Position [210, 113, 240, 127] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "D" SID "1586" Position [470, 203, 500, 217] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "en" SID "1587" Position [510, 603, 540, 617] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "1588" Ports [2, 1] Position [635, 197, 685, 248] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "15" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 0 0 15 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert2" SID "1589" Ports [1, 1] Position [696, 275, 714, 305] BlockRotation 270 BlockMirror on ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,423" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "18,30,1,1,white,blue,0,9657e937,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 18 18 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 18 18 0 0 ],[0 0 30 30 0 ]);\npatch([4.55 7.44 9.44 11.44 13.44 9.44 6.55 4.55 ],[17.22 17.22" " 19.22 17.22 19.22 19.22 19.22 17.22 ],[1 1 1 ]);\npatch([6.55 9.44 7.44 4.55 6.55 ],[15.22 15.22 17.22 17.22 15" ".22 ],[0.931 0.946 0.973 ]);\npatch([4.55 7.44 9.44 6.55 4.55 ],[13.22 13.22 15.22 15.22 13.22 ],[1 1 1 ]);\npat" "ch([6.55 13.44 11.44 9.44 7.44 4.55 6.55 ],[11.22 11.22 13.22 11.22 13.22 13.22 11.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Ass" "ert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Data\nBuffer" SID "1590" Ports [2, 1] Position [505, 486, 550, 539] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[8 15 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,6bd0930c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay2" SID "1591" Ports [1, 1] Position [565, 197, 590, 223] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "1592" Ports [1, 1] Position [185, 194, 230, 226] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "15" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,370" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,32,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 32 32 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift1" SID "1593" Ports [1, 1] Position [185, 234, 230, 266] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "2" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "15" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,32,1,1,white,blue,0,282f02ea,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 32 32 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift2" SID "1594" Ports [1, 1] Position [185, 314, 230, 346] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "4" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "15" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,32,1,1,white,blue,0,bc7e136a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 32 32 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 4}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift3" SID "1595" Ports [1, 1] Position [185, 394, 230, 426] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "6" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "15" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,32,1,1,white,blue,0,b2e162ca,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 32 32 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 6}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift4" SID "1596" Ports [1, 1] Position [185, 474, 230, 506] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "8" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "15" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,32,1,1,white,blue,0,b6890a7a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 32 32 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 8}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift5" SID "1597" Ports [1, 1] Position [185, 274, 230, 306] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "3" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "15" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,32,1,1,white,blue,0,2cc77cbe,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 32 32 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 3}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift6" SID "1598" Ports [1, 1] Position [185, 354, 230, 386] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "5" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "15" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,32,1,1,white,blue,0,c645cb9f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 32 32 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 5}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift7" SID "1599" Ports [1, 1] Position [185, 434, 230, 466] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "7" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "15" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,32,1,1,white,blue,0,4c10c26b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 32 32 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 7}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "shift\nselector" SID "1600" Ports [10, 1] Position [390, 107, 465, 358] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "9" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[68 0 0 135 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "75,251,10,1,white,blue,3,cebb31ed,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 75 75 0 0 ],[0 35.8571 215.143 251 0 " "],[0.77 0.82 0.91 ]);\nplot([0 75 75 0 0 ],[0 35.8571 215.143 251 0 ]);\npatch([14.75 29.2 39.2 49.2 59.2 39.2 2" "4.75 14.75 ],[136.1 136.1 146.1 136.1 146.1 146.1 146.1 136.1 ],[1 1 1 ]);\npatch([24.75 39.2 29.2 14.75 24.75 ]" ",[126.1 126.1 136.1 136.1 126.1 ],[0.931 0.946 0.973 ]);\npatch([14.75 29.2 39.2 24.75 14.75 ],[116.1 116.1 126." "1 126.1 116.1 ],[1 1 1 ]);\npatch([24.75 59.2 49.2 39.2 29.2 14.75 24.75 ],[106.1 106.1 116.1 106.1 116.1 116.1 " "106.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text'" ");\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port" "_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n" "color('black');port_label('input',6,'d4');\ncolor('black');port_label('input',7,'d5');\ncolor('black');port_labe" "l('input',8,'d6');\ncolor('black');port_label('input',9,'d7');\ncolor('black');port_label('input',10,'d8');\n\nc" "olor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Q" SID "1601" Position [755, 338, 785, 352] IconDisplay "Port number" } Line { SrcBlock "D" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "ShiftSel" SrcPort 1 DstBlock "shift\nselector" DstPort 1 } Line { SrcBlock "Shift7" SrcPort 1 Points [105, 0; 0, -130] DstBlock "shift\nselector" DstPort 9 } Line { SrcBlock "Shift6" SrcPort 1 Points [85, 0; 0, -100] DstBlock "shift\nselector" DstPort 7 } Line { SrcBlock "Shift5" SrcPort 1 Points [65, 0; 0, -70] DstBlock "shift\nselector" DstPort 5 } Line { SrcBlock "shift\nselector" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Shift4" SrcPort 1 Points [115, 0; 0, -145] DstBlock "shift\nselector" DstPort 10 } Line { SrcBlock "Shift3" SrcPort 1 Points [95, 0; 0, -115] DstBlock "shift\nselector" DstPort 8 } Line { SrcBlock "Shift2" SrcPort 1 Points [75, 0; 0, -85] DstBlock "shift\nselector" DstPort 6 } Line { SrcBlock "Shift1" SrcPort 1 Points [55, 0; 0, -55] DstBlock "shift\nselector" DstPort 4 } Line { SrcBlock "Shift" SrcPort 1 Points [45, 0; 0, -40] DstBlock "shift\nselector" DstPort 3 } Line { SrcBlock "AddSub1" SrcPort 1 Points [15, 0] DstBlock "Assert2" DstPort 1 } Line { SrcBlock "Data\nBuffer" SrcPort 1 Points [-350, 0; 0, -25] Branch { Points [0, -40] Branch { Points [0, -40] Branch { Points [0, -40] Branch { Points [0, -40] Branch { Points [0, -40] Branch { DstBlock "Shift5" DstPort 1 } Branch { Points [0, -40] Branch { Points [0, -40] Branch { Points [0, -25; 120, 0; 0, -40] DstBlock "shift\nselector" DstPort 2 } Branch { DstBlock "Shift" DstPort 1 } } Branch { DstBlock "Shift1" DstPort 1 } } } Branch { DstBlock "Shift2" DstPort 1 } } Branch { DstBlock "Shift6" DstPort 1 } } Branch { DstBlock "Shift3" DstPort 1 } } Branch { DstBlock "Shift7" DstPort 1 } } Branch { DstBlock "Shift4" DstPort 1 } } Line { SrcBlock "en" SrcPort 1 Points [25, 0; 0, -85] DstBlock "Data\nBuffer" DstPort 2 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "Assert2" SrcPort 1 Points [0, 35] Branch { DstBlock "Q" DstPort 1 } Branch { Points [0, 155] DstBlock "Data\nBuffer" DstPort 1 } } } } Block { BlockType Reference Name "Convert" SID "9693" Ports [1, 1] Position [1085, 271, 1110, 289] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "9694" Ports [1, 1] Position [1085, 361, 1110, 379] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "1602" Ports [1, 1] Position [1122, 600, 1148, 635] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "8" bin_pt "6" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,35,1,1,white,blue,0,edca21da,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 35 35 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 35 35 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[20.33 20.33" " 23.33 20.33 23.33 23.33 23.33 20.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[17.33 17.33 20.33 20.33" " 17.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[14.33 14.33 17.33 17.33 14.33 ],[1 1 1 ])" ";\npatch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[11.33 11.33 14.33 11.33 14.33 14.33 11.33 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port" "_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "1603" Ports [1, 1] Position [1033, 660, 1057, 695] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "24,35,1,1,white,blue,0,edca21da,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 24 24 0 0 ],[0 0 35 35 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 24 24 0 0 ],[0 0 35 35 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[20.33 20.33 " "23.33 20.33 23.33 23.33 23.33 20.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[17.33 17.33 20.33 20.33 1" "7.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[14.33 14.33 17.33 17.33 14.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33 11.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_lab" "el('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "1604" Ports [2, 1] Position [1155, 817, 1225, 873] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter i" "s implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(RAM_init_size))" bin_pt "0" load_pin off rst on en on explicit_period "off" period "2" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[5 10 0 10 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,630" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,56,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 70 70 0 0 ],[0 0 56 56 0 ]);\npatch([17.2 28.76 36.76 44.76 52.76 36.76 25.2 17.2 ],[36.88 36.88 44" ".88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([25.2 36.76 28.76 17.2 25.2 ],[28.88 28.88 36.88 36.88 28.88" " ],[0.931 0.946 0.973 ]);\npatch([17.2 28.76 36.76 25.2 17.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch(" "[25.2 52.76 44.76 36.76 28.76 17.2 25.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','" "on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Data Buffer" SID "1605" Ports [5, 3] Position [1460, 1029, 1615, 1131] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Data Buffer" Location [2, 82, 1270, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "135" Block { BlockType Inport Name "Payload_Addr" SID "1606" Position [120, 208, 150, 222] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Payload_WE" SID "1607" Position [120, 238, 150, 252] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Payload_Data" SID "1608" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "1609" Position [290, 458, 320, 472] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "PktDone" SID "1610" Position [290, 523, 320, 537] Port "5" IconDisplay "Port number" } Block { BlockType SubSystem Name "AutoResponse Processing" SID "1611" Ports [5] Position [460, 479, 575, 541] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AutoResponse Processing" Location [160, 82, 1918, 1026] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "133" Block { BlockType Inport Name "Rst" SID "1612" Position [130, 293, 160, 307] IconDisplay "Port number" } Block { BlockType Inport Name "RxByteAddr" SID "1613" Position [180, 217, 210, 233] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "RxByte" SID "1614" Position [180, 243, 210, 257] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "RxByteWE" SID "1615" Position [130, 268, 160, 282] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "PktDone" SID "1616" Position [520, 508, 550, 522] Port "5" IconDisplay "Port number" } Block { BlockType SubSystem Name "Action Combining" SID "1617" Ports [6, 9] Position [600, 243, 685, 367] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Action Combining" Location [804, -89, 1148, 1044] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "254" Block { BlockType Inport Name "A0" SID "1618" Position [235, 38, 265, 52] IconDisplay "Port number" } Block { BlockType Inport Name "A1" SID "1619" Position [185, 58, 215, 72] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "A2" SID "1620" Position [235, 78, 265, 92] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "A3" SID "1621" Position [185, 98, 215, 112] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "A4" SID "1622" Position [230, 118, 260, 132] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "A5" SID "1623" Position [180, 138, 210, 152] Port "6" IconDisplay "Port number" } Block { BlockType Reference Name "BufIndex" SID "1624" Ports [6, 1] Position [395, 600, 425, 710] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "6" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,110,6,1,white,blue,0,31bf5775,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 110 110 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 110 110 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[59.44 " "59.44 63.44 59.44 63.44 63.44 63.44 59.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[55.44 55.44 59.44 59" ".44 55.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[51.44 51.44 55.44 55.44 51.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[47.44 47.44 51.44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType BusSelector Name "Bus\nSelector" SID "1625" Ports [1, 1] Position [320, 26, 325, 64] ShowName off OutputSignals "signal1" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector1" SID "1626" Ports [1, 1] Position [320, 46, 325, 84] ShowName off OutputSignals "signal1" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector10" SID "1627" Ports [1, 1] Position [320, 391, 325, 429] ShowName off OutputSignals "signal2" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector11" SID "1628" Ports [1, 1] Position [320, 411, 325, 449] ShowName off OutputSignals "signal2" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector12" SID "1629" Ports [1, 1] Position [320, 451, 325, 489] ShowName off OutputSignals "signal3" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector13" SID "1630" Ports [1, 1] Position [320, 491, 325, 529] ShowName off OutputSignals "signal3" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector14" SID "1631" Ports [1, 1] Position [320, 511, 325, 549] ShowName off OutputSignals "signal3" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector15" SID "1632" Ports [1, 1] Position [320, 471, 325, 509] ShowName off OutputSignals "signal3" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector16" SID "1633" Ports [1, 1] Position [320, 531, 325, 569] ShowName off OutputSignals "signal3" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector17" SID "1634" Ports [1, 1] Position [320, 551, 325, 589] ShowName off OutputSignals "signal3" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector18" SID "1635" Ports [1, 1] Position [320, 736, 325, 774] ShowName off OutputSignals "signal4" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector19" SID "1636" Ports [1, 1] Position [320, 756, 325, 794] ShowName off OutputSignals "signal4" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector2" SID "1637" Ports [1, 1] Position [320, 66, 325, 104] ShowName off OutputSignals "signal1" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector20" SID "1638" Ports [1, 1] Position [320, 716, 325, 754] ShowName off OutputSignals "signal4" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector21" SID "1639" Ports [1, 1] Position [320, 776, 325, 814] ShowName off OutputSignals "signal4" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector22" SID "1640" Ports [1, 1] Position [320, 796, 325, 834] ShowName off OutputSignals "signal4" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector23" SID "1641" Ports [1, 1] Position [320, 816, 325, 854] ShowName off OutputSignals "signal4" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector24" SID "1642" Ports [1, 1] Position [320, 876, 325, 914] ShowName off OutputSignals "signal5" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector25" SID "1643" Ports [1, 1] Position [320, 896, 325, 934] ShowName off OutputSignals "signal5" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector26" SID "1644" Ports [1, 1] Position [320, 856, 325, 894] ShowName off OutputSignals "signal5" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector27" SID "1645" Ports [1, 1] Position [320, 916, 325, 954] ShowName off OutputSignals "signal5" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector28" SID "1646" Ports [1, 1] Position [320, 936, 325, 974] ShowName off OutputSignals "signal5" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector29" SID "1647" Ports [1, 1] Position [320, 956, 325, 994] ShowName off OutputSignals "signal5" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector3" SID "1648" Ports [1, 1] Position [320, 86, 325, 124] ShowName off OutputSignals "signal1" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector30" SID "1649" Ports [1, 1] Position [320, 586, 325, 624] ShowName off OutputSignals "signal6" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector31" SID "1650" Ports [1, 1] Position [320, 606, 325, 644] ShowName off OutputSignals "signal6" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector32" SID "1651" Ports [1, 1] Position [320, 626, 325, 664] ShowName off OutputSignals "signal6" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector33" SID "1652" Ports [1, 1] Position [320, 646, 325, 684] ShowName off OutputSignals "signal6" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector34" SID "1653" Ports [1, 1] Position [320, 666, 325, 704] ShowName off OutputSignals "signal6" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector35" SID "1654" Ports [1, 1] Position [320, 686, 325, 724] ShowName off OutputSignals "signal6" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector36" SID "1655" Ports [1, 1] Position [320, 171, 325, 209] ShowName off OutputSignals "signal7" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector37" SID "1656" Ports [1, 1] Position [320, 191, 325, 229] ShowName off OutputSignals "signal7" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector38" SID "1657" Ports [1, 1] Position [320, 211, 325, 249] ShowName off OutputSignals "signal7" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector39" SID "1658" Ports [1, 1] Position [320, 231, 325, 269] ShowName off OutputSignals "signal7" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector4" SID "1659" Ports [1, 1] Position [320, 106, 325, 144] ShowName off OutputSignals "signal1" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector40" SID "1660" Ports [1, 1] Position [320, 251, 325, 289] ShowName off OutputSignals "signal7" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector41" SID "1661" Ports [1, 1] Position [320, 271, 325, 309] ShowName off OutputSignals "signal7" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector42" SID "1662" Ports [1, 1] Position [320, 1026, 325, 1064] ShowName off OutputSignals "signal8" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector43" SID "1663" Ports [1, 1] Position [320, 1046, 325, 1084] ShowName off OutputSignals "signal8" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector44" SID "1664" Ports [1, 1] Position [320, 1006, 325, 1044] ShowName off OutputSignals "signal8" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector45" SID "1665" Ports [1, 1] Position [320, 1066, 325, 1104] ShowName off OutputSignals "signal8" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector46" SID "1666" Ports [1, 1] Position [320, 1086, 325, 1124] ShowName off OutputSignals "signal8" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector47" SID "1667" Ports [1, 1] Position [320, 1106, 325, 1144] ShowName off OutputSignals "signal8" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector48" SID "1668" Ports [1, 1] Position [320, 1176, 325, 1214] ShowName off OutputSignals "signal9" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector49" SID "1669" Ports [1, 1] Position [320, 1216, 325, 1254] ShowName off OutputSignals "signal9" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector5" SID "1670" Ports [1, 1] Position [320, 126, 325, 164] ShowName off OutputSignals "signal1" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector50" SID "1671" Ports [1, 1] Position [320, 1156, 325, 1194] ShowName off OutputSignals "signal9" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector51" SID "1672" Ports [1, 1] Position [320, 1196, 325, 1234] ShowName off OutputSignals "signal9" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector52" SID "1673" Ports [1, 1] Position [320, 1256, 325, 1294] ShowName off OutputSignals "signal9" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector53" SID "1674" Ports [1, 1] Position [320, 1236, 325, 1274] ShowName off OutputSignals "signal9" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector6" SID "1675" Ports [1, 1] Position [320, 311, 325, 349] ShowName off OutputSignals "signal2" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector7" SID "1676" Ports [1, 1] Position [320, 331, 325, 369] ShowName off OutputSignals "signal2" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector8" SID "1677" Ports [1, 1] Position [320, 351, 325, 389] ShowName off OutputSignals "signal2" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector9" SID "1678" Ports [1, 1] Position [320, 371, 325, 409] ShowName off OutputSignals "signal2" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "DoTx " SID "1679" Ports [6, 1] Position [395, 465, 425, 575] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "6" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,110,6,1,white,blue,0,31bf5775,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 110 110 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 110 110 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[59.44 " "59.44 63.44 59.44 63.44 63.44 63.44 59.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[55.44 55.44 59.44 59" ".44 55.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[51.44 51.44 55.44 55.44 51.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[47.44 47.44 51.44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "HdrTranslate" SID "1680" Ports [6, 1] Position [395, 40, 425, 150] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "6" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,110,6,1,white,blue,0,31bf5775,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 110 110 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 110 110 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[59.44 " "59.44 63.44 59.44 63.44 63.44 63.44 59.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[55.44 55.44 59.44 59" ".44 55.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[51.44 51.44 55.44 55.44 51.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[47.44 47.44 51.44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Param " SID "1681" Ports [6, 1] Position [395, 325, 425, 435] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "6" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,110,6,1,white,blue,0,31bf5775,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 110 110 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 110 110 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[59.44 " "59.44 63.44 59.44 63.44 63.44 63.44 59.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[55.44 55.44 59.44 59" ".44 55.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[51.44 51.44 55.44 55.44 51.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[47.44 47.44 51.44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Re Transmit Rx CRCs" SID "1682" Ports [6, 1] Position [395, 1170, 425, 1280] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "6" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,110,6,1,white,blue,0,31bf5775,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 110 110 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 110 110 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[59.44 " "59.44 63.44 59.44 63.44 63.44 63.44 59.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[55.44 55.44 59.44 59" ".44 55.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[51.44 51.44 55.44 55.44 51.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[47.44 47.44 51.44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "SetFlagA " SID "1683" Ports [6, 1] Position [395, 730, 425, 840] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "6" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,110,6,1,white,blue,0,31bf5775,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 110 110 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 110 110 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[59.44 " "59.44 63.44 59.44 63.44 63.44 63.44 59.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[55.44 55.44 59.44 59" ".44 55.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[51.44 51.44 55.44 55.44 51.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[47.44 47.44 51.44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "SetFlagB" SID "1684" Ports [6, 1] Position [395, 870, 425, 980] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "6" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,110,6,1,white,blue,0,31bf5775,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 110 110 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 110 110 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[59.44 " "59.44 63.44 59.44 63.44 63.44 63.44 59.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[55.44 55.44 59.44 59" ".44 55.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[51.44 51.44 55.44 55.44 51.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[47.44 47.44 51.44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "SwapAnt" SID "1685" Ports [6, 1] Position [395, 1020, 425, 1130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "6" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,110,6,1,white,blue,0,31bf5775,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 110 110 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 110 110 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[59.44 " "59.44 63.44 59.44 63.44 63.44 63.44 59.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[55.44 55.44 59.44 59" ".44 55.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[51.44 51.44 55.44 55.44 51.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[47.44 47.44 51.44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Use PreCFO" SID "1686" Ports [6, 1] Position [395, 185, 425, 295] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "6" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,110,6,1,white,blue,0,31bf5775,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 110 110 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 110 110 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[59.44 " "59.44 63.44 59.44 63.44 63.44 63.44 59.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[55.44 55.44 59.44 59" ".44 55.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[51.44 51.44 55.44 55.44 51.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[47.44 47.44 51.44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Hdr Translate" SID "1687" Position [510, 88, 540, 102] IconDisplay "Port number" } Block { BlockType Outport Name "PreCFO" SID "1688" Position [510, 233, 540, 247] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name " SwapAnt" SID "1689" Position [515, 1068, 545, 1082] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "ReTxCRC" SID "1690" Position [515, 1218, 545, 1232] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Param" SID "1691" Position [505, 373, 535, 387] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "DoTx" SID "1692" Position [505, 513, 535, 527] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Buf Index" SID "1693" Position [505, 648, 535, 662] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Set FlagA" SID "1694" Position [515, 778, 545, 792] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Set FlagB" SID "1695" Position [515, 918, 545, 932] Port "9" IconDisplay "Port number" } Line { SrcBlock "A3" SrcPort 1 Points [60, 0] Branch { DstBlock "Bus\nSelector3" DstPort 1 } Branch { Points [0, 145] Branch { Points [0, 140] Branch { DstBlock "Bus\nSelector9" DstPort 1 } Branch { Points [0, 140] Branch { Points [0, 135] Branch { DstBlock "Bus\nSelector33" DstPort 1 } Branch { Points [0, 130] Branch { DstBlock "Bus\nSelector21" DstPort 1 } Branch { Points [0, 140] Branch { Points [0, 0] DstBlock "Bus\nSelector27" DstPort 1 } Branch { Points [0, 150] Branch { DstBlock "Bus\nSelector45" DstPort 1 } Branch { Points [0, 150] DstBlock "Bus\nSelector49" DstPort 1 } } } } } Branch { DstBlock "Bus\nSelector14" DstPort 1 } } } Branch { DstBlock "Bus\nSelector39" DstPort 1 } } } Line { SrcBlock "A4" SrcPort 1 Points [10, 0] Branch { DstBlock "Bus\nSelector4" DstPort 1 } Branch { Points [0, 145] Branch { Points [0, 140] Branch { DstBlock "Bus\nSelector10" DstPort 1 } Branch { Points [0, 140] Branch { Points [0, 135] Branch { DstBlock "Bus\nSelector34" DstPort 1 } Branch { Points [0, 130] Branch { DstBlock "Bus\nSelector22" DstPort 1 } Branch { Points [0, 140] Branch { DstBlock "Bus\nSelector28" DstPort 1 } Branch { Points [0, 150] Branch { DstBlock "Bus\nSelector46" DstPort 1 } Branch { Points [0, 150] DstBlock "Bus\nSelector53" DstPort 1 } } } } } Branch { DstBlock "Bus\nSelector16" DstPort 1 } } } Branch { DstBlock "Bus\nSelector40" DstPort 1 } } } Line { SrcBlock "A5" SrcPort 1 Points [55, 0] Branch { DstBlock "Bus\nSelector5" DstPort 1 } Branch { Points [0, 145] Branch { DstBlock "Bus\nSelector41" DstPort 1 } Branch { Points [0, 140] Branch { DstBlock "Bus\nSelector11" DstPort 1 } Branch { Points [0, 140] Branch { DstBlock "Bus\nSelector17" DstPort 1 } Branch { Points [0, 135] Branch { DstBlock "Bus\nSelector35" DstPort 1 } Branch { Points [0, 130] Branch { DstBlock "Bus\nSelector23" DstPort 1 } Branch { Points [0, 140] Branch { DstBlock "Bus\nSelector29" DstPort 1 } Branch { Points [0, 150] Branch { DstBlock "Bus\nSelector47" DstPort 1 } Branch { Points [0, 150] DstBlock "Bus\nSelector52" DstPort 1 } } } } } } } } } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector29" SrcPort 1 DstBlock "SetFlagB" DstPort 6 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector39" SrcPort 1 DstBlock "Use PreCFO" DstPort 4 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector40" SrcPort 1 DstBlock "Use PreCFO" DstPort 5 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector41" SrcPort 1 DstBlock "Use PreCFO" DstPort 6 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector38" SrcPort 1 DstBlock "Use PreCFO" DstPort 3 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector37" SrcPort 1 DstBlock "Use PreCFO" DstPort 2 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector36" SrcPort 1 DstBlock "Use PreCFO" DstPort 1 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector35" SrcPort 1 DstBlock "BufIndex" DstPort 6 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector34" SrcPort 1 DstBlock "BufIndex" DstPort 5 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector33" SrcPort 1 DstBlock "BufIndex" DstPort 4 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector32" SrcPort 1 DstBlock "BufIndex" DstPort 3 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector31" SrcPort 1 DstBlock "BufIndex" DstPort 2 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector30" SrcPort 1 DstBlock "BufIndex" DstPort 1 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector28" SrcPort 1 DstBlock "SetFlagB" DstPort 5 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector27" SrcPort 1 DstBlock "SetFlagB" DstPort 4 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector25" SrcPort 1 DstBlock "SetFlagB" DstPort 3 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector24" SrcPort 1 DstBlock "SetFlagB" DstPort 2 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector26" SrcPort 1 DstBlock "SetFlagB" DstPort 1 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector23" SrcPort 1 DstBlock "SetFlagA " DstPort 6 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector22" SrcPort 1 DstBlock "SetFlagA " DstPort 5 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector21" SrcPort 1 DstBlock "SetFlagA " DstPort 4 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector19" SrcPort 1 DstBlock "SetFlagA " DstPort 3 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector18" SrcPort 1 DstBlock "SetFlagA " DstPort 2 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector20" SrcPort 1 DstBlock "SetFlagA " DstPort 1 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector17" SrcPort 1 DstBlock "DoTx " DstPort 6 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector16" SrcPort 1 DstBlock "DoTx " DstPort 5 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector14" SrcPort 1 DstBlock "DoTx " DstPort 4 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector13" SrcPort 1 DstBlock "DoTx " DstPort 3 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector15" SrcPort 1 DstBlock "DoTx " DstPort 2 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector12" SrcPort 1 DstBlock "DoTx " DstPort 1 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector11" SrcPort 1 DstBlock "Param " DstPort 6 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector10" SrcPort 1 DstBlock "Param " DstPort 5 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector9" SrcPort 1 DstBlock "Param " DstPort 4 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector8" SrcPort 1 DstBlock "Param " DstPort 3 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector7" SrcPort 1 DstBlock "Param " DstPort 2 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector6" SrcPort 1 DstBlock "Param " DstPort 1 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector5" SrcPort 1 DstBlock "HdrTranslate" DstPort 6 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector4" SrcPort 1 DstBlock "HdrTranslate" DstPort 5 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector3" SrcPort 1 DstBlock "HdrTranslate" DstPort 4 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector2" SrcPort 1 DstBlock "HdrTranslate" DstPort 3 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector1" SrcPort 1 DstBlock "HdrTranslate" DstPort 2 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector" SrcPort 1 DstBlock "HdrTranslate" DstPort 1 } Line { SrcBlock "A2" SrcPort 1 Points [15, 0] Branch { Points [0, 145] Branch { DstBlock "Bus\nSelector38" DstPort 1 } Branch { Points [0, 140] Branch { DstBlock "Bus\nSelector8" DstPort 1 } Branch { Points [0, 140] Branch { Points [0, 135] Branch { DstBlock "Bus\nSelector32" DstPort 1 } Branch { Points [0, 130] Branch { DstBlock "Bus\nSelector19" DstPort 1 } Branch { Points [0, 140] Branch { DstBlock "Bus\nSelector25" DstPort 1 } Branch { Points [0, 150] Branch { DstBlock "Bus\nSelector43" DstPort 1 } Branch { Points [0, 150] DstBlock "Bus\nSelector51" DstPort 1 } } } } } Branch { DstBlock "Bus\nSelector13" DstPort 1 } } } } Branch { DstBlock "Bus\nSelector2" DstPort 1 } } Line { SrcBlock "A1" SrcPort 1 Points [70, 0] Branch { Points [0, 145] Branch { DstBlock "Bus\nSelector37" DstPort 1 } Branch { Points [0, 140] Branch { DstBlock "Bus\nSelector7" DstPort 1 } Branch { Points [0, 140] Branch { Points [0, 135] Branch { DstBlock "Bus\nSelector31" DstPort 1 } Branch { Points [0, 130] Branch { DstBlock "Bus\nSelector18" DstPort 1 } Branch { Points [0, 140] Branch { DstBlock "Bus\nSelector24" DstPort 1 } Branch { Points [0, 150] Branch { DstBlock "Bus\nSelector42" DstPort 1 } Branch { Points [0, 150] DstBlock "Bus\nSelector48" DstPort 1 } } } } } Branch { DstBlock "Bus\nSelector15" DstPort 1 } } } } Branch { DstBlock "Bus\nSelector1" DstPort 1 } } Line { SrcBlock "A0" SrcPort 1 Points [25, 0] Branch { Points [0, 145] Branch { DstBlock "Bus\nSelector36" DstPort 1 } Branch { Points [0, 140] Branch { Points [0, 140] Branch { Points [0, 135] Branch { DstBlock "Bus\nSelector30" DstPort 1 } Branch { Points [0, 130] Branch { DstBlock "Bus\nSelector20" DstPort 1 } Branch { Points [0, 140] Branch { DstBlock "Bus\nSelector26" DstPort 1 } Branch { Points [0, 150] Branch { DstBlock "Bus\nSelector44" DstPort 1 } Branch { Points [0, 150] DstBlock "Bus\nSelector50" DstPort 1 } } } } } Branch { DstBlock "Bus\nSelector12" DstPort 1 } } Branch { DstBlock "Bus\nSelector6" DstPort 1 } } } Branch { DstBlock "Bus\nSelector" DstPort 1 } } Line { SrcBlock "HdrTranslate" SrcPort 1 DstBlock "Hdr Translate" DstPort 1 } Line { SrcBlock "Use PreCFO" SrcPort 1 DstBlock "PreCFO" DstPort 1 } Line { SrcBlock "Param " SrcPort 1 DstBlock "Param" DstPort 1 } Line { SrcBlock "DoTx " SrcPort 1 DstBlock "DoTx" DstPort 1 } Line { SrcBlock "BufIndex" SrcPort 1 DstBlock "Buf Index" DstPort 1 } Line { SrcBlock "SetFlagA " SrcPort 1 DstBlock "Set FlagA" DstPort 1 } Line { SrcBlock "SetFlagB" SrcPort 1 DstBlock "Set FlagB" DstPort 1 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector47" SrcPort 1 DstBlock "SwapAnt" DstPort 6 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector46" SrcPort 1 DstBlock "SwapAnt" DstPort 5 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector45" SrcPort 1 DstBlock "SwapAnt" DstPort 4 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector43" SrcPort 1 DstBlock "SwapAnt" DstPort 3 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector42" SrcPort 1 DstBlock "SwapAnt" DstPort 2 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector44" SrcPort 1 DstBlock "SwapAnt" DstPort 1 } Line { SrcBlock "SwapAnt" SrcPort 1 DstBlock " SwapAnt" DstPort 1 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector50" SrcPort 1 DstBlock "Re Transmit Rx CRCs" DstPort 1 } Line { SrcBlock "Re Transmit Rx CRCs" SrcPort 1 DstBlock "ReTxCRC" DstPort 1 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector48" SrcPort 1 DstBlock "Re Transmit Rx CRCs" DstPort 2 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector51" SrcPort 1 DstBlock "Re Transmit Rx CRCs" DstPort 3 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector49" SrcPort 1 DstBlock "Re Transmit Rx CRCs" DstPort 4 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector53" SrcPort 1 DstBlock "Re Transmit Rx CRCs" DstPort 5 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector52" SrcPort 1 DstBlock "Re Transmit Rx CRCs" DstPort 6 } } } Block { BlockType SubSystem Name "Action Decoding" SID "1696" Ports [3, 6] Position [450, 241, 560, 369] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Action Decoding" Location [460, 279, 785, 789] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "117" Block { BlockType Inport Name "Match" SID "1697" Position [150, 113, 180, 127] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "FlagA" SID "1698" Position [115, 138, 145, 152] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "FlagB" SID "1699" Position [150, 163, 180, 177] Port "3" IconDisplay "Port number" } Block { BlockType SubSystem Name "Action0" SID "1700" Ports [3, 9] Position [275, 104, 375, 186] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Action0" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Match" SID "1701" Position [495, 228, 525, 242] IconDisplay "Port number" } Block { BlockType Inport Name "FlagA" SID "1702" Position [525, 368, 555, 382] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "FlagB" SID "1703" Position [525, 403, 555, 417] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "1704" Ports [1, 1] Position [740, 218, 765, 232] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "1705" Ports [1, 1] Position [740, 233, 765, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert10" SID "1706" Ports [1, 1] Position [740, 458, 765, 472] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert11" SID "1707" Ports [1, 1] Position [740, 493, 765, 507] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert12" SID "1708" Ports [1, 1] Position [740, 528, 765, 542] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "1709" Ports [1, 1] Position [740, 248, 765, 262] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "1710" Ports [1, 1] Position [740, 263, 765, 277] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "1711" Ports [1, 1] Position [740, 278, 765, 292] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert5" SID "1712" Ports [1, 1] Position [740, 293, 765, 307] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert6" SID "1713" Ports [1, 1] Position [740, 308, 765, 322] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "1714" Ports [1, 1] Position [745, 663, 770, 677] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert8" SID "1715" Ports [1, 1] Position [745, 708, 770, 722] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert9" SID "1716" Ports [1, 1] Position [740, 423, 765, 437] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled" SID "1717" Ports [0, 1] Position [520, 596, 545, 614] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "ActionID_Disabled" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'0');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Disabled1" SID "1718" Ports [0, 1] Position [595, 170, 615, 190] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^8-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "20,20,0,1,white,blue,0,13fa6234,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 20 20 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[12.22 12." "22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output" "',1,'255');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled2" SID "1719" Ports [0, 1] Position [945, 924, 970, 946] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "5" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled3" SID "1720" Ports [0, 1] Position [985, 594, 1010, 616] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Field Slices" SID "1721" Ports [1, 12] Position [285, 212, 405, 613] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Field Slices" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "186" Block { BlockType Inport Name "Reg 32b" SID "1722" Position [150, 18, 180, 32] IconDisplay "Port number" } Block { BlockType Reference Name "bits[10]" SID "1723" Ports [1, 1] Position [245, 106, 280, 124] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "10" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[11]" SID "1724" Ports [1, 1] Position [245, 146, 280, 164] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "11" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[12]" SID "1725" Ports [1, 1] Position [245, 186, 280, 204] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "12" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[13]" SID "1726" Ports [1, 1] Position [245, 231, 280, 249] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "13" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[14]" SID "1727" Ports [1, 1] Position [245, 276, 280, 294] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "14" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[15]" SID "1728" Ports [1, 1] Position [245, 316, 280, 334] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "15" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[16]" SID "1729" Ports [1, 1] Position [245, 356, 280, 374] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[17]" SID "1730" Ports [1, 1] Position [245, 396, 280, 414] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "17" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[23:18]" SID "1731" Ports [1, 1] Position [245, 441, 280, 459] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "6" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "18" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[31:24]" SID "1732" Ports [1, 1] Position [245, 481, 280, 499] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[7:0]" SID "1733" Ports [1, 1] Position [245, 16, 280, 34] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[9]" SID "1734" Ports [1, 1] Position [245, 61, 280, 79] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "9" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Masks_Match" SID "1735" Position [345, 18, 375, 32] IconDisplay "Port number" } Block { BlockType Outport Name "Masks_GoodHdr" SID "1736" Position [345, 148, 375, 162] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_BadPkt" SID "1737" Position [345, 188, 375, 202] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_GoodPkt" SID "1738" Position [345, 233, 375, 247] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_FlagA" SID "1739" Position [345, 278, 375, 292] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_FlagB" SID "1740" Position [345, 318, 375, 332] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Act_UseTrans" SID "1741" Position [345, 358, 375, 372] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Act_UsePreCFO" SID "1742" Position [345, 398, 375, 412] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Act_SwapAnt" SID "1743" Position [345, 108, 375, 122] Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "Act_ReTxCRC" SID "1744" Position [345, 63, 375, 77] Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "Act_Param" SID "1745" Position [345, 483, 375, 497] Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "Act_ID" SID "1746" Position [345, 443, 375, 457] Port "12" IconDisplay "Port number" } Line { SrcBlock "bits[31:24]" SrcPort 1 DstBlock "Act_Param" DstPort 1 } Line { SrcBlock "bits[23:18]" SrcPort 1 DstBlock "Act_ID" DstPort 1 } Line { SrcBlock "bits[16]" SrcPort 1 DstBlock "Act_UseTrans" DstPort 1 } Line { SrcBlock "bits[15]" SrcPort 1 DstBlock "Masks_FlagB" DstPort 1 } Line { SrcBlock "bits[14]" SrcPort 1 DstBlock "Masks_FlagA" DstPort 1 } Line { SrcBlock "bits[13]" SrcPort 1 DstBlock "Masks_GoodPkt" DstPort 1 } Line { SrcBlock "bits[12]" SrcPort 1 DstBlock "Masks_BadPkt" DstPort 1 } Line { SrcBlock "bits[11]" SrcPort 1 DstBlock "Masks_GoodHdr" DstPort 1 } Line { SrcBlock "Reg 32b" SrcPort 1 Points [30, 0] Branch { DstBlock "bits[7:0]" DstPort 1 } Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 40] Branch { Points [0, 40] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 40] Branch { Points [0, 40] Branch { DstBlock "bits[16]" DstPort 1 } Branch { Points [0, 40] Branch { Points [0, 45] Branch { Points [0, 40] DstBlock "bits[31:24]" DstPort 1 } Branch { DstBlock "bits[23:18]" DstPort 1 } } Branch { DstBlock "bits[17]" DstPort 1 } } } Branch { DstBlock "bits[15]" DstPort 1 } } Branch { DstBlock "bits[14]" DstPort 1 } } Branch { DstBlock "bits[13]" DstPort 1 } } Branch { DstBlock "bits[12]" DstPort 1 } } Branch { DstBlock "bits[11]" DstPort 1 } } Branch { DstBlock "bits[10]" DstPort 1 } } Branch { DstBlock "bits[9]" DstPort 1 } } } Line { SrcBlock "bits[7:0]" SrcPort 1 DstBlock "Masks_Match" DstPort 1 } Line { SrcBlock "bits[17]" SrcPort 1 DstBlock "Act_UsePreCFO" DstPort 1 } Line { SrcBlock "bits[10]" SrcPort 1 DstBlock "Act_SwapAnt" DstPort 1 } Line { SrcBlock "bits[9]" SrcPort 1 DstBlock "Act_ReTxCRC" DstPort 1 } Annotation { Name "Action Registers:\n[31:24] - actionParam (like Tx Delay)\n[23:18] - actionID (pktBuf choice)\n[17] - " "use CFO pre-spin at Tx\n[16] - use header translator\n[15] - require FlagB\n[14] - require FlagA\n[13] - require" " goodPkt\n[12] - require badPkt\n[11] - require goodHeader\n[10] - Swap Tx stream/antenna\n[9] - Use received ch" "ecksums\n[8] - reserved\n[7:0] - require match[7:0]" Position [25, 161] HorizontalAlignment "left" } } } Block { BlockType From Name "From1" SID "1747" Position [455, 333, 555, 347] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodPkt" TagVisibility "global" } Block { BlockType From Name "From2" SID "1748" Position [455, 298, 555, 312] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_BadPkt" TagVisibility "global" } Block { BlockType From Name "From3" SID "1749" Position [455, 263, 560, 277] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodHeader" TagVisibility "global" } Block { BlockType From Name "From4" SID "1750" Position [60, 407, 220, 423] ShowName off CloseFcn "tagdialog Close" GotoTag "regAutoReply_action0" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "1751" Ports [1, 1] Position [450, 247, 475, 263] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1752" Ports [1, 1] Position [450, 212, 475, 228] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "1753" Ports [1, 1] Position [450, 282, 475, 298] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "1754" Ports [1, 1] Position [450, 317, 475, 333] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter4" SID "1755" Ports [1, 1] Position [450, 352, 475, 368] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter5" SID "1756" Ports [1, 1] Position [450, 387, 475, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1757" Ports [2, 1] Position [590, 245, 625, 280] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical10" SID "1758" Ports [3, 1] Position [895, 767, 930, 803] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,36,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('bla" "ck');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical11" SID "1759" Ports [2, 1] Position [895, 405, 930, 440] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical12" SID "1760" Ports [2, 1] Position [895, 440, 930, 475] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical13" SID "1761" Ports [2, 1] Position [895, 475, 930, 510] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical14" SID "1762" Ports [2, 1] Position [895, 510, 930, 545] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "1763" Ports [2, 1] Position [590, 210, 625, 245] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "1764" Ports [2, 1] Position [590, 280, 625, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "1765" Ports [2, 1] Position [590, 315, 625, 350] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "1766" Ports [2, 1] Position [590, 350, 625, 385] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "1767" Ports [2, 1] Position [590, 385, 625, 420] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "1768" Ports [7, 1] Position [790, 213, 825, 327] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "7" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,114,7,1,white,blue,0,c0601ce4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 114 114 0 ],[0.77 0." "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 114 114 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[62.55" " 62.55 67.55 62.55 67.55 67.55 67.55 62.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[57.55 57.55 62." "55 62.55 57.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[52.55 52.55 57.55 57.55 52.55 ]," "[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[47.55 47.55 52.55 47.55 52.55 52.55 47.55 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n" "\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical8" SID "1769" Ports [2, 1] Position [895, 315, 930, 350] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "1770" Ports [2, 1] Position [895, 355, 930, 390] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "MaxPktBuf" SID "1771" Ports [0, 1] Position [545, 792, 580, 818] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "32" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,b5591290,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'32');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1772" Ports [3, 1] Position [1030, 888, 1060, 982] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "30,94,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 55.44 51.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[47" ".44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[43.44 43.44 47.44 47.44" " 43.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 39.44 43.44 43.44 39.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "1773" Ports [3, 1] Position [1055, 558, 1085, 652] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "30,94,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 55.44 51.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[47" ".44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[43.44 43.44 47.44 47.44" " 43.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 39.44 43.44 43.44 39.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "1774" Ports [2, 1] Position [595, 594, 630, 636] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a!=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,850de6e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\neq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "1775" Ports [2, 1] Position [655, 649, 690, 691] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "1776" Ports [2, 1] Position [655, 694, 690, 736] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "1777" Ports [2, 1] Position [655, 774, 690, 816] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,a8a3a52f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'62');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "SetFlagB" SID "1780" Ports [0, 1] Position [545, 712, 580, 738] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "ActionID_SetFlagB" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,f486ba17,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'61');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "bits[5:0]" SID "1781" Ports [1, 1] Position [945, 956, 980, 974] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "UseTrans" SID "1782" Position [1000, 418, 1030, 432] IconDisplay "Port number" } Block { BlockType Outport Name "Param" SID "1783" Position [1140, 598, 1170, 612] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "DoTx" SID "1784" Position [1005, 778, 1035, 792] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Set_FlagA" SID "1785" Position [1000, 328, 1030, 342] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Set_FlagB" SID "1786" Position [1000, 368, 1030, 382] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "TxBufNum" SID "1787" Position [1115, 928, 1145, 942] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "UsePreCFO" SID "1788" Position [1000, 453, 1030, 467] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "SwapAnt" SID "1789" Position [1000, 488, 1030, 502] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "ReTxCRC" SID "1790" Position [1000, 523, 1030, 537] Port "9" IconDisplay "Port number" } Line { SrcBlock "Mux" SrcPort 1 DstBlock "TxBufNum" DstPort 1 } Line { SrcBlock "Disabled2" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "bits[5:0]" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "FlagB" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "FlagA" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 11 Points [455, 0; 0, 65] DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Field Slices" SrcPort 7 DstBlock "Convert9" DstPort 1 } Line { SrcBlock "Match" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical10" SrcPort 1 Points [30, 0] Branch { Points [0, 120] DstBlock "Mux" DstPort 1 } Branch { DstBlock "DoTx" DstPort 1 } } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical10" DstPort 3 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Convert8" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "Logical9" SrcPort 1 DstBlock "Set_FlagB" DstPort 1 } Line { SrcBlock "Logical7" SrcPort 1 Points [40, 0; 0, 55] Branch { Points [0, 40] Branch { DstBlock "Logical9" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "Logical11" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "Logical12" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "Logical13" DstPort 1 } Branch { Points [0, 35] Branch { Points [0, 55] Branch { Points [0, 200] DstBlock "Logical10" DstPort 1 } Branch { Labels [1, 0] DstBlock "Mux1" DstPort 1 } } Branch { DstBlock "Logical14" DstPort 1 } } } } } } Branch { DstBlock "Logical8" DstPort 1 } } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "Set_FlagA" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [90, 0] Branch { DstBlock "Convert6" DstPort 1 } Branch { Points [130, 0; 0, 170] DstBlock "Logical10" DstPort 2 } } Line { SrcBlock "Logical6" SrcPort 1 Points [80, 0; 0, -105] DstBlock "Convert5" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 Points [65, 0; 0, -85] DstBlock "Convert4" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 Points [50, 0; 0, -65] DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 Points [35, 0; 0, -45] DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [30, 0; 0, -25] DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "MaxPktBuf" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "SetFlagB" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "SetFlagA" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 12 Points [85, 0; 0, 20] Branch { Points [0, 20; 135, 0; 0, 15] Branch { Points [0, 45] Branch { DstBlock "Relational2" DstPort 1 } Branch { Points [0, 80] Branch { DstBlock "Relational3" DstPort 1 } Branch { Points [0, 180] DstBlock "bits[5:0]" DstPort 1 } } } Branch { DstBlock "Relational1" DstPort 1 } } Branch { DstBlock "Relational" DstPort 2 } } Line { SrcBlock "Inverter5" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 6 DstBlock "Inverter5" DstPort 1 } Line { SrcBlock "Inverter4" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 5 DstBlock "Inverter4" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 4 DstBlock "Inverter3" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 3 DstBlock "Inverter2" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 2 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Field Slices" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Logical7" DstPort 3 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Logical7" DstPort 4 } Line { SrcBlock "Convert4" SrcPort 1 DstBlock "Logical7" DstPort 5 } Line { SrcBlock "Convert5" SrcPort 1 DstBlock "Logical7" DstPort 6 } Line { SrcBlock "Convert6" SrcPort 1 DstBlock "Logical7" DstPort 7 } Line { SrcBlock "Convert7" SrcPort 1 Points [50, 0; 0, -330] DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Convert8" SrcPort 1 Points [60, 0; 0, -335] DstBlock "Logical9" DstPort 2 } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Disabled1" SrcPort 1 Points [25, 0] DstBlock "Relational4" DstPort 1 } Line { SrcBlock "Logical11" SrcPort 1 DstBlock "UseTrans" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Param" DstPort 1 } Line { SrcBlock "Disabled3" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Convert9" SrcPort 1 DstBlock "Logical11" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 8 DstBlock "Convert10" DstPort 1 } Line { SrcBlock "Convert10" SrcPort 1 DstBlock "Logical12" DstPort 2 } Line { SrcBlock "Logical12" SrcPort 1 DstBlock "UsePreCFO" DstPort 1 } Line { SrcBlock "Logical13" SrcPort 1 DstBlock "SwapAnt" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 9 DstBlock "Convert11" DstPort 1 } Line { SrcBlock "Convert11" SrcPort 1 DstBlock "Logical13" DstPort 2 } Line { SrcBlock "Disabled" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 10 DstBlock "Convert12" DstPort 1 } Line { SrcBlock "Convert12" SrcPort 1 DstBlock "Logical14" DstPort 2 } Line { SrcBlock "Logical14" SrcPort 1 DstBlock "ReTxCRC" DstPort 1 } Annotation { Name "ActionIDs:\n0: Action inactive (do nothing)\n1 - 31: AutoTx from this pktBuf\n32 - 60: Reserved\n61: " "Set Flag B\n62: Set Flag A" Position [466, 898] HorizontalAlignment "left" } Annotation { Name "Only assert TxBufNum if this action\nactually triggers a transmission. It must\nbe zero for all other" " actions!" Position [1043, 1024] } } } Block { BlockType SubSystem Name "Action1" SID "1791" Ports [3, 9] Position [275, 204, 375, 286] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Action1" Location [202, 70, 1902, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Match" SID "1792" Position [495, 228, 525, 242] IconDisplay "Port number" } Block { BlockType Inport Name "FlagA" SID "1793" Position [525, 368, 555, 382] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "FlagB" SID "1794" Position [525, 403, 555, 417] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "1795" Ports [1, 1] Position [740, 218, 765, 232] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "1796" Ports [1, 1] Position [740, 233, 765, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert10" SID "1797" Ports [1, 1] Position [740, 458, 765, 472] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert11" SID "1798" Ports [1, 1] Position [740, 493, 765, 507] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert12" SID "1799" Ports [1, 1] Position [740, 528, 765, 542] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "1800" Ports [1, 1] Position [740, 248, 765, 262] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "1801" Ports [1, 1] Position [740, 263, 765, 277] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "1802" Ports [1, 1] Position [740, 278, 765, 292] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert5" SID "1803" Ports [1, 1] Position [740, 293, 765, 307] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert6" SID "1804" Ports [1, 1] Position [740, 308, 765, 322] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "1805" Ports [1, 1] Position [745, 663, 770, 677] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert8" SID "1806" Ports [1, 1] Position [745, 708, 770, 722] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert9" SID "1807" Ports [1, 1] Position [740, 423, 765, 437] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled" SID "1808" Ports [0, 1] Position [520, 596, 545, 614] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "ActionID_Disabled" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'0');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Disabled1" SID "1809" Ports [0, 1] Position [595, 170, 615, 190] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^8-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "20,20,0,1,white,blue,0,13fa6234,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 20 20 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[12.22 12." "22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output" "',1,'255');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled2" SID "1810" Ports [0, 1] Position [945, 924, 970, 946] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "5" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled3" SID "1811" Ports [0, 1] Position [985, 594, 1010, 616] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Field Slices" SID "1812" Ports [1, 12] Position [285, 212, 405, 613] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Field Slices" Location [202, 70, 1918, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "186" Block { BlockType Inport Name "Reg 32b" SID "1813" Position [150, 18, 180, 32] IconDisplay "Port number" } Block { BlockType Reference Name "bits[10]" SID "1814" Ports [1, 1] Position [245, 106, 280, 124] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "10" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[11]" SID "1815" Ports [1, 1] Position [245, 146, 280, 164] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "11" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[12]" SID "1816" Ports [1, 1] Position [245, 186, 280, 204] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "12" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[13]" SID "1817" Ports [1, 1] Position [245, 231, 280, 249] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "13" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[14]" SID "1818" Ports [1, 1] Position [245, 276, 280, 294] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "14" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[15]" SID "1819" Ports [1, 1] Position [245, 316, 280, 334] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "15" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[16]" SID "1820" Ports [1, 1] Position [245, 356, 280, 374] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[17]" SID "1821" Ports [1, 1] Position [245, 396, 280, 414] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "17" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[23:18]" SID "1822" Ports [1, 1] Position [245, 441, 280, 459] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "6" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "18" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[31:24]" SID "1823" Ports [1, 1] Position [245, 481, 280, 499] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[7:0]" SID "1824" Ports [1, 1] Position [245, 16, 280, 34] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[9]" SID "1825" Ports [1, 1] Position [245, 61, 280, 79] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "9" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Masks_Match" SID "1826" Position [345, 18, 375, 32] IconDisplay "Port number" } Block { BlockType Outport Name "Masks_GoodHdr" SID "1827" Position [345, 148, 375, 162] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_BadPkt" SID "1828" Position [345, 188, 375, 202] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_GoodPkt" SID "1829" Position [345, 233, 375, 247] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_FlagA" SID "1830" Position [345, 278, 375, 292] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_FlagB" SID "1831" Position [345, 318, 375, 332] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Act_UseTrans" SID "1832" Position [345, 358, 375, 372] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Act_UsePreCFO" SID "1833" Position [345, 398, 375, 412] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Act_SwapAnt" SID "1834" Position [345, 108, 375, 122] Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "Act_ReTxCRC" SID "1835" Position [345, 63, 375, 77] Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "Act_Param" SID "1836" Position [345, 483, 375, 497] Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "Act_ID" SID "1837" Position [345, 443, 375, 457] Port "12" IconDisplay "Port number" } Line { SrcBlock "bits[9]" SrcPort 1 DstBlock "Act_ReTxCRC" DstPort 1 } Line { SrcBlock "bits[10]" SrcPort 1 DstBlock "Act_SwapAnt" DstPort 1 } Line { SrcBlock "bits[17]" SrcPort 1 DstBlock "Act_UsePreCFO" DstPort 1 } Line { SrcBlock "bits[7:0]" SrcPort 1 DstBlock "Masks_Match" DstPort 1 } Line { SrcBlock "Reg 32b" SrcPort 1 Points [30, 0] Branch { Points [0, 45] Branch { DstBlock "bits[9]" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "bits[10]" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "bits[11]" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "bits[12]" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "bits[13]" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "bits[14]" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "bits[15]" DstPort 1 } Branch { Points [0, 40] Branch { Points [0, 40] Branch { DstBlock "bits[17]" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "bits[23:18]" DstPort 1 } Branch { Points [0, 40] DstBlock "bits[31:24]" DstPort 1 } } } Branch { DstBlock "bits[16]" DstPort 1 } } } } } } } } } Branch { DstBlock "bits[7:0]" DstPort 1 } } Line { SrcBlock "bits[11]" SrcPort 1 DstBlock "Masks_GoodHdr" DstPort 1 } Line { SrcBlock "bits[12]" SrcPort 1 DstBlock "Masks_BadPkt" DstPort 1 } Line { SrcBlock "bits[13]" SrcPort 1 DstBlock "Masks_GoodPkt" DstPort 1 } Line { SrcBlock "bits[14]" SrcPort 1 DstBlock "Masks_FlagA" DstPort 1 } Line { SrcBlock "bits[15]" SrcPort 1 DstBlock "Masks_FlagB" DstPort 1 } Line { SrcBlock "bits[16]" SrcPort 1 DstBlock "Act_UseTrans" DstPort 1 } Line { SrcBlock "bits[23:18]" SrcPort 1 DstBlock "Act_ID" DstPort 1 } Line { SrcBlock "bits[31:24]" SrcPort 1 DstBlock "Act_Param" DstPort 1 } Annotation { Name "Action Registers:\n[31:24] - actionParam (like Tx Delay)\n[23:18] - actionID (pktBuf choice)\n[17] - " "use CFO pre-spin at Tx\n[16] - use header translator\n[15] - require FlagB\n[14] - require FlagA\n[13] - require" " goodPkt\n[12] - require badPkt\n[11] - require goodHeader\n[10] - Swap Tx stream/antenna\n[9] - Use received ch" "ecksums\n[8] - reserved\n[7:0] - require match[7:0]" Position [25, 161] HorizontalAlignment "left" } } } Block { BlockType From Name "From1" SID "1838" Position [455, 333, 555, 347] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodPkt" TagVisibility "global" } Block { BlockType From Name "From2" SID "1839" Position [455, 298, 555, 312] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_BadPkt" TagVisibility "global" } Block { BlockType From Name "From3" SID "1840" Position [455, 263, 560, 277] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodHeader" TagVisibility "global" } Block { BlockType From Name "From4" SID "1841" Position [60, 407, 220, 423] ShowName off CloseFcn "tagdialog Close" GotoTag "regAutoReply_action1" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "1842" Ports [1, 1] Position [450, 247, 475, 263] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1843" Ports [1, 1] Position [450, 212, 475, 228] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "1844" Ports [1, 1] Position [450, 282, 475, 298] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "1845" Ports [1, 1] Position [450, 317, 475, 333] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter4" SID "1846" Ports [1, 1] Position [450, 352, 475, 368] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter5" SID "1847" Ports [1, 1] Position [450, 387, 475, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1848" Ports [2, 1] Position [590, 245, 625, 280] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical10" SID "1849" Ports [3, 1] Position [895, 767, 930, 803] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,36,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('bla" "ck');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical11" SID "1850" Ports [2, 1] Position [895, 405, 930, 440] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical12" SID "1851" Ports [2, 1] Position [895, 440, 930, 475] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical13" SID "1852" Ports [2, 1] Position [895, 475, 930, 510] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical14" SID "1853" Ports [2, 1] Position [895, 510, 930, 545] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "1854" Ports [2, 1] Position [590, 210, 625, 245] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "1855" Ports [2, 1] Position [590, 280, 625, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "1856" Ports [2, 1] Position [590, 315, 625, 350] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "1857" Ports [2, 1] Position [590, 350, 625, 385] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "1858" Ports [2, 1] Position [590, 385, 625, 420] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "1859" Ports [7, 1] Position [790, 213, 825, 327] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "7" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,114,7,1,white,blue,0,c0601ce4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 114 114 0 ],[0.77 0." "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 114 114 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[62.55" " 62.55 67.55 62.55 67.55 67.55 67.55 62.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[57.55 57.55 62." "55 62.55 57.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[52.55 52.55 57.55 57.55 52.55 ]," "[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[47.55 47.55 52.55 47.55 52.55 52.55 47.55 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n" "\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical8" SID "1860" Ports [2, 1] Position [895, 315, 930, 350] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "1861" Ports [2, 1] Position [895, 355, 930, 390] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "MaxPktBuf" SID "1862" Ports [0, 1] Position [545, 792, 580, 818] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "32" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,b5591290,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'32');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1863" Ports [3, 1] Position [1030, 888, 1060, 982] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "30,94,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 55.44 51.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[47" ".44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[43.44 43.44 47.44 47.44" " 43.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 39.44 43.44 43.44 39.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "1864" Ports [3, 1] Position [1055, 558, 1085, 652] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "30,94,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 55.44 51.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[47" ".44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[43.44 43.44 47.44 47.44" " 43.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 39.44 43.44 43.44 39.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "1865" Ports [2, 1] Position [595, 594, 630, 636] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a!=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,850de6e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\neq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "1866" Ports [2, 1] Position [655, 649, 690, 691] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "1867" Ports [2, 1] Position [655, 694, 690, 736] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "1868" Ports [2, 1] Position [655, 774, 690, 816] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,a8a3a52f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'62');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "SetFlagB" SID "1871" Ports [0, 1] Position [545, 712, 580, 738] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "ActionID_SetFlagB" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,f486ba17,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'61');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "bits[5:0]" SID "1872" Ports [1, 1] Position [945, 956, 980, 974] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "UseTrans" SID "1873" Position [1000, 418, 1030, 432] IconDisplay "Port number" } Block { BlockType Outport Name "Param" SID "1874" Position [1140, 598, 1170, 612] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "DoTx" SID "1875" Position [1005, 778, 1035, 792] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Set_FlagA" SID "1876" Position [1000, 328, 1030, 342] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Set_FlagB" SID "1877" Position [1000, 368, 1030, 382] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "TxBufNum" SID "1878" Position [1115, 928, 1145, 942] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "UsePreCFO" SID "1879" Position [1000, 453, 1030, 467] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "SwapAnt" SID "1880" Position [1000, 488, 1030, 502] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "ReTxCRC" SID "1881" Position [1000, 523, 1030, 537] Port "9" IconDisplay "Port number" } Line { SrcBlock "Logical14" SrcPort 1 DstBlock "ReTxCRC" DstPort 1 } Line { SrcBlock "Convert12" SrcPort 1 DstBlock "Logical14" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 10 DstBlock "Convert12" DstPort 1 } Line { SrcBlock "Disabled" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Convert11" SrcPort 1 DstBlock "Logical13" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 9 DstBlock "Convert11" DstPort 1 } Line { SrcBlock "Logical13" SrcPort 1 DstBlock "SwapAnt" DstPort 1 } Line { SrcBlock "Logical12" SrcPort 1 DstBlock "UsePreCFO" DstPort 1 } Line { SrcBlock "Convert10" SrcPort 1 DstBlock "Logical12" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 8 DstBlock "Convert10" DstPort 1 } Line { SrcBlock "Convert9" SrcPort 1 DstBlock "Logical11" DstPort 2 } Line { SrcBlock "Disabled3" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Param" DstPort 1 } Line { SrcBlock "Logical11" SrcPort 1 DstBlock "UseTrans" DstPort 1 } Line { SrcBlock "Disabled1" SrcPort 1 Points [25, 0] DstBlock "Relational4" DstPort 1 } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert8" SrcPort 1 Points [60, 0; 0, -335] DstBlock "Logical9" DstPort 2 } Line { SrcBlock "Convert7" SrcPort 1 Points [50, 0; 0, -330] DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Convert6" SrcPort 1 DstBlock "Logical7" DstPort 7 } Line { SrcBlock "Convert5" SrcPort 1 DstBlock "Logical7" DstPort 6 } Line { SrcBlock "Convert4" SrcPort 1 DstBlock "Logical7" DstPort 5 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Logical7" DstPort 4 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Logical7" DstPort 3 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Field Slices" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 2 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 3 DstBlock "Inverter2" DstPort 1 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 4 DstBlock "Inverter3" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 5 DstBlock "Inverter4" DstPort 1 } Line { SrcBlock "Inverter4" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 6 DstBlock "Inverter5" DstPort 1 } Line { SrcBlock "Inverter5" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 12 Points [85, 0; 0, 20] Branch { DstBlock "Relational" DstPort 2 } Branch { Points [0, 20; 135, 0; 0, 15] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 45] Branch { Points [0, 80] Branch { Points [0, 180] DstBlock "bits[5:0]" DstPort 1 } Branch { DstBlock "Relational3" DstPort 1 } } Branch { DstBlock "Relational2" DstPort 1 } } } } Line { SrcBlock "SetFlagA" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "SetFlagB" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "MaxPktBuf" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [30, 0; 0, -25] DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 Points [35, 0; 0, -45] DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 Points [50, 0; 0, -65] DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 Points [65, 0; 0, -85] DstBlock "Convert4" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 Points [80, 0; 0, -105] DstBlock "Convert5" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [90, 0] Branch { Points [130, 0; 0, 170] DstBlock "Logical10" DstPort 2 } Branch { DstBlock "Convert6" DstPort 1 } } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "Set_FlagA" DstPort 1 } Line { SrcBlock "Logical7" SrcPort 1 Points [40, 0; 0, 55] Branch { DstBlock "Logical8" DstPort 1 } Branch { Points [0, 40] Branch { Points [0, 50] Branch { Points [0, 35] Branch { Points [0, 35] Branch { Points [0, 35] Branch { DstBlock "Logical14" DstPort 1 } Branch { Points [0, 55] Branch { Labels [1, 0] DstBlock "Mux1" DstPort 1 } Branch { Points [0, 200] DstBlock "Logical10" DstPort 1 } } } Branch { DstBlock "Logical13" DstPort 1 } } Branch { DstBlock "Logical12" DstPort 1 } } Branch { DstBlock "Logical11" DstPort 1 } } Branch { DstBlock "Logical9" DstPort 1 } } } Line { SrcBlock "Logical9" SrcPort 1 DstBlock "Set_FlagB" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Convert8" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical10" DstPort 3 } Line { SrcBlock "Logical10" SrcPort 1 Points [30, 0] Branch { DstBlock "DoTx" DstPort 1 } Branch { Points [0, 120] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Match" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 7 DstBlock "Convert9" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 11 Points [455, 0; 0, 65] DstBlock "Mux1" DstPort 3 } Line { SrcBlock "FlagA" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "FlagB" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "bits[5:0]" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Disabled2" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "TxBufNum" DstPort 1 } Annotation { Name "Only assert TxBufNum if this action\nactually triggers a transmission. It must\nbe zero for all other" " actions!" Position [1043, 1024] } Annotation { Name "ActionIDs:\n0: Action inactive (do nothing)\n1 - 31: AutoTx from this pktBuf\n32 - 60: Reserved\n61: " "Set Flag B\n62: Set Flag A" Position [466, 898] HorizontalAlignment "left" } } } Block { BlockType SubSystem Name "Action2" SID "1882" Ports [3, 9] Position [275, 304, 375, 386] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Action2" Location [202, 70, 1902, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Match" SID "1883" Position [495, 228, 525, 242] IconDisplay "Port number" } Block { BlockType Inport Name "FlagA" SID "1884" Position [525, 368, 555, 382] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "FlagB" SID "1885" Position [525, 403, 555, 417] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "1886" Ports [1, 1] Position [740, 218, 765, 232] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "1887" Ports [1, 1] Position [740, 233, 765, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert10" SID "1888" Ports [1, 1] Position [740, 458, 765, 472] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert11" SID "1889" Ports [1, 1] Position [740, 493, 765, 507] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert12" SID "1890" Ports [1, 1] Position [740, 528, 765, 542] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "1891" Ports [1, 1] Position [740, 248, 765, 262] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "1892" Ports [1, 1] Position [740, 263, 765, 277] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "1893" Ports [1, 1] Position [740, 278, 765, 292] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert5" SID "1894" Ports [1, 1] Position [740, 293, 765, 307] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert6" SID "1895" Ports [1, 1] Position [740, 308, 765, 322] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "1896" Ports [1, 1] Position [745, 663, 770, 677] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert8" SID "1897" Ports [1, 1] Position [745, 708, 770, 722] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert9" SID "1898" Ports [1, 1] Position [740, 423, 765, 437] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled" SID "1899" Ports [0, 1] Position [520, 596, 545, 614] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "ActionID_Disabled" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'0');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Disabled1" SID "1900" Ports [0, 1] Position [595, 170, 615, 190] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^8-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "20,20,0,1,white,blue,0,13fa6234,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 20 20 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[12.22 12." "22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output" "',1,'255');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled2" SID "1901" Ports [0, 1] Position [945, 924, 970, 946] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "5" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled3" SID "1902" Ports [0, 1] Position [985, 594, 1010, 616] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Field Slices" SID "1903" Ports [1, 12] Position [285, 212, 405, 613] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Field Slices" Location [202, 70, 1918, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "186" Block { BlockType Inport Name "Reg 32b" SID "1904" Position [150, 18, 180, 32] IconDisplay "Port number" } Block { BlockType Reference Name "bits[10]" SID "1905" Ports [1, 1] Position [245, 106, 280, 124] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "10" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[11]" SID "1906" Ports [1, 1] Position [245, 146, 280, 164] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "11" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[12]" SID "1907" Ports [1, 1] Position [245, 186, 280, 204] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "12" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[13]" SID "1908" Ports [1, 1] Position [245, 231, 280, 249] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "13" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[14]" SID "1909" Ports [1, 1] Position [245, 276, 280, 294] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "14" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[15]" SID "1910" Ports [1, 1] Position [245, 316, 280, 334] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "15" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[16]" SID "1911" Ports [1, 1] Position [245, 356, 280, 374] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[17]" SID "1912" Ports [1, 1] Position [245, 396, 280, 414] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "17" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[23:18]" SID "1913" Ports [1, 1] Position [245, 441, 280, 459] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "6" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "18" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[31:24]" SID "1914" Ports [1, 1] Position [245, 481, 280, 499] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[7:0]" SID "1915" Ports [1, 1] Position [245, 16, 280, 34] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[9]" SID "1916" Ports [1, 1] Position [245, 61, 280, 79] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "9" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Masks_Match" SID "1917" Position [345, 18, 375, 32] IconDisplay "Port number" } Block { BlockType Outport Name "Masks_GoodHdr" SID "1918" Position [345, 148, 375, 162] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_BadPkt" SID "1919" Position [345, 188, 375, 202] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_GoodPkt" SID "1920" Position [345, 233, 375, 247] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_FlagA" SID "1921" Position [345, 278, 375, 292] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_FlagB" SID "1922" Position [345, 318, 375, 332] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Act_UseTrans" SID "1923" Position [345, 358, 375, 372] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Act_UsePreCFO" SID "1924" Position [345, 398, 375, 412] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Act_SwapAnt" SID "1925" Position [345, 108, 375, 122] Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "Act_ReTxCRC" SID "1926" Position [345, 63, 375, 77] Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "Act_Param" SID "1927" Position [345, 483, 375, 497] Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "Act_ID" SID "1928" Position [345, 443, 375, 457] Port "12" IconDisplay "Port number" } Line { SrcBlock "bits[31:24]" SrcPort 1 DstBlock "Act_Param" DstPort 1 } Line { SrcBlock "bits[23:18]" SrcPort 1 DstBlock "Act_ID" DstPort 1 } Line { SrcBlock "bits[16]" SrcPort 1 DstBlock "Act_UseTrans" DstPort 1 } Line { SrcBlock "bits[15]" SrcPort 1 DstBlock "Masks_FlagB" DstPort 1 } Line { SrcBlock "bits[14]" SrcPort 1 DstBlock "Masks_FlagA" DstPort 1 } Line { SrcBlock "bits[13]" SrcPort 1 DstBlock "Masks_GoodPkt" DstPort 1 } Line { SrcBlock "bits[12]" SrcPort 1 DstBlock "Masks_BadPkt" DstPort 1 } Line { SrcBlock "bits[11]" SrcPort 1 DstBlock "Masks_GoodHdr" DstPort 1 } Line { SrcBlock "Reg 32b" SrcPort 1 Points [30, 0] Branch { DstBlock "bits[7:0]" DstPort 1 } Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 40] Branch { Points [0, 40] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 40] Branch { Points [0, 40] Branch { DstBlock "bits[16]" DstPort 1 } Branch { Points [0, 40] Branch { Points [0, 45] Branch { Points [0, 40] DstBlock "bits[31:24]" DstPort 1 } Branch { DstBlock "bits[23:18]" DstPort 1 } } Branch { DstBlock "bits[17]" DstPort 1 } } } Branch { DstBlock "bits[15]" DstPort 1 } } Branch { DstBlock "bits[14]" DstPort 1 } } Branch { DstBlock "bits[13]" DstPort 1 } } Branch { DstBlock "bits[12]" DstPort 1 } } Branch { DstBlock "bits[11]" DstPort 1 } } Branch { DstBlock "bits[10]" DstPort 1 } } Branch { DstBlock "bits[9]" DstPort 1 } } } Line { SrcBlock "bits[7:0]" SrcPort 1 DstBlock "Masks_Match" DstPort 1 } Line { SrcBlock "bits[17]" SrcPort 1 DstBlock "Act_UsePreCFO" DstPort 1 } Line { SrcBlock "bits[10]" SrcPort 1 DstBlock "Act_SwapAnt" DstPort 1 } Line { SrcBlock "bits[9]" SrcPort 1 DstBlock "Act_ReTxCRC" DstPort 1 } Annotation { Name "Action Registers:\n[31:24] - actionParam (like Tx Delay)\n[23:18] - actionID (pktBuf choice)\n[17] - " "use CFO pre-spin at Tx\n[16] - use header translator\n[15] - require FlagB\n[14] - require FlagA\n[13] - require" " goodPkt\n[12] - require badPkt\n[11] - require goodHeader\n[10] - Swap Tx stream/antenna\n[9] - Use received ch" "ecksums\n[8] - reserved\n[7:0] - require match[7:0]" Position [25, 161] HorizontalAlignment "left" } } } Block { BlockType From Name "From1" SID "1929" Position [455, 333, 555, 347] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodPkt" TagVisibility "global" } Block { BlockType From Name "From2" SID "1930" Position [455, 298, 555, 312] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_BadPkt" TagVisibility "global" } Block { BlockType From Name "From3" SID "1931" Position [455, 263, 560, 277] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodHeader" TagVisibility "global" } Block { BlockType From Name "From4" SID "1932" Position [60, 407, 220, 423] ShowName off CloseFcn "tagdialog Close" GotoTag "regAutoReply_action2" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "1933" Ports [1, 1] Position [450, 247, 475, 263] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "1934" Ports [1, 1] Position [450, 212, 475, 228] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "1935" Ports [1, 1] Position [450, 282, 475, 298] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "1936" Ports [1, 1] Position [450, 317, 475, 333] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter4" SID "1937" Ports [1, 1] Position [450, 352, 475, 368] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter5" SID "1938" Ports [1, 1] Position [450, 387, 475, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "1939" Ports [2, 1] Position [590, 245, 625, 280] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical10" SID "1940" Ports [3, 1] Position [895, 767, 930, 803] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,36,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('bla" "ck');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical11" SID "1941" Ports [2, 1] Position [895, 405, 930, 440] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical12" SID "1942" Ports [2, 1] Position [895, 440, 930, 475] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical13" SID "1943" Ports [2, 1] Position [895, 475, 930, 510] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical14" SID "1944" Ports [2, 1] Position [895, 510, 930, 545] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "1945" Ports [2, 1] Position [590, 210, 625, 245] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "1946" Ports [2, 1] Position [590, 280, 625, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "1947" Ports [2, 1] Position [590, 315, 625, 350] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "1948" Ports [2, 1] Position [590, 350, 625, 385] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "1949" Ports [2, 1] Position [590, 385, 625, 420] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "1950" Ports [7, 1] Position [790, 213, 825, 327] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "7" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,114,7,1,white,blue,0,c0601ce4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 114 114 0 ],[0.77 0." "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 114 114 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[62.55" " 62.55 67.55 62.55 67.55 67.55 67.55 62.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[57.55 57.55 62." "55 62.55 57.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[52.55 52.55 57.55 57.55 52.55 ]," "[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[47.55 47.55 52.55 47.55 52.55 52.55 47.55 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n" "\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical8" SID "1951" Ports [2, 1] Position [895, 315, 930, 350] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "1952" Ports [2, 1] Position [895, 355, 930, 390] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "MaxPktBuf" SID "1953" Ports [0, 1] Position [545, 792, 580, 818] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "32" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,b5591290,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'32');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "1954" Ports [3, 1] Position [1030, 888, 1060, 982] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "30,94,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 55.44 51.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[47" ".44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[43.44 43.44 47.44 47.44" " 43.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 39.44 43.44 43.44 39.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "1955" Ports [3, 1] Position [1055, 558, 1085, 652] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "30,94,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 55.44 51.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[47" ".44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[43.44 43.44 47.44 47.44" " 43.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 39.44 43.44 43.44 39.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "1956" Ports [2, 1] Position [595, 594, 630, 636] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a!=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,850de6e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\neq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "1957" Ports [2, 1] Position [655, 649, 690, 691] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "1958" Ports [2, 1] Position [655, 694, 690, 736] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "1959" Ports [2, 1] Position [655, 774, 690, 816] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,a8a3a52f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'62');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "SetFlagB" SID "1962" Ports [0, 1] Position [545, 712, 580, 738] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "ActionID_SetFlagB" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,f486ba17,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'61');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "bits[5:0]" SID "1963" Ports [1, 1] Position [945, 956, 980, 974] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "UseTrans" SID "1964" Position [1000, 418, 1030, 432] IconDisplay "Port number" } Block { BlockType Outport Name "Param" SID "1965" Position [1140, 598, 1170, 612] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "DoTx" SID "1966" Position [1005, 778, 1035, 792] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Set_FlagA" SID "1967" Position [1000, 328, 1030, 342] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Set_FlagB" SID "1968" Position [1000, 368, 1030, 382] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "TxBufNum" SID "1969" Position [1115, 928, 1145, 942] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "UsePreCFO" SID "1970" Position [1000, 453, 1030, 467] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "SwapAnt" SID "1971" Position [1000, 488, 1030, 502] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "ReTxCRC" SID "1972" Position [1000, 523, 1030, 537] Port "9" IconDisplay "Port number" } Line { SrcBlock "Mux" SrcPort 1 DstBlock "TxBufNum" DstPort 1 } Line { SrcBlock "Disabled2" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "bits[5:0]" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "FlagB" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "FlagA" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 11 Points [455, 0; 0, 65] DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Field Slices" SrcPort 7 DstBlock "Convert9" DstPort 1 } Line { SrcBlock "Match" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical10" SrcPort 1 Points [30, 0] Branch { Points [0, 120] DstBlock "Mux" DstPort 1 } Branch { DstBlock "DoTx" DstPort 1 } } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical10" DstPort 3 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Convert8" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "Logical9" SrcPort 1 DstBlock "Set_FlagB" DstPort 1 } Line { SrcBlock "Logical7" SrcPort 1 Points [40, 0; 0, 55] Branch { Points [0, 40] Branch { DstBlock "Logical9" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "Logical11" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "Logical12" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "Logical13" DstPort 1 } Branch { Points [0, 35] Branch { Points [0, 55] Branch { Points [0, 200] DstBlock "Logical10" DstPort 1 } Branch { Labels [1, 0] DstBlock "Mux1" DstPort 1 } } Branch { DstBlock "Logical14" DstPort 1 } } } } } } Branch { DstBlock "Logical8" DstPort 1 } } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "Set_FlagA" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [90, 0] Branch { DstBlock "Convert6" DstPort 1 } Branch { Points [130, 0; 0, 170] DstBlock "Logical10" DstPort 2 } } Line { SrcBlock "Logical6" SrcPort 1 Points [80, 0; 0, -105] DstBlock "Convert5" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 Points [65, 0; 0, -85] DstBlock "Convert4" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 Points [50, 0; 0, -65] DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 Points [35, 0; 0, -45] DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [30, 0; 0, -25] DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "MaxPktBuf" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "SetFlagB" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "SetFlagA" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 12 Points [85, 0; 0, 20] Branch { Points [0, 20; 135, 0; 0, 15] Branch { Points [0, 45] Branch { DstBlock "Relational2" DstPort 1 } Branch { Points [0, 80] Branch { DstBlock "Relational3" DstPort 1 } Branch { Points [0, 180] DstBlock "bits[5:0]" DstPort 1 } } } Branch { DstBlock "Relational1" DstPort 1 } } Branch { DstBlock "Relational" DstPort 2 } } Line { SrcBlock "Inverter5" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 6 DstBlock "Inverter5" DstPort 1 } Line { SrcBlock "Inverter4" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 5 DstBlock "Inverter4" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 4 DstBlock "Inverter3" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 3 DstBlock "Inverter2" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 2 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Field Slices" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Logical7" DstPort 3 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Logical7" DstPort 4 } Line { SrcBlock "Convert4" SrcPort 1 DstBlock "Logical7" DstPort 5 } Line { SrcBlock "Convert5" SrcPort 1 DstBlock "Logical7" DstPort 6 } Line { SrcBlock "Convert6" SrcPort 1 DstBlock "Logical7" DstPort 7 } Line { SrcBlock "Convert7" SrcPort 1 Points [50, 0; 0, -330] DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Convert8" SrcPort 1 Points [60, 0; 0, -335] DstBlock "Logical9" DstPort 2 } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Disabled1" SrcPort 1 Points [25, 0] DstBlock "Relational4" DstPort 1 } Line { SrcBlock "Logical11" SrcPort 1 DstBlock "UseTrans" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Param" DstPort 1 } Line { SrcBlock "Disabled3" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Convert9" SrcPort 1 DstBlock "Logical11" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 8 DstBlock "Convert10" DstPort 1 } Line { SrcBlock "Convert10" SrcPort 1 DstBlock "Logical12" DstPort 2 } Line { SrcBlock "Logical12" SrcPort 1 DstBlock "UsePreCFO" DstPort 1 } Line { SrcBlock "Logical13" SrcPort 1 DstBlock "SwapAnt" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 9 DstBlock "Convert11" DstPort 1 } Line { SrcBlock "Convert11" SrcPort 1 DstBlock "Logical13" DstPort 2 } Line { SrcBlock "Disabled" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 10 DstBlock "Convert12" DstPort 1 } Line { SrcBlock "Convert12" SrcPort 1 DstBlock "Logical14" DstPort 2 } Line { SrcBlock "Logical14" SrcPort 1 DstBlock "ReTxCRC" DstPort 1 } Annotation { Name "ActionIDs:\n0: Action inactive (do nothing)\n1 - 31: AutoTx from this pktBuf\n32 - 60: Reserved\n61: " "Set Flag B\n62: Set Flag A" Position [466, 898] HorizontalAlignment "left" } Annotation { Name "Only assert TxBufNum if this action\nactually triggers a transmission. It must\nbe zero for all other" " actions!" Position [1043, 1024] } } } Block { BlockType SubSystem Name "Action3" SID "1973" Ports [3, 9] Position [275, 404, 375, 486] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Action3" Location [202, 70, 1902, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Match" SID "1974" Position [495, 228, 525, 242] IconDisplay "Port number" } Block { BlockType Inport Name "FlagA" SID "1975" Position [525, 368, 555, 382] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "FlagB" SID "1976" Position [525, 403, 555, 417] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "1977" Ports [1, 1] Position [740, 218, 765, 232] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "1978" Ports [1, 1] Position [740, 233, 765, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert10" SID "1979" Ports [1, 1] Position [740, 458, 765, 472] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert11" SID "1980" Ports [1, 1] Position [740, 493, 765, 507] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert12" SID "1981" Ports [1, 1] Position [740, 528, 765, 542] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "1982" Ports [1, 1] Position [740, 248, 765, 262] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "1983" Ports [1, 1] Position [740, 263, 765, 277] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "1984" Ports [1, 1] Position [740, 278, 765, 292] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert5" SID "1985" Ports [1, 1] Position [740, 293, 765, 307] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert6" SID "1986" Ports [1, 1] Position [740, 308, 765, 322] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "1987" Ports [1, 1] Position [745, 663, 770, 677] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert8" SID "1988" Ports [1, 1] Position [745, 708, 770, 722] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert9" SID "1989" Ports [1, 1] Position [740, 423, 765, 437] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled" SID "1990" Ports [0, 1] Position [520, 596, 545, 614] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "ActionID_Disabled" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'0');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Disabled1" SID "1991" Ports [0, 1] Position [595, 170, 615, 190] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^8-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "20,20,0,1,white,blue,0,13fa6234,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 20 20 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[12.22 12." "22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output" "',1,'255');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled2" SID "1992" Ports [0, 1] Position [945, 924, 970, 946] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "5" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled3" SID "1993" Ports [0, 1] Position [985, 594, 1010, 616] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Field Slices" SID "1994" Ports [1, 12] Position [285, 212, 405, 613] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Field Slices" Location [202, 70, 1918, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "186" Block { BlockType Inport Name "Reg 32b" SID "1995" Position [150, 18, 180, 32] IconDisplay "Port number" } Block { BlockType Reference Name "bits[10]" SID "1996" Ports [1, 1] Position [245, 106, 280, 124] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "10" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[11]" SID "1997" Ports [1, 1] Position [245, 146, 280, 164] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "11" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[12]" SID "1998" Ports [1, 1] Position [245, 186, 280, 204] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "12" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[13]" SID "1999" Ports [1, 1] Position [245, 231, 280, 249] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "13" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[14]" SID "2000" Ports [1, 1] Position [245, 276, 280, 294] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "14" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[15]" SID "2001" Ports [1, 1] Position [245, 316, 280, 334] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "15" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[16]" SID "2002" Ports [1, 1] Position [245, 356, 280, 374] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[17]" SID "2003" Ports [1, 1] Position [245, 396, 280, 414] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "17" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[23:18]" SID "2004" Ports [1, 1] Position [245, 441, 280, 459] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "6" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "18" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[31:24]" SID "2005" Ports [1, 1] Position [245, 481, 280, 499] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[7:0]" SID "2006" Ports [1, 1] Position [245, 16, 280, 34] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[9]" SID "2007" Ports [1, 1] Position [245, 61, 280, 79] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "9" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Masks_Match" SID "2008" Position [345, 18, 375, 32] IconDisplay "Port number" } Block { BlockType Outport Name "Masks_GoodHdr" SID "2009" Position [345, 148, 375, 162] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_BadPkt" SID "2010" Position [345, 188, 375, 202] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_GoodPkt" SID "2011" Position [345, 233, 375, 247] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_FlagA" SID "2012" Position [345, 278, 375, 292] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_FlagB" SID "2013" Position [345, 318, 375, 332] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Act_UseTrans" SID "2014" Position [345, 358, 375, 372] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Act_UsePreCFO" SID "2015" Position [345, 398, 375, 412] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Act_SwapAnt" SID "2016" Position [345, 108, 375, 122] Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "Act_ReTxCRC" SID "2017" Position [345, 63, 375, 77] Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "Act_Param" SID "2018" Position [345, 483, 375, 497] Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "Act_ID" SID "2019" Position [345, 443, 375, 457] Port "12" IconDisplay "Port number" } Line { SrcBlock "bits[9]" SrcPort 1 DstBlock "Act_ReTxCRC" DstPort 1 } Line { SrcBlock "bits[10]" SrcPort 1 DstBlock "Act_SwapAnt" DstPort 1 } Line { SrcBlock "bits[17]" SrcPort 1 DstBlock "Act_UsePreCFO" DstPort 1 } Line { SrcBlock "bits[7:0]" SrcPort 1 DstBlock "Masks_Match" DstPort 1 } Line { SrcBlock "Reg 32b" SrcPort 1 Points [30, 0] Branch { Points [0, 45] Branch { DstBlock "bits[9]" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "bits[10]" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "bits[11]" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "bits[12]" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "bits[13]" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "bits[14]" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "bits[15]" DstPort 1 } Branch { Points [0, 40] Branch { Points [0, 40] Branch { DstBlock "bits[17]" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "bits[23:18]" DstPort 1 } Branch { Points [0, 40] DstBlock "bits[31:24]" DstPort 1 } } } Branch { DstBlock "bits[16]" DstPort 1 } } } } } } } } } Branch { DstBlock "bits[7:0]" DstPort 1 } } Line { SrcBlock "bits[11]" SrcPort 1 DstBlock "Masks_GoodHdr" DstPort 1 } Line { SrcBlock "bits[12]" SrcPort 1 DstBlock "Masks_BadPkt" DstPort 1 } Line { SrcBlock "bits[13]" SrcPort 1 DstBlock "Masks_GoodPkt" DstPort 1 } Line { SrcBlock "bits[14]" SrcPort 1 DstBlock "Masks_FlagA" DstPort 1 } Line { SrcBlock "bits[15]" SrcPort 1 DstBlock "Masks_FlagB" DstPort 1 } Line { SrcBlock "bits[16]" SrcPort 1 DstBlock "Act_UseTrans" DstPort 1 } Line { SrcBlock "bits[23:18]" SrcPort 1 DstBlock "Act_ID" DstPort 1 } Line { SrcBlock "bits[31:24]" SrcPort 1 DstBlock "Act_Param" DstPort 1 } Annotation { Name "Action Registers:\n[31:24] - actionParam (like Tx Delay)\n[23:18] - actionID (pktBuf choice)\n[17] - " "use CFO pre-spin at Tx\n[16] - use header translator\n[15] - require FlagB\n[14] - require FlagA\n[13] - require" " goodPkt\n[12] - require badPkt\n[11] - require goodHeader\n[10] - Swap Tx stream/antenna\n[9] - Use received ch" "ecksums\n[8] - reserved\n[7:0] - require match[7:0]" Position [25, 161] HorizontalAlignment "left" } } } Block { BlockType From Name "From1" SID "2020" Position [455, 333, 555, 347] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodPkt" TagVisibility "global" } Block { BlockType From Name "From2" SID "2021" Position [455, 298, 555, 312] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_BadPkt" TagVisibility "global" } Block { BlockType From Name "From3" SID "2022" Position [455, 263, 560, 277] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodHeader" TagVisibility "global" } Block { BlockType From Name "From4" SID "2023" Position [60, 407, 220, 423] ShowName off CloseFcn "tagdialog Close" GotoTag "regAutoReply_action3" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "2024" Ports [1, 1] Position [450, 247, 475, 263] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "2025" Ports [1, 1] Position [450, 212, 475, 228] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "2026" Ports [1, 1] Position [450, 282, 475, 298] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "2027" Ports [1, 1] Position [450, 317, 475, 333] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter4" SID "2028" Ports [1, 1] Position [450, 352, 475, 368] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter5" SID "2029" Ports [1, 1] Position [450, 387, 475, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "2030" Ports [2, 1] Position [590, 245, 625, 280] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical10" SID "2031" Ports [3, 1] Position [895, 767, 930, 803] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,36,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('bla" "ck');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical11" SID "2032" Ports [2, 1] Position [895, 405, 930, 440] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical12" SID "2033" Ports [2, 1] Position [895, 440, 930, 475] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical13" SID "2034" Ports [2, 1] Position [895, 475, 930, 510] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical14" SID "2035" Ports [2, 1] Position [895, 510, 930, 545] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "2036" Ports [2, 1] Position [590, 210, 625, 245] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "2037" Ports [2, 1] Position [590, 280, 625, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "2038" Ports [2, 1] Position [590, 315, 625, 350] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "2039" Ports [2, 1] Position [590, 350, 625, 385] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "2040" Ports [2, 1] Position [590, 385, 625, 420] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "2041" Ports [7, 1] Position [790, 213, 825, 327] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "7" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,114,7,1,white,blue,0,c0601ce4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 114 114 0 ],[0.77 0." "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 114 114 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[62.55" " 62.55 67.55 62.55 67.55 67.55 67.55 62.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[57.55 57.55 62." "55 62.55 57.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[52.55 52.55 57.55 57.55 52.55 ]," "[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[47.55 47.55 52.55 47.55 52.55 52.55 47.55 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n" "\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical8" SID "2042" Ports [2, 1] Position [895, 315, 930, 350] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "2043" Ports [2, 1] Position [895, 355, 930, 390] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "MaxPktBuf" SID "2044" Ports [0, 1] Position [545, 792, 580, 818] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "32" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,b5591290,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'32');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "2045" Ports [3, 1] Position [1030, 888, 1060, 982] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "30,94,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 55.44 51.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[47" ".44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[43.44 43.44 47.44 47.44" " 43.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 39.44 43.44 43.44 39.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "2046" Ports [3, 1] Position [1055, 558, 1085, 652] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "30,94,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 55.44 51.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[47" ".44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[43.44 43.44 47.44 47.44" " 43.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 39.44 43.44 43.44 39.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "2047" Ports [2, 1] Position [595, 594, 630, 636] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a!=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,850de6e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\neq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "2048" Ports [2, 1] Position [655, 649, 690, 691] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "2049" Ports [2, 1] Position [655, 694, 690, 736] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "2050" Ports [2, 1] Position [655, 774, 690, 816] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,a8a3a52f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'62');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "SetFlagB" SID "2053" Ports [0, 1] Position [545, 712, 580, 738] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "ActionID_SetFlagB" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,f486ba17,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'61');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "bits[5:0]" SID "2054" Ports [1, 1] Position [945, 956, 980, 974] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "UseTrans" SID "2055" Position [1000, 418, 1030, 432] IconDisplay "Port number" } Block { BlockType Outport Name "Param" SID "2056" Position [1140, 598, 1170, 612] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "DoTx" SID "2057" Position [1005, 778, 1035, 792] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Set_FlagA" SID "2058" Position [1000, 328, 1030, 342] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Set_FlagB" SID "2059" Position [1000, 368, 1030, 382] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "TxBufNum" SID "2060" Position [1115, 928, 1145, 942] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "UsePreCFO" SID "2061" Position [1000, 453, 1030, 467] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "SwapAnt" SID "2062" Position [1000, 488, 1030, 502] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "ReTxCRC" SID "2063" Position [1000, 523, 1030, 537] Port "9" IconDisplay "Port number" } Line { SrcBlock "Logical14" SrcPort 1 DstBlock "ReTxCRC" DstPort 1 } Line { SrcBlock "Convert12" SrcPort 1 DstBlock "Logical14" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 10 DstBlock "Convert12" DstPort 1 } Line { SrcBlock "Disabled" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Convert11" SrcPort 1 DstBlock "Logical13" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 9 DstBlock "Convert11" DstPort 1 } Line { SrcBlock "Logical13" SrcPort 1 DstBlock "SwapAnt" DstPort 1 } Line { SrcBlock "Logical12" SrcPort 1 DstBlock "UsePreCFO" DstPort 1 } Line { SrcBlock "Convert10" SrcPort 1 DstBlock "Logical12" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 8 DstBlock "Convert10" DstPort 1 } Line { SrcBlock "Convert9" SrcPort 1 DstBlock "Logical11" DstPort 2 } Line { SrcBlock "Disabled3" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Param" DstPort 1 } Line { SrcBlock "Logical11" SrcPort 1 DstBlock "UseTrans" DstPort 1 } Line { SrcBlock "Disabled1" SrcPort 1 Points [25, 0] DstBlock "Relational4" DstPort 1 } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert8" SrcPort 1 Points [60, 0; 0, -335] DstBlock "Logical9" DstPort 2 } Line { SrcBlock "Convert7" SrcPort 1 Points [50, 0; 0, -330] DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Convert6" SrcPort 1 DstBlock "Logical7" DstPort 7 } Line { SrcBlock "Convert5" SrcPort 1 DstBlock "Logical7" DstPort 6 } Line { SrcBlock "Convert4" SrcPort 1 DstBlock "Logical7" DstPort 5 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Logical7" DstPort 4 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Logical7" DstPort 3 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Field Slices" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 2 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 3 DstBlock "Inverter2" DstPort 1 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 4 DstBlock "Inverter3" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 5 DstBlock "Inverter4" DstPort 1 } Line { SrcBlock "Inverter4" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 6 DstBlock "Inverter5" DstPort 1 } Line { SrcBlock "Inverter5" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 12 Points [85, 0; 0, 20] Branch { DstBlock "Relational" DstPort 2 } Branch { Points [0, 20; 135, 0; 0, 15] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 45] Branch { Points [0, 80] Branch { Points [0, 180] DstBlock "bits[5:0]" DstPort 1 } Branch { DstBlock "Relational3" DstPort 1 } } Branch { DstBlock "Relational2" DstPort 1 } } } } Line { SrcBlock "SetFlagA" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "SetFlagB" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "MaxPktBuf" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [30, 0; 0, -25] DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 Points [35, 0; 0, -45] DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 Points [50, 0; 0, -65] DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 Points [65, 0; 0, -85] DstBlock "Convert4" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 Points [80, 0; 0, -105] DstBlock "Convert5" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [90, 0] Branch { Points [130, 0; 0, 170] DstBlock "Logical10" DstPort 2 } Branch { DstBlock "Convert6" DstPort 1 } } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "Set_FlagA" DstPort 1 } Line { SrcBlock "Logical7" SrcPort 1 Points [40, 0; 0, 55] Branch { DstBlock "Logical8" DstPort 1 } Branch { Points [0, 40] Branch { Points [0, 50] Branch { Points [0, 35] Branch { Points [0, 35] Branch { Points [0, 35] Branch { DstBlock "Logical14" DstPort 1 } Branch { Points [0, 55] Branch { Labels [1, 0] DstBlock "Mux1" DstPort 1 } Branch { Points [0, 200] DstBlock "Logical10" DstPort 1 } } } Branch { DstBlock "Logical13" DstPort 1 } } Branch { DstBlock "Logical12" DstPort 1 } } Branch { DstBlock "Logical11" DstPort 1 } } Branch { DstBlock "Logical9" DstPort 1 } } } Line { SrcBlock "Logical9" SrcPort 1 DstBlock "Set_FlagB" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Convert8" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical10" DstPort 3 } Line { SrcBlock "Logical10" SrcPort 1 Points [30, 0] Branch { DstBlock "DoTx" DstPort 1 } Branch { Points [0, 120] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Match" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 7 DstBlock "Convert9" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 11 Points [455, 0; 0, 65] DstBlock "Mux1" DstPort 3 } Line { SrcBlock "FlagA" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "FlagB" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "bits[5:0]" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Disabled2" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "TxBufNum" DstPort 1 } Annotation { Name "Only assert TxBufNum if this action\nactually triggers a transmission. It must\nbe zero for all other" " actions!" Position [1043, 1024] } Annotation { Name "ActionIDs:\n0: Action inactive (do nothing)\n1 - 31: AutoTx from this pktBuf\n32 - 60: Reserved\n61: " "Set Flag B\n62: Set Flag A" Position [466, 898] HorizontalAlignment "left" } } } Block { BlockType SubSystem Name "Action4" SID "2064" Ports [3, 9] Position [275, 504, 375, 586] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Action4" Location [202, 70, 1902, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Match" SID "2065" Position [495, 228, 525, 242] IconDisplay "Port number" } Block { BlockType Inport Name "FlagA" SID "2066" Position [525, 368, 555, 382] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "FlagB" SID "2067" Position [525, 403, 555, 417] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "2068" Ports [1, 1] Position [740, 218, 765, 232] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2069" Ports [1, 1] Position [740, 233, 765, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert10" SID "2070" Ports [1, 1] Position [740, 458, 765, 472] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert11" SID "2071" Ports [1, 1] Position [740, 493, 765, 507] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert12" SID "2072" Ports [1, 1] Position [740, 528, 765, 542] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "2073" Ports [1, 1] Position [740, 248, 765, 262] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "2074" Ports [1, 1] Position [740, 263, 765, 277] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "2075" Ports [1, 1] Position [740, 278, 765, 292] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert5" SID "2076" Ports [1, 1] Position [740, 293, 765, 307] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert6" SID "2077" Ports [1, 1] Position [740, 308, 765, 322] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "2078" Ports [1, 1] Position [745, 663, 770, 677] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert8" SID "2079" Ports [1, 1] Position [745, 708, 770, 722] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert9" SID "2080" Ports [1, 1] Position [740, 423, 765, 437] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled" SID "2081" Ports [0, 1] Position [520, 596, 545, 614] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "ActionID_Disabled" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'0');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Disabled1" SID "2082" Ports [0, 1] Position [595, 170, 615, 190] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^8-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "20,20,0,1,white,blue,0,13fa6234,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 20 20 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[12.22 12." "22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output" "',1,'255');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled2" SID "2083" Ports [0, 1] Position [945, 924, 970, 946] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "5" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled3" SID "2084" Ports [0, 1] Position [985, 594, 1010, 616] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Field Slices" SID "2085" Ports [1, 12] Position [285, 212, 405, 613] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Field Slices" Location [202, 70, 1918, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "186" Block { BlockType Inport Name "Reg 32b" SID "2086" Position [150, 18, 180, 32] IconDisplay "Port number" } Block { BlockType Reference Name "bits[10]" SID "2087" Ports [1, 1] Position [245, 106, 280, 124] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "10" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[11]" SID "2088" Ports [1, 1] Position [245, 146, 280, 164] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "11" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[12]" SID "2089" Ports [1, 1] Position [245, 186, 280, 204] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "12" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[13]" SID "2090" Ports [1, 1] Position [245, 231, 280, 249] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "13" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[14]" SID "2091" Ports [1, 1] Position [245, 276, 280, 294] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "14" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[15]" SID "2092" Ports [1, 1] Position [245, 316, 280, 334] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "15" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[16]" SID "2093" Ports [1, 1] Position [245, 356, 280, 374] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[17]" SID "2094" Ports [1, 1] Position [245, 396, 280, 414] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "17" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[23:18]" SID "2095" Ports [1, 1] Position [245, 441, 280, 459] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "6" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "18" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[31:24]" SID "2096" Ports [1, 1] Position [245, 481, 280, 499] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[7:0]" SID "2097" Ports [1, 1] Position [245, 16, 280, 34] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[9]" SID "2098" Ports [1, 1] Position [245, 61, 280, 79] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "9" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Masks_Match" SID "2099" Position [345, 18, 375, 32] IconDisplay "Port number" } Block { BlockType Outport Name "Masks_GoodHdr" SID "2100" Position [345, 148, 375, 162] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_BadPkt" SID "2101" Position [345, 188, 375, 202] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_GoodPkt" SID "2102" Position [345, 233, 375, 247] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_FlagA" SID "2103" Position [345, 278, 375, 292] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_FlagB" SID "2104" Position [345, 318, 375, 332] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Act_UseTrans" SID "2105" Position [345, 358, 375, 372] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Act_UsePreCFO" SID "2106" Position [345, 398, 375, 412] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Act_SwapAnt" SID "2107" Position [345, 108, 375, 122] Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "Act_ReTxCRC" SID "2108" Position [345, 63, 375, 77] Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "Act_Param" SID "2109" Position [345, 483, 375, 497] Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "Act_ID" SID "2110" Position [345, 443, 375, 457] Port "12" IconDisplay "Port number" } Line { SrcBlock "bits[31:24]" SrcPort 1 DstBlock "Act_Param" DstPort 1 } Line { SrcBlock "bits[23:18]" SrcPort 1 DstBlock "Act_ID" DstPort 1 } Line { SrcBlock "bits[16]" SrcPort 1 DstBlock "Act_UseTrans" DstPort 1 } Line { SrcBlock "bits[15]" SrcPort 1 DstBlock "Masks_FlagB" DstPort 1 } Line { SrcBlock "bits[14]" SrcPort 1 DstBlock "Masks_FlagA" DstPort 1 } Line { SrcBlock "bits[13]" SrcPort 1 DstBlock "Masks_GoodPkt" DstPort 1 } Line { SrcBlock "bits[12]" SrcPort 1 DstBlock "Masks_BadPkt" DstPort 1 } Line { SrcBlock "bits[11]" SrcPort 1 DstBlock "Masks_GoodHdr" DstPort 1 } Line { SrcBlock "Reg 32b" SrcPort 1 Points [30, 0] Branch { DstBlock "bits[7:0]" DstPort 1 } Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 40] Branch { Points [0, 40] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 40] Branch { Points [0, 40] Branch { DstBlock "bits[16]" DstPort 1 } Branch { Points [0, 40] Branch { Points [0, 45] Branch { Points [0, 40] DstBlock "bits[31:24]" DstPort 1 } Branch { DstBlock "bits[23:18]" DstPort 1 } } Branch { DstBlock "bits[17]" DstPort 1 } } } Branch { DstBlock "bits[15]" DstPort 1 } } Branch { DstBlock "bits[14]" DstPort 1 } } Branch { DstBlock "bits[13]" DstPort 1 } } Branch { DstBlock "bits[12]" DstPort 1 } } Branch { DstBlock "bits[11]" DstPort 1 } } Branch { DstBlock "bits[10]" DstPort 1 } } Branch { DstBlock "bits[9]" DstPort 1 } } } Line { SrcBlock "bits[7:0]" SrcPort 1 DstBlock "Masks_Match" DstPort 1 } Line { SrcBlock "bits[17]" SrcPort 1 DstBlock "Act_UsePreCFO" DstPort 1 } Line { SrcBlock "bits[10]" SrcPort 1 DstBlock "Act_SwapAnt" DstPort 1 } Line { SrcBlock "bits[9]" SrcPort 1 DstBlock "Act_ReTxCRC" DstPort 1 } Annotation { Name "Action Registers:\n[31:24] - actionParam (like Tx Delay)\n[23:18] - actionID (pktBuf choice)\n[17] - " "use CFO pre-spin at Tx\n[16] - use header translator\n[15] - require FlagB\n[14] - require FlagA\n[13] - require" " goodPkt\n[12] - require badPkt\n[11] - require goodHeader\n[10] - Swap Tx stream/antenna\n[9] - Use received ch" "ecksums\n[8] - reserved\n[7:0] - require match[7:0]" Position [25, 161] HorizontalAlignment "left" } } } Block { BlockType From Name "From1" SID "2111" Position [455, 333, 555, 347] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodPkt" TagVisibility "global" } Block { BlockType From Name "From2" SID "2112" Position [455, 298, 555, 312] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_BadPkt" TagVisibility "global" } Block { BlockType From Name "From3" SID "2113" Position [455, 263, 560, 277] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodHeader" TagVisibility "global" } Block { BlockType From Name "From4" SID "2114" Position [60, 407, 220, 423] ShowName off CloseFcn "tagdialog Close" GotoTag "regAutoReply_action4" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "2115" Ports [1, 1] Position [450, 247, 475, 263] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "2116" Ports [1, 1] Position [450, 212, 475, 228] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "2117" Ports [1, 1] Position [450, 282, 475, 298] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "2118" Ports [1, 1] Position [450, 317, 475, 333] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter4" SID "2119" Ports [1, 1] Position [450, 352, 475, 368] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter5" SID "2120" Ports [1, 1] Position [450, 387, 475, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "2121" Ports [2, 1] Position [590, 245, 625, 280] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical10" SID "2122" Ports [3, 1] Position [895, 767, 930, 803] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,36,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('bla" "ck');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical11" SID "2123" Ports [2, 1] Position [895, 405, 930, 440] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical12" SID "2124" Ports [2, 1] Position [895, 440, 930, 475] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical13" SID "2125" Ports [2, 1] Position [895, 475, 930, 510] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical14" SID "2126" Ports [2, 1] Position [895, 510, 930, 545] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "2127" Ports [2, 1] Position [590, 210, 625, 245] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "2128" Ports [2, 1] Position [590, 280, 625, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "2129" Ports [2, 1] Position [590, 315, 625, 350] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "2130" Ports [2, 1] Position [590, 350, 625, 385] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "2131" Ports [2, 1] Position [590, 385, 625, 420] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "2132" Ports [7, 1] Position [790, 213, 825, 327] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "7" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,114,7,1,white,blue,0,c0601ce4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 114 114 0 ],[0.77 0." "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 114 114 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[62.55" " 62.55 67.55 62.55 67.55 67.55 67.55 62.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[57.55 57.55 62." "55 62.55 57.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[52.55 52.55 57.55 57.55 52.55 ]," "[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[47.55 47.55 52.55 47.55 52.55 52.55 47.55 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n" "\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical8" SID "2133" Ports [2, 1] Position [895, 315, 930, 350] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "2134" Ports [2, 1] Position [895, 355, 930, 390] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "MaxPktBuf" SID "2135" Ports [0, 1] Position [545, 792, 580, 818] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "32" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,b5591290,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'32');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "2136" Ports [3, 1] Position [1030, 888, 1060, 982] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "30,94,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 55.44 51.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[47" ".44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[43.44 43.44 47.44 47.44" " 43.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 39.44 43.44 43.44 39.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "2137" Ports [3, 1] Position [1055, 558, 1085, 652] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "30,94,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 55.44 51.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[47" ".44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[43.44 43.44 47.44 47.44" " 43.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 39.44 43.44 43.44 39.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "2138" Ports [2, 1] Position [595, 594, 630, 636] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a!=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,850de6e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\neq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "2139" Ports [2, 1] Position [655, 649, 690, 691] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "2140" Ports [2, 1] Position [655, 694, 690, 736] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "2141" Ports [2, 1] Position [655, 774, 690, 816] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,a8a3a52f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'62');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "SetFlagB" SID "2144" Ports [0, 1] Position [545, 712, 580, 738] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "ActionID_SetFlagB" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,f486ba17,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'61');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "bits[5:0]" SID "2145" Ports [1, 1] Position [945, 956, 980, 974] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "UseTrans" SID "2146" Position [1000, 418, 1030, 432] IconDisplay "Port number" } Block { BlockType Outport Name "Param" SID "2147" Position [1140, 598, 1170, 612] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "DoTx" SID "2148" Position [1005, 778, 1035, 792] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Set_FlagA" SID "2149" Position [1000, 328, 1030, 342] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Set_FlagB" SID "2150" Position [1000, 368, 1030, 382] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "TxBufNum" SID "2151" Position [1115, 928, 1145, 942] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "UsePreCFO" SID "2152" Position [1000, 453, 1030, 467] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "SwapAnt" SID "2153" Position [1000, 488, 1030, 502] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "ReTxCRC" SID "2154" Position [1000, 523, 1030, 537] Port "9" IconDisplay "Port number" } Line { SrcBlock "Mux" SrcPort 1 DstBlock "TxBufNum" DstPort 1 } Line { SrcBlock "Disabled2" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "bits[5:0]" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "FlagB" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "FlagA" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 11 Points [455, 0; 0, 65] DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Field Slices" SrcPort 7 DstBlock "Convert9" DstPort 1 } Line { SrcBlock "Match" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical10" SrcPort 1 Points [30, 0] Branch { Points [0, 120] DstBlock "Mux" DstPort 1 } Branch { DstBlock "DoTx" DstPort 1 } } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical10" DstPort 3 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Convert8" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "Logical9" SrcPort 1 DstBlock "Set_FlagB" DstPort 1 } Line { SrcBlock "Logical7" SrcPort 1 Points [40, 0; 0, 55] Branch { Points [0, 40] Branch { DstBlock "Logical9" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "Logical11" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "Logical12" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "Logical13" DstPort 1 } Branch { Points [0, 35] Branch { Points [0, 55] Branch { Points [0, 200] DstBlock "Logical10" DstPort 1 } Branch { Labels [1, 0] DstBlock "Mux1" DstPort 1 } } Branch { DstBlock "Logical14" DstPort 1 } } } } } } Branch { DstBlock "Logical8" DstPort 1 } } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "Set_FlagA" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [90, 0] Branch { DstBlock "Convert6" DstPort 1 } Branch { Points [130, 0; 0, 170] DstBlock "Logical10" DstPort 2 } } Line { SrcBlock "Logical6" SrcPort 1 Points [80, 0; 0, -105] DstBlock "Convert5" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 Points [65, 0; 0, -85] DstBlock "Convert4" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 Points [50, 0; 0, -65] DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 Points [35, 0; 0, -45] DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [30, 0; 0, -25] DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "MaxPktBuf" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "SetFlagB" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "SetFlagA" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 12 Points [85, 0; 0, 20] Branch { Points [0, 20; 135, 0; 0, 15] Branch { Points [0, 45] Branch { DstBlock "Relational2" DstPort 1 } Branch { Points [0, 80] Branch { DstBlock "Relational3" DstPort 1 } Branch { Points [0, 180] DstBlock "bits[5:0]" DstPort 1 } } } Branch { DstBlock "Relational1" DstPort 1 } } Branch { DstBlock "Relational" DstPort 2 } } Line { SrcBlock "Inverter5" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 6 DstBlock "Inverter5" DstPort 1 } Line { SrcBlock "Inverter4" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 5 DstBlock "Inverter4" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 4 DstBlock "Inverter3" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 3 DstBlock "Inverter2" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 2 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Field Slices" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Logical7" DstPort 3 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Logical7" DstPort 4 } Line { SrcBlock "Convert4" SrcPort 1 DstBlock "Logical7" DstPort 5 } Line { SrcBlock "Convert5" SrcPort 1 DstBlock "Logical7" DstPort 6 } Line { SrcBlock "Convert6" SrcPort 1 DstBlock "Logical7" DstPort 7 } Line { SrcBlock "Convert7" SrcPort 1 Points [50, 0; 0, -330] DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Convert8" SrcPort 1 Points [60, 0; 0, -335] DstBlock "Logical9" DstPort 2 } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Disabled1" SrcPort 1 Points [25, 0] DstBlock "Relational4" DstPort 1 } Line { SrcBlock "Logical11" SrcPort 1 DstBlock "UseTrans" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Param" DstPort 1 } Line { SrcBlock "Disabled3" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Convert9" SrcPort 1 DstBlock "Logical11" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 8 DstBlock "Convert10" DstPort 1 } Line { SrcBlock "Convert10" SrcPort 1 DstBlock "Logical12" DstPort 2 } Line { SrcBlock "Logical12" SrcPort 1 DstBlock "UsePreCFO" DstPort 1 } Line { SrcBlock "Logical13" SrcPort 1 DstBlock "SwapAnt" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 9 DstBlock "Convert11" DstPort 1 } Line { SrcBlock "Convert11" SrcPort 1 DstBlock "Logical13" DstPort 2 } Line { SrcBlock "Disabled" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 10 DstBlock "Convert12" DstPort 1 } Line { SrcBlock "Convert12" SrcPort 1 DstBlock "Logical14" DstPort 2 } Line { SrcBlock "Logical14" SrcPort 1 DstBlock "ReTxCRC" DstPort 1 } Annotation { Name "ActionIDs:\n0: Action inactive (do nothing)\n1 - 31: AutoTx from this pktBuf\n32 - 60: Reserved\n61: " "Set Flag B\n62: Set Flag A" Position [466, 898] HorizontalAlignment "left" } Annotation { Name "Only assert TxBufNum if this action\nactually triggers a transmission. It must\nbe zero for all other" " actions!" Position [1043, 1024] } } } Block { BlockType SubSystem Name "Action5" SID "2155" Ports [3, 9] Position [275, 604, 375, 686] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Action5" Location [202, 70, 1902, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Match" SID "2156" Position [495, 228, 525, 242] IconDisplay "Port number" } Block { BlockType Inport Name "FlagA" SID "2157" Position [525, 368, 555, 382] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "FlagB" SID "2158" Position [525, 403, 555, 417] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "2159" Ports [1, 1] Position [740, 218, 765, 232] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2160" Ports [1, 1] Position [740, 233, 765, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert10" SID "2161" Ports [1, 1] Position [740, 458, 765, 472] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert11" SID "2162" Ports [1, 1] Position [740, 493, 765, 507] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert12" SID "2163" Ports [1, 1] Position [740, 528, 765, 542] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "2164" Ports [1, 1] Position [740, 248, 765, 262] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "2165" Ports [1, 1] Position [740, 263, 765, 277] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "2166" Ports [1, 1] Position [740, 278, 765, 292] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert5" SID "2167" Ports [1, 1] Position [740, 293, 765, 307] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert6" SID "2168" Ports [1, 1] Position [740, 308, 765, 322] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "2169" Ports [1, 1] Position [745, 663, 770, 677] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert8" SID "2170" Ports [1, 1] Position [745, 708, 770, 722] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert9" SID "2171" Ports [1, 1] Position [740, 423, 765, 437] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled" SID "2172" Ports [0, 1] Position [520, 596, 545, 614] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "ActionID_Disabled" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'0');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Disabled1" SID "2173" Ports [0, 1] Position [595, 170, 615, 190] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2^8-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "20,20,0,1,white,blue,0,13fa6234,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 20 20 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[12.22 12." "22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output" "',1,'255');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled2" SID "2174" Ports [0, 1] Position [945, 924, 970, 946] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "5" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disabled3" SID "2175" Ports [0, 1] Position [985, 594, 1010, 616] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Field Slices" SID "2176" Ports [1, 12] Position [285, 212, 405, 613] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Field Slices" Location [202, 70, 1918, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "186" Block { BlockType Inport Name "Reg 32b" SID "2177" Position [150, 18, 180, 32] IconDisplay "Port number" } Block { BlockType Reference Name "bits[10]" SID "2178" Ports [1, 1] Position [245, 106, 280, 124] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "10" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[11]" SID "2179" Ports [1, 1] Position [245, 146, 280, 164] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "11" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[12]" SID "2180" Ports [1, 1] Position [245, 186, 280, 204] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "12" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[13]" SID "2181" Ports [1, 1] Position [245, 231, 280, 249] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "13" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[14]" SID "2182" Ports [1, 1] Position [245, 276, 280, 294] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "14" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[15]" SID "2183" Ports [1, 1] Position [245, 316, 280, 334] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "15" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[16]" SID "2184" Ports [1, 1] Position [245, 356, 280, 374] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[17]" SID "2185" Ports [1, 1] Position [245, 396, 280, 414] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "17" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[23:18]" SID "2186" Ports [1, 1] Position [245, 441, 280, 459] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "6" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "18" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[31:24]" SID "2187" Ports [1, 1] Position [245, 481, 280, 499] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[7:0]" SID "2188" Ports [1, 1] Position [245, 16, 280, 34] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bits[9]" SID "2189" Ports [1, 1] Position [245, 61, 280, 79] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "9" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Masks_Match" SID "2190" Position [345, 18, 375, 32] IconDisplay "Port number" } Block { BlockType Outport Name "Masks_GoodHdr" SID "2191" Position [345, 148, 375, 162] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_BadPkt" SID "2192" Position [345, 188, 375, 202] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_GoodPkt" SID "2193" Position [345, 233, 375, 247] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_FlagA" SID "2194" Position [345, 278, 375, 292] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Masks_FlagB" SID "2195" Position [345, 318, 375, 332] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Act_UseTrans" SID "2196" Position [345, 358, 375, 372] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Act_UsePreCFO" SID "2197" Position [345, 398, 375, 412] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Act_SwapAnt" SID "2198" Position [345, 108, 375, 122] Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "Act_ReTxCRC" SID "2199" Position [345, 63, 375, 77] Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "Act_Param" SID "2200" Position [345, 483, 375, 497] Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "Act_ID" SID "2201" Position [345, 443, 375, 457] Port "12" IconDisplay "Port number" } Line { SrcBlock "bits[9]" SrcPort 1 DstBlock "Act_ReTxCRC" DstPort 1 } Line { SrcBlock "bits[10]" SrcPort 1 DstBlock "Act_SwapAnt" DstPort 1 } Line { SrcBlock "bits[17]" SrcPort 1 DstBlock "Act_UsePreCFO" DstPort 1 } Line { SrcBlock "bits[7:0]" SrcPort 1 DstBlock "Masks_Match" DstPort 1 } Line { SrcBlock "Reg 32b" SrcPort 1 Points [30, 0] Branch { Points [0, 45] Branch { DstBlock "bits[9]" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "bits[10]" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "bits[11]" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "bits[12]" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "bits[13]" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "bits[14]" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "bits[15]" DstPort 1 } Branch { Points [0, 40] Branch { Points [0, 40] Branch { DstBlock "bits[17]" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "bits[23:18]" DstPort 1 } Branch { Points [0, 40] DstBlock "bits[31:24]" DstPort 1 } } } Branch { DstBlock "bits[16]" DstPort 1 } } } } } } } } } Branch { DstBlock "bits[7:0]" DstPort 1 } } Line { SrcBlock "bits[11]" SrcPort 1 DstBlock "Masks_GoodHdr" DstPort 1 } Line { SrcBlock "bits[12]" SrcPort 1 DstBlock "Masks_BadPkt" DstPort 1 } Line { SrcBlock "bits[13]" SrcPort 1 DstBlock "Masks_GoodPkt" DstPort 1 } Line { SrcBlock "bits[14]" SrcPort 1 DstBlock "Masks_FlagA" DstPort 1 } Line { SrcBlock "bits[15]" SrcPort 1 DstBlock "Masks_FlagB" DstPort 1 } Line { SrcBlock "bits[16]" SrcPort 1 DstBlock "Act_UseTrans" DstPort 1 } Line { SrcBlock "bits[23:18]" SrcPort 1 DstBlock "Act_ID" DstPort 1 } Line { SrcBlock "bits[31:24]" SrcPort 1 DstBlock "Act_Param" DstPort 1 } Annotation { Name "Action Registers:\n[31:24] - actionParam (like Tx Delay)\n[23:18] - actionID (pktBuf choice)\n[17] - " "use CFO pre-spin at Tx\n[16] - use header translator\n[15] - require FlagB\n[14] - require FlagA\n[13] - require" " goodPkt\n[12] - require badPkt\n[11] - require goodHeader\n[10] - Swap Tx stream/antenna\n[9] - Use received ch" "ecksums\n[8] - reserved\n[7:0] - require match[7:0]" Position [25, 161] HorizontalAlignment "left" } } } Block { BlockType From Name "From1" SID "2202" Position [455, 333, 555, 347] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodPkt" TagVisibility "global" } Block { BlockType From Name "From2" SID "2203" Position [455, 298, 555, 312] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_BadPkt" TagVisibility "global" } Block { BlockType From Name "From3" SID "2204" Position [455, 263, 560, 277] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodHeader" TagVisibility "global" } Block { BlockType From Name "From4" SID "2205" Position [60, 407, 220, 423] ShowName off CloseFcn "tagdialog Close" GotoTag "regAutoReply_action5" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "2206" Ports [1, 1] Position [450, 247, 475, 263] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "2207" Ports [1, 1] Position [450, 212, 475, 228] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "2208" Ports [1, 1] Position [450, 282, 475, 298] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "2209" Ports [1, 1] Position [450, 317, 475, 333] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter4" SID "2210" Ports [1, 1] Position [450, 352, 475, 368] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter5" SID "2211" Ports [1, 1] Position [450, 387, 475, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "2212" Ports [2, 1] Position [590, 245, 625, 280] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical10" SID "2213" Ports [3, 1] Position [895, 767, 930, 803] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,36,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('bla" "ck');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical11" SID "2214" Ports [2, 1] Position [895, 405, 930, 440] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical12" SID "2215" Ports [2, 1] Position [895, 440, 930, 475] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical13" SID "2216" Ports [2, 1] Position [895, 475, 930, 510] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical14" SID "2217" Ports [2, 1] Position [895, 510, 930, 545] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "2218" Ports [2, 1] Position [590, 210, 625, 245] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "2219" Ports [2, 1] Position [590, 280, 625, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "2220" Ports [2, 1] Position [590, 315, 625, 350] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "2221" Ports [2, 1] Position [590, 350, 625, 385] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "2222" Ports [2, 1] Position [590, 385, 625, 420] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "2223" Ports [7, 1] Position [790, 213, 825, 327] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "7" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,114,7,1,white,blue,0,c0601ce4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 114 114 0 ],[0.77 0." "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 114 114 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[62.55" " 62.55 67.55 62.55 67.55 67.55 67.55 62.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[57.55 57.55 62." "55 62.55 57.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[52.55 52.55 57.55 57.55 52.55 ]," "[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[47.55 47.55 52.55 47.55 52.55 52.55 47.55 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n" "\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical8" SID "2224" Ports [2, 1] Position [895, 315, 930, 350] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "2225" Ports [2, 1] Position [895, 355, 930, 390] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "MaxPktBuf" SID "2226" Ports [0, 1] Position [545, 792, 580, 818] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "32" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,b5591290,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'32');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "2227" Ports [3, 1] Position [1030, 888, 1060, 982] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "30,94,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 55.44 51.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[47" ".44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[43.44 43.44 47.44 47.44" " 43.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 39.44 43.44 43.44 39.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "2228" Ports [3, 1] Position [1055, 558, 1085, 652] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "30,94,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.4286 80.5714 94 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 55.44 51.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[47" ".44 47.44 51.44 51.44 47.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[43.44 43.44 47.44 47.44" " 43.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 39.44 43.44 43.44 39.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "2229" Ports [2, 1] Position [595, 594, 630, 636] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a!=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,850de6e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\neq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "2230" Ports [2, 1] Position [655, 649, 690, 691] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "2231" Ports [2, 1] Position [655, 694, 690, 736] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "2232" Ports [2, 1] Position [655, 774, 690, 816] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,a8a3a52f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'62');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "SetFlagB" SID "2235" Ports [0, 1] Position [545, 712, 580, 738] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "ActionID_SetFlagB" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "35,26,0,1,white,blue,0,f486ba17,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'61');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "bits[5:0]" SID "2236" Ports [1, 1] Position [945, 956, 980, 974] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "UseTrans" SID "2237" Position [1000, 418, 1030, 432] IconDisplay "Port number" } Block { BlockType Outport Name "Param" SID "2238" Position [1140, 598, 1170, 612] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "DoTx" SID "2239" Position [1005, 778, 1035, 792] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Set_FlagA" SID "2240" Position [1000, 328, 1030, 342] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Set_FlagB" SID "2241" Position [1000, 368, 1030, 382] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "TxBufNum" SID "2242" Position [1115, 928, 1145, 942] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "UsePreCFO" SID "2243" Position [1000, 453, 1030, 467] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "SwapAnt" SID "2244" Position [1000, 488, 1030, 502] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "ReTxCRC" SID "2245" Position [1000, 523, 1030, 537] Port "9" IconDisplay "Port number" } Line { SrcBlock "Logical14" SrcPort 1 DstBlock "ReTxCRC" DstPort 1 } Line { SrcBlock "Convert12" SrcPort 1 DstBlock "Logical14" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 10 DstBlock "Convert12" DstPort 1 } Line { SrcBlock "Disabled" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Convert11" SrcPort 1 DstBlock "Logical13" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 9 DstBlock "Convert11" DstPort 1 } Line { SrcBlock "Logical13" SrcPort 1 DstBlock "SwapAnt" DstPort 1 } Line { SrcBlock "Logical12" SrcPort 1 DstBlock "UsePreCFO" DstPort 1 } Line { SrcBlock "Convert10" SrcPort 1 DstBlock "Logical12" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 8 DstBlock "Convert10" DstPort 1 } Line { SrcBlock "Convert9" SrcPort 1 DstBlock "Logical11" DstPort 2 } Line { SrcBlock "Disabled3" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Param" DstPort 1 } Line { SrcBlock "Logical11" SrcPort 1 DstBlock "UseTrans" DstPort 1 } Line { SrcBlock "Disabled1" SrcPort 1 Points [25, 0] DstBlock "Relational4" DstPort 1 } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert8" SrcPort 1 Points [60, 0; 0, -335] DstBlock "Logical9" DstPort 2 } Line { SrcBlock "Convert7" SrcPort 1 Points [50, 0; 0, -330] DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Convert6" SrcPort 1 DstBlock "Logical7" DstPort 7 } Line { SrcBlock "Convert5" SrcPort 1 DstBlock "Logical7" DstPort 6 } Line { SrcBlock "Convert4" SrcPort 1 DstBlock "Logical7" DstPort 5 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Logical7" DstPort 4 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Logical7" DstPort 3 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Field Slices" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 2 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 3 DstBlock "Inverter2" DstPort 1 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 4 DstBlock "Inverter3" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 5 DstBlock "Inverter4" DstPort 1 } Line { SrcBlock "Inverter4" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 6 DstBlock "Inverter5" DstPort 1 } Line { SrcBlock "Inverter5" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 12 Points [85, 0; 0, 20] Branch { DstBlock "Relational" DstPort 2 } Branch { Points [0, 20; 135, 0; 0, 15] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 45] Branch { Points [0, 80] Branch { Points [0, 180] DstBlock "bits[5:0]" DstPort 1 } Branch { DstBlock "Relational3" DstPort 1 } } Branch { DstBlock "Relational2" DstPort 1 } } } } Line { SrcBlock "SetFlagA" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "SetFlagB" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "MaxPktBuf" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [30, 0; 0, -25] DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 Points [35, 0; 0, -45] DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 Points [50, 0; 0, -65] DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 Points [65, 0; 0, -85] DstBlock "Convert4" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 Points [80, 0; 0, -105] DstBlock "Convert5" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [90, 0] Branch { Points [130, 0; 0, 170] DstBlock "Logical10" DstPort 2 } Branch { DstBlock "Convert6" DstPort 1 } } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "Set_FlagA" DstPort 1 } Line { SrcBlock "Logical7" SrcPort 1 Points [40, 0; 0, 55] Branch { DstBlock "Logical8" DstPort 1 } Branch { Points [0, 40] Branch { Points [0, 50] Branch { Points [0, 35] Branch { Points [0, 35] Branch { Points [0, 35] Branch { DstBlock "Logical14" DstPort 1 } Branch { Points [0, 55] Branch { Labels [1, 0] DstBlock "Mux1" DstPort 1 } Branch { Points [0, 200] DstBlock "Logical10" DstPort 1 } } } Branch { DstBlock "Logical13" DstPort 1 } } Branch { DstBlock "Logical12" DstPort 1 } } Branch { DstBlock "Logical11" DstPort 1 } } Branch { DstBlock "Logical9" DstPort 1 } } } Line { SrcBlock "Logical9" SrcPort 1 DstBlock "Set_FlagB" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Convert8" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical10" DstPort 3 } Line { SrcBlock "Logical10" SrcPort 1 Points [30, 0] Branch { DstBlock "DoTx" DstPort 1 } Branch { Points [0, 120] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Match" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Field Slices" SrcPort 7 DstBlock "Convert9" DstPort 1 } Line { SrcBlock "Field Slices" SrcPort 11 Points [455, 0; 0, 65] DstBlock "Mux1" DstPort 3 } Line { SrcBlock "FlagA" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "FlagB" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "bits[5:0]" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Disabled2" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "TxBufNum" DstPort 1 } Annotation { Name "Only assert TxBufNum if this action\nactually triggers a transmission. It must\nbe zero for all other" " actions!" Position [1043, 1024] } Annotation { Name "ActionIDs:\n0: Action inactive (do nothing)\n1 - 31: AutoTx from this pktBuf\n32 - 60: Reserved\n61: " "Set Flag B\n62: Set Flag A" Position [466, 898] HorizontalAlignment "left" } } } Block { BlockType BusCreator Name "Bus\nCreator" SID "2246" Ports [9, 1] Position [480, 105, 485, 185] ShowName off Inputs "9" DisplayOption "bar" } Block { BlockType BusCreator Name "Bus\nCreator1" SID "2247" Ports [9, 1] Position [480, 205, 485, 285] ShowName off Inputs "9" DisplayOption "bar" } Block { BlockType BusCreator Name "Bus\nCreator2" SID "2248" Ports [9, 1] Position [480, 305, 485, 385] ShowName off Inputs "9" DisplayOption "bar" } Block { BlockType BusCreator Name "Bus\nCreator3" SID "2249" Ports [9, 1] Position [480, 405, 485, 485] ShowName off Inputs "9" DisplayOption "bar" } Block { BlockType BusCreator Name "Bus\nCreator4" SID "2250" Ports [9, 1] Position [480, 505, 485, 585] ShowName off Inputs "9" DisplayOption "bar" } Block { BlockType BusCreator Name "Bus\nCreator5" SID "2251" Ports [9, 1] Position [480, 605, 485, 685] ShowName off Inputs "9" DisplayOption "bar" } Block { BlockType Reference Name "Concat" SID "2252" Ports [3, 1] Position [285, 44, 330, 96] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "3" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,165" block_type "concat" block_version "10.1.3" sg_icon_stat "45,52,3,1,white,blue,0,61ef8218,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 52 52 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'hi');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('\\fontsize{2" "0}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Goto Name "Goto1" SID "2253" Position [375, 60, 590, 80] ShowName off GotoTag "RxAutoReply_MatchStatus" TagVisibility "global" } Block { BlockType Outport Name " Action0" SID "2254" Position [560, 138, 590, 152] IconDisplay "Port number" } Block { BlockType Outport Name " Action1" SID "2255" Position [560, 238, 590, 252] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name " Action2" SID "2256" Position [560, 338, 590, 352] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name " Action3" SID "2257" Position [560, 438, 590, 452] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name " Action4" SID "2258" Position [560, 538, 590, 552] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name " Action5" SID "2259" Position [560, 638, 590, 652] Port "6" IconDisplay "Port number" } Line { SrcBlock "Match" SrcPort 1 Points [65, 0] Branch { DstBlock "Action0" DstPort 1 } Branch { Points [0, 100] Branch { Points [0, 100] Branch { Points [0, 100] Branch { Points [0, 100] Branch { DstBlock "Action4" DstPort 1 } Branch { Points [0, 100] DstBlock "Action5" DstPort 1 } } Branch { DstBlock "Action3" DstPort 1 } } Branch { DstBlock "Action2" DstPort 1 } } Branch { DstBlock "Action1" DstPort 1 } } Branch { Points [0, -35] DstBlock "Concat" DstPort 3 } } Line { Labels [0, 0] SrcBlock "Action0" SrcPort 1 DstBlock "Bus\nCreator" DstPort 1 } Line { SrcBlock "Action0" SrcPort 2 DstBlock "Bus\nCreator" DstPort 2 } Line { SrcBlock "Action0" SrcPort 3 DstBlock "Bus\nCreator" DstPort 3 } Line { SrcBlock "Action0" SrcPort 4 DstBlock "Bus\nCreator" DstPort 4 } Line { SrcBlock "Action0" SrcPort 5 DstBlock "Bus\nCreator" DstPort 5 } Line { SrcBlock "Bus\nCreator" SrcPort 1 DstBlock " Action0" DstPort 1 } Line { SrcBlock "FlagA" SrcPort 1 Points [105, 0] Branch { DstBlock "Action0" DstPort 2 } Branch { Points [0, 100] Branch { Points [0, 100] Branch { Points [0, 100] Branch { Points [0, 100] Branch { DstBlock "Action4" DstPort 2 } Branch { Points [0, 100] DstBlock "Action5" DstPort 2 } } Branch { DstBlock "Action3" DstPort 2 } } Branch { DstBlock "Action2" DstPort 2 } } Branch { DstBlock "Action1" DstPort 2 } } Branch { Points [0, -90] DstBlock "Concat" DstPort 1 } } Line { SrcBlock "FlagB" SrcPort 1 Points [75, 0] Branch { Points [0, 100] Branch { Points [0, 100] Branch { Points [0, 100] Branch { Points [0, 100] Branch { DstBlock "Action4" DstPort 3 } Branch { DstBlock "Action5" DstPort 3 } } Branch { DstBlock "Action3" DstPort 3 } } Branch { DstBlock "Action2" DstPort 3 } } Branch { DstBlock "Action1" DstPort 3 } } Branch { Points [0, 0] Branch { DstBlock "Action0" DstPort 3 } Branch { Points [0, -100] DstBlock "Concat" DstPort 2 } } } Line { SrcBlock "Action0" SrcPort 6 DstBlock "Bus\nCreator" DstPort 6 } Line { SrcBlock "Action0" SrcPort 7 DstBlock "Bus\nCreator" DstPort 7 } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "Action0" SrcPort 8 DstBlock "Bus\nCreator" DstPort 8 } Line { SrcBlock "Action0" SrcPort 9 DstBlock "Bus\nCreator" DstPort 9 } Line { Labels [0, 0] SrcBlock "Action1" SrcPort 1 DstBlock "Bus\nCreator1" DstPort 1 } Line { SrcBlock "Action1" SrcPort 2 DstBlock "Bus\nCreator1" DstPort 2 } Line { SrcBlock "Action1" SrcPort 3 DstBlock "Bus\nCreator1" DstPort 3 } Line { SrcBlock "Action1" SrcPort 4 DstBlock "Bus\nCreator1" DstPort 4 } Line { SrcBlock "Action1" SrcPort 5 DstBlock "Bus\nCreator1" DstPort 5 } Line { SrcBlock "Bus\nCreator1" SrcPort 1 DstBlock " Action1" DstPort 1 } Line { SrcBlock "Action1" SrcPort 6 DstBlock "Bus\nCreator1" DstPort 6 } Line { SrcBlock "Action1" SrcPort 7 DstBlock "Bus\nCreator1" DstPort 7 } Line { SrcBlock "Action1" SrcPort 8 DstBlock "Bus\nCreator1" DstPort 8 } Line { SrcBlock "Action1" SrcPort 9 DstBlock "Bus\nCreator1" DstPort 9 } Line { Labels [0, 0] SrcBlock "Action2" SrcPort 1 DstBlock "Bus\nCreator2" DstPort 1 } Line { SrcBlock "Action2" SrcPort 2 DstBlock "Bus\nCreator2" DstPort 2 } Line { SrcBlock "Action2" SrcPort 3 DstBlock "Bus\nCreator2" DstPort 3 } Line { SrcBlock "Action2" SrcPort 4 DstBlock "Bus\nCreator2" DstPort 4 } Line { SrcBlock "Action2" SrcPort 5 DstBlock "Bus\nCreator2" DstPort 5 } Line { SrcBlock "Bus\nCreator2" SrcPort 1 DstBlock " Action2" DstPort 1 } Line { SrcBlock "Action2" SrcPort 6 DstBlock "Bus\nCreator2" DstPort 6 } Line { SrcBlock "Action2" SrcPort 7 DstBlock "Bus\nCreator2" DstPort 7 } Line { SrcBlock "Action2" SrcPort 8 DstBlock "Bus\nCreator2" DstPort 8 } Line { SrcBlock "Action2" SrcPort 9 DstBlock "Bus\nCreator2" DstPort 9 } Line { Labels [0, 0] SrcBlock "Action3" SrcPort 1 DstBlock "Bus\nCreator3" DstPort 1 } Line { SrcBlock "Action3" SrcPort 2 DstBlock "Bus\nCreator3" DstPort 2 } Line { SrcBlock "Action3" SrcPort 3 DstBlock "Bus\nCreator3" DstPort 3 } Line { SrcBlock "Action3" SrcPort 4 DstBlock "Bus\nCreator3" DstPort 4 } Line { SrcBlock "Action3" SrcPort 5 DstBlock "Bus\nCreator3" DstPort 5 } Line { SrcBlock "Bus\nCreator3" SrcPort 1 DstBlock " Action3" DstPort 1 } Line { SrcBlock "Action3" SrcPort 6 DstBlock "Bus\nCreator3" DstPort 6 } Line { SrcBlock "Action3" SrcPort 7 DstBlock "Bus\nCreator3" DstPort 7 } Line { SrcBlock "Action3" SrcPort 8 DstBlock "Bus\nCreator3" DstPort 8 } Line { SrcBlock "Action3" SrcPort 9 DstBlock "Bus\nCreator3" DstPort 9 } Line { Labels [0, 0] SrcBlock "Action4" SrcPort 1 DstBlock "Bus\nCreator4" DstPort 1 } Line { SrcBlock "Action4" SrcPort 2 DstBlock "Bus\nCreator4" DstPort 2 } Line { SrcBlock "Action4" SrcPort 3 DstBlock "Bus\nCreator4" DstPort 3 } Line { SrcBlock "Action4" SrcPort 4 DstBlock "Bus\nCreator4" DstPort 4 } Line { SrcBlock "Action4" SrcPort 5 DstBlock "Bus\nCreator4" DstPort 5 } Line { SrcBlock "Bus\nCreator4" SrcPort 1 DstBlock " Action4" DstPort 1 } Line { SrcBlock "Action4" SrcPort 6 DstBlock "Bus\nCreator4" DstPort 6 } Line { SrcBlock "Action4" SrcPort 7 DstBlock "Bus\nCreator4" DstPort 7 } Line { SrcBlock "Action4" SrcPort 8 DstBlock "Bus\nCreator4" DstPort 8 } Line { SrcBlock "Action4" SrcPort 9 DstBlock "Bus\nCreator4" DstPort 9 } Line { Labels [0, 0] SrcBlock "Action5" SrcPort 1 DstBlock "Bus\nCreator5" DstPort 1 } Line { SrcBlock "Action5" SrcPort 2 DstBlock "Bus\nCreator5" DstPort 2 } Line { SrcBlock "Action5" SrcPort 3 DstBlock "Bus\nCreator5" DstPort 3 } Line { SrcBlock "Action5" SrcPort 4 DstBlock "Bus\nCreator5" DstPort 4 } Line { SrcBlock "Action5" SrcPort 5 DstBlock "Bus\nCreator5" DstPort 5 } Line { SrcBlock "Bus\nCreator5" SrcPort 1 DstBlock " Action5" DstPort 1 } Line { SrcBlock "Action5" SrcPort 6 DstBlock "Bus\nCreator5" DstPort 6 } Line { SrcBlock "Action5" SrcPort 7 DstBlock "Bus\nCreator5" DstPort 7 } Line { SrcBlock "Action5" SrcPort 8 DstBlock "Bus\nCreator5" DstPort 8 } Line { SrcBlock "Action5" SrcPort 9 DstBlock "Bus\nCreator5" DstPort 9 } } } Block { BlockType SubSystem Name "AutoResponse I/O" SID "2260" Ports [8] Position [935, 242, 1020, 353] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AutoResponse I/O" Location [2, 82, 1661, 987] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "UseTrans" SID "2261" Position [295, 603, 325, 617] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "UsePreCFO" SID "2262" Position [290, 713, 320, 727] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "SwapAnt" SID "2263" Position [290, 843, 320, 857] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "ReTxCRC" SID "2264" Position [290, 953, 320, 967] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Rx-Tx Delay" SID "2265" Position [475, 268, 505, 282] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "DoTx" SID "2266" Position [250, 373, 280, 387] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Buf Index" SID "2267" Position [240, 153, 270, 167] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "RxPktDone" SID "2268" Position [250, 353, 280, 367] NamePlacement "alternate" Port "8" IconDisplay "Port number" } Block { BlockType Scope Name "AutoResp" SID "2269" Ports [7] Position [1100, 34, 1145, 146] NamePlacement "alternate" Floating off Location [5, 36, 1689, 1044] Open off NumInputPorts "7" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "392.7801724137931" YMin "-0.5~-0.25~-1~-1~0~0~0" YMax "0.5~0.15~1~1~1~3500~1" SaveName "ScopeData25" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "Concat" SID "2270" Ports [3, 1] Position [780, 267, 815, 323] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "3" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,165" block_type "concat" block_version "10.1.3" sg_icon_stat "35,56,3,1,white,blue,0,61ef8218,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 56 56 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[33.55 33." "55 38.55 33.55 38.55 38.55 38.55 33.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[28.55 28.55 33.55 3" "3.55 28.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[23.55 23.55 28.55 28.55 23.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 18.55 23.55 23.55 18.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'hi');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('\\fontsize{20" "}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "2271" Ports [0, 1] Position [715, 306, 735, 324] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "20,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "2272" Ports [1, 1] Position [330, 353, 355, 367] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2273" Ports [1, 1] Position [330, 373, 355, 387] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert10" SID "2274" Ports [1, 1] Position [370, 953, 395, 967] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert11" SID "2275" Ports [1, 1] Position [370, 993, 395, 1007] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "2276" Ports [1, 1] Position [370, 503, 395, 517] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "2277" Ports [1, 1] Position [375, 603, 400, 617] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "2278" Ports [1, 1] Position [375, 643, 400, 657] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert5" SID "2279" Ports [1, 1] Position [675, 393, 700, 407] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert6" SID "2280" Ports [1, 1] Position [375, 713, 400, 727] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "2281" Ports [1, 1] Position [375, 753, 400, 767] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert8" SID "2282" Ports [1, 1] Position [370, 843, 395, 857] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert9" SID "2283" Ports [1, 1] Position [370, 883, 395, 897] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter" SID "2284" Ports [2, 1] Position [970, 352, 1020, 403] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "0" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "14" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,619" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{" "\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType From Name "From" SID "2285" Position [540, 389, 635, 411] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType From Name "From1" SID "2286" Position [250, 639, 345, 661] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType From Name "From10" SID "2287" Position [175, 503, 295, 517] ShowName off CloseFcn "tagdialog Close" GotoTag "Tx_Running" TagVisibility "global" } Block { BlockType From Name "From2" SID "2288" Position [250, 749, 345, 771] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType From Name "From3" SID "2289" Position [245, 879, 340, 901] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType From Name "From4" SID "2290" Position [615, 235, 730, 255] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AutoTx_ExtraDly" TagVisibility "global" } Block { BlockType From Name "From5" SID "2291" Position [245, 989, 340, 1011] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "2292" Position [1340, 385, 1460, 405] ShowName off GotoTag "RxAutoReply_AutoTx" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "2293" Position [1400, 570, 1520, 590] ShowName off GotoTag "TxEn_Output" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "2294" Position [1570, 475, 1690, 495] ShowName off GotoTag "TxEn_Output_dbl" TagVisibility "global" } Block { BlockType Goto Name "Goto31" SID "2295" Position [790, 613, 950, 627] ShowName off GotoTag "RxAutoReplyProc_UseTrans" TagVisibility "global" } Block { BlockType Goto Name "Goto4" SID "2296" Position [790, 723, 950, 737] ShowName off GotoTag "RxAutoReplyProc_UsePreCFO" TagVisibility "global" } Block { BlockType Goto Name "Goto5" SID "2297" Position [715, 170, 930, 190] ShowName off GotoTag "RxAutoReply_Action_BufNum" TagVisibility "global" } Block { BlockType Goto Name "Goto6" SID "2298" Position [790, 853, 950, 867] ShowName off GotoTag "RxAutoReplyProc_SwapAnt" TagVisibility "global" } Block { BlockType Goto Name "Goto7" SID "2299" Position [1340, 405, 1460, 425] ShowName off GotoTag "RxAutoReply_ExtTxEn" TagVisibility "global" } Block { BlockType Goto Name "Goto8" SID "2300" Position [790, 963, 950, 977] ShowName off GotoTag "RxAutoReplyProc_ReTxCRC" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "2301" Ports [1, 1] Position [900, 357, 930, 373] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "30,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "2302" Ports [2, 1] Position [400, 351, 430, 389] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical10" SID "2303" Ports [2, 1] Position [555, 821, 585, 859] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical11" SID "2304" Ports [2, 1] Position [555, 861, 585, 899] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical12" SID "2305" Ports [2, 1] Position [555, 931, 585, 969] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical13" SID "2306" Ports [2, 1] Position [555, 971, 585, 1009] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "2307" Ports [2, 1] Position [555, 581, 585, 619] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "2308" Ports [2, 1] Position [745, 391, 775, 429] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "2309" Ports [2, 1] Position [555, 621, 585, 659] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "2310" Ports [2, 1] Position [1270, 451, 1295, 489] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,38,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 38 38 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[22.33 " "22.33 25.33 22.33 25.33 25.33 25.33 22.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[19.33 19.33 22.33" " 22.33 19.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[16.33 16.33 19.33 19.33 16.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 13.33 16.33 16.33 13.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "2311" Ports [2, 1] Position [1325, 455, 1350, 515] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,60,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 60 60 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[33.33 " "33.33 36.33 33.33 36.33 36.33 36.33 33.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[30.33 30.33 33.33" " 33.33 30.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[27.33 27.33 30.33 30.33 27.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33 24.33 27.33 27.33 24.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "2312" Ports [2, 1] Position [555, 691, 585, 729] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "2313" Ports [2, 1] Position [555, 731, 585, 769] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "2314" Ports [2, 1] Position [500, 181, 530, 219] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Radio_RxEn" SID "2315" Ports [1, 1] Position [1390, 514, 1445, 526] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "55,12,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([25.775 27.22 26.22 24.775 25.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.985 0.979 0.895 ]);\npatch([24.775 26.22 27.22 25.775 24.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([25.775 29.22 28.22 27.22 26.22 24.775 25.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0.979 0.8" "95 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprint" "f('','COMMENT: end icon text');" } Block { BlockType Reference Name "Radio_TxEn" SID "2316" Ports [1, 1] Position [1390, 479, 1445, 491] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "55,12,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([25.775 27.22 26.22 24.775 25.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.985 0.979 0.895 ]);\npatch([24.775 26.22 27.22 25.775 24.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([25.775 29.22 28.22 27.22 26.22 24.775 25.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0.979 0.8" "95 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprint" "f('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2317" Ports [3, 1] Position [605, 265, 645, 325] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "2318" Ports [3, 1] Position [615, 150, 655, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "2319" Ports [2, 1] Position [1075, 348, 1120, 392] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "2324" Ports [1, 1] Position [200, 88, 225, 102] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2325" Ports [1, 1] Position [200, 103, 225, 117] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "2326" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2327" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType SubSystem Name "S-R Latch1" SID "2328" Ports [2, 1] Position [645, 690, 675, 770] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch1" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2329" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2330" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "2331" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "2332" Ports [1, 1] Position [200, 88, 225, 102] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2333" Ports [1, 1] Position [200, 103, 225, 117] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "2334" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2335" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType SubSystem Name "S-R Latch2" SID "2336" Ports [2, 1] Position [645, 820, 675, 900] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch2" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2337" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2338" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "2339" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "2340" Ports [1, 1] Position [200, 88, 225, 102] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2341" Ports [1, 1] Position [200, 103, 225, 117] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "2342" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2343" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType SubSystem Name "S-R Latch3" SID "2344" Ports [2, 1] Position [645, 580, 675, 660] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch3" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2345" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2346" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "2347" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "2348" Ports [1, 1] Position [200, 88, 225, 102] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2349" Ports [1, 1] Position [200, 103, 225, 117] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "2350" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2351" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType SubSystem Name "S-R Latch4" SID "2352" Ports [2, 1] Position [645, 930, 675, 1010] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch4" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2353" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2354" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "2355" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "2356" Ports [1, 1] Position [200, 88, 225, 102] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2357" Ports [1, 1] Position [200, 103, 225, 117] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "2358" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2359" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType SubSystem Name "Tx-Rx Generation" SID "2360" Ports [2, 4] Position [1155, 454, 1230, 526] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Tx-Rx Generation" Location [113, 121, 1581, 1073] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "DoTx" SID "2361" Position [495, 463, 525, 477] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "TxDone" SID "2362" Position [550, 508, 580, 522] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "2363" Ports [1, 1] Position [200, 338, 230, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2364" Ports [1, 1] Position [300, 228, 330, 242] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Delay" SID "2365" Ports [3, 1] Position [1015, 104, 1085, 146] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Delay" Location [807, 143, 1357, 301] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Start" SID "2366" Position [325, 323, 355, 337] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "En" SID "2367" Position [325, 243, 355, 257] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "2368" Position [325, 358, 355, 372] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Concat1" SID "2369" Ports [3, 1] Position [650, 432, 685, 488] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "3" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,165" block_type "concat" block_version "10.1.3" sg_icon_stat "35,56,3,1,white,blue,0,61ef8218,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 56 56 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[33.55 33." "55 38.55 33.55 38.55 38.55 38.55 33.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[28.55 28.55 33.55 3" "3.55 28.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[23.55 23.55 28.55 28.55 23.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 18.55 23.55 23.55 18.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'hi');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('\\fontsize{20" "}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "2370" Ports [0, 1] Position [550, 471, 570, 489] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "20,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter" SID "2371" Ports [2, 1] Position [730, 310, 790, 370] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "14" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "1081,412,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "60,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38" ".88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38." "88 30.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf" "++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From4" SID "2372" Position [435, 430, 550, 450] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AutoTx_ExtraDly" TagVisibility "global" } Block { BlockType From Name "From9" SID "2373" Position [385, 449, 525, 471] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_ExtAutoTxEn_Delay" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "2374" Ports [1, 1] Position [655, 317, 685, 333] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "30,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "2375" Ports [2, 1] Position [1010, 321, 1040, 359] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "2376" Ports [2, 1] Position [485, 356, 515, 394] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "2377" Ports [2, 1] Position [850, 328, 895, 372] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch4" SID "2378" Ports [2, 1] Position [535, 305, 570, 400] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch4" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2379" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2380" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "2381" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "2382" Ports [1, 1] Position [195, 88, 220, 102] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2383" Ports [1, 1] Position [195, 103, 220, 117] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "2384" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2385" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Reference Name "Up Sample8" SID "2386" Ports [1, 1] Position [770, 448, 790, 472] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "TxEn" SID "2387" Position [1150, 333, 1180, 347] IconDisplay "Port number" } Line { SrcBlock "S-R Latch4" SrcPort 1 Points [55, 0] Branch { DstBlock "Counter" DstPort 2 } Branch { Points [0, -30] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Counter" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Counter" DstPort 1 } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "Up Sample8" DstPort 1 } Line { SrcBlock "Start" SrcPort 1 DstBlock "S-R Latch4" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [15, 0] Branch { Points [0, 70; -460, 0; 0, -35] DstBlock "Logical4" DstPort 2 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "S-R Latch4" DstPort 2 } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Up Sample8" SrcPort 1 Points [20, 0; 0, -100] DstBlock "Relational" DstPort 2 } Line { SrcBlock "En" SrcPort 1 Points [625, 0; 0, 80] DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "TxEn" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Concat1" DstPort 3 } Line { SrcBlock "From9" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Concat1" DstPort 1 } } } Block { BlockType Reference Name "Delay2" SID "2388" Ports [1, 1] Position [777, 195, 803, 220] BlockRotation 270 NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,d390c2d8,up,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33" " 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15." "33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1" " 1 1 ]);\npatch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Ext_TxEn" SID "2389" Ports [0, 1] Position [580, 84, 640, 116] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Ext_TxEn" Location [347, 208, 1027, 389] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Constant Name "Constant" SID "2390" Position [50, 88, 75, 112] ShowName off Value "0" } Block { BlockType Reference Name "Convert1" SID "2391" Ports [1, 1] Position [530, 33, 560, 47] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "2392" Ports [1, 1] Position [530, 53, 560, 67] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Ext_TxEn" SID "2393" Ports [1, 1] Position [140, 93, 180, 107] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fi" "xed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,348,406" block_type "gatewayin" block_version "10.1.3" sg_icon_stat "40,14,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.895 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType From Name "From10" SID "2394" Position [275, 29, 415, 51] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_Enable_ExtTxEn" TagVisibility "global" } Block { BlockType From Name "From6" SID "2395" Position [25, 134, 120, 156] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReset" TagVisibility "global" } Block { BlockType Reference Name "Logical6" SID "2396" Ports [2, 1] Position [625, 31, 655, 69] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "2397" Ports [2, 1] Position [280, 90, 320, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample11" SID "2398" Ports [1, 1] Position [450, 28, 470, 52] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample9" SID "2399" Ports [1, 1] Position [195, 133, 215, 157] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "debounce" SID "2400" Ports [1, 1] Position [395, 102, 435, 118] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "debounce" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "2401" Position [45, 103, 75, 117] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "2402" Ports [1, 1] Position [147, 135, 173, 165] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2" sg_icon_stat "26,30,1,1,white,blue,0,07b98262,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 26 26 0 0 ],[0 0 30 30 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[18.33" " 18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[15.33 15.33 18." "33 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[12.33 12.33 15.33 15.33 12.33 ]" ",[1 1 1 ]);\npatch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "2403" Ports [1, 1] Position [147, 200, 173, 230] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2" sg_icon_stat "26,30,1,1,white,blue,0,07b98262,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 26 26 0 0 ],[0 0 30 30 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[18.33" " 18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[15.33 15.33 18." "33 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[12.33 12.33 15.33 15.33 12.33 ]" ",[1 1 1 ]);\npatch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "2404" Ports [1, 1] Position [147, 260, 173, 290] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2" sg_icon_stat "26,30,1,1,white,blue,0,07b98262,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 26 26 0 0 ],[0 0 30 30 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[18.33" " 18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[15.33 15.33 18." "33 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[12.33 12.33 15.33 15.33 12.33 ]" ",[1 1 1 ]);\npatch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "2405" Ports [1, 1] Position [147, 325, 173, 355] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2" sg_icon_stat "26,30,1,1,white,blue,0,07b98262,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 26 26 0 0 ],[0 0 30 30 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[18.33" " 18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[15.33 15.33 18." "33 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[12.33 12.33 15.33 15.33 12.33 ]" ",[1 1 1 ]);\npatch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "2406" Ports [5, 1] Position [275, 78, 330, 402] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "5" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2" sg_icon_stat "55,324,5,1,white,blue,0,2904cdfe,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 324 324 0 ],[0.77 0." "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 324 324 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ]" ",[169.77 169.77 176.77 169.77 176.77 176.77 176.77 169.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 " "],[162.77 162.77 169.77 169.77 162.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[155.7" "7 155.77 162.77 162.77 155.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[148.77 148.77" " 155.77 148.77 155.77 155.77 148.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf" "('','COMMENT: begin icon text');\n\n\n\n\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2407" Position [375, 233, 405, 247] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [80, 0] Branch { DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 Points [0, 5] Branch { DstBlock "Delay1" DstPort 1 } Branch { DstBlock "Logical" DstPort 2 } } Line { SrcBlock "Delay1" SrcPort 1 Points [0, 5] Branch { DstBlock "Delay2" DstPort 1 } Branch { DstBlock "Logical" DstPort 3 } } Line { SrcBlock "Delay2" SrcPort 1 Points [0, 10] Branch { DstBlock "Delay3" DstPort 1 } Branch { DstBlock "Logical" DstPort 4 } } Line { SrcBlock "Delay3" SrcPort 1 Points [0, 10] DstBlock "Logical" DstPort 5 } } } Block { BlockType Outport Name "TxEn" SID "2408" Position [700, 43, 730, 57] IconDisplay "Port number" } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Ext_TxEn" DstPort 1 } Line { SrcBlock "Ext_TxEn" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock "debounce" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Up Sample9" DstPort 1 } Line { SrcBlock "Up Sample9" SrcPort 1 Points [10, 0; 0, -25] DstBlock "Register" DstPort 2 } Line { SrcBlock "From10" SrcPort 1 DstBlock "Up Sample11" DstPort 1 } Line { SrcBlock "Up Sample11" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "debounce" SrcPort 1 Points [55, 0; 0, -50] DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "TxEn" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Logical6" DstPort 2 } } } Block { BlockType From Name "From1" SID "2409" Position [885, 614, 980, 636] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType From Name "From2" SID "2410" Position [480, 414, 575, 436] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType From Name "From3" SID "2411" Position [530, 547, 650, 563] ShowName off CloseFcn "tagdialog Close" GotoTag "RxReg_radioRxEnable" TagVisibility "global" } Block { BlockType From Name "From4" SID "2412" Position [15, 309, 155, 331] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_TxStart" TagVisibility "global" } Block { BlockType From Name "From5" SID "2413" Position [15, 334, 155, 356] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_SoftTxStart_TxEn" TagVisibility "global" } Block { BlockType From Name "From7" SID "2414" Position [480, 389, 575, 411] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReset" TagVisibility "global" } Block { BlockType From Name "From8" SID "2415" Position [885, 639, 980, 661] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReset" TagVisibility "global" } Block { BlockType From Name "From9" SID "2416" Position [125, 224, 265, 246] ShowName off CloseFcn "tagdialog Close" GotoTag "regTx_AutoTwoTx_En" TagVisibility "global" } Block { BlockType Reference Name "Logical1" SID "2417" Ports [5, 1] Position [1160, 571, 1195, 649] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "5" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,78,5,1,white,blue,0,d9ddc810,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 78 78 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[44.55 44." "55 49.55 44.55 49.55 49.55 49.55 44.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[39.55 39.55 44.55 4" "4.55 39.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[34.55 34.55 39.55 39.55 34.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[29.55 29.55 34.55 29.55 34.55 34.55 29.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\nco" "lor('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "2418" Ports [2, 1] Position [815, 506, 845, 544] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "2419" Ports [2, 1] Position [375, 305, 405, 360] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 55 55 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[31.44 31.4" "4 35.44 31.44 35.44 35.44 35.44 31.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[27.44 27.44 31.44 31.44 " "27.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[23.44 23.44 27.44 27.44 23.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 19.44 23.44 23.44 19.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "2420" Ports [2, 1] Position [555, 220, 585, 275] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 55 55 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[31.44 31.4" "4 35.44 31.44 35.44 35.44 35.44 31.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[27.44 27.44 31.44 31.44 " "27.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[23.44 23.44 27.44 27.44 23.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 19.44 23.44 23.44 19.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "2421" Ports [3, 1] Position [800, 406, 830, 444] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');di" "sp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "2422" Ports [2, 1] Position [745, 251, 775, 284] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "2423" Ports [2, 1] Position [840, 91, 870, 129] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "2424" Ports [3, 1] Position [625, 281, 655, 319] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,3,1,white,blue,0,a2abe52d,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');di" "sp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch1" SID "2425" Ports [2, 1] Position [1240, 515, 1270, 550] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch1" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2426" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2427" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "2428" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "2429" Ports [1, 1] Position [200, 88, 225, 102] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2430" Ports [1, 1] Position [200, 103, 225, 117] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "2431" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2432" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType SubSystem Name "S-R Latch2" SID "2433" Ports [2, 1] Position [1240, 460, 1270, 495] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch2" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2434" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2435" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "2436" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "2437" Ports [1, 1] Position [195, 88, 220, 102] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2438" Ports [1, 1] Position [195, 103, 220, 117] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "2439" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2440" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType SubSystem Name "S-R Latch3" SID "2441" Ports [2, 1] Position [1230, 325, 1260, 360] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch3" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2442" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2443" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "2444" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "2445" Ports [1, 1] Position [195, 88, 220, 102] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2446" Ports [1, 1] Position [195, 103, 220, 117] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "2447" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2448" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } } } Block { BlockType SubSystem Name "S-R Latch4" SID "2449" Ports [2, 1] Position [625, 240, 655, 275] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch4" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2450" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2451" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "2452" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "2453" Ports [1, 1] Position [195, 88, 220, 102] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2454" Ports [1, 1] Position [195, 103, 220, 117] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "2455" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2456" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType SubSystem Name "S-R Latch5" SID "2457" Ports [2, 1] Position [1235, 115, 1265, 150] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch5" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2458" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2459" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "2460" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "2461" Ports [1, 1] Position [195, 88, 220, 102] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2462" Ports [1, 1] Position [195, 103, 220, 117] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "2463" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2464" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } } } Block { BlockType Reference Name "Up Sample" SID "2465" Ports [1, 1] Position [575, 458, 595, 482] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "2466" Ports [1, 1] Position [685, 505, 705, 525] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,20,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 20 20 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[12.22 12." "22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fonts" "ize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample10" SID "2467" Ports [1, 1] Position [365, 223, 385, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "2468" Ports [1, 1] Position [625, 413, 645, 437] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample3" SID "2469" Ports [1, 1] Position [625, 388, 645, 412] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample4" SID "2470" Ports [1, 1] Position [685, 543, 705, 567] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample5" SID "2471" Ports [1, 1] Position [1030, 613, 1050, 637] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample6" SID "2472" Ports [1, 1] Position [1030, 638, 1050, 662] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample7" SID "2473" Ports [1, 1] Position [290, 308, 310, 332] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample8" SID "2474" Ports [1, 1] Position [290, 333, 310, 357] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "posedge1" SID "2475" Ports [1, 1] Position [445, 327, 485, 343] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge1" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In" SID "2476" Position [20, 33, 50, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "2477" Ports [1, 1] Position [80, 67, 140, 123] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2" sg_icon_stat "60,56,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36" ".88 44.88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36." "88 28.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "2478" Ports [1, 1] Position [170, 66, 225, 124] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "55,58,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 58 58 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[36" ".77 36.77 43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[29.77 29." "77 36.77 36.77 29.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[22.77 22.77 29.77 29.7" "7 22.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[15.77 15.77 22.77 15.77 22.77 22.77" " 15.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "2479" Ports [2, 1] Position [260, 25, 315, 85] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2" sg_icon_stat "55,60,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[37" ".77 37.77 44.77 37.77 44.77 44.77 44.77 37.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[30.77 30." "77 37.77 37.77 30.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[23.77 23.77 30.77 30.7" "7 23.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[16.77 16.77 23.77 16.77 23.77 23.77" " 16.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "2480" Position [340, 48, 370, 62] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 Points [0, 0] DstBlock "Out" DstPort 1 } Line { SrcBlock "In" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [0, 55] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 Points [5, 0; 0, -25] DstBlock "Logical" DstPort 2 } Line { SrcBlock "Delay" SrcPort 1 Points [0, 0] DstBlock "Inverter" DstPort 1 } } } Block { BlockType SubSystem Name "posedge2" SID "2481" Ports [1, 1] Position [910, 102, 950, 118] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge2" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In" SID "2482" Position [20, 33, 50, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "2483" Ports [1, 1] Position [80, 67, 140, 123] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2" sg_icon_stat "60,56,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36" ".88 44.88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36." "88 28.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "2484" Ports [1, 1] Position [170, 66, 225, 124] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "55,58,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 58 58 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[36" ".77 36.77 43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[29.77 29." "77 36.77 36.77 29.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[22.77 22.77 29.77 29.7" "7 22.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[15.77 15.77 22.77 15.77 22.77 22.77" " 15.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "2485" Ports [2, 1] Position [260, 25, 315, 85] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2" sg_icon_stat "55,60,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[37" ".77 37.77 44.77 37.77 44.77 44.77 44.77 37.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[30.77 30." "77 37.77 37.77 30.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[23.77 23.77 30.77 30.7" "7 23.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[16.77 16.77 23.77 16.77 23.77 23.77" " 16.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "2486" Position [340, 48, 370, 62] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 Points [0, 0] DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 Points [5, 0; 0, -25] DstBlock "Logical" DstPort 2 } Line { SrcBlock "In" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 55] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [0, 0] DstBlock "Out" DstPort 1 } } } Block { BlockType Outport Name "ExtTxEn" SID "2487" Position [1355, 128, 1385, 142] IconDisplay "Port number" } Block { BlockType Outport Name "AutoTxEn" SID "2488" Position [1370, 473, 1400, 487] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "UserTxEn" SID "2489" Position [1355, 338, 1385, 352] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "RxEn" SID "2490" Position [1370, 528, 1400, 542] Port "4" IconDisplay "Port number" } Line { SrcBlock "From2" SrcPort 1 DstBlock "Up Sample2" DstPort 1 } Line { SrcBlock "TxDone" SrcPort 1 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "S-R Latch2" SrcPort 1 DstBlock "AutoTxEn" DstPort 1 } Line { SrcBlock "S-R Latch1" SrcPort 1 DstBlock "RxEn" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 Points [280, 0] Branch { Points [0, 60] DstBlock "S-R Latch2" DstPort 2 } Branch { Points [0, -75] Branch { DstBlock "S-R Latch3" DstPort 2 } Branch { Points [0, -180] Branch { Points [0, -30] DstBlock "S-R Latch5" DstPort 2 } Branch { Points [-125, 0; 0, -30] DstBlock "Delay" DstPort 3 } } } } Line { SrcBlock "From1" SrcPort 1 DstBlock "Up Sample5" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [20, 0; 0, -70] DstBlock "S-R Latch1" DstPort 2 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Up Sample4" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "S-R Latch1" DstPort 1 } Line { SrcBlock "DoTx" SrcPort 1 DstBlock "Up Sample" DstPort 1 } Line { SrcBlock "posedge1" SrcPort 1 Points [35, 0] Branch { Points [0, -75] DstBlock "Logical4" DstPort 2 } Branch { Points [600, 0] Branch { DstBlock "S-R Latch3" DstPort 1 } Branch { Points [0, 260] DstBlock "Logical1" DstPort 2 } } } Line { SrcBlock "S-R Latch3" SrcPort 1 DstBlock "UserTxEn" DstPort 1 } Line { SrcBlock "posedge2" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Up Sample3" DstPort 1 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Up Sample6" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 Points [40, 0] Branch { DstBlock "S-R Latch5" DstPort 1 } Branch { Points [0, 455] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "S-R Latch5" SrcPort 1 DstBlock "ExtTxEn" DstPort 1 } Line { SrcBlock "Up Sample" SrcPort 1 Points [505, 0] Branch { DstBlock "S-R Latch2" DstPort 1 } Branch { Points [0, 140] DstBlock "Logical1" DstPort 3 } } Line { SrcBlock "Up Sample2" SrcPort 1 Points [50, 0] Branch { DstBlock "Logical5" DstPort 2 } Branch { Points [0, -115] DstBlock "Logical8" DstPort 3 } } Line { SrcBlock "Up Sample3" SrcPort 1 Points [55, 0] Branch { Points [0, 15] DstBlock "Logical5" DstPort 1 } Branch { Points [0, -100] DstBlock "Logical8" DstPort 2 } } Line { SrcBlock "Up Sample4" SrcPort 1 Points [65, 0; 0, -20] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Up Sample5" SrcPort 1 DstBlock "Logical1" DstPort 4 } Line { SrcBlock "Up Sample6" SrcPort 1 Points [40, 0; 0, -10] DstBlock "Logical1" DstPort 5 } Line { SrcBlock "Up Sample1" SrcPort 1 Points [10, 0] Branch { DstBlock "Logical2" DstPort 1 } Branch { Points [0, -80] Branch { DstBlock "Logical5" DstPort 3 } Branch { Points [0, -160] DstBlock "Logical6" DstPort 2 } } } Line { SrcBlock "From9" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Up Sample10" DstPort 1 } Line { SrcBlock "Up Sample10" SrcPort 1 Points [110, 0] Branch { DstBlock "Logical4" DstPort 1 } Branch { Points [0, -65; 475, 0; 0, -45] DstBlock "Delay" DstPort 2 } } Line { SrcBlock "From4" SrcPort 1 DstBlock "Up Sample7" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "posedge1" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Up Sample8" DstPort 1 } Line { SrcBlock "Up Sample7" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Up Sample8" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "S-R Latch4" DstPort 1 } Line { SrcBlock "S-R Latch4" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "posedge2" DstPort 1 } Line { SrcBlock "Ext_TxEn" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 Points [10, 0] Branch { Points [0, 20] DstBlock "Logical8" DstPort 1 } Branch { DstBlock "Delay2" DstPort 1 } } Line { SrcBlock "Logical8" SrcPort 1 Points [-20, 0; 0, -35] DstBlock "S-R Latch4" DstPort 2 } Line { SrcBlock "Delay2" SrcPort 1 Points [0, -70] DstBlock "Logical7" DstPort 2 } Annotation { Name "RxEn can be asserted either by an automatic\nTx finishing, or by a register write. This allows\nsoftw" "are to enabled Rx at boot, then hand over\ncontrol to the autoResponse subsystem." Position [401, 572] } Annotation { Name "Give TxDone time to fall\nbefore starting AutoTwoTx counter" Position [895, 208] } } } Block { BlockType Reference Name "Up Sample1" SID "2491" Ports [1, 1] Position [550, 283, 570, 307] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done1" SID "2492" Ports [1, 1] Position [995, 70, 1030, 80] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "2493" Ports [1, 1] Position [995, 85, 1030, 95] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done3" SID "2494" Ports [1, 1] Position [995, 100, 1030, 110] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "2495" Ports [1, 1] Position [995, 40, 1030, 50] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "2496" Ports [1, 1] Position [995, 55, 1030, 65] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done6" SID "2497" Ports [1, 1] Position [995, 115, 1030, 125] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType SubSystem Name "negedge" SID "2498" Ports [1, 1] Position [425, 502, 465, 518] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "negedge" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In" SID "2499" Position [215, 263, 245, 277] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "2500" Ports [1, 1] Position [275, 297, 335, 353] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2" sg_icon_stat "60,56,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36" ".88 44.88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36." "88 28.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "2501" Ports [1, 1] Position [360, 241, 415, 299] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "55,58,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 58 58 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[36" ".77 36.77 43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[29.77 29." "77 36.77 36.77 29.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[22.77 22.77 29.77 29.7" "7 22.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[15.77 15.77 22.77 15.77 22.77 22.77" " 15.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "2502" Ports [2, 1] Position [455, 255, 510, 315] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2" sg_icon_stat "55,60,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[37" ".77 37.77 44.77 37.77 44.77 44.77 44.77 37.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[30.77 30." "77 37.77 37.77 30.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[23.77 23.77 30.77 30.7" "7 23.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[16.77 16.77 23.77 16.77 23.77 23.77" " 16.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "2503" Position [535, 278, 565, 292] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Out" DstPort 1 } Line { SrcBlock "In" SrcPort 1 Points [5, 0] Branch { Points [0, 55] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 Points [90, 0; 0, -25] DstBlock "Logical" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } } } Block { BlockType SubSystem Name "posedge1" SID "2504" Ports [1, 1] Position [640, 362, 680, 378] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge1" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In" SID "2505" Position [20, 33, 50, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "2506" Ports [1, 1] Position [80, 67, 140, 123] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2" sg_icon_stat "60,56,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36" ".88 44.88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36." "88 28.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "2507" Ports [1, 1] Position [170, 66, 225, 124] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "55,58,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 58 58 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[36" ".77 36.77 43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[29.77 29." "77 36.77 36.77 29.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[22.77 22.77 29.77 29.7" "7 22.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[15.77 15.77 22.77 15.77 22.77 22.77" " 15.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "2508" Ports [2, 1] Position [260, 25, 315, 85] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2" sg_icon_stat "55,60,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[37" ".77 37.77 44.77 37.77 44.77 44.77 44.77 37.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[30.77 30." "77 37.77 37.77 30.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[23.77 23.77 30.77 30.7" "7 23.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[16.77 16.77 23.77 16.77 23.77 23.77" " 16.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "2509" Position [340, 48, 370, 62] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 Points [0, 0] DstBlock "Out" DstPort 1 } Line { SrcBlock "In" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [0, 55] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 Points [5, 0; 0, -25] DstBlock "Logical" DstPort 2 } Line { SrcBlock "Delay" SrcPort 1 Points [0, 0] DstBlock "Inverter" DstPort 1 } } } Line { SrcBlock "S-R Latch" SrcPort 1 Points [15, 0] Branch { DstBlock "Counter" DstPort 2 } Branch { Points [0, -25] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "negedge" SrcPort 1 Points [40, 0] Branch { Points [0, -215] DstBlock "Up Sample1" DstPort 1 } Branch { Points [0, 120] Branch { DstBlock "Logical4" DstPort 1 } Branch { Points [0, 110] Branch { DstBlock "Logical8" DstPort 1 } Branch { Points [0, 130] Branch { DstBlock "Logical11" DstPort 1 } Branch { Points [0, 110] DstBlock "Logical13" DstPort 1 } } } } Branch { Labels [0, 0] DstBlock "Tx-Rx Generation" DstPort 2 } } Line { SrcBlock "From10" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "posedge1" SrcPort 1 DstBlock "S-R Latch" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Counter" DstPort 1 } Line { SrcBlock "Tx-Rx Generation" SrcPort 4 DstBlock "Radio_RxEn" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 Points [10, 0] Branch { Points [0, 105] Branch { Points [-420, 0; 0, -55] DstBlock "Logical3" DstPort 2 } Branch { Labels [0, 0] DstBlock "Tx-Rx Generation" DstPort 1 } } Branch { Points [0, -170; -175, 0; 0, -95] DstBlock "done3" DstPort 1 } } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "From" SrcPort 1 DstBlock "Convert5" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [85, 0] Branch { DstBlock "posedge1" DstPort 1 } Branch { Points [0, -55] DstBlock "Register1" DstPort 3 } Branch { Points [0, 220] Branch { DstBlock "Logical2" DstPort 1 } Branch { Points [0, 110] Branch { DstBlock "Logical7" DstPort 1 } Branch { Points [0, 130] Branch { DstBlock "Logical10" DstPort 1 } Branch { Points [0, 110] DstBlock "Logical12" DstPort 1 } } } } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "S-R Latch3" DstPort 1 } Line { SrcBlock "S-R Latch3" SrcPort 1 DstBlock "Goto31" DstPort 1 } Line { SrcBlock "Radio_TxEn" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "DoTx" SrcPort 1 Points [20, 0] Branch { DstBlock "Convert1" DstPort 1 } Branch { Points [0, -170] Branch { DstBlock "Logical9" DstPort 2 } Branch { Points [0, -150] DstBlock "done5" DstPort 1 } } } Line { SrcBlock "RxPktDone" SrcPort 1 Points [15, 0] Branch { DstBlock "Convert" DstPort 1 } Branch { Points [0, -170] Branch { DstBlock "Logical9" DstPort 1 } Branch { Points [0, -145] DstBlock "done4" DstPort 1 } } } Line { SrcBlock "UseTrans" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Convert4" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "S-R Latch3" DstPort 2 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "negedge" DstPort 1 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Convert4" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Convert5" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Tx-Rx Generation" SrcPort 2 Points [15, 0] Branch { DstBlock "Logical5" DstPort 2 } Branch { Points [0, -85] Branch { DstBlock "Goto1" DstPort 1 } Branch { Points [0, -205; -285, 0; 0, -70] DstBlock "done6" DstPort 1 } } } Line { SrcBlock "Logical6" SrcPort 1 Points [10, 0] Branch { DstBlock "Radio_TxEn" DstPort 1 } Branch { Points [0, 95] DstBlock "Goto2" DstPort 1 } } Line { SrcBlock "Tx-Rx Generation" SrcPort 3 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "Tx-Rx Generation" SrcPort 1 Points [20, 0] Branch { DstBlock "Logical5" DstPort 1 } Branch { Points [0, -45] DstBlock "Goto7" DstPort 1 } } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Rx-Tx Delay" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 Points [10, 0] Branch { DstBlock "Register1" DstPort 2 } Branch { Points [0, -115] DstBlock "Register2" DstPort 2 } } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "S-R Latch1" DstPort 1 } Line { SrcBlock "S-R Latch1" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "UsePreCFO" SrcPort 1 DstBlock "Convert6" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "S-R Latch1" DstPort 2 } Line { SrcBlock "Convert6" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Convert7" SrcPort 1 DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Logical9" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Buf Index" SrcPort 1 Points [160, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -85] DstBlock "done1" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 Points [25, 0] Branch { DstBlock "Goto5" DstPort 1 } Branch { Points [0, -90] DstBlock "done2" DstPort 1 } } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Concat" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "Concat" SrcPort 1 Points [215, 0; 0, 65] DstBlock "Relational1" DstPort 1 } Line { Labels [0, 0] SrcBlock "Counter" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "SwapAnt" SrcPort 1 DstBlock "Convert8" DstPort 1 } Line { SrcBlock "Logical10" SrcPort 1 DstBlock "S-R Latch2" DstPort 1 } Line { SrcBlock "Logical11" SrcPort 1 DstBlock "S-R Latch2" DstPort 2 } Line { SrcBlock "Convert8" SrcPort 1 DstBlock "Logical10" DstPort 2 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Convert9" DstPort 1 } Line { SrcBlock "Convert9" SrcPort 1 DstBlock "Logical11" DstPort 2 } Line { SrcBlock "S-R Latch2" SrcPort 1 DstBlock "Goto6" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 Points [15, 0; 0, 30] DstBlock "Concat" DstPort 1 } Line { SrcBlock "done4" SrcPort 1 DstBlock "AutoResp" DstPort 1 } Line { SrcBlock "done5" SrcPort 1 DstBlock "AutoResp" DstPort 2 } Line { SrcBlock "done1" SrcPort 1 DstBlock "AutoResp" DstPort 3 } Line { SrcBlock "done2" SrcPort 1 DstBlock "AutoResp" DstPort 4 } Line { SrcBlock "done3" SrcPort 1 DstBlock "AutoResp" DstPort 5 } Line { SrcBlock "done6" SrcPort 1 DstBlock "AutoResp" DstPort 6 } Line { SrcBlock "ReTxCRC" SrcPort 1 DstBlock "Convert10" DstPort 1 } Line { SrcBlock "Logical12" SrcPort 1 DstBlock "S-R Latch4" DstPort 1 } Line { SrcBlock "Logical13" SrcPort 1 DstBlock "S-R Latch4" DstPort 2 } Line { SrcBlock "Convert10" SrcPort 1 DstBlock "Logical12" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Convert11" DstPort 1 } Line { SrcBlock "Convert11" SrcPort 1 DstBlock "Logical13" DstPort 2 } Line { SrcBlock "S-R Latch4" SrcPort 1 DstBlock "Goto8" DstPort 1 } Annotation { Name "Radio_TxEn gateway out is connected to the radio controller's hwTxEn port.\nAsserting this port is eq" "uivalent to calling TxEnable() in code. It starts the Tx\nstate machine in the controller, which sequences Tx/PA" "/TxVGA and PHY_Start.\nThe PHY_start signal will start the OFDM transmission.\n\nYes, it's circular and confusin" "g. But it really is the cleanest way to do it while\npreserving the all-software-control flow we've used until n" "ow." Position [1343, 246] HorizontalAlignment "left" } Annotation { Name "PktBuf selection is routed to top-level\nBRAM interface logic. It is critical that only\none action t" "rigger a transmission (otherwise\ntheir buf selections will be OR'd together!)" Position [615, 120] } Annotation { Name "Reinterpret the user's delay value as 4x,\nto give a wider range of delays." Position [922, 275] } } } Block { BlockType Reference Name "Delay1" SID "2510" Ports [1, 1] Position [780, 503, 805, 527] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "2511" Ports [1, 1] Position [625, 503, 650, 527] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Flag A" SID "2512" Ports [2, 1] Position [760, 391, 820, 429] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Flag A" Location [160, 82, 1918, 1026] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "SetFlag" SID "2513" Position [70, 193, 100, 207] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "PktDone" SID "2514" Position [70, 228, 100, 242] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "2515" Ports [1, 1] Position [150, 223, 175, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "2516" Ports [1, 1] Position [235, 203, 260, 227] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Flag A Latch" SID "2517" Ports [2, 1] Position [395, 194, 440, 261] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Flag A Latch" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2518" Position [155, 243, 185, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2519" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "2520" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "2521" Ports [1, 1] Position [205, 223, 230, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2522" Ports [1, 1] Position [205, 243, 230, 257] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2523" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2524" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType From Name "From" SID "2525" Position [65, 264, 160, 286] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType From Name "From1" SID "2526" Position [65, 294, 160, 316] ShowName off CloseFcn "tagdialog Close" GotoTag "RxReg_ResetFlagA" TagVisibility "global" } Block { BlockType Reference Name "Logical1" SID "2527" Ports [2, 1] Position [310, 190, 345, 225] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "2528" Ports [3, 1] Position [310, 227, 345, 263] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,36,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('bla" "ck');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Flag" SID "2529" Position [535, 223, 565, 237] IconDisplay "Port number" } Line { SrcBlock "From" SrcPort 1 Points [65, 0; 0, -30] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Flag A Latch" DstPort 2 } Line { SrcBlock "Delay" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical2" DstPort 1 } Branch { Points [0, -20] DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Flag A Latch" DstPort 1 } Line { SrcBlock "Flag A Latch" SrcPort 1 DstBlock "Flag" DstPort 1 } Line { SrcBlock "PktDone" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "SetFlag" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 Points [75, 0; 0, -50] DstBlock "Logical2" DstPort 3 } Annotation { Name "The flag is cleared after every packet reception. The clear is\ndelayed 2 cycles so the matching logi" "c can use the flag set by the\nprevious packet in combination with header/status values\nfrom the packet that ju" "st finished.\n\nThe flag is set 1 cycle later if some action asserts the SetFlag input." Position [303, 456] } } } Block { BlockType SubSystem Name "Flag B" SID "2530" Ports [2, 1] Position [760, 436, 820, 474] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Flag B" Location [202, 82, 1918, 1026] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "SetFlag" SID "2531" Position [70, 193, 100, 207] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "PktDone" SID "2532" Position [70, 228, 100, 242] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "2533" Ports [1, 1] Position [150, 223, 175, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "25,24,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "2534" Ports [1, 1] Position [235, 203, 260, 227] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Flag B Latch" SID "2535" Ports [2, 1] Position [395, 194, 440, 261] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Flag B Latch" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2536" Position [155, 243, 185, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2537" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "2538" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "2539" Ports [1, 1] Position [205, 223, 230, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "2540" Ports [1, 1] Position [205, 243, 230, 257] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2541" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2542" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType From Name "From" SID "2543" Position [65, 264, 160, 286] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType From Name "From1" SID "2544" Position [65, 294, 160, 316] ShowName off CloseFcn "tagdialog Close" GotoTag "RxReg_ResetFlagB" TagVisibility "global" } Block { BlockType Reference Name "Logical1" SID "2545" Ports [2, 1] Position [310, 190, 345, 225] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "2546" Ports [3, 1] Position [310, 227, 345, 263] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,36,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('bla" "ck');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Flag" SID "2547" Position [535, 223, 565, 237] IconDisplay "Port number" } Line { SrcBlock "From1" SrcPort 1 Points [75, 0; 0, -50] DstBlock "Logical2" DstPort 3 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "SetFlag" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "PktDone" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "Flag B Latch" SrcPort 1 DstBlock "Flag" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Flag B Latch" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 Points [30, 0] Branch { Points [0, -20] DstBlock "Delay1" DstPort 1 } Branch { DstBlock "Logical2" DstPort 1 } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Flag B Latch" DstPort 2 } Line { SrcBlock "From" SrcPort 1 Points [65, 0; 0, -30] DstBlock "Logical2" DstPort 2 } Annotation { Name "The flag is cleared after every packet reception. The clear is\ndelayed 2 cycles so the matching logi" "c can use the flag set by the\nprevious packet in combination with header/status values\nfrom the packet that ju" "st finished.\n\nThe flag is set 1 cycle later if some action asserts the SetFlag input." Position [303, 456] } } } Block { BlockType Goto Name "Goto1" SID "2548" Position [920, 403, 1060, 417] ShowName off GotoTag "RxAutoReply_FlagA" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "2549" Position [920, 448, 1060, 462] ShowName off GotoTag "RxAutoReply_FlagB" TagVisibility "global" } Block { BlockType SubSystem Name "Header Byte Matching" SID "2550" Ports [4, 1] Position [270, 216, 370, 309] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Header Byte Matching" Location [213, 342, 1098, 1012] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "110" Block { BlockType Inport Name "RxByteAddr" SID "2551" Position [165, 377, 195, 393] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "RxByte" SID "2552" Position [165, 408, 195, 422] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "RxByteWE" SID "2553" Position [165, 438, 195, 452] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "2554" Position [165, 343, 195, 357] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Concat" SID "2555" Ports [8, 1] Position [925, 432, 965, 553] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "8" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,165" block_type "concat" block_version "10.1.3" sg_icon_stat "40,121,8,1,white,blue,0,6fe74153,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 121 121 0 ],[0.77 0." "82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 121 121 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[65.55" " 65.55 70.55 65.55 70.55 70.55 70.55 65.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[60.55 60.55 65." "55 65.55 60.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[55.55 55.55 60.55 60.55 55.55 ]," "[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[50.55 50.55 55.55 50.55 55.55 55.55 50.55 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bla" "ck');port_label('input',1,'hi');\n\n\n\n\n\n\ncolor('black');port_label('input',8,'lo');\n\ncolor('black');disp(" "'\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant" SID "2556" Ports [0, 1] Position [855, 429, 880, 451] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Field Slices" SID "2557" Ports [1, 3] Position [495, 921, 570, 959] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Field Slices" Location [338, 683, 563, 823] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Reg 32b" SID "2558" Position [370, 423, 400, 437] IconDisplay "Port number" } Block { BlockType Reference Name "24MSB" SID "2559" Ports [1, 1] Position [455, 491, 490, 509] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "24" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "2LSB+5" SID "2560" Ports [1, 1] Position [455, 456, 490, 474] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "5LSB" SID "2561" Ports [1, 1] Position [455, 421, 490, 439] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Addr" SID "2562" Position [515, 423, 545, 437] IconDisplay "Port number" } Block { BlockType Outport Name "Len" SID "2563" Position [515, 458, 545, 472] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Val" SID "2564" Position [515, 493, 545, 507] Port "3" IconDisplay "Port number" } Line { SrcBlock "Reg 32b" SrcPort 1 Points [15, 0] Branch { Points [0, 35] Branch { Points [0, 35] DstBlock "24MSB" DstPort 1 } Branch { DstBlock "2LSB+5" DstPort 1 } } Branch { DstBlock "5LSB" DstPort 1 } } Line { SrcBlock "5LSB" SrcPort 1 DstBlock "Addr" DstPort 1 } Line { SrcBlock "2LSB+5" SrcPort 1 DstBlock "Len" DstPort 1 } Line { SrcBlock "24MSB" SrcPort 1 DstBlock "Val" DstPort 1 } } } Block { BlockType SubSystem Name "Field Slices1" SID "2565" Ports [1, 3] Position [495, 831, 570, 869] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Field Slices1" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Reg 32b" SID "2566" Position [370, 423, 400, 437] IconDisplay "Port number" } Block { BlockType Reference Name "24MSB" SID "2567" Ports [1, 1] Position [455, 491, 490, 509] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "24" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "2LSB+5" SID "2568" Ports [1, 1] Position [455, 456, 490, 474] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "5LSB" SID "2569" Ports [1, 1] Position [455, 421, 490, 439] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Addr" SID "2570" Position [515, 423, 545, 437] IconDisplay "Port number" } Block { BlockType Outport Name "Len" SID "2571" Position [515, 458, 545, 472] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Val" SID "2572" Position [515, 493, 545, 507] Port "3" IconDisplay "Port number" } Line { SrcBlock "24MSB" SrcPort 1 DstBlock "Val" DstPort 1 } Line { SrcBlock "2LSB+5" SrcPort 1 DstBlock "Len" DstPort 1 } Line { SrcBlock "5LSB" SrcPort 1 DstBlock "Addr" DstPort 1 } Line { SrcBlock "Reg 32b" SrcPort 1 Points [15, 0] Branch { DstBlock "5LSB" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "2LSB+5" DstPort 1 } Branch { Points [0, 35] DstBlock "24MSB" DstPort 1 } } } } } Block { BlockType SubSystem Name "Field Slices2" SID "2573" Ports [1, 3] Position [495, 741, 570, 779] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Field Slices2" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Reg 32b" SID "2574" Position [370, 423, 400, 437] IconDisplay "Port number" } Block { BlockType Reference Name "24MSB" SID "2575" Ports [1, 1] Position [455, 491, 490, 509] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "24" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "2LSB+5" SID "2576" Ports [1, 1] Position [455, 456, 490, 474] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "5LSB" SID "2577" Ports [1, 1] Position [455, 421, 490, 439] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Addr" SID "2578" Position [515, 423, 545, 437] IconDisplay "Port number" } Block { BlockType Outport Name "Len" SID "2579" Position [515, 458, 545, 472] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Val" SID "2580" Position [515, 493, 545, 507] Port "3" IconDisplay "Port number" } Line { SrcBlock "24MSB" SrcPort 1 DstBlock "Val" DstPort 1 } Line { SrcBlock "2LSB+5" SrcPort 1 DstBlock "Len" DstPort 1 } Line { SrcBlock "5LSB" SrcPort 1 DstBlock "Addr" DstPort 1 } Line { SrcBlock "Reg 32b" SrcPort 1 Points [15, 0] Branch { DstBlock "5LSB" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "2LSB+5" DstPort 1 } Branch { Points [0, 35] DstBlock "24MSB" DstPort 1 } } } } } Block { BlockType SubSystem Name "Field Slices3" SID "2581" Ports [1, 3] Position [495, 651, 570, 689] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Field Slices3" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Reg 32b" SID "2582" Position [370, 423, 400, 437] IconDisplay "Port number" } Block { BlockType Reference Name "24MSB" SID "2583" Ports [1, 1] Position [455, 491, 490, 509] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "24" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "2LSB+5" SID "2584" Ports [1, 1] Position [455, 456, 490, 474] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "5LSB" SID "2585" Ports [1, 1] Position [455, 421, 490, 439] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Addr" SID "2586" Position [515, 423, 545, 437] IconDisplay "Port number" } Block { BlockType Outport Name "Len" SID "2587" Position [515, 458, 545, 472] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Val" SID "2588" Position [515, 493, 545, 507] Port "3" IconDisplay "Port number" } Line { SrcBlock "Reg 32b" SrcPort 1 Points [15, 0] Branch { Points [0, 35] Branch { Points [0, 35] DstBlock "24MSB" DstPort 1 } Branch { DstBlock "2LSB+5" DstPort 1 } } Branch { DstBlock "5LSB" DstPort 1 } } Line { SrcBlock "5LSB" SrcPort 1 DstBlock "Addr" DstPort 1 } Line { SrcBlock "2LSB+5" SrcPort 1 DstBlock "Len" DstPort 1 } Line { SrcBlock "24MSB" SrcPort 1 DstBlock "Val" DstPort 1 } } } Block { BlockType SubSystem Name "Field Slices4" SID "2589" Ports [1, 3] Position [495, 561, 570, 599] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Field Slices4" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Reg 32b" SID "2590" Position [370, 423, 400, 437] IconDisplay "Port number" } Block { BlockType Reference Name "24MSB" SID "2591" Ports [1, 1] Position [455, 491, 490, 509] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "24" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "2LSB+5" SID "2592" Ports [1, 1] Position [455, 456, 490, 474] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "5LSB" SID "2593" Ports [1, 1] Position [455, 421, 490, 439] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Addr" SID "2594" Position [515, 423, 545, 437] IconDisplay "Port number" } Block { BlockType Outport Name "Len" SID "2595" Position [515, 458, 545, 472] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Val" SID "2596" Position [515, 493, 545, 507] Port "3" IconDisplay "Port number" } Line { SrcBlock "Reg 32b" SrcPort 1 Points [15, 0] Branch { Points [0, 35] Branch { Points [0, 35] DstBlock "24MSB" DstPort 1 } Branch { DstBlock "2LSB+5" DstPort 1 } } Branch { DstBlock "5LSB" DstPort 1 } } Line { SrcBlock "5LSB" SrcPort 1 DstBlock "Addr" DstPort 1 } Line { SrcBlock "2LSB+5" SrcPort 1 DstBlock "Len" DstPort 1 } Line { SrcBlock "24MSB" SrcPort 1 DstBlock "Val" DstPort 1 } } } Block { BlockType SubSystem Name "Field Slices5" SID "2597" Ports [1, 3] Position [495, 471, 570, 509] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Field Slices5" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Reg 32b" SID "2598" Position [370, 423, 400, 437] IconDisplay "Port number" } Block { BlockType Reference Name "24MSB" SID "2599" Ports [1, 1] Position [455, 491, 490, 509] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "24" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "2LSB+5" SID "2600" Ports [1, 1] Position [455, 456, 490, 474] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "5LSB" SID "2601" Ports [1, 1] Position [455, 421, 490, 439] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Addr" SID "2602" Position [550, 423, 580, 437] IconDisplay "Port number" } Block { BlockType Outport Name "Len" SID "2603" Position [550, 458, 580, 472] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Val" SID "2604" Position [550, 493, 580, 507] Port "3" IconDisplay "Port number" } Line { SrcBlock "24MSB" SrcPort 1 DstBlock "Val" DstPort 1 } Line { SrcBlock "2LSB+5" SrcPort 1 DstBlock "Len" DstPort 1 } Line { SrcBlock "5LSB" SrcPort 1 DstBlock "Addr" DstPort 1 } Line { SrcBlock "Reg 32b" SrcPort 1 Points [15, 0] Branch { DstBlock "5LSB" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "2LSB+5" DstPort 1 } Branch { Points [0, 35] DstBlock "24MSB" DstPort 1 } } } Annotation { Name "bits[5:0] = byteAddr\nbits[7:6] = match length\nbits[31:8] = match value" Position [453, 282] } } } Block { BlockType From Name "From1" SID "2605" Position [295, 842, 455, 858] ShowName off CloseFcn "tagdialog Close" GotoTag "regAutoReply_match1" TagVisibility "global" } Block { BlockType From Name "From2" SID "2606" Position [295, 662, 455, 678] ShowName off CloseFcn "tagdialog Close" GotoTag "regAutoReply_match3" TagVisibility "global" } Block { BlockType From Name "From3" SID "2607" Position [295, 932, 455, 948] ShowName off CloseFcn "tagdialog Close" GotoTag "regAutoReply_match0" TagVisibility "global" } Block { BlockType From Name "From4" SID "2608" Position [295, 752, 455, 768] ShowName off CloseFcn "tagdialog Close" GotoTag "regAutoReply_match2" TagVisibility "global" } Block { BlockType From Name "From5" SID "2609" Position [295, 482, 455, 498] ShowName off CloseFcn "tagdialog Close" GotoTag "regAutoReply_match5" TagVisibility "global" } Block { BlockType From Name "From6" SID "2610" Position [295, 572, 455, 588] ShowName off CloseFcn "tagdialog Close" GotoTag "regAutoReply_match4" TagVisibility "global" } Block { BlockType SubSystem Name "Match0" SID "2611" Ports [7, 1] Position [665, 883, 790, 957] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Match0" Location [475, 706, 665, 776] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Rst" SID "2612" Position [100, 638, 130, 652] IconDisplay "Port number" } Block { BlockType Inport Name "Rx ByteAddr" SID "2613" Position [100, 118, 130, 132] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rx Byte" SID "2614" Position [100, 198, 130, 212] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rx ByteVin" SID "2615" Position [415, 153, 445, 167] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Match ByteAddr" SID "2616" Position [100, 158, 130, 172] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Match Length" SID "2617" Position [415, 293, 445, 307] NamePlacement "alternate" Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Match Bytes" SID "2618" Position [100, 238, 130, 252] Port "7" IconDisplay "Port number" } Block { BlockType Reference Name "8LSB" SID "2619" Ports [1, 1] Position [195, 237, 225, 253] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+16" SID "2620" Ports [1, 1] Position [195, 592, 225, 608] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+8" SID "2621" Ports [1, 1] Position [200, 412, 230, 428] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub" SID "2622" Ports [2, 1] Position [195, 319, 235, 361] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1.3" sg_icon_stat "40,42,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "2623" Ports [2, 1] Position [195, 499, 235, 541] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1.3" sg_icon_stat "40,42,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "2624" Ports [0, 1] Position [115, 339, 140, 361] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "2625" Ports [0, 1] Position [115, 519, 140, 541] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "2626" Ports [0, 1] Position [445, 314, 470, 336] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant3" SID "2627" Ports [0, 1] Position [435, 494, 460, 516] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "3" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,279a71c8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'3');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "2628" Ports [3, 1] Position [915, 174, 950, 246] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,72,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 72 72 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[41.55 41." "55 46.55 41.55 46.55 46.55 46.55 41.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[36.55 36.55 41.55 4" "1.55 36.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[31.55 31.55 36.55 36.55 31.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 26.55 31.55 31.55 26.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical1" SID "2629" Ports [2, 1] Position [595, 292, 620, 383] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,91,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 91 91 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 91 91 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[48.33 " "48.33 51.33 48.33 51.33 51.33 51.33 48.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[45.33 45.33 48.33" " 48.33 45.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[42.33 42.33 45.33 45.33 42.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[39.33 39.33 42.33 39.33 42.33 42.33 39.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "2630" Ports [2, 1] Position [360, 105, 390, 265] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "2631" Ports [2, 1] Position [360, 280, 390, 440] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "2632" Ports [2, 1] Position [360, 460, 390, 620] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "2633" Ports [2, 1] Position [695, 148, 720, 197] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "2634" Ports [2, 1] Position [595, 472, 620, 563] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,91,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 91 91 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 91 91 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[48.33 " "48.33 51.33 48.33 51.33 51.33 51.33 48.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[45.33 45.33 48.33" " 48.33 45.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[42.33 42.33 45.33 45.33 42.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[39.33 39.33 42.33 39.33 42.33 42.33 39.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "2635" Ports [2, 1] Position [695, 303, 720, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "2636" Ports [2, 1] Position [690, 483, 715, 532] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "2637" Ports [2, 1] Position [285, 106, 315, 184] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "2638" Ports [2, 1] Position [285, 186, 315, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "2639" Ports [2, 1] Position [285, 361, 315, 439] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "2640" Ports [2, 1] Position [285, 541, 315, 619] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "2641" Ports [2, 1] Position [505, 288, 540, 337] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2649" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2650" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType SubSystem Name "SR Latch 1" SID "2651" Ports [2, 1] Position [775, 322, 820, 353] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 1" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2652" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2653" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "2654" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2655" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2656" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType SubSystem Name "SR Latch 2" SID "2657" Ports [2, 1] Position [775, 502, 820, 533] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 2" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2658" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2659" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "2660" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2661" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2662" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType Outport Name "Match" SID "2663" Position [1055, 203, 1085, 217] IconDisplay "Port number" } Line { SrcBlock "Rx ByteAddr" SrcPort 1 Points [110, 0] Branch { DstBlock "Relational" DstPort 1 } Branch { Points [0, 175] Branch { Points [0, 180] DstBlock "Relational6" DstPort 1 } Branch { DstBlock "Relational5" DstPort 1 } } } Line { SrcBlock "Match ByteAddr" SrcPort 1 Points [40, 0] Branch { DstBlock "Relational" DstPort 2 } Branch { Points [0, 165] Branch { Points [0, 180] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "AddSub" DstPort 1 } } } Line { SrcBlock "Rx Byte" SrcPort 1 Points [125, 0] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 175] Branch { Points [0, 180] DstBlock "Relational3" DstPort 1 } Branch { DstBlock "Relational2" DstPort 1 } } } Line { SrcBlock "Match Bytes" SrcPort 1 Points [20, 0] Branch { DstBlock "8LSB" DstPort 1 } Branch { Points [0, 175] Branch { DstBlock "8LSB+8" DstPort 1 } Branch { Points [0, 180] DstBlock "8LSB+16" DstPort 1 } } } Line { SrcBlock "8LSB" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "8LSB+8" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "8LSB+16" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Relational5" DstPort 2 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Relational6" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Relational5" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Relational6" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Match Length" SrcPort 1 Points [30, 0] Branch { DstBlock "Relational4" DstPort 1 } Branch { Points [0, 180] DstBlock "Relational7" DstPort 1 } } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Relational7" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Relational7" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Match" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Rx ByteVin" SrcPort 1 Points [210, 0] Branch { DstBlock "Logical5" DstPort 1 } Branch { Points [0, 155] Branch { DstBlock "Logical7" DstPort 1 } Branch { Points [0, 180] DstBlock "Logical8" DstPort 1 } } } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "SR Latch " DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "SR Latch 1" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "SR Latch 2" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 Points [605, 0; 0, -120] Branch { DstBlock "SR Latch 2" DstPort 2 } Branch { Points [0, -180] Branch { Points [0, -155] DstBlock "SR Latch " DstPort 2 } Branch { DstBlock "SR Latch 1" DstPort 2 } } } Line { SrcBlock "SR Latch " SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "SR Latch 1" SrcPort 1 Points [35, 0; 0, -130] DstBlock "Logical" DstPort 2 } Line { SrcBlock "SR Latch 2" SrcPort 1 Points [45, 0; 0, -285] DstBlock "Logical" DstPort 3 } } } Block { BlockType SubSystem Name "Match1" SID "2664" Ports [7, 1] Position [665, 793, 790, 867] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Match1" Location [202, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Rst" SID "2665" Position [100, 638, 130, 652] IconDisplay "Port number" } Block { BlockType Inport Name "Rx ByteAddr" SID "2666" Position [100, 118, 130, 132] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rx Byte" SID "2667" Position [100, 198, 130, 212] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rx ByteVin" SID "2668" Position [415, 153, 445, 167] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Match ByteAddr" SID "2669" Position [100, 158, 130, 172] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Match Length" SID "2670" Position [415, 293, 445, 307] NamePlacement "alternate" Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Match Bytes" SID "2671" Position [100, 238, 130, 252] Port "7" IconDisplay "Port number" } Block { BlockType Reference Name "8LSB" SID "2672" Ports [1, 1] Position [195, 237, 225, 253] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+16" SID "2673" Ports [1, 1] Position [195, 592, 225, 608] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+8" SID "2674" Ports [1, 1] Position [200, 412, 230, 428] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub" SID "2675" Ports [2, 1] Position [195, 319, 235, 361] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1.3" sg_icon_stat "40,42,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "2676" Ports [2, 1] Position [195, 499, 235, 541] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1.3" sg_icon_stat "40,42,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "2677" Ports [0, 1] Position [115, 339, 140, 361] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "2678" Ports [0, 1] Position [115, 519, 140, 541] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "2679" Ports [0, 1] Position [445, 314, 470, 336] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant3" SID "2680" Ports [0, 1] Position [435, 494, 460, 516] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "3" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,279a71c8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'3');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "2681" Ports [3, 1] Position [915, 174, 950, 246] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,72,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 72 72 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[41.55 41." "55 46.55 41.55 46.55 46.55 46.55 41.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[36.55 36.55 41.55 4" "1.55 36.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[31.55 31.55 36.55 36.55 31.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 26.55 31.55 31.55 26.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical1" SID "2682" Ports [2, 1] Position [595, 292, 620, 383] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,91,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 91 91 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 91 91 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[48.33 " "48.33 51.33 48.33 51.33 51.33 51.33 48.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[45.33 45.33 48.33" " 48.33 45.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[42.33 42.33 45.33 45.33 42.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[39.33 39.33 42.33 39.33 42.33 42.33 39.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "2683" Ports [2, 1] Position [360, 105, 390, 265] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "2684" Ports [2, 1] Position [360, 280, 390, 440] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "2685" Ports [2, 1] Position [360, 460, 390, 620] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "2686" Ports [2, 1] Position [695, 148, 720, 197] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "2687" Ports [2, 1] Position [595, 472, 620, 563] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,91,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 91 91 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 91 91 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[48.33 " "48.33 51.33 48.33 51.33 51.33 51.33 48.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[45.33 45.33 48.33" " 48.33 45.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[42.33 42.33 45.33 45.33 42.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[39.33 39.33 42.33 39.33 42.33 42.33 39.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "2688" Ports [2, 1] Position [695, 303, 720, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "2689" Ports [2, 1] Position [690, 483, 715, 532] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "2690" Ports [2, 1] Position [285, 106, 315, 184] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "2691" Ports [2, 1] Position [285, 186, 315, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "2692" Ports [2, 1] Position [285, 361, 315, 439] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "2693" Ports [2, 1] Position [285, 541, 315, 619] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "2694" Ports [2, 1] Position [505, 288, 540, 337] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2702" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2703" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType SubSystem Name "SR Latch 1" SID "2704" Ports [2, 1] Position [775, 322, 820, 353] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 1" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2705" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2706" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "2707" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2708" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2709" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType SubSystem Name "SR Latch 2" SID "2710" Ports [2, 1] Position [775, 502, 820, 533] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 2" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2711" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2712" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "2713" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2714" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2715" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType Outport Name "Match" SID "2716" Position [1055, 203, 1085, 217] IconDisplay "Port number" } Line { SrcBlock "SR Latch 2" SrcPort 1 Points [45, 0; 0, -285] DstBlock "Logical" DstPort 3 } Line { SrcBlock "SR Latch 1" SrcPort 1 Points [35, 0; 0, -130] DstBlock "Logical" DstPort 2 } Line { SrcBlock "SR Latch " SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 Points [605, 0; 0, -120] Branch { Points [0, -180] Branch { DstBlock "SR Latch 1" DstPort 2 } Branch { Points [0, -155] DstBlock "SR Latch " DstPort 2 } } Branch { DstBlock "SR Latch 2" DstPort 2 } } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "SR Latch 2" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "SR Latch 1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "SR Latch " DstPort 1 } Line { SrcBlock "Rx ByteVin" SrcPort 1 Points [210, 0] Branch { Points [0, 155] Branch { Points [0, 180] DstBlock "Logical8" DstPort 1 } Branch { DstBlock "Logical7" DstPort 1 } } Branch { DstBlock "Logical5" DstPort 1 } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Match" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Relational7" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "Relational7" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Match Length" SrcPort 1 Points [30, 0] Branch { Points [0, 180] DstBlock "Relational7" DstPort 1 } Branch { DstBlock "Relational4" DstPort 1 } } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Relational6" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Relational5" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Relational6" DstPort 2 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Relational5" DstPort 2 } Line { SrcBlock "8LSB+16" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "8LSB+8" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "8LSB" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Match Bytes" SrcPort 1 Points [20, 0] Branch { Points [0, 175] Branch { Points [0, 180] DstBlock "8LSB+16" DstPort 1 } Branch { DstBlock "8LSB+8" DstPort 1 } } Branch { DstBlock "8LSB" DstPort 1 } } Line { SrcBlock "Rx Byte" SrcPort 1 Points [125, 0] Branch { Points [0, 175] Branch { DstBlock "Relational2" DstPort 1 } Branch { Points [0, 180] DstBlock "Relational3" DstPort 1 } } Branch { DstBlock "Relational1" DstPort 1 } } Line { SrcBlock "Match ByteAddr" SrcPort 1 Points [40, 0] Branch { Points [0, 165] Branch { DstBlock "AddSub" DstPort 1 } Branch { Points [0, 180] DstBlock "AddSub1" DstPort 1 } } Branch { DstBlock "Relational" DstPort 2 } } Line { SrcBlock "Rx ByteAddr" SrcPort 1 Points [110, 0] Branch { Points [0, 175] Branch { DstBlock "Relational5" DstPort 1 } Branch { Points [0, 180] DstBlock "Relational6" DstPort 1 } } Branch { DstBlock "Relational" DstPort 1 } } } } Block { BlockType SubSystem Name "Match2" SID "2717" Ports [7, 1] Position [665, 703, 790, 777] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Match2" Location [202, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Rst" SID "2718" Position [100, 638, 130, 652] IconDisplay "Port number" } Block { BlockType Inport Name "Rx ByteAddr" SID "2719" Position [100, 118, 130, 132] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rx Byte" SID "2720" Position [100, 198, 130, 212] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rx ByteVin" SID "2721" Position [415, 153, 445, 167] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Match ByteAddr" SID "2722" Position [100, 158, 130, 172] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Match Length" SID "2723" Position [415, 293, 445, 307] NamePlacement "alternate" Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Match Bytes" SID "2724" Position [100, 238, 130, 252] Port "7" IconDisplay "Port number" } Block { BlockType Reference Name "8LSB" SID "2725" Ports [1, 1] Position [195, 237, 225, 253] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+16" SID "2726" Ports [1, 1] Position [195, 592, 225, 608] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+8" SID "2727" Ports [1, 1] Position [200, 412, 230, 428] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub" SID "2728" Ports [2, 1] Position [195, 319, 235, 361] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1.3" sg_icon_stat "40,42,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "2729" Ports [2, 1] Position [195, 499, 235, 541] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1.3" sg_icon_stat "40,42,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "2730" Ports [0, 1] Position [115, 339, 140, 361] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "2731" Ports [0, 1] Position [115, 519, 140, 541] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "2732" Ports [0, 1] Position [445, 314, 470, 336] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant3" SID "2733" Ports [0, 1] Position [435, 494, 460, 516] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "3" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,279a71c8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'3');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "2734" Ports [3, 1] Position [915, 174, 950, 246] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,72,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 72 72 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[41.55 41." "55 46.55 41.55 46.55 46.55 46.55 41.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[36.55 36.55 41.55 4" "1.55 36.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[31.55 31.55 36.55 36.55 31.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 26.55 31.55 31.55 26.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical1" SID "2735" Ports [2, 1] Position [595, 292, 620, 383] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,91,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 91 91 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 91 91 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[48.33 " "48.33 51.33 48.33 51.33 51.33 51.33 48.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[45.33 45.33 48.33" " 48.33 45.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[42.33 42.33 45.33 45.33 42.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[39.33 39.33 42.33 39.33 42.33 42.33 39.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "2736" Ports [2, 1] Position [360, 105, 390, 265] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "2737" Ports [2, 1] Position [360, 280, 390, 440] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "2738" Ports [2, 1] Position [360, 460, 390, 620] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "2739" Ports [2, 1] Position [695, 148, 720, 197] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "2740" Ports [2, 1] Position [595, 472, 620, 563] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,91,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 91 91 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 91 91 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[48.33 " "48.33 51.33 48.33 51.33 51.33 51.33 48.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[45.33 45.33 48.33" " 48.33 45.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[42.33 42.33 45.33 45.33 42.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[39.33 39.33 42.33 39.33 42.33 42.33 39.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "2741" Ports [2, 1] Position [695, 303, 720, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "2742" Ports [2, 1] Position [690, 483, 715, 532] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "2743" Ports [2, 1] Position [285, 106, 315, 184] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "2744" Ports [2, 1] Position [285, 186, 315, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "2745" Ports [2, 1] Position [285, 361, 315, 439] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "2746" Ports [2, 1] Position [285, 541, 315, 619] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "2747" Ports [2, 1] Position [505, 288, 540, 337] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2755" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2756" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType SubSystem Name "SR Latch 1" SID "2757" Ports [2, 1] Position [775, 322, 820, 353] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 1" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2758" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2759" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "2760" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2761" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2762" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType SubSystem Name "SR Latch 2" SID "2763" Ports [2, 1] Position [775, 502, 820, 533] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 2" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2764" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2765" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "2766" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2767" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2768" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType Outport Name "Match" SID "2769" Position [1055, 203, 1085, 217] IconDisplay "Port number" } Line { SrcBlock "Rx ByteAddr" SrcPort 1 Points [110, 0] Branch { DstBlock "Relational" DstPort 1 } Branch { Points [0, 175] Branch { Points [0, 180] DstBlock "Relational6" DstPort 1 } Branch { DstBlock "Relational5" DstPort 1 } } } Line { SrcBlock "Match ByteAddr" SrcPort 1 Points [40, 0] Branch { DstBlock "Relational" DstPort 2 } Branch { Points [0, 165] Branch { Points [0, 180] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "AddSub" DstPort 1 } } } Line { SrcBlock "Rx Byte" SrcPort 1 Points [125, 0] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 175] Branch { Points [0, 180] DstBlock "Relational3" DstPort 1 } Branch { DstBlock "Relational2" DstPort 1 } } } Line { SrcBlock "Match Bytes" SrcPort 1 Points [20, 0] Branch { DstBlock "8LSB" DstPort 1 } Branch { Points [0, 175] Branch { DstBlock "8LSB+8" DstPort 1 } Branch { Points [0, 180] DstBlock "8LSB+16" DstPort 1 } } } Line { SrcBlock "8LSB" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "8LSB+8" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "8LSB+16" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Relational5" DstPort 2 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Relational6" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Relational5" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Relational6" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Match Length" SrcPort 1 Points [30, 0] Branch { DstBlock "Relational4" DstPort 1 } Branch { Points [0, 180] DstBlock "Relational7" DstPort 1 } } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Relational7" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Relational7" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Match" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Rx ByteVin" SrcPort 1 Points [210, 0] Branch { DstBlock "Logical5" DstPort 1 } Branch { Points [0, 155] Branch { DstBlock "Logical7" DstPort 1 } Branch { Points [0, 180] DstBlock "Logical8" DstPort 1 } } } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "SR Latch " DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "SR Latch 1" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "SR Latch 2" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 Points [605, 0; 0, -120] Branch { DstBlock "SR Latch 2" DstPort 2 } Branch { Points [0, -180] Branch { Points [0, -155] DstBlock "SR Latch " DstPort 2 } Branch { DstBlock "SR Latch 1" DstPort 2 } } } Line { SrcBlock "SR Latch " SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "SR Latch 1" SrcPort 1 Points [35, 0; 0, -130] DstBlock "Logical" DstPort 2 } Line { SrcBlock "SR Latch 2" SrcPort 1 Points [45, 0; 0, -285] DstBlock "Logical" DstPort 3 } } } Block { BlockType SubSystem Name "Match3" SID "2770" Ports [7, 1] Position [665, 613, 790, 687] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Match3" Location [202, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Rst" SID "2771" Position [100, 638, 130, 652] IconDisplay "Port number" } Block { BlockType Inport Name "Rx ByteAddr" SID "2772" Position [100, 118, 130, 132] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rx Byte" SID "2773" Position [100, 198, 130, 212] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rx ByteVin" SID "2774" Position [415, 153, 445, 167] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Match ByteAddr" SID "2775" Position [100, 158, 130, 172] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Match Length" SID "2776" Position [415, 293, 445, 307] NamePlacement "alternate" Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Match Bytes" SID "2777" Position [100, 238, 130, 252] Port "7" IconDisplay "Port number" } Block { BlockType Reference Name "8LSB" SID "2778" Ports [1, 1] Position [195, 237, 225, 253] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+16" SID "2779" Ports [1, 1] Position [195, 592, 225, 608] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+8" SID "2780" Ports [1, 1] Position [200, 412, 230, 428] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub" SID "2781" Ports [2, 1] Position [195, 319, 235, 361] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1.3" sg_icon_stat "40,42,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "2782" Ports [2, 1] Position [195, 499, 235, 541] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1.3" sg_icon_stat "40,42,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "2783" Ports [0, 1] Position [115, 339, 140, 361] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "2784" Ports [0, 1] Position [115, 519, 140, 541] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "2785" Ports [0, 1] Position [445, 314, 470, 336] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant3" SID "2786" Ports [0, 1] Position [435, 494, 460, 516] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "3" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,279a71c8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'3');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "2787" Ports [3, 1] Position [915, 174, 950, 246] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,72,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 72 72 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[41.55 41." "55 46.55 41.55 46.55 46.55 46.55 41.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[36.55 36.55 41.55 4" "1.55 36.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[31.55 31.55 36.55 36.55 31.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 26.55 31.55 31.55 26.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical1" SID "2788" Ports [2, 1] Position [595, 292, 620, 383] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,91,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 91 91 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 91 91 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[48.33 " "48.33 51.33 48.33 51.33 51.33 51.33 48.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[45.33 45.33 48.33" " 48.33 45.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[42.33 42.33 45.33 45.33 42.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[39.33 39.33 42.33 39.33 42.33 42.33 39.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "2789" Ports [2, 1] Position [360, 105, 390, 265] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "2790" Ports [2, 1] Position [360, 280, 390, 440] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "2791" Ports [2, 1] Position [360, 460, 390, 620] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "2792" Ports [2, 1] Position [695, 148, 720, 197] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "2793" Ports [2, 1] Position [595, 472, 620, 563] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,91,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 91 91 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 91 91 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[48.33 " "48.33 51.33 48.33 51.33 51.33 51.33 48.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[45.33 45.33 48.33" " 48.33 45.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[42.33 42.33 45.33 45.33 42.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[39.33 39.33 42.33 39.33 42.33 42.33 39.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "2794" Ports [2, 1] Position [695, 303, 720, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "2795" Ports [2, 1] Position [690, 483, 715, 532] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "2796" Ports [2, 1] Position [285, 106, 315, 184] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "2797" Ports [2, 1] Position [285, 186, 315, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "2798" Ports [2, 1] Position [285, 361, 315, 439] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "2799" Ports [2, 1] Position [285, 541, 315, 619] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "2800" Ports [2, 1] Position [505, 288, 540, 337] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2808" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2809" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType SubSystem Name "SR Latch 1" SID "2810" Ports [2, 1] Position [775, 322, 820, 353] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 1" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2811" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2812" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "2813" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2814" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2815" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType SubSystem Name "SR Latch 2" SID "2816" Ports [2, 1] Position [775, 502, 820, 533] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 2" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2817" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2818" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "2819" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2820" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2821" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType Outport Name "Match" SID "2822" Position [1055, 203, 1085, 217] IconDisplay "Port number" } Line { SrcBlock "SR Latch 2" SrcPort 1 Points [45, 0; 0, -285] DstBlock "Logical" DstPort 3 } Line { SrcBlock "SR Latch 1" SrcPort 1 Points [35, 0; 0, -130] DstBlock "Logical" DstPort 2 } Line { SrcBlock "SR Latch " SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 Points [605, 0; 0, -120] Branch { Points [0, -180] Branch { DstBlock "SR Latch 1" DstPort 2 } Branch { Points [0, -155] DstBlock "SR Latch " DstPort 2 } } Branch { DstBlock "SR Latch 2" DstPort 2 } } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "SR Latch 2" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "SR Latch 1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "SR Latch " DstPort 1 } Line { SrcBlock "Rx ByteVin" SrcPort 1 Points [210, 0] Branch { Points [0, 155] Branch { Points [0, 180] DstBlock "Logical8" DstPort 1 } Branch { DstBlock "Logical7" DstPort 1 } } Branch { DstBlock "Logical5" DstPort 1 } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Match" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Relational7" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "Relational7" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Match Length" SrcPort 1 Points [30, 0] Branch { Points [0, 180] DstBlock "Relational7" DstPort 1 } Branch { DstBlock "Relational4" DstPort 1 } } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Relational6" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Relational5" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Relational6" DstPort 2 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Relational5" DstPort 2 } Line { SrcBlock "8LSB+16" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "8LSB+8" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "8LSB" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Match Bytes" SrcPort 1 Points [20, 0] Branch { Points [0, 175] Branch { Points [0, 180] DstBlock "8LSB+16" DstPort 1 } Branch { DstBlock "8LSB+8" DstPort 1 } } Branch { DstBlock "8LSB" DstPort 1 } } Line { SrcBlock "Rx Byte" SrcPort 1 Points [125, 0] Branch { Points [0, 175] Branch { DstBlock "Relational2" DstPort 1 } Branch { Points [0, 180] DstBlock "Relational3" DstPort 1 } } Branch { DstBlock "Relational1" DstPort 1 } } Line { SrcBlock "Match ByteAddr" SrcPort 1 Points [40, 0] Branch { Points [0, 165] Branch { DstBlock "AddSub" DstPort 1 } Branch { Points [0, 180] DstBlock "AddSub1" DstPort 1 } } Branch { DstBlock "Relational" DstPort 2 } } Line { SrcBlock "Rx ByteAddr" SrcPort 1 Points [110, 0] Branch { Points [0, 175] Branch { DstBlock "Relational5" DstPort 1 } Branch { Points [0, 180] DstBlock "Relational6" DstPort 1 } } Branch { DstBlock "Relational" DstPort 1 } } } } Block { BlockType SubSystem Name "Match4" SID "2823" Ports [7, 1] Position [665, 523, 790, 597] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Match4" Location [202, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Rst" SID "2824" Position [100, 638, 130, 652] IconDisplay "Port number" } Block { BlockType Inport Name "Rx ByteAddr" SID "2825" Position [100, 118, 130, 132] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rx Byte" SID "2826" Position [100, 198, 130, 212] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rx ByteVin" SID "2827" Position [415, 153, 445, 167] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Match ByteAddr" SID "2828" Position [100, 158, 130, 172] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Match Length" SID "2829" Position [415, 293, 445, 307] NamePlacement "alternate" Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Match Bytes" SID "2830" Position [100, 238, 130, 252] Port "7" IconDisplay "Port number" } Block { BlockType Reference Name "8LSB" SID "2831" Ports [1, 1] Position [195, 237, 225, 253] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+16" SID "2832" Ports [1, 1] Position [195, 592, 225, 608] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+8" SID "2833" Ports [1, 1] Position [200, 412, 230, 428] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub" SID "2834" Ports [2, 1] Position [195, 319, 235, 361] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1.3" sg_icon_stat "40,42,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "2835" Ports [2, 1] Position [195, 499, 235, 541] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1.3" sg_icon_stat "40,42,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "2836" Ports [0, 1] Position [115, 339, 140, 361] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "2837" Ports [0, 1] Position [115, 519, 140, 541] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "2838" Ports [0, 1] Position [445, 314, 470, 336] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant3" SID "2839" Ports [0, 1] Position [435, 494, 460, 516] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "3" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,279a71c8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'3');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "2840" Ports [3, 1] Position [915, 174, 950, 246] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,72,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 72 72 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[41.55 41." "55 46.55 41.55 46.55 46.55 46.55 41.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[36.55 36.55 41.55 4" "1.55 36.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[31.55 31.55 36.55 36.55 31.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 26.55 31.55 31.55 26.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical1" SID "2841" Ports [2, 1] Position [595, 292, 620, 383] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,91,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 91 91 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 91 91 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[48.33 " "48.33 51.33 48.33 51.33 51.33 51.33 48.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[45.33 45.33 48.33" " 48.33 45.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[42.33 42.33 45.33 45.33 42.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[39.33 39.33 42.33 39.33 42.33 42.33 39.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "2842" Ports [2, 1] Position [360, 105, 390, 265] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "2843" Ports [2, 1] Position [360, 280, 390, 440] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "2844" Ports [2, 1] Position [360, 460, 390, 620] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "2845" Ports [2, 1] Position [695, 148, 720, 197] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "2846" Ports [2, 1] Position [595, 472, 620, 563] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,91,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 91 91 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 91 91 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[48.33 " "48.33 51.33 48.33 51.33 51.33 51.33 48.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[45.33 45.33 48.33" " 48.33 45.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[42.33 42.33 45.33 45.33 42.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[39.33 39.33 42.33 39.33 42.33 42.33 39.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "2847" Ports [2, 1] Position [695, 303, 720, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "2848" Ports [2, 1] Position [690, 483, 715, 532] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "2849" Ports [2, 1] Position [285, 106, 315, 184] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "2850" Ports [2, 1] Position [285, 186, 315, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "2851" Ports [2, 1] Position [285, 361, 315, 439] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "2852" Ports [2, 1] Position [285, 541, 315, 619] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "2853" Ports [2, 1] Position [505, 288, 540, 337] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2861" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2862" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType SubSystem Name "SR Latch 1" SID "2863" Ports [2, 1] Position [775, 322, 820, 353] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 1" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2864" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2865" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "2866" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2867" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2868" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType SubSystem Name "SR Latch 2" SID "2869" Ports [2, 1] Position [775, 502, 820, 533] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 2" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2870" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2871" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "2872" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2873" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2874" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType Outport Name "Match" SID "2875" Position [1055, 203, 1085, 217] IconDisplay "Port number" } Line { SrcBlock "Rx ByteAddr" SrcPort 1 Points [110, 0] Branch { DstBlock "Relational" DstPort 1 } Branch { Points [0, 175] Branch { Points [0, 180] DstBlock "Relational6" DstPort 1 } Branch { DstBlock "Relational5" DstPort 1 } } } Line { SrcBlock "Match ByteAddr" SrcPort 1 Points [40, 0] Branch { DstBlock "Relational" DstPort 2 } Branch { Points [0, 165] Branch { Points [0, 180] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "AddSub" DstPort 1 } } } Line { SrcBlock "Rx Byte" SrcPort 1 Points [125, 0] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 175] Branch { Points [0, 180] DstBlock "Relational3" DstPort 1 } Branch { DstBlock "Relational2" DstPort 1 } } } Line { SrcBlock "Match Bytes" SrcPort 1 Points [20, 0] Branch { DstBlock "8LSB" DstPort 1 } Branch { Points [0, 175] Branch { DstBlock "8LSB+8" DstPort 1 } Branch { Points [0, 180] DstBlock "8LSB+16" DstPort 1 } } } Line { SrcBlock "8LSB" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "8LSB+8" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "8LSB+16" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Relational5" DstPort 2 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Relational6" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Relational5" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Relational6" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Match Length" SrcPort 1 Points [30, 0] Branch { DstBlock "Relational4" DstPort 1 } Branch { Points [0, 180] DstBlock "Relational7" DstPort 1 } } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Relational7" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Relational7" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Match" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Rx ByteVin" SrcPort 1 Points [210, 0] Branch { DstBlock "Logical5" DstPort 1 } Branch { Points [0, 155] Branch { DstBlock "Logical7" DstPort 1 } Branch { Points [0, 180] DstBlock "Logical8" DstPort 1 } } } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "SR Latch " DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "SR Latch 1" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "SR Latch 2" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 Points [605, 0; 0, -120] Branch { DstBlock "SR Latch 2" DstPort 2 } Branch { Points [0, -180] Branch { Points [0, -155] DstBlock "SR Latch " DstPort 2 } Branch { DstBlock "SR Latch 1" DstPort 2 } } } Line { SrcBlock "SR Latch " SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "SR Latch 1" SrcPort 1 Points [35, 0; 0, -130] DstBlock "Logical" DstPort 2 } Line { SrcBlock "SR Latch 2" SrcPort 1 Points [45, 0; 0, -285] DstBlock "Logical" DstPort 3 } } } Block { BlockType SubSystem Name "Match5" SID "2876" Ports [7, 1] Position [665, 433, 790, 507] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Match5" Location [202, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Rst" SID "2877" Position [100, 638, 130, 652] IconDisplay "Port number" } Block { BlockType Inport Name "Rx ByteAddr" SID "2878" Position [100, 118, 130, 132] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rx Byte" SID "2879" Position [100, 198, 130, 212] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rx ByteVin" SID "2880" Position [415, 153, 445, 167] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Match ByteAddr" SID "2881" Position [100, 158, 130, 172] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Match Length" SID "2882" Position [415, 293, 445, 307] NamePlacement "alternate" Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Match Bytes" SID "2883" Position [100, 238, 130, 252] Port "7" IconDisplay "Port number" } Block { BlockType Reference Name "8LSB" SID "2884" Ports [1, 1] Position [195, 237, 225, 253] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+16" SID "2885" Ports [1, 1] Position [195, 592, 225, 608] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+8" SID "2886" Ports [1, 1] Position [200, 412, 230, 428] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub" SID "2887" Ports [2, 1] Position [195, 319, 235, 361] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1.3" sg_icon_stat "40,42,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "2888" Ports [2, 1] Position [195, 499, 235, 541] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1.3" sg_icon_stat "40,42,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "2889" Ports [0, 1] Position [115, 339, 140, 361] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "2890" Ports [0, 1] Position [115, 519, 140, 541] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "2891" Ports [0, 1] Position [445, 314, 470, 336] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant3" SID "2892" Ports [0, 1] Position [435, 494, 460, 516] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "3" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,279a71c8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'3');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "2893" Ports [3, 1] Position [915, 174, 950, 246] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,72,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 72 72 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[41.55 41." "55 46.55 41.55 46.55 46.55 46.55 41.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[36.55 36.55 41.55 4" "1.55 36.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[31.55 31.55 36.55 36.55 31.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 26.55 31.55 31.55 26.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical1" SID "2894" Ports [2, 1] Position [595, 292, 620, 383] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,91,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 91 91 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 91 91 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[48.33 " "48.33 51.33 48.33 51.33 51.33 51.33 48.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[45.33 45.33 48.33" " 48.33 45.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[42.33 42.33 45.33 45.33 42.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[39.33 39.33 42.33 39.33 42.33 42.33 39.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "2895" Ports [2, 1] Position [360, 105, 390, 265] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "2896" Ports [2, 1] Position [360, 280, 390, 440] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "2897" Ports [2, 1] Position [360, 460, 390, 620] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,160,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 160 160 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 160 160 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[84.44 " "84.44 88.44 84.44 88.44 88.44 88.44 84.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[80.44 80.44 84.44 84" ".44 80.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[76.44 76.44 80.44 80.44 76.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 72.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "2898" Ports [2, 1] Position [695, 148, 720, 197] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "2899" Ports [2, 1] Position [595, 472, 620, 563] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,91,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 91 91 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 91 91 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[48.33 " "48.33 51.33 48.33 51.33 51.33 51.33 48.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[45.33 45.33 48.33" " 48.33 45.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[42.33 42.33 45.33 45.33 42.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[39.33 39.33 42.33 39.33 42.33 42.33 39.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "2900" Ports [2, 1] Position [695, 303, 720, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "2901" Ports [2, 1] Position [690, 483, 715, 532] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,49,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 49 49 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[27.33 " "27.33 30.33 27.33 30.33 30.33 30.33 27.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33" " 27.33 24.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[21.33 21.33 24.33 24.33 21.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[18.33 18.33 21.33 18.33 21.33 21.33 18.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "2902" Ports [2, 1] Position [285, 106, 315, 184] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "2903" Ports [2, 1] Position [285, 186, 315, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "2904" Ports [2, 1] Position [285, 361, 315, 439] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "2905" Ports [2, 1] Position [285, 541, 315, 619] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "30,78,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.4" "4 47.44 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 " "39.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "2906" Ports [2, 1] Position [505, 288, 540, 337] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2914" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2915" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType SubSystem Name "SR Latch 1" SID "2916" Ports [2, 1] Position [775, 322, 820, 353] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 1" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2917" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2918" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "2919" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2920" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2921" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType SubSystem Name "SR Latch 2" SID "2922" Ports [2, 1] Position [775, 502, 820, 533] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 2" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2923" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "2924" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "2925" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2926" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2927" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType Outport Name "Match" SID "2928" Position [1055, 203, 1085, 217] IconDisplay "Port number" } Line { SrcBlock "SR Latch 2" SrcPort 1 Points [45, 0; 0, -285] DstBlock "Logical" DstPort 3 } Line { SrcBlock "SR Latch 1" SrcPort 1 Points [35, 0; 0, -130] DstBlock "Logical" DstPort 2 } Line { SrcBlock "SR Latch " SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 Points [605, 0; 0, -120] Branch { Points [0, -180] Branch { DstBlock "SR Latch 1" DstPort 2 } Branch { Points [0, -155] DstBlock "SR Latch " DstPort 2 } } Branch { DstBlock "SR Latch 2" DstPort 2 } } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "SR Latch 2" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "SR Latch 1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "SR Latch " DstPort 1 } Line { SrcBlock "Rx ByteVin" SrcPort 1 Points [210, 0] Branch { Points [0, 155] Branch { Points [0, 180] DstBlock "Logical8" DstPort 1 } Branch { DstBlock "Logical7" DstPort 1 } } Branch { DstBlock "Logical5" DstPort 1 } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Match" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Relational7" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "Relational7" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Match Length" SrcPort 1 Points [30, 0] Branch { Points [0, 180] DstBlock "Relational7" DstPort 1 } Branch { DstBlock "Relational4" DstPort 1 } } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Relational6" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Relational5" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Relational6" DstPort 2 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Relational5" DstPort 2 } Line { SrcBlock "8LSB+16" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "8LSB+8" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "8LSB" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Match Bytes" SrcPort 1 Points [20, 0] Branch { Points [0, 175] Branch { Points [0, 180] DstBlock "8LSB+16" DstPort 1 } Branch { DstBlock "8LSB+8" DstPort 1 } } Branch { DstBlock "8LSB" DstPort 1 } } Line { SrcBlock "Rx Byte" SrcPort 1 Points [125, 0] Branch { Points [0, 175] Branch { DstBlock "Relational2" DstPort 1 } Branch { Points [0, 180] DstBlock "Relational3" DstPort 1 } } Branch { DstBlock "Relational1" DstPort 1 } } Line { SrcBlock "Match ByteAddr" SrcPort 1 Points [40, 0] Branch { Points [0, 165] Branch { DstBlock "AddSub" DstPort 1 } Branch { Points [0, 180] DstBlock "AddSub1" DstPort 1 } } Branch { DstBlock "Relational" DstPort 2 } } Line { SrcBlock "Rx ByteAddr" SrcPort 1 Points [110, 0] Branch { Points [0, 175] Branch { DstBlock "Relational5" DstPort 1 } Branch { Points [0, 180] DstBlock "Relational6" DstPort 1 } } Branch { DstBlock "Relational" DstPort 1 } } } } Block { BlockType Outport Name "Match_8b" SID "2929" Position [1050, 488, 1080, 502] IconDisplay "Port number" } Line { Labels [0, 0] SrcBlock "From5" SrcPort 1 DstBlock "Field Slices5" DstPort 1 } Line { SrcBlock "Field Slices5" SrcPort 1 DstBlock "Match5" DstPort 5 } Line { SrcBlock "Field Slices5" SrcPort 2 DstBlock "Match5" DstPort 6 } Line { SrcBlock "Field Slices5" SrcPort 3 DstBlock "Match5" DstPort 7 } Line { SrcBlock "RxByteAddr" SrcPort 1 Points [430, 0; 0, 65] Branch { Points [0, 90] Branch { Points [0, 90] Branch { Points [0, 90] Branch { Points [0, 90] Branch { Points [0, 90] DstBlock "Match0" DstPort 2 } Branch { DstBlock "Match1" DstPort 2 } } Branch { DstBlock "Match2" DstPort 2 } } Branch { DstBlock "Match3" DstPort 2 } } Branch { DstBlock "Match4" DstPort 2 } } Branch { DstBlock "Match5" DstPort 2 } } Line { SrcBlock "RxByte" SrcPort 1 Points [425, 0; 0, 45] Branch { Points [0, 90] Branch { Points [0, 90] Branch { Points [0, 90] Branch { Points [0, 90] Branch { Points [0, 90] DstBlock "Match0" DstPort 3 } Branch { DstBlock "Match1" DstPort 3 } } Branch { DstBlock "Match2" DstPort 3 } } Branch { DstBlock "Match3" DstPort 3 } } Branch { DstBlock "Match4" DstPort 3 } } Branch { DstBlock "Match5" DstPort 3 } } Line { SrcBlock "RxByteWE" SrcPort 1 Points [420, 0; 0, 25] Branch { Points [0, 90] Branch { Points [0, 90] Branch { Points [0, 90] Branch { Points [0, 90] Branch { Points [0, 90] DstBlock "Match0" DstPort 4 } Branch { DstBlock "Match1" DstPort 4 } } Branch { DstBlock "Match2" DstPort 4 } } Branch { DstBlock "Match3" DstPort 4 } } Branch { DstBlock "Match4" DstPort 4 } } Branch { DstBlock "Match5" DstPort 4 } } Line { SrcBlock "Rst" SrcPort 1 Points [435, 0; 0, 90] Branch { Points [0, 90] Branch { Points [0, 90] Branch { Points [0, 90] Branch { Points [0, 90] Branch { Points [0, 90] DstBlock "Match0" DstPort 1 } Branch { DstBlock "Match1" DstPort 1 } } Branch { DstBlock "Match2" DstPort 1 } } Branch { DstBlock "Match3" DstPort 1 } } Branch { DstBlock "Match4" DstPort 1 } } Branch { DstBlock "Match5" DstPort 1 } } Line { Labels [0, 0] SrcBlock "From6" SrcPort 1 DstBlock "Field Slices4" DstPort 1 } Line { SrcBlock "Field Slices4" SrcPort 1 DstBlock "Match4" DstPort 5 } Line { SrcBlock "Field Slices4" SrcPort 2 DstBlock "Match4" DstPort 6 } Line { SrcBlock "Field Slices4" SrcPort 3 DstBlock "Match4" DstPort 7 } Line { Labels [0, 0] SrcBlock "From2" SrcPort 1 DstBlock "Field Slices3" DstPort 1 } Line { Labels [0, 0] SrcBlock "From4" SrcPort 1 DstBlock "Field Slices2" DstPort 1 } Line { SrcBlock "Field Slices3" SrcPort 1 DstBlock "Match3" DstPort 5 } Line { SrcBlock "Field Slices3" SrcPort 2 DstBlock "Match3" DstPort 6 } Line { SrcBlock "Field Slices3" SrcPort 3 DstBlock "Match3" DstPort 7 } Line { SrcBlock "Field Slices2" SrcPort 1 DstBlock "Match2" DstPort 5 } Line { SrcBlock "Field Slices2" SrcPort 2 DstBlock "Match2" DstPort 6 } Line { SrcBlock "Field Slices2" SrcPort 3 DstBlock "Match2" DstPort 7 } Line { Labels [0, 0] SrcBlock "From1" SrcPort 1 DstBlock "Field Slices1" DstPort 1 } Line { Labels [0, 0] SrcBlock "From3" SrcPort 1 DstBlock "Field Slices" DstPort 1 } Line { SrcBlock "Field Slices1" SrcPort 1 DstBlock "Match1" DstPort 5 } Line { SrcBlock "Field Slices1" SrcPort 2 DstBlock "Match1" DstPort 6 } Line { SrcBlock "Field Slices1" SrcPort 3 DstBlock "Match1" DstPort 7 } Line { SrcBlock "Field Slices" SrcPort 1 DstBlock "Match0" DstPort 5 } Line { SrcBlock "Field Slices" SrcPort 2 DstBlock "Match0" DstPort 6 } Line { SrcBlock "Field Slices" SrcPort 3 DstBlock "Match0" DstPort 7 } Line { SrcBlock "Match5" SrcPort 1 DstBlock "Concat" DstPort 3 } Line { SrcBlock "Match4" SrcPort 1 Points [50, 0; 0, -75] DstBlock "Concat" DstPort 4 } Line { SrcBlock "Match3" SrcPort 1 Points [60, 0; 0, -150] DstBlock "Concat" DstPort 5 } Line { SrcBlock "Match2" SrcPort 1 Points [70, 0; 0, -225] DstBlock "Concat" DstPort 6 } Line { SrcBlock "Match1" SrcPort 1 Points [80, 0; 0, -300] DstBlock "Concat" DstPort 7 } Line { SrcBlock "Match0" SrcPort 1 Points [90, 0; 0, -375] DstBlock "Concat" DstPort 8 } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Match_8b" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [10, 0] Branch { DstBlock "Concat" DstPort 1 } Branch { Points [0, 15] DstBlock "Concat" DstPort 2 } } } } Line { SrcBlock "RxByteAddr" SrcPort 1 DstBlock "Header Byte Matching" DstPort 1 } Line { SrcBlock "RxByte" SrcPort 1 DstBlock "Header Byte Matching" DstPort 2 } Line { SrcBlock "RxByteWE" SrcPort 1 DstBlock "Header Byte Matching" DstPort 3 } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Header Byte Matching" DstPort 4 } Line { SrcBlock "Action Combining" SrcPort 8 Points [35, 0; 0, 50] DstBlock "Flag A" DstPort 1 } Line { SrcBlock "Action Combining" SrcPort 9 Points [30, 0; 0, 80] DstBlock "Flag B" DstPort 1 } Line { SrcBlock "PktDone" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { Labels [0, 0] SrcBlock "Header Byte Matching" SrcPort 1 DstBlock "Action Decoding" DstPort 1 } Line { SrcBlock "Action Combining" SrcPort 1 DstBlock "AutoResponse I/O" DstPort 1 } Line { SrcBlock "Action Combining" SrcPort 5 DstBlock "AutoResponse I/O" DstPort 5 } Line { SrcBlock "Action Combining" SrcPort 6 DstBlock "AutoResponse I/O" DstPort 6 } Line { SrcBlock "Action Combining" SrcPort 7 DstBlock "AutoResponse I/O" DstPort 7 } Line { SrcBlock "Action Combining" SrcPort 2 DstBlock "AutoResponse I/O" DstPort 2 } Line { SrcBlock "Flag B" SrcPort 1 Points [45, 0] Branch { Points [0, 30; -445, 0; 0, -140] DstBlock "Action Decoding" DstPort 3 } Branch { DstBlock "Goto2" DstPort 1 } } Line { SrcBlock "Flag A" SrcPort 1 Points [50, 0] Branch { DstBlock "Goto1" DstPort 1 } Branch { Points [0, 85; -455, 0; 0, -190] DstBlock "Action Decoding" DstPort 2 } } Line { SrcBlock "Action Combining" SrcPort 3 DstBlock "AutoResponse I/O" DstPort 3 } Line { SrcBlock "Delay1" SrcPort 1 Points [80, 0; 0, -165] DstBlock "AutoResponse I/O" DstPort 8 } Line { SrcBlock "Delay2" SrcPort 1 Points [80, 0] Branch { Points [0, -50] Branch { DstBlock "Flag B" DstPort 2 } Branch { Points [0, -45] DstBlock "Flag A" DstPort 2 } } Branch { DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "Action Decoding" SrcPort 1 DstBlock "Action Combining" DstPort 1 } Line { SrcBlock "Action Decoding" SrcPort 2 DstBlock "Action Combining" DstPort 2 } Line { SrcBlock "Action Decoding" SrcPort 3 DstBlock "Action Combining" DstPort 3 } Line { SrcBlock "Action Decoding" SrcPort 4 DstBlock "Action Combining" DstPort 4 } Line { SrcBlock "Action Decoding" SrcPort 5 DstBlock "Action Combining" DstPort 5 } Line { SrcBlock "Action Decoding" SrcPort 6 DstBlock "Action Combining" DstPort 6 } Line { SrcBlock "Action Combining" SrcPort 4 DstBlock "AutoResponse I/O" DstPort 4 } Annotation { Position [1118, 720] } Annotation { Name "Delay to give pkt status bits time to assert\nbefore pktDone is asserted" Position [612, 552] } } } Block { BlockType SubSystem Name "BER Calc" SID "2930" Ports [5] Position [450, 203, 570, 287] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "BER Calc" Location [2, 78, 1678, 1000] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "BER_addr" SID "2931" Position [140, 78, 170, 92] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "BER_data" SID "2932" Position [345, 168, 375, 182] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "BER_val" SID "2933" Position [145, 113, 175, 127] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "PktStart" SID "2934" Position [90, 363, 120, 377] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "numBytes" SID "2935" Position [145, 163, 175, 177] Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "Accumulator" SID "2936" Ports [3, 1] Position [765, 600, 815, 650] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. Output type and binary point position match the input.

Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to run " "at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "32" overflow "Wrap" scale "1" rst on hasbypass off en on dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,449" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,50,3,1,white,blue,0,ee9eb47a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 50 50 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 50 50 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label" "('input',3,'en');\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprintf('','COMMENT: end ico" "n text');\n" } Block { BlockType Reference Name "AddSub" SID "2937" Ports [2, 1] Position [549, 385, 636, 425] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "87,40,2,1,white,blue,0,e139daf6,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 87 87 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 87 87 0 0 ],[0 0 40 40 0 ]);\npatch([31.875 39.1 44.1 49.1 54.1 44.1 36.875 31.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([36.875 44.1 39.1 31.875 36.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([31.875 39.1 44.1 36.875 31.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([36.875 54.1 49.1 44.1 39.1 31.875 36.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output'" ",1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "2938" Ports [2, 1] Position [639, 385, 726, 425] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "87,40,2,1,white,blue,0,e139daf6,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 87 87 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 87 87 0 0 ],[0 0 40 40 0 ]);\npatch([31.875 39.1 44.1 49.1 54.1 44.1 36.875 31.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([36.875 44.1 39.1 31.875 36.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([31.875 39.1 44.1 36.875 31.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([36.875 54.1 49.1 44.1 39.1 31.875 36.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output'" ",1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub2" SID "2939" Ports [2, 1] Position [729, 385, 816, 425] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "87,40,2,1,white,blue,0,e139daf6,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 87 87 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 87 87 0 0 ],[0 0 40 40 0 ]);\npatch([31.875 39.1 44.1 49.1 54.1 44.1 36.875 31.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([36.875 44.1 39.1 31.875 36.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([31.875 39.1 44.1 36.875 31.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([36.875 54.1 49.1 44.1 39.1 31.875 36.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output'" ",1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub3" SID "2940" Ports [2, 1] Position [819, 385, 906, 425] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "87,40,2,1,white,blue,0,e139daf6,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 87 87 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 87 87 0 0 ],[0 0 40 40 0 ]);\npatch([31.875 39.1 44.1 49.1 54.1 44.1 36.875 31.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([36.875 44.1 39.1 31.875 36.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([31.875 39.1 44.1 36.875 31.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([36.875 54.1 49.1 44.1 39.1 31.875 36.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output'" ",1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub4" SID "2941" Ports [2, 1] Position [619, 455, 706, 495] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "87,40,2,1,white,blue,0,e139daf6,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 87 87 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 87 87 0 0 ],[0 0 40 40 0 ]);\npatch([31.875 39.1 44.1 49.1 54.1 44.1 36.875 31.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([36.875 44.1 39.1 31.875 36.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([31.875 39.1 44.1 36.875 31.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([36.875 54.1 49.1 44.1 39.1 31.875 36.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output'" ",1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub5" SID "2942" Ports [2, 1] Position [754, 455, 841, 495] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "87,40,2,1,white,blue,0,e139daf6,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 87 87 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 87 87 0 0 ],[0 0 40 40 0 ]);\npatch([31.875 39.1 44.1 49.1 54.1 44.1 36.875 31.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([36.875 44.1 39.1 31.875 36.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([31.875 39.1 44.1 36.875 31.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([36.875 54.1 49.1 44.1 39.1 31.875 36.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output'" ",1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub6" SID "2943" Ports [2, 1] Position [684, 530, 771, 570] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "87,40,2,1,white,blue,0,e139daf6,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 87 87 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 87 87 0 0 ],[0 0 40 40 0 ]);\npatch([31.875 39.1 44.1 49.1 54.1 44.1 36.875 31.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([36.875 44.1 39.1 31.875 36.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([31.875 39.1 44.1 36.875 31.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([36.875 54.1 49.1 44.1 39.1 31.875 36.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output'" ",1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "BER" SID "2944" Ports [7] Position [1185, 32, 1215, 138] Floating off Location [11, 73, 1691, 1040] Open off NumInputPorts "7" ZoomMode "yonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "7000" YMin "960~3.8~7600~-1~80~0~7600" YMax "1070~4.2~8600~1~170~1~8600" SaveName "ScopeData57" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "BER Pkt Buffer" SID "2945" Ports [1, 1] Position [445, 65, 525, 105] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "BER Pkt Buffer" Location [160, 70, 1149, 960] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Addr" SID "2946" Position [470, 483, 500, 497] IconDisplay "Port number" } Block { BlockType Scope Name "ByteComp" SID "2947" Ports [3] Position [1095, 242, 1125, 328] Floating off Location [5, 45, 1925, 1171] Open off NumInputPorts "3" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" } TimeRange "6000 " YMin "0~0~22.5" YMax "32.5~250~55" SaveName "ScopeData80" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType From Name "From1" SID "2948" Position [130, 385, 290, 405] ShowName off CloseFcn "tagdialog Close" GotoTag "FlexBER_TxPktBuffBtyte_SIM" TagVisibility "global" } Block { BlockType From Name "From2" SID "2949" Position [130, 410, 290, 430] ShowName off CloseFcn "tagdialog Close" GotoTag "FlexBER_TxPktBuffBtyte_HW" TagVisibility "global" } Block { BlockType From Name "From3" SID "2950" Position [510, 330, 670, 350] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_FlexBERMode" TagVisibility "global" } Block { BlockType Reference Name "LSB" SID "2951" Ports [1, 1] Position [570, 480, 620, 500] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "log2(BER_RAM_init_size)" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "8.2.01" sg_icon_stat "50,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 20 20 0 ]);\npatch([20.55 23.44 25.44 27.44 29.44 25.44 22.55 20.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([22.55 25.44 23.44 20.55 22.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([20.55 23.44 25.44 22.55 20.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([22.55 29.44 27.44 25.44 23.44 20.55 22.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux" SID "2952" Ports [3, 1] Position [900, 323, 945, 427] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.2" sg_icon_stat "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 " "],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23." "32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14." "65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 " "52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66" " 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');" } Block { BlockType SubSystem Name "Read-only (non-PLB)\nBER Pkt Buffer" SID "2953" Ports [1, 1] Position [675, 465, 755, 515] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Read-only (non-PLB)\nBER Pkt Buffer" Location [197, 76, 1439, 808] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Addr" SID "2954" Position [120, 278, 150, 292] IconDisplay "Port number" } Block { BlockType Reference Name "Constant" SID "2955" Ports [0, 1] Position [310, 320, 335, 340] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12" ".22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12." "22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('out" "put',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Sim Only\nBER Pkt Buff" SID "2956" Ports [1, 1] Position [220, 266, 300, 304] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Sim Only\nBER Pkt Buff" Location [315, 125, 1300, 786] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Addr" SID "2957" Position [25, 163, 55, 177] IconDisplay "Port number" } Block { BlockType Reference Name "BER Pkt Buffer" SID "2958" Ports [1, 1] Position [135, 142, 195, 198] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "BER_RAM_init_size" initVector "BER_RAM_init_values" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "10.1.3" sg_icon_stat "60,56,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36" ".88 44.88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36." "88 28.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";\n" } Block { BlockType Reference Name "Disregard Subsystem" SID "2959" Tag "discardX" Ports [] Position [141, 25, 199, 83] ShowName off AttributesFormatString "Disregard Subsystem\\nFor Generation" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Disregard Subsystem" SourceType "Xilinx Disregard Subsystem For Generation Block" infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code gener" "ation. This block can be used in combination with the Simulation Multiplexer block to provide an alternative sim" "ulation model for another subsystem (e.g., to provide a simulation model for a black box)." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "disregard" block_version "10.1.3" sg_icon_stat "58,58,-1,-1,darkgray,black,0,0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 ],[0 0 58 58 ],[0.1 0.1 0.1])" ";\npatch([14 4 18 4 14 29 33 37 53 40 28 19 33 19 28 40 53 37 33 29 14 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 " "16 7 19 6 6 10 6 6 ],[0.33 0.33 0.33]);\nplot([0 58 58 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon gra" "phics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Byte" SID "2960" Position [260, 163, 290, 177] IconDisplay "Port number" } Line { SrcBlock "Addr" SrcPort 1 DstBlock "BER Pkt Buffer" DstPort 1 } Line { SrcBlock "BER Pkt Buffer" SrcPort 1 DstBlock "Byte" DstPort 1 } } } Block { BlockType Reference Name "Simulation Multiplexer" SID "2961" Ports [2, 1] Position [405, 264, 460, 351] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "20,20,336,197" block_type "simmux" block_version "10.1.3" sg_icon_stat "55,87,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 87 87 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 87 87 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[50" ".77 50.77 57.77 50.77 57.77 57.77 57.77 50.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[43.77 43." "77 50.77 50.77 43.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[36.77 36.77 43.77 43.7" "7 36.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[29.77 29.77 36.77 29.77 36.77 36.77" " 29.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\n\nfprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(" "swLineX,hwSwLineY);\n" } Block { BlockType Outport Name "Byte" SID "2962" Position [525, 303, 555, 317] IconDisplay "Port number" } Line { SrcBlock "Sim Only\nBER Pkt Buff" SrcPort 1 DstBlock "Simulation Multiplexer" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Simulation Multiplexer" DstPort 2 } Line { SrcBlock "Simulation Multiplexer" SrcPort 1 DstBlock "Byte" DstPort 1 } Line { SrcBlock "Addr" SrcPort 1 DstBlock "Sim Only\nBER Pkt Buff" DstPort 1 } } } Block { BlockType Reference Name "Simulation Multiplexer" SID "2963" Ports [2, 1] Position [430, 382, 480, 433] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "simmux" block_version "10.1.3" sg_icon_stat "50,51,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n" "\n\nfprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX" ",hwSwLineY);\n" } Block { BlockType Reference Name "done1" SID "2964" Ports [1, 1] Position [950, 280, 985, 290] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "2965" Ports [1, 1] Position [950, 310, 985, 320] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done8" SID "2966" Ports [1, 1] Position [950, 250, 985, 260] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Outport Name "ByteOut" SID "2967" Position [1065, 368, 1095, 382] IconDisplay "Port number" } Line { SrcBlock "Addr" SrcPort 1 DstBlock "LSB" DstPort 1 } Line { SrcBlock "LSB" SrcPort 1 Points [15, 0] Branch { DstBlock "Read-only (non-PLB)\nBER Pkt Buffer" DstPort 1 } Branch { Points [0, -175] DstBlock "done2" DstPort 1 } } Line { SrcBlock "Read-only (non-PLB)\nBER Pkt Buffer" SrcPort 1 Points [100, 0; 0, -115] Branch { DstBlock "Mux" DstPort 2 } Branch { Points [0, -120] DstBlock "done8" DstPort 1 } } Line { SrcBlock "From3" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "Simulation Multiplexer" SrcPort 1 Points [385, 0] Branch { DstBlock "Mux" DstPort 3 } Branch { Points [0, -125] DstBlock "done1" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "ByteOut" DstPort 1 } Line { SrcBlock "done8" SrcPort 1 DstBlock "ByteComp" DstPort 1 } Line { SrcBlock "done1" SrcPort 1 DstBlock "ByteComp" DstPort 2 } Line { SrcBlock "done2" SrcPort 1 DstBlock "ByteComp" DstPort 3 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Simulation Multiplexer" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Simulation Multiplexer" DstPort 2 } } } Block { BlockType SubSystem Name "BER WEn" SID "2968" Ports [3, 1] Position [235, 95, 315, 145] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "BER WEn" Location [234, 132, 496, 221] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "104" Block { BlockType Inport Name "BER_addr" SID "2969" Position [260, 183, 290, 197] IconDisplay "Port number" } Block { BlockType Inport Name "BER_val" SID "2970" Position [1025, 218, 1055, 232] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "numBytes" SID "2971" Position [260, 143, 290, 157] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "2972" Ports [2, 1] Position [505, 452, 545, 488] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,36,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a" " - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub2" SID "2973" Ports [2, 1] Position [405, 292, 445, 328] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,36,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a" " - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub3" SID "2974" Ports [2, 1] Position [405, 252, 445, 288] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,36,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a" " - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub6" SID "2975" Ports [2, 1] Position [515, 142, 555, 178] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,36,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a" " - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "2976" Ports [0, 1] Position [435, 160, 460, 180] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "4" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,20,0,1,white,blue,0,85f36853,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12" ".22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12." "22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('out" "put',1,'4');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "2977" Ports [0, 1] Position [425, 470, 450, 490] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,20,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12" ".22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12." "22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('out" "put',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "2978" Ports [0, 1] Position [345, 310, 370, 330] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,20,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12" ".22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12." "22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('out" "put',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant3" SID "2979" Ports [0, 1] Position [345, 270, 370, 290] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,20,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12" ".22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12." "22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('out" "put',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "2980" Position [970, 263, 1060, 287] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType From Name "From2" SID "2981" Position [160, 392, 320, 408] ShowName off CloseFcn "tagdialog Close" GotoTag "regTxRx_numHeaderBytes" TagVisibility "global" } Block { BlockType From Name "From3" SID "2982" Position [255, 62, 415, 78] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_BERignoreHeader" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "2983" Ports [1, 1] Position [1080, 265, 1110, 285] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "2984" Ports [1, 1] Position [695, 340, 725, 360] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "2985" Ports [1, 1] Position [760, 95, 790, 115] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "2986" Ports [5, 1] Position [860, 146, 895, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "5" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,88,5,1,white,blue,0,2904cdfe,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 88 88 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 88 88 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[49.55 49." "55 54.55 49.55 54.55 54.55 54.55 49.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[44.55 44.55 49.55 4" "9.55 44.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[39.55 39.55 44.55 44.55 39.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[34.55 34.55 39.55 34.55 39.55 39.55 34.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\nco" "lor('black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical2" SID "2987" Ports [2, 1] Position [955, 188, 990, 232] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 44 44 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "2988" Ports [3, 1] Position [865, 328, 900, 372] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,44,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 44 44 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "2989" Ports [2, 1] Position [690, 83, 725, 127] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 44 44 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "2990" Ports [3, 1] Position [1140, 203, 1175, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,44,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 44 44 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "2991" Ports [2, 1] Position [600, 146, 650, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,58,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 58 58 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 58 58 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[36.7" "7 36.77 43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[29.77 29.77 " "36.77 36.77 29.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[22.77 22.77 29.77 29.77 22." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[15.77 15.77 22.77 15.77 22.77 22.77 15.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "2992" Ports [2, 1] Position [470, 379, 515, 406] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,27,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 27 27 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label(" "'output',1,'\\bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "2993" Ports [2, 1] Position [605, 456, 655, 514] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,58,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 58 58 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 58 58 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[36.7" "7 36.77 43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[29.77 29.77 " "36.77 36.77 29.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[22.77 22.77 29.77 29.77 22." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[15.77 15.77 22.77 15.77 22.77 22.77 15.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "2994" Ports [2, 1] Position [490, 249, 535, 276] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a!=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,27,2,1,white,blue,0,850de6e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 27 27 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label(" "'output',1,'\\bfa \\neq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "2995" Ports [2, 1] Position [490, 289, 535, 316] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a!=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,27,2,1,white,blue,0,850de6e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 27 27 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label(" "'output',1,'\\bfa \\neq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational5" SID "2996" Ports [2, 1] Position [605, 95, 645, 135] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "Rx Bytes" SID "2997" Ports [5] Position [1200, 634, 1250, 706] Floating off Location [280, 59, 1648, 1023] Open off NumInputPorts "5" ZoomMode "yonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" } TimeRange "1800" YMin "0~50~24~15549.6~-1" YMax "1~275~30~17186.4~1" SaveName "ScopeData3" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "done1" SID "2998" Ports [1, 1] Position [1125, 665, 1160, 675] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "2999" Ports [1, 1] Position [1125, 680, 1160, 690] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done6" SID "3000" Ports [1, 1] Position [1125, 635, 1160, 645] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done7" SID "3001" Ports [1, 1] Position [1125, 650, 1160, 660] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done9" SID "3002" Ports [1, 1] Position [1125, 695, 1160, 705] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Outport Name "Vout" SID "3003" Position [1230, 218, 1260, 232] IconDisplay "Port number" } Line { SrcBlock "Inverter" SrcPort 1 Points [0, -35] DstBlock "Logical8" DstPort 3 } Line { SrcBlock "BER_val" SrcPort 1 DstBlock "Logical8" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub6" DstPort 2 } Line { SrcBlock "numBytes" SrcPort 1 Points [40, 0] Branch { DstBlock "AddSub6" DstPort 1 } Branch { Points [0, 235] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 75] Branch { DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 180] DstBlock "done6" DstPort 1 } } } } Line { SrcBlock "AddSub6" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "BER_addr" SrcPort 1 Points [180, 0] Branch { Points [75, 0] Branch { Points [0, 310] DstBlock "Relational2" DstPort 2 } Branch { Points [25, 0] Branch { DstBlock "Relational" DstPort 2 } Branch { Points [0, -65] DstBlock "Relational5" DstPort 2 } } } Branch { Points [0, 65] Branch { DstBlock "Relational3" DstPort 1 } Branch { DstBlock "Relational4" DstPort 1 } } } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "Vout" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 Points [60, 0] Branch { DstBlock "Relational1" DstPort 2 } Branch { Points [0, -100] Branch { DstBlock "AddSub2" DstPort 1 } Branch { Points [0, -40] Branch { DstBlock "AddSub3" DstPort 1 } Branch { Points [0, -155] DstBlock "Relational5" DstPort 1 } } } Branch { Points [0, 255] DstBlock "done7" DstPort 1 } } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Relational1" SrcPort 1 Points [155, 0; 0, -45] Branch { DstBlock "Inverter1" DstPort 1 } Branch { Points [0, -130] DstBlock "Logical1" DstPort 5 } } Line { SrcBlock "Logical1" SrcPort 1 Points [0, 10; 15, 0] Branch { DstBlock "Logical2" DstPort 1 } Branch { Points [0, 470] DstBlock "done1" DstPort 1 } } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Relational2" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 Points [55, 0; 0, -120] DstBlock "Logical3" DstPort 3 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 Points [20, 0; 0, -130] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Logical8" DstPort 1 } Line { SrcBlock "AddSub3" SrcPort 1 Points [15, 0] Branch { DstBlock "Relational3" DstPort 2 } Branch { Points [0, 415] DstBlock "done2" DstPort 1 } } Line { SrcBlock "AddSub2" SrcPort 1 Points [5, 0] Branch { DstBlock "Relational4" DstPort 2 } Branch { Points [0, 390] DstBlock "done9" DstPort 1 } } Line { SrcBlock "Relational3" SrcPort 1 Points [115, 0; 0, -75] DstBlock "Logical1" DstPort 3 } Line { SrcBlock "Relational4" SrcPort 1 Points [125, 0; 0, -100] DstBlock "Logical1" DstPort 4 } Line { SrcBlock "done6" SrcPort 1 DstBlock "Rx Bytes" DstPort 1 } Line { SrcBlock "done7" SrcPort 1 DstBlock "Rx Bytes" DstPort 2 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Rx Bytes" DstPort 3 } Line { SrcBlock "done9" SrcPort 1 DstBlock "Rx Bytes" DstPort 5 } Line { SrcBlock "done2" SrcPort 1 DstBlock "Rx Bytes" DstPort 4 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "From3" SrcPort 1 Points [255, 0] DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Relational5" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Inverter2" DstPort 1 } Line { SrcBlock "Inverter2" SrcPort 1 Points [25, 0; 0, 55] Branch { Points [0, 0] DstBlock "Logical1" DstPort 1 } Branch { Points [0, 175] DstBlock "Logical3" DstPort 1 } } Annotation { Name "Calculate the BER of all bytes except checksum bytes.\nThere are up to 6 checksum bytes:\nLast two by" "tes of the header\nLast four bytes of the paylaod IFF there are any payload bytes after the header" Position [1294, 186] HorizontalAlignment "left" } } } Block { BlockType Reference Name "Constant" SID "3004" Ports [0, 1] Position [785, 715, 810, 735] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,20,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12" ".22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12." "22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('out" "put',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "3005" Ports [1, 1] Position [559, 335, 581, 365] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "22,30,1,1,white,blue,0,edca21da,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 22 22 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 22 22 0 0 ],[0 0 30 30 0 ]);\npatch([4.325 8.66 11.66 14.66 17.66 11.66 7.325 4.325 ],[18.33 " "18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([7.325 11.66 8.66 4.325 7.325 ],[15.33 15.33 18.33" " 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([4.325 8.66 11.66 7.325 4.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1" " 1 1 ]);\npatch([7.325 17.66 14.66 11.66 8.66 4.325 7.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black'" ");port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "3006" Ports [1, 1] Position [604, 335, 626, 365] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "22,30,1,1,white,blue,0,edca21da,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 22 22 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 22 22 0 0 ],[0 0 30 30 0 ]);\npatch([4.325 8.66 11.66 14.66 17.66 11.66 7.325 4.325 ],[18.33 " "18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([7.325 11.66 8.66 4.325 7.325 ],[15.33 15.33 18.33" " 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([4.325 8.66 11.66 7.325 4.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1" " 1 1 ]);\npatch([7.325 17.66 14.66 11.66 8.66 4.325 7.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black'" ");port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "3007" Ports [1, 1] Position [649, 335, 671, 365] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "22,30,1,1,white,blue,0,edca21da,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 22 22 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 22 22 0 0 ],[0 0 30 30 0 ]);\npatch([4.325 8.66 11.66 14.66 17.66 11.66 7.325 4.325 ],[18.33 " "18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([7.325 11.66 8.66 4.325 7.325 ],[15.33 15.33 18.33" " 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([4.325 8.66 11.66 7.325 4.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1" " 1 1 ]);\npatch([7.325 17.66 14.66 11.66 8.66 4.325 7.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black'" ");port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "3008" Ports [1, 1] Position [694, 335, 716, 365] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "22,30,1,1,white,blue,0,edca21da,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 22 22 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 22 22 0 0 ],[0 0 30 30 0 ]);\npatch([4.325 8.66 11.66 14.66 17.66 11.66 7.325 4.325 ],[18.33 " "18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([7.325 11.66 8.66 4.325 7.325 ],[15.33 15.33 18.33" " 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([4.325 8.66 11.66 7.325 4.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1" " 1 1 ]);\npatch([7.325 17.66 14.66 11.66 8.66 4.325 7.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black'" ");port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "3009" Ports [1, 1] Position [739, 335, 761, 365] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "22,30,1,1,white,blue,0,edca21da,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 22 22 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 22 22 0 0 ],[0 0 30 30 0 ]);\npatch([4.325 8.66 11.66 14.66 17.66 11.66 7.325 4.325 ],[18.33 " "18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([7.325 11.66 8.66 4.325 7.325 ],[15.33 15.33 18.33" " 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([4.325 8.66 11.66 7.325 4.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1" " 1 1 ]);\npatch([7.325 17.66 14.66 11.66 8.66 4.325 7.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black'" ");port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert5" SID "3010" Ports [1, 1] Position [784, 335, 806, 365] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "22,30,1,1,white,blue,0,edca21da,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 22 22 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 22 22 0 0 ],[0 0 30 30 0 ]);\npatch([4.325 8.66 11.66 14.66 17.66 11.66 7.325 4.325 ],[18.33 " "18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([7.325 11.66 8.66 4.325 7.325 ],[15.33 15.33 18.33" " 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([4.325 8.66 11.66 7.325 4.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1" " 1 1 ]);\npatch([7.325 17.66 14.66 11.66 8.66 4.325 7.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black'" ");port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert6" SID "3011" Ports [1, 1] Position [829, 335, 851, 365] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "22,30,1,1,white,blue,0,edca21da,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 22 22 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 22 22 0 0 ],[0 0 30 30 0 ]);\npatch([4.325 8.66 11.66 14.66 17.66 11.66 7.325 4.325 ],[18.33 " "18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([7.325 11.66 8.66 4.325 7.325 ],[15.33 15.33 18.33" " 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([4.325 8.66 11.66 7.325 4.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1" " 1 1 ]);\npatch([7.325 17.66 14.66 11.66 8.66 4.325 7.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black'" ");port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "3012" Ports [1, 1] Position [874, 335, 896, 365] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "22,30,1,1,white,blue,0,edca21da,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 22 22 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 22 22 0 0 ],[0 0 30 30 0 ]);\npatch([4.325 8.66 11.66 14.66 17.66 11.66 7.325 4.325 ],[18.33 " "18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([7.325 11.66 8.66 4.325 7.325 ],[15.33 15.33 18.33" " 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([4.325 8.66 11.66 7.325 4.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1" " 1 1 ]);\npatch([7.325 17.66 14.66 11.66 8.66 4.325 7.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black'" ");port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter" SID "3013" Ports [2, 1] Position [361, 435, 414, 485] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "8" arith_type "Unsigned" n_bits "48" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,630" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "53,50,2,1,white,blue,0,ae3608d6,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 53 53 0 0 ],[0 0 50 50 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 53 53 0 0 ],[0 0 50 50 0 ]);\npatch([10.425 20.54 27.54 34.54 41.54 27.54 17.425 10.425 ],[32" ".77 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([17.425 27.54 20.54 10.425 17.425 ],[25.77 25." "77 32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([10.425 20.54 27.54 17.425 10.425 ],[18.77 18.77 25.77 25.7" "7 18.77 ],[1 1 1 ]);\npatch([17.425 41.54 34.54 27.54 20.54 10.425 17.425 ],[11.77 11.77 18.77 11.77 18.77 18.77" " 11.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');d" "isp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay" SID "3014" Ports [1, 1] Position [387, 240, 413, 275] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,35,1,1,white,blue,0,07b98262,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 26 26 0 0 ],[0 0 35 35 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[20.33" " 20.33 23.33 20.33 23.33 23.33 23.33 20.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[17.33 17.33 20." "33 20.33 17.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[14.33 14.33 17.33 17.33 14.33 ]" ",[1 1 1 ]);\npatch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[11.33 11.33 14.33 11.33 14.33 14.33 11.33 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncol" "or('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "3015" Ports [1, 1] Position [460, 162, 495, 188] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "3016" Ports [2, 1] Position [870, 574, 905, 601] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en on latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,27,2,1,white,blue,0,7c0ac154,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 27 27 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMME" "NT: end icon text');\n" } Block { BlockType Reference Name "Delay3" SID "3017" Ports [2, 1] Position [930, 144, 965, 171] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en on latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,27,2,1,white,blue,0,7c0ac154,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 27 27 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMME" "NT: end icon text');\n" } Block { BlockType Reference Name "Delay5" SID "3018" Ports [1, 1] Position [930, 71, 965, 99] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "3019" Position [80, 335, 195, 355] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_BER_perPktReset" TagVisibility "global" } Block { BlockType From Name "From2" SID "3020" Position [160, 409, 240, 431] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType From Name "From3" SID "3021" Position [160, 390, 275, 410] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_BER_reset" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "3022" Position [1050, 692, 1205, 708] ShowName off GotoTag "regRx_BER_Errors" TagVisibility "global" } Block { BlockType Goto Name "Goto4" SID "3023" Position [1050, 717, 1205, 733] ShowName off GotoTag "regRx_BER_ErrorsEn" TagVisibility "global" } Block { BlockType Goto Name "Goto5" SID "3024" Position [1050, 777, 1205, 793] ShowName off GotoTag "regRx_BER_TotalBits" TagVisibility "global" } Block { BlockType Goto Name "Goto6" SID "3025" Position [1050, 757, 1205, 773] ShowName off GotoTag "regRx_BER_TotalBitsEn" TagVisibility "global" } Block { BlockType Reference Name "Logical" SID "3026" Ports [2, 1] Position [553, 275, 582, 310] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "29,35,2,1,white,blue,0,dc21e094,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 29 29 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 29 29 0 0 ],[0 0 35 35 0 ]);\npatch([5.1 10.88 14.88 18.88 22.88 14.88 9.1 5.1 ],[21.44 21.44" " 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([9.1 14.88 10.88 5.1 9.1 ],[17.44 17.44 21.44 21.44 17." "44 ],[0.931 0.946 0.973 ]);\npatch([5.1 10.88 14.88 9.1 5.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\npatch" "([9.1 22.88 18.88 14.88 10.88 5.1 9.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('xor');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "3027" Ports [2, 1] Position [598, 275, 627, 310] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "29,35,2,1,white,blue,0,dc21e094,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 29 29 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 29 29 0 0 ],[0 0 35 35 0 ]);\npatch([5.1 10.88 14.88 18.88 22.88 14.88 9.1 5.1 ],[21.44 21.44" " 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([9.1 14.88 10.88 5.1 9.1 ],[17.44 17.44 21.44 21.44 17." "44 ],[0.931 0.946 0.973 ]);\npatch([5.1 10.88 14.88 9.1 5.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\npatch" "([9.1 22.88 18.88 14.88 10.88 5.1 9.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('xor');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "3028" Ports [2, 1] Position [643, 275, 672, 310] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "29,35,2,1,white,blue,0,dc21e094,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 29 29 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 29 29 0 0 ],[0 0 35 35 0 ]);\npatch([5.1 10.88 14.88 18.88 22.88 14.88 9.1 5.1 ],[21.44 21.44" " 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([9.1 14.88 10.88 5.1 9.1 ],[17.44 17.44 21.44 21.44 17." "44 ],[0.931 0.946 0.973 ]);\npatch([5.1 10.88 14.88 9.1 5.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\npatch" "([9.1 22.88 18.88 14.88 10.88 5.1 9.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('xor');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "3029" Ports [2, 1] Position [688, 275, 717, 310] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "29,35,2,1,white,blue,0,dc21e094,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 29 29 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 29 29 0 0 ],[0 0 35 35 0 ]);\npatch([5.1 10.88 14.88 18.88 22.88 14.88 9.1 5.1 ],[21.44 21.44" " 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([9.1 14.88 10.88 5.1 9.1 ],[17.44 17.44 21.44 21.44 17." "44 ],[0.931 0.946 0.973 ]);\npatch([5.1 10.88 14.88 9.1 5.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\npatch" "([9.1 22.88 18.88 14.88 10.88 5.1 9.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('xor');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "3030" Ports [2, 1] Position [733, 275, 762, 310] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "29,35,2,1,white,blue,0,dc21e094,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 29 29 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 29 29 0 0 ],[0 0 35 35 0 ]);\npatch([5.1 10.88 14.88 18.88 22.88 14.88 9.1 5.1 ],[21.44 21.44" " 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([9.1 14.88 10.88 5.1 9.1 ],[17.44 17.44 21.44 21.44 17." "44 ],[0.931 0.946 0.973 ]);\npatch([5.1 10.88 14.88 9.1 5.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\npatch" "([9.1 22.88 18.88 14.88 10.88 5.1 9.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('xor');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "3031" Ports [2, 1] Position [778, 275, 807, 310] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "29,35,2,1,white,blue,0,dc21e094,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 29 29 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 29 29 0 0 ],[0 0 35 35 0 ]);\npatch([5.1 10.88 14.88 18.88 22.88 14.88 9.1 5.1 ],[21.44 21.44" " 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([9.1 14.88 10.88 5.1 9.1 ],[17.44 17.44 21.44 21.44 17." "44 ],[0.931 0.946 0.973 ]);\npatch([5.1 10.88 14.88 9.1 5.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\npatch" "([9.1 22.88 18.88 14.88 10.88 5.1 9.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('xor');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "3032" Ports [2, 1] Position [823, 275, 852, 310] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "29,35,2,1,white,blue,0,dc21e094,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 29 29 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 29 29 0 0 ],[0 0 35 35 0 ]);\npatch([5.1 10.88 14.88 18.88 22.88 14.88 9.1 5.1 ],[21.44 21.44" " 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([9.1 14.88 10.88 5.1 9.1 ],[17.44 17.44 21.44 21.44 17." "44 ],[0.931 0.946 0.973 ]);\npatch([5.1 10.88 14.88 9.1 5.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\npatch" "([9.1 22.88 18.88 14.88 10.88 5.1 9.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('xor');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "3033" Ports [2, 1] Position [868, 275, 897, 310] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "29,35,2,1,white,blue,0,dc21e094,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 29 29 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 29 29 0 0 ],[0 0 35 35 0 ]);\npatch([5.1 10.88 14.88 18.88 22.88 14.88 9.1 5.1 ],[21.44 21.44" " 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([9.1 14.88 10.88 5.1 9.1 ],[17.44 17.44 21.44 21.44 17." "44 ],[0.931 0.946 0.973 ]);\npatch([5.1 10.88 14.88 9.1 5.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\npatch" "([9.1 22.88 18.88 14.88 10.88 5.1 9.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('xor');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "3034" Ports [2, 1] Position [245, 334, 275, 381] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[4 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,47,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 47 47 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 47 47 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[27.44 27.4" "4 31.44 27.44 31.44 31.44 31.44 27.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[23.44 23.44 27.44 27.44 " "23.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 23.44 19.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 15.44 19.44 19.44 15.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "3035" Ports [3, 1] Position [310, 367, 340, 433] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[4 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,66,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 66 66 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 66 66 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[37.44 37.4" "4 41.44 37.44 41.44 41.44 41.44 37.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[33.44 33.44 37.44 37.44 " "33.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[29.44 29.44 33.44 33.44 29.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[25.44 25.44 29.44 25.44 29.44 29.44 25.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');di" "sp('or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Slice" SID "3036" Ports [1, 1] Position [552, 215, 568, 240] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice1" SID "3037" Ports [1, 1] Position [597, 215, 613, 240] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-1" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice10" SID "3038" Ports [1, 1] Position [702, 215, 718, 240] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-3" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice11" SID "3039" Ports [1, 1] Position [657, 215, 673, 240] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-2" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice12" SID "3040" Ports [1, 1] Position [747, 215, 763, 240] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-4" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice13" SID "3041" Ports [1, 1] Position [792, 215, 808, 240] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-5" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice14" SID "3042" Ports [1, 1] Position [882, 215, 898, 240] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-7" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice15" SID "3043" Ports [1, 1] Position [837, 215, 853, 240] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-6" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice16" SID "3044" Ports [1, 1] Position [317, 520, 333, 545] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "32" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice17" SID "3045" Ports [1, 1] Position [432, 520, 448, 545] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice2" SID "3046" Ports [1, 1] Position [687, 215, 703, 240] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-3" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice3" SID "3047" Ports [1, 1] Position [642, 215, 658, 240] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-2" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice4" SID "3048" Ports [1, 1] Position [732, 215, 748, 240] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-4" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice5" SID "3049" Ports [1, 1] Position [777, 215, 793, 240] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-5" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice6" SID "3050" Ports [1, 1] Position [867, 215, 883, 240] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-7" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice7" SID "3051" Ports [1, 1] Position [822, 215, 838, 240] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-6" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice8" SID "3052" Ports [1, 1] Position [567, 215, 583, 240] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice9" SID "3053" Ports [1, 1] Position [612, 215, 628, 240] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-1" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,25,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 25 25 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[14.22 14.22" " 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[12.22 12.22 14.22 14.22 12" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npat" "ch([5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('out" "put',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample" SID "3054" Ports [1, 1] Position [865, 686, 895, 714] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "3055" Ports [1, 1] Position [865, 771, 895, 799] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done1" SID "3056" Ports [1, 1] Position [1040, 80, 1075, 90] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Expected Byte" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done2" SID "3057" Ports [1, 1] Position [1040, 95, 1075, 105] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Rx Byte" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done3" SID "3058" Ports [1, 1] Position [1040, 110, 1075, 120] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Rx Byte WE" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done4" SID "3059" Ports [1, 1] Position [1040, 125, 1075, 135] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done7" SID "3060" Ports [1, 1] Position [1040, 65, 1075, 75] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Total Bits" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done8" SID "3061" Ports [1, 1] Position [1040, 35, 1075, 45] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Byte Addr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done9" SID "3062" Ports [1, 1] Position [1040, 50, 1075, 60] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Errors in Byte" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Line { SrcBlock "Delay" SrcPort 1 Points [0, 100] Branch { DstBlock "Counter" DstPort 2 } Branch { Points [125, 0; 0, 260; 205, 0] Branch { DstBlock "Accumulator" DstPort 3 } Branch { Points [0, 30; 125, 0] DstBlock "Delay2" DstPort 2 } } } Line { SrcBlock "Slice16" SrcPort 1 Points [0, 235; 505, 0] Branch { DstBlock "Up Sample1" DstPort 1 } Branch { Points [0, -140; 165, 0; 0, -575] DstBlock "done7" DstPort 1 } } Line { SrcBlock "Counter" SrcPort 1 Points [0, 15] Branch { DstBlock "Slice17" DstPort 1 } Branch { DstBlock "Slice16" DstPort 1 } } Line { SrcBlock "BER WEn" SrcPort 1 Points [80, 0] Branch { Points [505, 0] Branch { Points [120, 0] DstBlock "done3" DstPort 1 } Branch { Points [0, 45] DstBlock "Delay3" DstPort 2 } } Branch { DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Convert7" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "Convert6" SrcPort 1 DstBlock "AddSub3" DstPort 1 } Line { SrcBlock "Convert5" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Convert4" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Accumulator" SrcPort 1 Points [25, 0; 0, 75] DstBlock "Up Sample" DstPort 1 } Line { SrcBlock "AddSub6" SrcPort 1 Points [0, 5] Branch { Points [0, 30] DstBlock "Accumulator" DstPort 1 } Branch { DstBlock "Delay2" DstPort 1 } } Line { SrcBlock "AddSub5" SrcPort 1 Points [0, 15] DstBlock "AddSub6" DstPort 2 } Line { SrcBlock "AddSub4" SrcPort 1 Points [0, 15] DstBlock "AddSub6" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "AddSub4" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 10] DstBlock "AddSub4" DstPort 1 } Line { SrcBlock "AddSub3" SrcPort 1 Points [-45, 0] DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "AddSub5" DstPort 1 } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Convert6" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "Convert5" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Convert4" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Slice14" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Slice6" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "Slice15" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "Slice7" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Slice13" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Slice5" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "Slice12" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Slice4" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Slice10" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Slice2" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Slice11" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Slice3" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Slice9" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Slice1" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Slice8" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "BER_data" SrcPort 1 Points [35, 0] Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, -25] DstBlock "Delay3" DstPort 1 } } Line { SrcBlock "BER_addr" SrcPort 1 Points [40, 0] Branch { Points [180, 0] Branch { Points [0, -45] DstBlock "done8" DstPort 1 } Branch { DstBlock "BER Pkt Buffer" DstPort 1 } } Branch { Points [0, 20] DstBlock "BER WEn" DstPort 1 } } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical9" DstPort 2 } Line { SrcBlock "Logical9" SrcPort 1 Points [30, 0] Branch { DstBlock "Counter" DstPort 1 } Branch { Points [165, 0; 0, 225] DstBlock "Accumulator" DstPort 2 } } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical9" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 Points [200, 0] Branch { DstBlock "Goto4" DstPort 1 } Branch { Points [0, 40] DstBlock "Goto6" DstPort 1 } } Line { SrcBlock "Up Sample" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 Points [125, 0] Branch { DstBlock "Goto5" DstPort 1 } Branch { DstBlock "done4" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 Points [75, 0] Branch { Points [45, 0] Branch { Points [45, 0] Branch { DstBlock "Slice11" DstPort 1 } Branch { Points [45, 0] Branch { Points [45, 0] Branch { Points [45, 0] Branch { Points [45, 0] Branch { DstBlock "Slice15" DstPort 1 } Branch { Points [45, 0] DstBlock "Slice14" DstPort 1 } } Branch { DstBlock "Slice13" DstPort 1 } } Branch { DstBlock "Slice12" DstPort 1 } } Branch { DstBlock "Slice10" DstPort 1 } } } Branch { DstBlock "Slice9" DstPort 1 } } Branch { DstBlock "Slice8" DstPort 1 } } Line { SrcBlock "Delay2" SrcPort 1 Points [75, 0; 0, -535] DstBlock "done9" DstPort 1 } Line { SrcBlock "BER Pkt Buffer" SrcPort 1 Points [30, 0] Branch { Points [45, 0] Branch { DstBlock "Slice1" DstPort 1 } Branch { Points [45, 0] Branch { DstBlock "Slice3" DstPort 1 } Branch { Points [45, 0] Branch { DstBlock "Slice2" DstPort 1 } Branch { Points [45, 0] Branch { DstBlock "Slice4" DstPort 1 } Branch { Points [45, 0] Branch { DstBlock "Slice5" DstPort 1 } Branch { Points [45, 0] Branch { DstBlock "Slice7" DstPort 1 } Branch { Points [45, 0] Branch { DstBlock "Slice6" DstPort 1 } Branch { DstBlock "Delay5" DstPort 1 } } } } } } } } Branch { DstBlock "Slice" DstPort 1 } } Line { Name "Byte Addr" Labels [-1, 0] SrcBlock "done8" SrcPort 1 DstBlock "BER" DstPort 1 } Line { Name "Errors in Byte" Labels [-1, 0] SrcBlock "done9" SrcPort 1 DstBlock "BER" DstPort 2 } Line { Name "Total Bits" Labels [-1, 0] SrcBlock "done7" SrcPort 1 DstBlock "BER" DstPort 3 } Line { Name "Expected Byte" Labels [-1, 0] SrcBlock "done1" SrcPort 1 DstBlock "BER" DstPort 4 } Line { Name "Rx Byte" Labels [-1, 0] SrcBlock "done2" SrcPort 1 DstBlock "BER" DstPort 5 } Line { Name "Rx Byte WE" Labels [-1, 0] SrcBlock "done3" SrcPort 1 DstBlock "BER" DstPort 6 } Line { SrcBlock "Delay3" SrcPort 1 Points [35, 0; 0, -60] DstBlock "done2" DstPort 1 } Line { SrcBlock "Delay5" SrcPort 1 DstBlock "done1" DstPort 1 } Line { SrcBlock "BER_val" SrcPort 1 DstBlock "BER WEn" DstPort 2 } Line { SrcBlock "numBytes" SrcPort 1 Points [20, 0; 0, -35] DstBlock "BER WEn" DstPort 3 } Line { SrcBlock "PktStart" SrcPort 1 DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Logical8" SrcPort 1 Points [0, 20] DstBlock "Logical9" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical8" DstPort 1 } Line { SrcBlock "done4" SrcPort 1 DstBlock "BER" DstPort 7 } Annotation { Position [1200, 54] } } } Block { BlockType SubSystem Name "Descrambling\n& Pkt Buffer" SID "3063" Ports [3, 3] Position [205, 207, 295, 253] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Descrambling\n& Pkt Buffer" Location [2, 82, 1678, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Addr" SID "3064" Position [185, 443, 215, 457] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Data" SID "3065" Position [185, 468, 215, 482] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "We" SID "3066" Position [225, 493, 255, 507] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "3LSB" SID "3067" Ports [1, 1] Position [865, 195, 910, 215] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "3" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "8.2.02" sg_icon_stat "45,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "BRAM WEn\nDecoding" SID "3068" Ports [2, 1] Position [840, 316, 925, 349] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "BRAM WEn\nDecoding" Location [538, 82, 1585, 678] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Byte Addr" SID "3069" Position [465, 103, 495, 117] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "WrEn" SID "3070" Position [160, 448, 190, 462] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "3LSB" SID "3071" Ports [1, 1] Position [585, 100, 630, 120] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "3" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "45,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "3072" Ports [8, 1] Position [890, 147, 925, 393] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "8" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.02" sg_icon_stat "35,246,8,1,white,blue,0,6fe74153,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 246 246 0 ],[0.77 0." "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 246 246 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[128.5" "5 128.55 133.55 128.55 133.55 133.55 133.55 128.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[123.55 " "123.55 128.55 128.55 123.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[118.55 118.55 123.5" "5 123.55 118.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[113.55 113.55 118.55 113.55 118." "55 118.55 113.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin" " icon text');\ncolor('black');port_label('input',1,'hi');\n\n\n\n\n\n\ncolor('black');port_label('input',8,'lo')" ";\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant1" SID "3073" Ports [0, 1] Position [575, 149, 595, 171] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "8.2.02" sg_icon_stat "20,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[13.22 13." "22 15.22 13.22 15.22 15.22 15.22 13.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[11.22 11.22 13.22 13.22" " 11.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[9.22 9.22 11.22 11.22 9.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 7.22 9.22 9.22 7.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output" "',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "3074" Ports [0, 1] Position [575, 179, 595, 201] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "8.2.02" sg_icon_stat "20,22,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[13.22 13." "22 15.22 13.22 15.22 15.22 15.22 13.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[11.22 11.22 13.22 13.22" " 11.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[9.22 9.22 11.22 11.22 9.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 7.22 9.22 9.22 7.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output" "',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant3" SID "3075" Ports [0, 1] Position [575, 209, 595, 231] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "8.2.02" sg_icon_stat "20,22,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[13.22 13." "22 15.22 13.22 15.22 15.22 15.22 13.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[11.22 11.22 13.22 13.22" " 11.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[9.22 9.22 11.22 11.22 9.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 7.22 9.22 9.22 7.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output" "',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant4" SID "3076" Ports [0, 1] Position [575, 239, 595, 261] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "3" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "8.2.02" sg_icon_stat "20,22,0,1,white,blue,0,279a71c8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[13.22 13." "22 15.22 13.22 15.22 15.22 15.22 13.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[11.22 11.22 13.22 13.22" " 11.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[9.22 9.22 11.22 11.22 9.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 7.22 9.22 9.22 7.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output" "',1,'3');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant5" SID "3077" Ports [0, 1] Position [575, 269, 595, 291] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "4" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "8.2.02" sg_icon_stat "20,22,0,1,white,blue,0,85f36853,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[13.22 13." "22 15.22 13.22 15.22 15.22 15.22 13.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[11.22 11.22 13.22 13.22" " 11.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[9.22 9.22 11.22 11.22 9.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 7.22 9.22 9.22 7.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output" "',1,'4');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant6" SID "3078" Ports [0, 1] Position [575, 299, 595, 321] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "5" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "8.2.02" sg_icon_stat "20,22,0,1,white,blue,0,98872051,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[13.22 13." "22 15.22 13.22 15.22 15.22 15.22 13.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[11.22 11.22 13.22 13.22" " 11.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[9.22 9.22 11.22 11.22 9.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 7.22 9.22 9.22 7.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output" "',1,'5');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant7" SID "3079" Ports [0, 1] Position [575, 329, 595, 351] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "6" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "8.2.02" sg_icon_stat "20,22,0,1,white,blue,0,f0403ad7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[13.22 13." "22 15.22 13.22 15.22 15.22 15.22 13.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[11.22 11.22 13.22 13.22" " 11.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[9.22 9.22 11.22 11.22 9.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 7.22 9.22 9.22 7.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output" "',1,'6');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant8" SID "3080" Ports [0, 1] Position [575, 359, 595, 381] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "7" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "8.2.02" sg_icon_stat "20,22,0,1,white,blue,0,2a6960a5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[13.22 13." "22 15.22 13.22 15.22 15.22 15.22 13.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[11.22 11.22 13.22 13.22" " 11.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[9.22 9.22 11.22 11.22 9.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 7.22 9.22 9.22 7.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output" "',1,'7');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "3081" Ports [1, 1] Position [385, 377, 415, 393] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "3082" Ports [1, 1] Position [385, 357, 415, 373] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "3083" Ports [1, 1] Position [375, 447, 405, 463] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "3084" Ports [1, 1] Position [625, 447, 655, 463] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert5" SID "3085" Ports [1, 1] Position [375, 497, 405, 513] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From" SID "3086" Position [45, 354, 185, 376] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_FlexBERMode" TagVisibility "global" } Block { BlockType From Name "From1" SID "3087" Position [45, 397, 170, 413] ShowName off CloseFcn "tagdialog Close" GotoTag "regTx_PktRunning" TagVisibility "global" } Block { BlockType From Name "From2" SID "3088" Position [45, 377, 170, 393] ShowName off CloseFcn "tagdialog Close" GotoTag "Tx_Running" TagVisibility "global" } Block { BlockType From Name "From3" SID "3089" Position [45, 495, 190, 515] ShowName off CloseFcn "tagdialog Close" GotoTag "Tx_Running" TagVisibility "global" } Block { BlockType From Name "From4" SID "3090" Position [45, 515, 190, 535] ShowName off CloseFcn "tagdialog Close" GotoTag "regTx_CaptureRandomPayload" TagVisibility "global" } Block { BlockType From Name "From5" SID "3091" Position [45, 535, 190, 555] ShowName off CloseFcn "tagdialog Close" GotoTag "regTx_RandomPayload" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "3092" Ports [1, 1] Position [255, 359, 285, 371] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "3093" Ports [1, 1] Position [255, 377, 290, 393] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "3094" Ports [1, 1] Position [255, 397, 290, 413] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "3095" Ports [2, 1] Position [800, 149, 830, 176] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2.02" sg_icon_stat "30,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "3096" Ports [2, 1] Position [800, 179, 830, 206] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2.02" sg_icon_stat "30,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical10" SID "3097" Ports [2, 1] Position [550, 428, 585, 477] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,49,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 49 49 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[29.55 29." "55 34.55 29.55 34.55 34.55 34.55 29.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[24.55 24.55 29.55 2" "9.55 24.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[19.55 19.55 24.55 24.55 19.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[14.55 14.55 19.55 14.55 19.55 19.55 14.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "3098" Ports [2, 1] Position [800, 209, 830, 236] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2.02" sg_icon_stat "30,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "3099" Ports [2, 1] Position [800, 239, 830, 266] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2.02" sg_icon_stat "30,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "3100" Ports [2, 1] Position [800, 269, 830, 296] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2.02" sg_icon_stat "30,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "3101" Ports [2, 1] Position [800, 299, 830, 326] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2.02" sg_icon_stat "30,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "3102" Ports [2, 1] Position [800, 329, 830, 356] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2.02" sg_icon_stat "30,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "3103" Ports [2, 1] Position [800, 359, 830, 386] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2.02" sg_icon_stat "30,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "3104" Ports [4, 1] Position [470, 474, 505, 556] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,82,4,1,white,blue,0,50b60d37,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 82 82 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 82 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[46.55 46." "55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[41.55 41.55 46.55 4" "6.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41.55 41.55 36.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36.55 31.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\ncolo" "r('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "3105" Ports [4, 1] Position [470, 354, 505, 436] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,82,4,1,white,blue,0,50b60d37,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 82 82 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 82 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[46.55 46." "55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[41.55 41.55 46.55 4" "6.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41.55 41.55 36.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36.55 31.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\ncolo" "r('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "3106" Ports [2, 1] Position [685, 137, 715, 168] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "8.2.02" sg_icon_stat "30,31,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmo" "de','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "3107" Ports [2, 1] Position [685, 167, 715, 198] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "8.2.02" sg_icon_stat "30,31,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmo" "de','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "3108" Ports [2, 1] Position [685, 197, 715, 228] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "8.2.02" sg_icon_stat "30,31,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmo" "de','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "3109" Ports [2, 1] Position [685, 227, 715, 258] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "8.2.02" sg_icon_stat "30,31,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmo" "de','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "3110" Ports [2, 1] Position [685, 257, 715, 288] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "8.2.02" sg_icon_stat "30,31,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmo" "de','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational5" SID "3111" Ports [2, 1] Position [685, 287, 715, 318] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "8.2.02" sg_icon_stat "30,31,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmo" "de','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational6" SID "3112" Ports [2, 1] Position [685, 317, 715, 348] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "8.2.02" sg_icon_stat "30,31,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmo" "de','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational7" SID "3113" Ports [2, 1] Position [685, 347, 715, 378] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "8.2.02" sg_icon_stat "30,31,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmo" "de','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "3114" Ports [1, 1] Position [335, 353, 355, 377] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "3115" Ports [1, 1] Position [335, 373, 355, 397] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "20,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample3" SID "3116" Ports [1, 1] Position [275, 493, 295, 517] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "20,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample4" SID "3117" Ports [1, 1] Position [275, 513, 295, 537] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample5" SID "3118" Ports [1, 1] Position [275, 533, 295, 557] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "ByteEn" SID "3119" Position [1005, 263, 1035, 277] IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Relational" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Constant5" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "Relational5" DstPort 2 } Line { SrcBlock "Constant7" SrcPort 1 DstBlock "Relational6" DstPort 2 } Line { SrcBlock "Constant8" SrcPort 1 DstBlock "Relational7" DstPort 2 } Line { SrcBlock "Byte Addr" SrcPort 1 DstBlock "3LSB" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Relational5" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "Relational6" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Relational7" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "Concat" SrcPort 1 DstBlock "ByteEn" DstPort 1 } Line { SrcBlock "3LSB" SrcPort 1 Points [20, 0; 0, 35] Branch { DstBlock "Relational" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "Relational2" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "Relational3" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "Relational4" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "Relational5" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "Relational6" DstPort 1 } Branch { Points [0, 30] DstBlock "Relational7" DstPort 1 } } } } } } } } Line { SrcBlock "Logical9" SrcPort 1 Points [25, 0] DstBlock "Logical10" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Concat" DstPort 3 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Concat" DstPort 4 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Concat" DstPort 5 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "Concat" DstPort 6 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Concat" DstPort 7 } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "Concat" DstPort 8 } Line { SrcBlock "From" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Inverter2" DstPort 1 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical9" DstPort 3 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Up Sample2" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Logical9" DstPort 2 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "WrEn" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical9" DstPort 1 } Line { SrcBlock "Convert4" SrcPort 1 Points [105, 0; 0, -75] Branch { Points [0, -30] Branch { Points [0, -30] Branch { Points [0, -30] Branch { Points [0, -30] Branch { Points [0, -30] Branch { Points [0, -30] Branch { Points [0, -30] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Logical1" DstPort 2 } } Branch { DstBlock "Logical2" DstPort 2 } } Branch { DstBlock "Logical3" DstPort 2 } } Branch { DstBlock "Logical4" DstPort 2 } } Branch { DstBlock "Logical5" DstPort 2 } } Branch { DstBlock "Logical6" DstPort 2 } } Branch { DstBlock "Logical7" DstPort 2 } } Line { SrcBlock "Logical10" SrcPort 1 DstBlock "Convert4" DstPort 1 } Line { SrcBlock "Logical8" SrcPort 1 Points [25, 0] DstBlock "Logical10" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 Points [20, 0] Branch { Points [0, -30] DstBlock "Logical9" DstPort 4 } Branch { Points [0, 30] DstBlock "Logical8" DstPort 1 } } Line { SrcBlock "From4" SrcPort 1 DstBlock "Up Sample4" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Up Sample5" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Up Sample3" DstPort 1 } Line { SrcBlock "Convert5" SrcPort 1 DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Up Sample3" SrcPort 1 DstBlock "Convert5" DstPort 1 } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "Logical8" DstPort 3 } Line { SrcBlock "Up Sample5" SrcPort 1 DstBlock "Logical8" DstPort 4 } Annotation { Name "FlexBER mode configures the receiver to use\nthe Tx packet buffer as a \"golden\" packet for\nBER cal" "culations. In this mode, the receiver\ndoes *not* write received packets to the pkt buffer!" Position [354, 305] } Annotation { Name "Two reasons to allow bytes to be written to the packet buffer:\n-The PHY is in receive mode, and byte" "s are being generated by\nthe Rx pipeline.\nOR\n-The PHY is in transmit mode, generating random payloads interal" "ly\nbut wants to capture those payloads to a packet buffer for offline\nanalysis." Position [199, 623] HorizontalAlignment "left" } } } Block { BlockType Reference Name "CRC Error1" SID "3120" Ports [2, 1] Position [550, 279, 585, 301] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('out" "put',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Data Src Sel" SID "3121" Ports [3, 3] Position [535, 435, 620, 515] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Data Src Sel" Location [202, 82, 1918, 1026] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Addr" SID "3122" Position [215, 413, 245, 427] IconDisplay "Port number" } Block { BlockType Inport Name "Data" SID "3123" Position [220, 323, 250, 337] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "We" SID "3124" Position [215, 503, 245, 517] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "3125" Ports [1, 1] Position [365, 193, 395, 207] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "3126" Ports [1, 1] Position [365, 218, 395, 232] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "3127" Ports [1, 1] Position [365, 243, 395, 257] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "3128" Position [325, 440, 470, 460] ShowName off CloseFcn "tagdialog Close" GotoTag "Tx_RandomPayloadByte_addr" TagVisibility "global" } Block { BlockType From Name "From2" SID "3129" Position [325, 530, 470, 550] ShowName off CloseFcn "tagdialog Close" GotoTag "Tx_RandomPayloadByte_valid" TagVisibility "global" } Block { BlockType From Name "From3" SID "3130" Position [180, 190, 325, 210] ShowName off CloseFcn "tagdialog Close" GotoTag "Tx_Running" TagVisibility "global" } Block { BlockType From Name "From4" SID "3131" Position [180, 215, 325, 235] ShowName off CloseFcn "tagdialog Close" GotoTag "regTx_CaptureRandomPayload" TagVisibility "global" } Block { BlockType From Name "From5" SID "3132" Position [180, 240, 325, 260] ShowName off CloseFcn "tagdialog Close" GotoTag "regTx_RandomPayload" TagVisibility "global" } Block { BlockType From Name "From6" SID "3133" Position [330, 350, 475, 370] ShowName off CloseFcn "tagdialog Close" GotoTag "Tx_RandomPayloadByte" TagVisibility "global" } Block { BlockType Reference Name "Logical7" SID "3134" Ports [3, 1] Position [480, 186, 515, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2.02" sg_icon_stat "35,78,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 78 78 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[44.55 44." "55 49.55 44.55 49.55 49.55 49.55 44.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[39.55 39.55 44.55 4" "4.55 39.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[34.55 34.55 39.55 39.55 34.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[29.55 29.55 34.55 29.55 34.55 34.55 29.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "3135" Ports [3, 1] Position [630, 285, 665, 375] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "8.2.02" sg_icon_stat "35,90,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 12.8571 77.1429 90 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 12.8571 77.1429 90 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[50.55 50.55 55.55 50.55 55.55 55.55 55.55 50.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[45.55 45.55 50.55 50.55 45.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[40.55 40.55 45" ".55 45.55 40.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[35.55 35.55 40.55 35.55 40.55 40" ".55 35.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux1" SID "3136" Ports [3, 1] Position [630, 375, 665, 465] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "8.2.02" sg_icon_stat "35,90,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 12.8571 77.1429 90 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 12.8571 77.1429 90 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[50.55 50.55 55.55 50.55 55.55 55.55 55.55 50.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[45.55 45.55 50.55 50.55 45.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[40.55 40.55 45" ".55 45.55 40.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[35.55 35.55 40.55 35.55 40.55 40" ".55 35.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Mux2" SID "3137" Ports [3, 1] Position [630, 465, 665, 555] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "8.2.02" sg_icon_stat "35,90,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 12.8571 77.1429 90 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 12.8571 77.1429 90 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[50.55 50.55 55.55 50.55 55.55 55.55 55.55 50.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[45.55 45.55 50.55 50.55 45.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[40.55 40.55 45" ".55 45.55 40.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[35.55 35.55 40.55 35.55 40.55 40" ".55 35.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Up Sample1" SID "3138" Ports [1, 1] Position [425, 188, 445, 212] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "20,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\" "fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name " Addr" SID "3139" Position [760, 413, 790, 427] IconDisplay "Port number" } Block { BlockType Outport Name " Data" SID "3140" Position [760, 323, 790, 337] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name " We" SID "3141" Position [760, 503, 790, 517] Port "3" IconDisplay "Port number" } Line { SrcBlock "From4" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Logical7" SrcPort 1 Points [25, 0; 0, 75] Branch { DstBlock "Mux" DstPort 1 } Branch { Points [0, 90] Branch { DstBlock "Mux1" DstPort 1 } Branch { Points [0, 90] DstBlock "Mux2" DstPort 1 } } } Line { SrcBlock "From6" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Data" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Addr" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Mux2" DstPort 3 } Line { SrcBlock "We" SrcPort 1 DstBlock "Mux2" DstPort 2 } Line { SrcBlock "Mux2" SrcPort 1 DstBlock " We" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock " Addr" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 DstBlock " Data" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Logical7" DstPort 3 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Logical7" DstPort 1 } Annotation { Name "When the Tx is in random payload mode, this block can\ncapture the internally generated payload and w" "rite it\nto a packet buffer. The MAC can then dump it over\nthe wire for offline comparison to received packets." Position [788, 191] } } } Block { BlockType SubSystem Name "DataReplication" SID "3142" Ports [1, 1] Position [840, 353, 925, 387] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "DataReplication" Location [585, 162, 959, 352] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "ByteIn" SID "3143" Position [25, 28, 55, 42] IconDisplay "Port number" } Block { BlockType Reference Name "Concat" SID "3144" Ports [8, 1] Position [100, 26, 160, 114] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "8" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.02" sg_icon_stat "60,88,8,1,white,blue,0,6fe74153,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 88 88 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 88 88 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[52.88 52" ".88 60.88 52.88 60.88 60.88 60.88 52.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[44.88 44.88 52.88 52." "88 44.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[36.88 36.88 44.88 44.88 36.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 28.88 36.88 36.88 28.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'hi');\n\n\n\n\n\n\ncolor('black');port_label('input',8,'lo');\n\ncolor('black');disp('\\fontsi" "ze{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "8BytesOut" SID "3145" Position [220, 63, 250, 77] IconDisplay "Port number" } Line { SrcBlock "ByteIn" SrcPort 1 Points [0, 0; 20, 0] Branch { DstBlock "Concat" DstPort 1 } Branch { Points [0, 10] Branch { DstBlock "Concat" DstPort 2 } Branch { Points [0, 10] Branch { DstBlock "Concat" DstPort 3 } Branch { Points [0, 10] Branch { DstBlock "Concat" DstPort 4 } Branch { Points [0, 10] Branch { DstBlock "Concat" DstPort 5 } Branch { Points [0, 10] Branch { DstBlock "Concat" DstPort 6 } Branch { Points [0, 10] Branch { DstBlock "Concat" DstPort 7 } Branch { Points [0, 10] DstBlock "Concat" DstPort 8 } } } } } } } } Line { SrcBlock "Concat" SrcPort 1 Points [0, 0] DstBlock "8BytesOut" DstPort 1 } } } Block { BlockType SubSystem Name "De-Scrambling" SID "3146" Ports [3, 3] Position [325, 435, 410, 515] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "De-Scrambling" Location [2, 82, 1678, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Addr" SID "3147" Position [55, 338, 85, 352] IconDisplay "Port number" } Block { BlockType Inport Name "Data" SID "3148" Position [125, 393, 155, 407] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "We" SID "3149" Position [125, 433, 155, 447] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "5LSB" SID "3150" Ports [1, 1] Position [135, 335, 175, 355] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "ceil(log2(length(RxDataScrambling_Seq)))" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay" SID "3151" Ports [1, 1] Position [240, 382, 280, 418] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2.02" sg_icon_stat "40,36,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "3152" Ports [1, 1] Position [240, 422, 280, 458] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2.02" sg_icon_stat "40,36,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "3153" Ports [1, 1] Position [240, 272, 280, 308] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2.02" sg_icon_stat "40,36,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "3154" Ports [2, 1] Position [350, 325, 385, 400] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2.02" sg_icon_stat "35,75,2,1,white,blue,0,dc21e094,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 75 75 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[42.55 42." "55 47.55 42.55 47.55 47.55 47.55 42.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[37.55 37.55 42.55 4" "2.55 37.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[32.55 32.55 37.55 37.55 32.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[27.55 27.55 32.55 27.55 32.55 32.55 27.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "ROM" SID "3155" Ports [1, 1] Position [235, 328, 280, 362] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(RxDataScrambling_Seq)" initVector "RxDataScrambling_Seq" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "8.2.02" sg_icon_stat "45,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 34 34 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[21.44 21" ".44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[17.44 17.44 21.44 21." "44 17.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name " Addr" SID "3156" Position [460, 283, 490, 297] IconDisplay "Port number" } Block { BlockType Outport Name " Data" SID "3157" Position [460, 358, 490, 372] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name " We" SID "3158" Position [455, 433, 485, 447] Port "3" IconDisplay "Port number" } Line { SrcBlock "ROM" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "5LSB" SrcPort 1 DstBlock "ROM" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 Points [25, 0; 0, -20] DstBlock "Logical" DstPort 2 } Line { SrcBlock "Data" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "We" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "Addr" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, -55] DstBlock "Delay2" DstPort 1 } Branch { DstBlock "5LSB" DstPort 1 } } Line { SrcBlock "Delay2" SrcPort 1 DstBlock " Addr" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock " Data" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock " We" DstPort 1 } } } Block { BlockType SubSystem Name "Error Injector\n(Sim Only!)" SID "3159" Ports [2, 1] Position [530, 632, 620, 683] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Error Injector\n(Sim Only!)" Location [690, 475, 1060, 634] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "ByteAddr" SID "3160" Position [310, 188, 340, 202] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Data_I" SID "3161" Position [320, 233, 350, 247] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant" SID "3162" Ports [0, 1] Position [375, 262, 430, 288] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "17" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.2" sg_icon_stat "55,26,0,1,white,blue,0,1802740d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'17');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "3163" Ports [0, 1] Position [180, 197, 235, 223] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "30" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.2" sg_icon_stat "55,26,0,1,white,blue,0,a55af09c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'30');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "3164" Ports [3, 1] Position [495, 188, 540, 292] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.2" sg_icon_stat "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 " "],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23." "32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14." "65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 " "52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66" " 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');" } Block { BlockType Reference Name "Relational" SID "3165" Ports [2, 1] Position [395, 185, 435, 220] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.2" sg_icon_stat "40,35,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 35 35 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa " "= b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Data_O" SID "3166" Position [585, 233, 615, 247] IconDisplay "Port number" } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Relational" DstPort 2 } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "ByteAddr" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Data_I" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Data_O" DstPort 1 } } } Block { BlockType Goto Name "Goto" SID "3167" Position [985, 363, 1125, 377] ShowName off GotoTag "BRAM_Rx_DOut" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "3168" Position [985, 328, 1125, 342] ShowName off GotoTag "BRAM_Rx_WrEn" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "3169" Position [985, 243, 1125, 257] ShowName off GotoTag "BRAM_Rx_WrAddr" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "3170" Position [985, 273, 1125, 287] ShowName off GotoTag "BRAM_Rx_AnyWrEn" TagVisibility "global" } Block { BlockType Goto Name "Goto4" SID "3171" Position [985, 197, 1210, 213] ShowName off GotoTag "FlexBER_BRAM_Rx_ByteWrAddr" TagVisibility "global" } Block { BlockType Reference Name "MSB" SID "3172" Ports [1, 1] Position [865, 240, 910, 260] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "log2(max_numBytes)-3" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "45,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Scope Name "RxB" SID "3173" Ports [4] Position [670, 219, 700, 301] Floating off Location [5, 52, 1685, 1019] Open off NumInputPorts "4" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" } TimeRange "5000" YMin "0~0~0~0" YMax "80~300~2~250" SaveName "ScopeData18" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "Up Sample3" SID "3174" Ports [1, 1] Position [750, 357, 775, 383] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "25,26,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample4" SID "3175" Ports [1, 1] Position [750, 327, 775, 353] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "25,26,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample5" SID "3176" Ports [1, 1] Position [750, 312, 775, 338] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "25,26,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample6" SID "3177" Ports [1, 1] Position [750, 267, 775, 293] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "25,26,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample7" SID "3178" Ports [1, 1] Position [750, 237, 775, 263] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "25,26,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done1" SID "3179" Ports [1, 1] Position [550, 245, 585, 255] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "data" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done2" SID "3180" Ports [1, 1] Position [550, 265, 585, 275] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "we" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done3" SID "9376" Ports [1, 1] Position [605, 285, 640, 295] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "3181" Ports [1, 1] Position [550, 225, 585, 235] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "addr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Outport Name " Addr" SID "3182" Position [695, 578, 725, 592] IconDisplay "Port number" } Block { BlockType Outport Name " Data" SID "3183" Position [695, 613, 725, 627] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name " Vout" SID "3184" Position [695, 713, 725, 727] Port "3" IconDisplay "Port number" } Line { SrcBlock "We" SrcPort 1 DstBlock "De-Scrambling" DstPort 3 } Line { SrcBlock "Data" SrcPort 1 DstBlock "De-Scrambling" DstPort 2 } Line { SrcBlock "Addr" SrcPort 1 DstBlock "De-Scrambling" DstPort 1 } Line { SrcBlock "DataReplication" SrcPort 1 DstBlock "Goto" DstPort 1 } Line { SrcBlock "BRAM WEn\nDecoding" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "MSB" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "Up Sample3" SrcPort 1 DstBlock "DataReplication" DstPort 1 } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "BRAM WEn\nDecoding" DstPort 2 } Line { SrcBlock "Up Sample5" SrcPort 1 DstBlock "BRAM WEn\nDecoding" DstPort 1 } Line { SrcBlock "Up Sample7" SrcPort 1 Points [50, 0] Branch { DstBlock "MSB" DstPort 1 } Branch { Points [0, -45] DstBlock "3LSB" DstPort 1 } } Line { SrcBlock "3LSB" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "Up Sample6" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "Data Src Sel" SrcPort 1 Points [90, 0; 0, -125] Branch { DstBlock "Up Sample5" DstPort 1 } Branch { Points [0, -75] DstBlock "Up Sample7" DstPort 1 } } Line { SrcBlock "Data Src Sel" SrcPort 2 Points [95, 0; 0, -105] DstBlock "Up Sample3" DstPort 1 } Line { SrcBlock "Data Src Sel" SrcPort 3 Points [100, 0; 0, -160] Branch { DstBlock "Up Sample4" DstPort 1 } Branch { Points [0, -60] DstBlock "Up Sample6" DstPort 1 } } Line { SrcBlock "De-Scrambling" SrcPort 1 Points [60, 0] Branch { DstBlock "Data Src Sel" DstPort 1 } Branch { Points [0, 135] Branch { DstBlock " Addr" DstPort 1 } Branch { Points [0, 60] DstBlock "Error Injector\n(Sim Only!)" DstPort 1 } } Branch { Points [0, -220] DstBlock "done4" DstPort 1 } } Line { SrcBlock "De-Scrambling" SrcPort 2 Points [55, 0] Branch { DstBlock "Data Src Sel" DstPort 2 } Branch { Points [0, 145] Branch { Points [0, 50] DstBlock "Error Injector\n(Sim Only!)" DstPort 2 } Branch { DstBlock " Data" DstPort 1 } } Branch { Points [0, -225; 55, 0] Branch { DstBlock "done1" DstPort 1 } Branch { Points [0, 35] DstBlock "CRC Error1" DstPort 1 } } } Line { SrcBlock "De-Scrambling" SrcPort 3 Points [50, 0] Branch { DstBlock "Data Src Sel" DstPort 3 } Branch { Points [0, 220] DstBlock " Vout" DstPort 1 } Branch { Points [0, -205] Branch { Points [0, -25] DstBlock "done2" DstPort 1 } Branch { DstBlock "CRC Error1" DstPort 2 } } } Line { SrcBlock "Error Injector\n(Sim Only!)" SrcPort 1 Points [65, 0] } Line { Name "addr" Labels [0, 0] SrcBlock "done4" SrcPort 1 DstBlock "RxB" DstPort 1 } Line { Name "data" Labels [0, 0] SrcBlock "done1" SrcPort 1 DstBlock "RxB" DstPort 2 } Line { Name "we" Labels [0, 0] SrcBlock "done2" SrcPort 1 DstBlock "RxB" DstPort 3 } Line { SrcBlock "CRC Error1" SrcPort 1 DstBlock "done3" DstPort 1 } Line { SrcBlock "done3" SrcPort 1 DstBlock "RxB" DstPort 4 } } } Block { BlockType SubSystem Name "Error Checking" SID "3185" Ports [5, 1] Position [625, 371, 730, 479] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Error Checking" Location [-243, 263, 1025, 1189] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "134" Block { BlockType Inport Name "NumBytes" SID "3186" Position [390, 323, 420, 337] IconDisplay "Port number" } Block { BlockType Inport Name "ByteAddr" SID "3187" Position [390, 373, 420, 387] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ByteIn" SID "3188" Position [145, 213, 175, 227] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "3189" Position [185, 223, 215, 237] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "3190" Position [220, 233, 250, 247] Port "5" IconDisplay "Port number" } Block { BlockType SubSystem Name "CRC16 Calc" SID "3191" Ports [3, 1] Position [355, 161, 445, 199] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "CRC16 Calc" Location [-125, 309, 1591, 1253] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "ByteIn" SID "3192" Position [245, 348, 275, 362] IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "3193" Position [585, 278, 615, 292] BlockMirror on Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "3194" Position [645, 258, 675, 272] BlockMirror on Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "8LSB" SID "3195" Ports [1, 1] Position [315, 186, 360, 214] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8MSB" SID "3196" Ports [1, 1] Position [325, 301, 370, 329] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert" SID "3197" Ports [1, 1] Position [330, 258, 365, 272] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,436" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Ass" "ert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "CRC Remainders" SID "3198" Ports [1, 1] Position [630, 309, 680, 361] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "256" initVector "CRC_Table16" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "16" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,1,1,white,blue,0,eff69a7e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'addr');\n\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "3199" Ports [2, 1] Position [610, 185, 660, 240] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,165" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,55,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 55 55 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[34.7" "7 34.77 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[27.77 27.77 " "34.77 34.77 27.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[20.77 20.77 27.77 27.77 20." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\" "fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "3200" Ports [0, 1] Position [555, 212, 580, 238] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "3201" Ports [2, 1] Position [400, 295, 445, 375] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,80,2,1,white,blue,0,dc21e094,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 80 80 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 80 80 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[46.66 4" "6.66 52.66 46.66 52.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 " "46.66 40.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[34.66 34.66 40.66 40.66 34.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[28.66 28.66 34.66 28.66 34.66 34.66 28.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "3202" Ports [2, 1] Position [795, 217, 840, 268] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,51,2,1,white,blue,0,dc21e094,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 51 51 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[31.66 3" "1.66 37.66 31.66 37.66 37.66 37.66 31.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[25.66 25.66 31.66 " "31.66 25.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[19.66 19.66 25.66 25.66 19.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[13.66 13.66 19.66 13.66 19.66 19.66 13.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "crc_accum" SID "3203" Ports [3, 1] Position [400, 238, 445, 292] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0*hex2dec('FFFF')" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,54,3,1,white,blue,0,30546de1,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 3" "3.66 39.66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 " "33.66 27.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "16-bit CRC" SID "3204" Position [395, 428, 425, 442] IconDisplay "Port number" } Line { SrcBlock "Assert" SrcPort 1 Points [-35, 0] Branch { Points [0, -65] DstBlock "8LSB" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "8MSB" DstPort 1 } Branch { Points [0, 120] DstBlock "16-bit CRC" DstPort 1 } } } Line { SrcBlock "Vin" SrcPort 1 DstBlock "crc_accum" DstPort 3 } Line { SrcBlock "ByteIn" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Rst" SrcPort 1 DstBlock "crc_accum" DstPort 2 } Line { SrcBlock "CRC Remainders" SrcPort 1 Points [185, 0; 0, -80] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Concat" SrcPort 1 Points [205, 0; 0, 15] DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "8LSB" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "crc_accum" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "CRC Remainders" DstPort 1 } Line { SrcBlock "crc_accum" SrcPort 1 DstBlock "Assert" DstPort 1 } Line { SrcBlock "8MSB" SrcPort 1 DstBlock "Logical1" DstPort 1 } } } Block { BlockType SubSystem Name "CRC32 Calc" SID "3205" Ports [3, 1] Position [355, 212, 445, 248] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "CRC32 Calc" Location [-291, 296, 1425, 1240] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "ByteIn" SID "3206" Position [245, 348, 275, 362] IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "3207" Position [585, 278, 615, 292] BlockMirror on Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "3208" Position [645, 258, 675, 272] BlockMirror on Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "24LSB" SID "3209" Ports [1, 1] Position [315, 186, 360, 214] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "24" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8MSB" SID "3210" Ports [1, 1] Position [325, 301, 370, 329] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert" SID "3211" Ports [1, 1] Position [330, 258, 365, 272] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,423" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Ass" "ert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "CRC Remainders" SID "3212" Ports [1, 1] Position [630, 309, 680, 361] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "256" initVector "CRC_Table32" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,1,1,white,blue,0,eff69a7e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'addr');\n\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "3213" Ports [2, 1] Position [610, 185, 660, 240] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,55,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 55 55 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[34.7" "7 34.77 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[27.77 27.77 " "34.77 34.77 27.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[20.77 20.77 27.77 27.77 20." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\" "fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "3214" Ports [0, 1] Position [525, 212, 550, 238] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "3215" Ports [2, 1] Position [400, 295, 445, 375] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,80,2,1,white,blue,0,dc21e094,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 80 80 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 80 80 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[46.66 4" "6.66 52.66 46.66 52.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 " "46.66 40.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[34.66 34.66 40.66 40.66 34.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[28.66 28.66 34.66 28.66 34.66 34.66 28.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "3216" Ports [2, 1] Position [795, 217, 840, 268] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,51,2,1,white,blue,0,dc21e094,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 51 51 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[31.66 3" "1.66 37.66 31.66 37.66 37.66 37.66 31.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[25.66 25.66 31.66 " "31.66 25.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[19.66 19.66 25.66 25.66 19.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[13.66 13.66 19.66 13.66 19.66 19.66 13.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "crc_accum" SID "3217" Ports [3, 1] Position [400, 238, 445, 292] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "hex2dec('FFFFFFFF')" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,54,3,1,white,blue,0,30546de1,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 3" "3.66 39.66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 " "33.66 27.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "32-bit CRC" SID "3218" Position [395, 418, 425, 432] IconDisplay "Port number" } Line { SrcBlock "8MSB" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "crc_accum" SrcPort 1 DstBlock "Assert" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "CRC Remainders" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "crc_accum" DstPort 1 } Line { SrcBlock "24LSB" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "Concat" SrcPort 1 Points [205, 0; 0, 15] DstBlock "Logical2" DstPort 1 } Line { SrcBlock "CRC Remainders" SrcPort 1 Points [185, 0; 0, -80] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Rst" SrcPort 1 DstBlock "crc_accum" DstPort 2 } Line { SrcBlock "ByteIn" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Vin" SrcPort 1 DstBlock "crc_accum" DstPort 3 } Line { SrcBlock "Assert" SrcPort 1 Points [-35, 0] Branch { Points [0, -65] DstBlock "24LSB" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "8MSB" DstPort 1 } Branch { Points [0, 110] DstBlock "32-bit CRC" DstPort 1 } } } } } Block { BlockType SubSystem Name "Error Checking1" SID "3219" Ports [5, 5] Position [515, 153, 640, 407] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Error Checking1" Location [-64, 121, 1652, 1065] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "16-bit CRC" SID "3220" Position [280, 343, 305, 357] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "32-bit CRC" SID "3221" Position [280, 488, 305, 502] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "3222" Position [175, 708, 205, 722] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "NumBytes" SID "3223" Position [180, 593, 210, 607] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "ByteAddr" SID "3224" Position [180, 628, 210, 642] Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "CRC Error1" SID "3225" Ports [3, 1] Position [565, 412, 600, 468] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,56,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 56 56 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[33.55 33." "55 38.55 33.55 38.55 38.55 38.55 33.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[28.55 28.55 33.55 3" "3.55 28.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[23.55 23.55 28.55 28.55 23.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 18.55 23.55 23.55 18.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "CRC Error2" SID "3226" Ports [3, 1] Position [565, 557, 600, 613] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,56,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 56 56 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[33.55 33." "55 38.55 33.55 38.55 38.55 38.55 33.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[28.55 28.55 33.55 3" "3.55 28.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[23.55 23.55 28.55 28.55 23.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 18.55 23.55 23.55 18.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "CRC Error5" SID "3227" Ports [3, 1] Position [565, 352, 600, 408] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,56,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 56 56 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[33.55 33." "55 38.55 33.55 38.55 38.55 38.55 33.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[28.55 28.55 33.55 3" "3.55 28.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[23.55 23.55 28.55 28.55 23.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 18.55 23.55 23.55 18.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "CRC Error6" SID "3228" Ports [3, 1] Position [565, 497, 600, 553] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,56,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 56 56 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[33.55 33." "55 38.55 33.55 38.55 38.55 38.55 33.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[28.55 28.55 33.55 3" "3.55 28.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[23.55 23.55 28.55 28.55 23.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 18.55 23.55 23.55 18.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "3229" Ports [0, 1] Position [315, 362, 335, 378] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "3230" Ports [0, 1] Position [300, 507, 320, 523] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "3231" Position [730, 551, 870, 569] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_resetOnBadHeader" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "3232" Ports [1, 1] Position [510, 499, 535, 511] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,12,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 12 12 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 12 12 0 ]);\npatch([9.775 11.22 12.22 13.22 14.22 12.22 10.775 9.775 ],[7.11" " 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([10.775 12.22 11.22 9.775 10.775 ],[6.11 6.11 7.11 7.11 " "6.11 ],[0.931 0.946 0.973 ]);\npatch([9.775 11.22 12.22 10.775 9.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\np" "atch([10.775 14.22 13.22 12.22 11.22 9.775 10.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('n" "ot');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "3233" Ports [1, 1] Position [505, 354, 530, 366] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,12,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 12 12 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 12 12 0 ]);\npatch([9.775 11.22 12.22 13.22 14.22 12.22 10.775 9.775 ],[7.11" " 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([10.775 12.22 11.22 9.775 10.775 ],[6.11 6.11 7.11 7.11 " "6.11 ],[0.931 0.946 0.973 ]);\npatch([9.775 11.22 12.22 10.775 9.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\np" "atch([10.775 14.22 13.22 12.22 11.22 9.775 10.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('n" "ot');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Length Checking" SID "3234" Ports [2, 4] Position [290, 578, 430, 652] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Length Checking" Location [237, 570, 747, 904] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "NumBytes" SID "3235" Position [185, 348, 215, 362] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "ByteAddr" SID "3236" Position [380, 568, 410, 582] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "3237" Ports [0, 1] Position [385, 482, 405, 498] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From2" SID "3238" Position [260, 367, 420, 383] ShowName off CloseFcn "tagdialog Close" GotoTag "regTxRx_numHeaderBytes" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "3239" Ports [1, 1] Position [715, 304, 740, 316] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,12,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 12 12 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 12 12 0 ]);\npatch([9.775 11.22 12.22 13.22 14.22 12.22 10.775 9.775 ],[7.11" " 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([10.775 12.22 11.22 9.775 10.775 ],[6.11 6.11 7.11 7.11 " "6.11 ],[0.931 0.946 0.973 ]);\npatch([9.775 11.22 12.22 10.775 9.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\np" "atch([10.775 14.22 13.22 12.22 11.22 9.775 10.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('n" "ot');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "3240" Ports [3, 1] Position [690, 563, 720, 587] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,24,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.3" "3 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncol" "or('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "3241" Ports [2, 1] Position [690, 358, 720, 382] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,24,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.3" "3 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "3242" Ports [2, 1] Position [590, 400, 630, 420] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('blac" "k');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "3243" Ports [3, 1] Position [690, 408, 720, 432] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,24,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.3" "3 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncol" "or('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge1" SID "3244" Ports [1, 1] Position [775, 413, 810, 427] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge1" Location [480, 85, 1060, 386] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "3245" Position [35, 33, 65, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Inverter" SID "3246" Ports [1, 1] Position [110, 49, 150, 71] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,22,1,1,white,blue,0,e69ac283,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\nnot');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Reference Name "Logical" SID "3247" Ports [2, 1] Position [205, 28, 250, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3248" Position [275, 43, 305, 57] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 20] DstBlock "Inverter" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } } } Block { BlockType SubSystem Name "Posedge2" SID "3249" Ports [1, 1] Position [780, 568, 815, 582] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge2" Location [480, 85, 1060, 386] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "3250" Position [35, 33, 65, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Inverter" SID "3251" Ports [1, 1] Position [110, 49, 150, 71] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,22,1,1,white,blue,0,e69ac283,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\nnot');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Reference Name "Logical" SID "3252" Ports [2, 1] Position [205, 28, 250, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3253" Position [275, 43, 305, 57] IconDisplay "Port number" } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 20] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType Reference Name "Relational1" SID "3254" Ports [2, 1] Position [480, 563, 525, 607] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\geq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "3255" Ports [2, 1] Position [485, 458, 530, 502] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a!=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,850de6e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\neq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational5" SID "3256" Ports [2, 1] Position [480, 513, 525, 557] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\geq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational6" SID "3257" Ports [2, 1] Position [480, 343, 525, 387] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational7" SID "3258" Ports [2, 1] Position [480, 393, 525, 437] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Last Hdr Byte" SID "3259" Position [895, 413, 925, 427] IconDisplay "Port number" } Block { BlockType Outport Name "Last Pyld Byte" SID "3260" Position [895, 568, 925, 582] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Hdr Only Pkt" SID "3261" Position [895, 363, 925, 377] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Invalid NumBytes" SID "3262" Position [895, 303, 925, 317] Port "4" IconDisplay "Port number" } Line { SrcBlock "NumBytes" SrcPort 1 Points [25, 0] Branch { DstBlock "Relational6" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "Relational7" DstPort 1 } Branch { Points [0, 190] DstBlock "Relational1" DstPort 2 } } } Line { SrcBlock "From2" SrcPort 1 Points [15, 0] Branch { DstBlock "Relational6" DstPort 2 } Branch { Points [0, 50] Branch { DstBlock "Relational7" DstPort 2 } Branch { Points [0, 45] Branch { Points [0, 75] DstBlock "Relational5" DstPort 2 } Branch { DstBlock "Relational2" DstPort 1 } } } } Line { SrcBlock "Relational6" SrcPort 1 Points [35, 0] Branch { Points [0, 40] DstBlock "Logical6" DstPort 1 } Branch { DstBlock "Logical2" DstPort 1 } } Line { SrcBlock "Relational7" SrcPort 1 Points [35, 0] Branch { DstBlock "Logical6" DstPort 2 } Branch { Points [0, 160] DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "Posedge1" DstPort 1 } Line { SrcBlock "ByteAddr" SrcPort 1 Points [35, 0] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, -50] DstBlock "Relational5" DstPort 1 } } Line { SrcBlock "Logical6" SrcPort 1 Points [25, 0] Branch { DstBlock "Logical7" DstPort 1 } Branch { Points [0, -100] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Relational5" SrcPort 1 Points [115, 0] Branch { Points [0, 30] DstBlock "Logical1" DstPort 1 } Branch { Points [0, -115] Branch { DstBlock "Logical7" DstPort 2 } Branch { Points [0, -45] DstBlock "Logical2" DstPort 2 } } } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical1" DstPort 3 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Posedge2" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Invalid NumBytes" DstPort 1 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 Points [125, 0; 0, -50] DstBlock "Logical7" DstPort 3 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Hdr Only Pkt" DstPort 1 } Line { SrcBlock "Posedge1" SrcPort 1 DstBlock "Last Hdr Byte" DstPort 1 } Line { SrcBlock "Posedge2" SrcPort 1 DstBlock "Last Pyld Byte" DstPort 1 } Annotation { Name "Condition on numHeaderBytes>0, \nas PLB registers initialize to zero,\nwhich would cause spurious ass" "ertions\nwhen checking length values." Position [758, 483] } } } Block { BlockType Reference Name "Logical1" SID "3263" Ports [3, 1] Position [900, 665, 925, 695] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,30,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 30 30 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[18.33 " "18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[15.33 15.33 18.33" " 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical2" SID "3264" Ports [2, 1] Position [975, 524, 995, 566] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,42,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 42 42 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[23.22 23." "22 25.22 23.22 25.22 25.22 25.22 23.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[21.22 21.22 23.22 23.22" " 21.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[19.22 19.22 21.22 21.22 19.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[17.22 17.22 19.22 17.22 19.22 19.22 17.22 ],[0.931 0.946 0.973 ]" ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');dis" "p('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "3265" Ports [2, 1] Position [900, 608, 925, 652] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 44 44 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[25.33 " "25.33 28.33 25.33 28.33 28.33 28.33 25.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[22.33 22.33 25.33" " 25.33 22.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[19.33 19.33 22.33 22.33 19.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[16.33 16.33 19.33 16.33 19.33 19.33 16.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "3266" Ports [2, 1] Position [835, 603, 860, 632] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 29 29 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[17.33 " "17.33 20.33 17.33 20.33 20.33 20.33 17.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[14.33 14.33 17.33" " 17.33 14.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[11.33 11.33 14.33 14.33 11.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[8.33 8.33 11.33 8.33 11.33 11.33 8.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "3267" Ports [2, 1] Position [895, 538, 920, 567] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 29 29 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[17.33 " "17.33 20.33 17.33 20.33 20.33 20.33 17.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[14.33 14.33 17.33" " 17.33 14.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[11.33 11.33 14.33 14.33 11.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[8.33 8.33 11.33 8.33 11.33 11.33 8.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "3268" Ports [2, 1] Position [890, 478, 915, 507] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,29,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 29 29 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[17.33 " "17.33 20.33 17.33 20.33 20.33 20.33 17.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[14.33 14.33 17.33" " 17.33 14.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[11.33 11.33 14.33 14.33 11.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[8.33 8.33 11.33 8.33 11.33 11.33 8.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge1" SID "3269" Ports [1, 1] Position [1255, 494, 1290, 516] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge1" Location [480, 85, 1060, 386] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "3270" Position [35, 33, 65, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Inverter" SID "3271" Ports [1, 1] Position [110, 49, 150, 71] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,22,1,1,white,blue,0,e69ac283,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\nnot');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Reference Name "Logical" SID "3272" Ports [2, 1] Position [205, 28, 250, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3273" Position [275, 43, 305, 57] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 20] DstBlock "Inverter" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } } } Block { BlockType SubSystem Name "Posedge2" SID "3274" Ports [1, 1] Position [1255, 444, 1290, 466] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge2" Location [480, 85, 1060, 386] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "3275" Position [35, 33, 65, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Inverter" SID "3276" Ports [1, 1] Position [110, 49, 150, 71] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,22,1,1,white,blue,0,e69ac283,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\nnot');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Reference Name "Logical" SID "3277" Ports [2, 1] Position [205, 28, 250, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3278" Position [275, 43, 305, 57] IconDisplay "Port number" } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 20] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType SubSystem Name "Posedge4" SID "3279" Ports [1, 1] Position [1260, 679, 1295, 701] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge4" Location [480, 85, 1060, 386] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "3280" Position [35, 33, 65, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Inverter" SID "3281" Ports [1, 1] Position [110, 49, 150, 71] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,22,1,1,white,blue,0,e69ac283,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\nnot');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Reference Name "Logical" SID "3282" Ports [2, 1] Position [205, 28, 250, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3283" Position [275, 43, 305, 57] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 20] DstBlock "Inverter" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } } } Block { BlockType SubSystem Name "Posedge6" SID "3284" Ports [1, 1] Position [1260, 629, 1295, 651] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge6" Location [480, 85, 1060, 386] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "3285" Position [35, 33, 65, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Inverter" SID "3286" Ports [1, 1] Position [110, 49, 150, 71] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,22,1,1,white,blue,0,e69ac283,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\nnot');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Reference Name "Logical" SID "3287" Ports [2, 1] Position [205, 28, 250, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3288" Position [275, 43, 305, 57] IconDisplay "Port number" } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 20] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType Reference Name "Relational3" SID "3289" Ports [2, 1] Position [380, 341, 425, 379] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a!=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,38,2,1,white,blue,0,850de6e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 38 38 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[24.55 2" "4.55 29.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[19.55 19.55 24.5" "5 24.55 19.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[14.55 14.55 19.55 19.55 14.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'" "\\bfa \\neq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "3290" Ports [2, 1] Position [380, 486, 425, 524] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a!=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,38,2,1,white,blue,0,850de6e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 38 38 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[24.55 2" "4.55 29.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[19.55 19.55 24.5" "5 24.55 19.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[14.55 14.55 19.55 19.55 14.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'" "\\bfa \\neq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "RxCRC" SID "3291" Ports [9] Position [1420, 171, 1455, 269] Floating off Location [1, 52, 1681, 1019] Open off NumInputPorts "9" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" axes8 "%" axes9 "%" } TimeRange "5000" YMin "0~0~0~0~-1~-5~-1~-5~-5" YMax "80~300~1~250~2~5~2~5~5" SaveName "ScopeData2" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "SR Latch 1" SID "3292" Ports [2, 1] Position [1120, 672, 1165, 703] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 1" Location [202, 70, 1918, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "3293" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "3294" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "3295" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "3296" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3297" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType SubSystem Name "SR Latch 2" SID "3298" Ports [2, 1] Position [1120, 622, 1165, 653] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 2" Location [202, 70, 1799, 1056] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "3299" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "3300" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "3301" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "3302" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3303" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType SubSystem Name "SR Latch 3" SID "3304" Ports [2, 1] Position [1115, 537, 1160, 568] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 3" Location [202, 70, 1918, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "3305" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "3306" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "3307" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "3308" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3309" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType SubSystem Name "SR Latch 4" SID "3310" Ports [2, 1] Position [1115, 487, 1160, 518] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 4" Location [202, 70, 1918, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "3311" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "3312" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "3313" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "3314" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3315" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType SubSystem Name "SR Latch 5" SID "3316" Ports [2, 1] Position [1115, 437, 1160, 468] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 5" Location [202, 70, 1918, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "3317" Position [170, 243, 200, 257] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "3318" Position [125, 223, 155, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "3319" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "3320" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3321" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType Reference Name "done1" SID "3322" Ports [1, 1] Position [1295, 185, 1330, 195] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "3323" Ports [1, 1] Position [1295, 195, 1330, 205] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done3" SID "3324" Ports [1, 1] Position [1295, 205, 1330, 215] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "3325" Ports [1, 1] Position [1295, 175, 1330, 185] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "3326" Ports [1, 1] Position [1295, 225, 1330, 235] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done6" SID "3327" Ports [1, 1] Position [1295, 235, 1330, 245] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "good_packet" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done7" SID "3328" Ports [1, 1] Position [1295, 245, 1330, 255] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done8" SID "3329" Ports [1, 1] Position [1295, 215, 1330, 225] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "good_header" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done9" SID "3330" Ports [1, 1] Position [1295, 255, 1330, 265] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Outport Name "ResetRx" SID "3331" Position [1350, 548, 1380, 562] IconDisplay "Port number" } Block { BlockType Outport Name "GoodHeader" SID "3332" Position [1350, 448, 1380, 462] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "BadHeader" SID "3333" Position [1350, 498, 1380, 512] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "GoodPacket" SID "3334" Position [1360, 633, 1390, 647] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "BadPacket" SID "3335" Position [1360, 683, 1390, 697] Port "5" IconDisplay "Port number" } Line { SrcBlock "Posedge6" SrcPort 1 DstBlock "GoodPacket" DstPort 1 } Line { SrcBlock "Posedge4" SrcPort 1 DstBlock "BadPacket" DstPort 1 } Line { SrcBlock "SR Latch 2" SrcPort 1 Points [35, 0] Branch { DstBlock "Posedge6" DstPort 1 } Branch { Points [0, -400] DstBlock "done6" DstPort 1 } } Line { SrcBlock "SR Latch 1" SrcPort 1 Points [40, 0] Branch { DstBlock "Posedge4" DstPort 1 } Branch { Points [0, -440] DstBlock "done7" DstPort 1 } } Line { SrcBlock "done7" SrcPort 1 DstBlock "RxCRC" DstPort 8 } Line { Name "good_packet" Labels [0, 0] SrcBlock "done6" SrcPort 1 DstBlock "RxCRC" DstPort 7 } Line { SrcBlock "done5" SrcPort 1 DstBlock "RxCRC" DstPort 6 } Line { Name "good_header" Labels [0, 0] SrcBlock "done8" SrcPort 1 DstBlock "RxCRC" DstPort 5 } Line { SrcBlock "Relational3" SrcPort 1 Points [55, 0] Branch { DstBlock "Inverter3" DstPort 1 } Branch { Points [0, 60] DstBlock "CRC Error1" DstPort 1 } } Line { SrcBlock "done3" SrcPort 1 DstBlock "RxCRC" DstPort 4 } Line { SrcBlock "done2" SrcPort 1 DstBlock "RxCRC" DstPort 3 } Line { SrcBlock "done1" SrcPort 1 DstBlock "RxCRC" DstPort 2 } Line { SrcBlock "done4" SrcPort 1 DstBlock "RxCRC" DstPort 1 } Line { SrcBlock "SR Latch 5" SrcPort 1 Points [30, 0] Branch { DstBlock "Posedge2" DstPort 1 } Branch { Points [0, -235] DstBlock "done8" DstPort 1 } } Line { SrcBlock "Posedge2" SrcPort 1 DstBlock "GoodHeader" DstPort 1 } Line { SrcBlock "Posedge1" SrcPort 1 DstBlock "BadHeader" DstPort 1 } Line { SrcBlock "SR Latch 4" SrcPort 1 Points [35, 0] Branch { DstBlock "Posedge1" DstPort 1 } Branch { Points [0, -275] DstBlock "done5" DstPort 1 } } Line { SrcBlock "32-bit CRC" SrcPort 1 Points [45, 0] Branch { DstBlock "Relational4" DstPort 1 } Branch { Points [0, -285] DstBlock "done3" DstPort 1 } } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "16-bit CRC" SrcPort 1 Points [40, 0] Branch { DstBlock "Relational3" DstPort 1 } Branch { Points [0, -150] DstBlock "done2" DstPort 1 } } Line { SrcBlock "Relational4" SrcPort 1 Points [55, 0] Branch { DstBlock "Inverter1" DstPort 1 } Branch { Points [0, 60] DstBlock "CRC Error2" DstPort 1 } } Line { SrcBlock "NumBytes" SrcPort 1 DstBlock "Length Checking" DstPort 1 } Line { SrcBlock "ByteAddr" SrcPort 1 DstBlock "Length Checking" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "SR Latch 1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "CRC Error6" DstPort 1 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "CRC Error5" DstPort 1 } Line { SrcBlock "Length Checking" SrcPort 1 Points [30, 0; 0, -125] Branch { DstBlock "CRC Error1" DstPort 3 } Branch { Points [0, -60] Branch { DstBlock "CRC Error5" DstPort 3 } Branch { Points [0, -220] DstBlock "done4" DstPort 1 } } } Line { SrcBlock "Length Checking" SrcPort 2 Points [35, 0] Branch { Points [70, 0] Branch { DstBlock "CRC Error2" DstPort 3 } Branch { Points [0, -60] DstBlock "CRC Error6" DstPort 3 } } Branch { Points [0, -415] DstBlock "done1" DstPort 1 } } Line { SrcBlock "CRC Error2" SrcPort 1 Points [80, 0; 0, 95] DstBlock "Logical1" DstPort 2 } Line { SrcBlock "CRC Error1" SrcPort 1 Points [85, 0; 0, 45] Branch { Points [0, 185] DstBlock "Logical1" DstPort 1 } Branch { Points [155, 0] Branch { DstBlock "Logical6" DstPort 1 } Branch { Points [0, 60] DstBlock "Logical5" DstPort 1 } } } Line { SrcBlock "CRC Error5" SrcPort 1 Points [115, 0; 0, 65] Branch { DstBlock "SR Latch 5" DstPort 1 } Branch { Points [0, 165] DstBlock "Logical4" DstPort 1 } } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "SR Latch 2" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Length Checking" SrcPort 3 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "CRC Error6" SrcPort 1 Points [100, 0; 0, 115] DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Rst" SrcPort 1 Points [335, 0] Branch { Points [0, -130] Branch { DstBlock "CRC Error2" DstPort 2 } Branch { Points [0, -60] Branch { DstBlock "CRC Error6" DstPort 2 } Branch { Points [0, -85] Branch { DstBlock "CRC Error1" DstPort 2 } Branch { Points [0, -60] DstBlock "CRC Error5" DstPort 2 } } } } Branch { Points [545, 0; 0, -20] Branch { DstBlock "SR Latch 1" DstPort 2 } Branch { Points [0, -50] Branch { DstBlock "SR Latch 2" DstPort 2 } Branch { Points [0, -85] Branch { DstBlock "SR Latch 3" DstPort 2 } Branch { Points [0, -50] Branch { DstBlock "SR Latch 4" DstPort 2 } Branch { Points [0, -50] DstBlock "SR Latch 5" DstPort 2 } } } } } } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Length Checking" SrcPort 4 Points [235, 0] Branch { Points [0, 45] DstBlock "Logical1" DstPort 3 } Branch { Points [0, -145; 180, 0] Branch { DstBlock "Logical6" DstPort 2 } Branch { Points [0, 35] DstBlock "Logical2" DstPort 1 } } } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "SR Latch 4" DstPort 1 } Line { SrcBlock "SR Latch 3" SrcPort 1 Points [50, 0] Branch { DstBlock "ResetRx" DstPort 1 } Branch { Points [0, -295] DstBlock "done9" DstPort 1 } } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "SR Latch 3" DstPort 1 } Line { SrcBlock "done9" SrcPort 1 DstBlock "RxCRC" DstPort 9 } } } Block { BlockType SubSystem Name "Pkt Interrupt Outputs" SID "3336" Ports [4] Position [745, 207, 805, 403] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Pkt Interrupt Outputs" Location [264, 82, 1532, 972] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "105" Block { BlockType Inport Name "GoodHeader" SID "3337" Position [125, 508, 155, 522] IconDisplay "Port number" } Block { BlockType Inport Name "BadHeader" SID "3338" Position [125, 593, 155, 607] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "GoodPkt" SID "3339" Position [120, 333, 150, 347] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "BadPkt" SID "3340" Position [120, 418, 150, 432] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Delay1" SID "3341" Ports [1, 1] Position [840, 262, 870, 288] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "30,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "3342" Ports [1, 1] Position [845, 362, 875, 388] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "30,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From" SID "3343" Position [455, 309, 550, 331] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset_DV2" TagVisibility "global" } Block { BlockType From Name "From5" SID "3344" Position [790, 776, 930, 794] ShowName off CloseFcn "tagdialog Close" GotoTag "regTx_PktRunning" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "3345" Position [995, 207, 1130, 223] ShowName off GotoTag "intOut_GoodPkt" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "3346" Position [995, 247, 1130, 263] ShowName off GotoTag "intOut_GoodHeader" TagVisibility "global" } Block { BlockType Goto Name "Goto5" SID "3347" Position [995, 227, 1130, 243] ShowName off GotoTag "intOut_BadPkt" TagVisibility "global" } Block { BlockType Goto Name "Goto6" SID "3348" Position [995, 267, 1130, 283] ShowName off GotoTag "intOut_BadHeader" TagVisibility "global" } Block { BlockType Reference Name "Logical1" SID "3349" Ports [2, 1] Position [590, 471, 620, 504] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,33,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "3350" Ports [2, 1] Position [590, 296, 620, 329] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,33,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Pkt Interrupt Control" SID "3351" Ports [0, 6] Position [55, 165, 180, 260] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Pkt Interrupt Control" Location [294, 226, 1207, 828] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType From Name "From1" SID "3352" Position [285, 156, 435, 174] ShowName off CloseFcn "tagdialog Close" GotoTag "intrCtrl_RxPktInterrupts_rst" TagVisibility "global" } Block { BlockType From Name "From2" SID "3353" Position [285, 206, 435, 224] ShowName off CloseFcn "tagdialog Close" GotoTag "intrCtrl_RxHeaderInterrupts_rst" TagVisibility "global" } Block { BlockType From Name "From4" SID "3354" Position [325, 376, 475, 394] ShowName off CloseFcn "tagdialog Close" GotoTag "intrCtrl_RxGoodPkt_en" TagVisibility "global" } Block { BlockType From Name "From5" SID "3355" Position [325, 426, 475, 444] ShowName off CloseFcn "tagdialog Close" GotoTag "intrCtrl_RxBadPkt_en" TagVisibility "global" } Block { BlockType From Name "From6" SID "3356" Position [325, 476, 475, 494] ShowName off CloseFcn "tagdialog Close" GotoTag "intrCtrl_RxGoodHeader_en" TagVisibility "global" } Block { BlockType From Name "From7" SID "3357" Position [325, 526, 475, 544] ShowName off CloseFcn "tagdialog Close" GotoTag "intrCtrl_RxBadHeader_en" TagVisibility "global" } Block { BlockType Outport Name "GoodPkt_En" SID "3358" Position [540, 378, 570, 392] IconDisplay "Port number" } Block { BlockType Outport Name "PacketInts_Rst" SID "3359" Position [540, 158, 570, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "BadPkt_En" SID "3360" Position [540, 428, 570, 442] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "HeaderInts_Rst" SID "3361" Position [540, 208, 570, 222] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "GoodHeader_En" SID "3362" Position [540, 478, 570, 492] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "BadHeader_En" SID "3363" Position [540, 528, 570, 542] Port "6" IconDisplay "Port number" } Line { SrcBlock "From1" SrcPort 1 DstBlock "PacketInts_Rst" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "HeaderInts_Rst" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "GoodPkt_En" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 DstBlock "BadPkt_En" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 DstBlock "GoodHeader_En" DstPort 1 } Line { SrcBlock "From7" SrcPort 1 DstBlock "BadHeader_En" DstPort 1 } } } Block { BlockType Scope Name "PktDone\nInterrupts" SID "3364" Ports [9] Position [1225, 660, 1260, 790] Floating off Location [243, 754, 1527, 1721] Open off NumInputPorts "9" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" axes8 "%" axes9 "%" } TimeRange "13320" YMin "-1~-1~-1~-1~-1~-1~-1~-1~1" YMax "1~1~1~1~1~1~1~1~1" SaveName "ScopeData50" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "PktStaus Reg" SID "3365" Ports [4] Position [1020, 117, 1060, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "PktStaus Reg" Location [475, 104, 1468, 615] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" SID "3366" Position [195, 303, 225, 317] IconDisplay "Port number" } Block { BlockType Inport Name "In2" SID "3367" Position [280, 328, 310, 342] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "In3" SID "3368" Position [190, 353, 220, 367] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "In4" SID "3369" Position [280, 378, 310, 392] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "15b0" SID "3370" Ports [0, 1] Position [435, 206, 475, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "15" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "8.2.01" sg_icon_stat "40,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "3371" Ports [4, 1] Position [345, 298, 375, 397] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "4" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,165" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,99,4,1,white,blue,0,47d3d416,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 99 99 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 99 99 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[53.44 53.4" "4 57.44 53.44 57.44 57.44 57.44 53.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[49.44 49.44 53.44 53.44 " "49.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[45.44 45.44 49.44 49.44 45.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[41.44 41.44 45.44 41.44 45.44 45.44 41.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','te" "xmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Concat2" SID "3372" Ports [6, 1] Position [575, 175, 600, 330] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "6" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,165" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,155,6,1,white,blue,0,c44eeefa,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 155 155 0 ],[0.77 0." "82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 155 155 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[80" ".33 80.33 83.33 80.33 83.33 83.33 83.33 80.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[77.33 77.33 8" "0.33 80.33 77.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[74.33 74.33 77.33 77.33 74.33 " "],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[71.33 71.33 74.33 71.33 74.33 74.33 71.33 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'hi');\n\n\n\n\ncolor('black');port_label('input',6,'lo');\n\ncolor('black');disp('" "\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "3373" Ports [0, 1] Position [580, 375, 605, 395] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,20,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12" ".22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12." "22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('out" "put',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From3" SID "3374" Position [215, 231, 410, 249] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_pilotChanBA_aboveThresh" TagVisibility "global" } Block { BlockType From Name "From4" SID "3375" Position [270, 182, 350, 198] ShowName off CloseFcn "tagdialog Close" GotoTag "PktDetected" TagVisibility "global" } Block { BlockType From Name "From5" SID "3376" Position [215, 256, 410, 274] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_pilotChanAA_aboveThresh" TagVisibility "global" } Block { BlockType From Name "From6" SID "3377" Position [215, 281, 365, 299] ShowName off CloseFcn "tagdialog Close" GotoTag "RxAutoReply_MatchStatus" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "3378" Position [690, 247, 880, 263] ShowName off GotoTag "regRx_PktDone_InterruptStatus" TagVisibility "global" } Block { BlockType Goto Name "Goto4" SID "3379" Position [670, 378, 865, 392] ShowName off GotoTag "regRx_PktDone_InterruptStatusEn" TagVisibility "global" } Block { BlockType Reference Name "Up Sample" SID "3380" Ports [1, 1] Position [405, 336, 435, 364] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample3" SID "3381" Ports [1, 1] Position [440, 176, 470, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample4" SID "3382" Ports [1, 1] Position [425, 276, 455, 304] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Up Sample" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "In3" SrcPort 1 DstBlock "Concat" DstPort 3 } Line { SrcBlock "In4" SrcPort 1 DstBlock "Concat" DstPort 4 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Up Sample3" DstPort 1 } Line { SrcBlock "Up Sample3" SrcPort 1 DstBlock "Concat2" DstPort 1 } Line { SrcBlock "15b0" SrcPort 1 DstBlock "Concat2" DstPort 2 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Concat2" DstPort 3 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Concat2" DstPort 4 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Up Sample4" DstPort 1 } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "Concat2" DstPort 5 } Line { SrcBlock "Up Sample" SrcPort 1 Points [60, 0; 0, -35] DstBlock "Concat2" DstPort 6 } Line { SrcBlock "Concat2" SrcPort 1 DstBlock "Goto3" DstPort 1 } } } Block { BlockType Reference Name "Register1" SID "3383" Ports [3, 1] Position [725, 362, 770, 438] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,76,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 76 76 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 76 76 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[44.66 4" "4.66 50.66 44.66 50.66 50.66 50.66 44.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[38.66 38.66 44.66 " "44.66 38.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[32.66 32.66 38.66 38.66 32.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 26.66 32.66 32.66 26.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "3384" Ports [3, 1] Position [725, 277, 770, 353] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,76,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 76 76 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 76 76 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[44.66 4" "4.66 50.66 44.66 50.66 50.66 50.66 44.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[38.66 38.66 44.66 " "44.66 38.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[32.66 32.66 38.66 38.66 32.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 26.66 32.66 32.66 26.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register3" SID "3385" Ports [3, 1] Position [725, 452, 770, 528] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,76,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 76 76 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 76 76 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[44.66 4" "4.66 50.66 44.66 50.66 50.66 50.66 44.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[38.66 38.66 44.66 " "44.66 38.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[32.66 32.66 38.66 38.66 32.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 26.66 32.66 32.66 26.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register4" SID "3386" Ports [3, 1] Position [725, 537, 770, 613] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,76,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 76 76 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 76 76 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[44.66 4" "4.66 50.66 44.66 50.66 50.66 50.66 44.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[38.66 38.66 44.66 " "44.66 38.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[32.66 32.66 38.66 38.66 32.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 26.66 32.66 32.66 26.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Rx _Int_goodPkt" SID "3387" Ports [1, 1] Position [1080, 307, 1140, 323] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "60,16,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 16 16 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.985 0.979 0.895" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx _Int_goodPkt1" SID "3388" Ports [1, 1] Position [1060, 720, 1105, 730] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 45 45 0 0 ],[0 0 10 10 0 ]);\npatch([19.775 21.22 22.22 23.22 24.22 22.22 20.775 19.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([20.775 22.22 21.22 19.775 20.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([19.775 21.22 22.22 20.775 19.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([20.775 24.22 23.22 22.22 21.22 19.775 20.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Good Hdr Int" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Rx _Int_goodPkt2" SID "3389" Ports [1, 1] Position [1060, 660, 1105, 670] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 45 45 0 0 ],[0 0 10 10 0 ]);\npatch([19.775 21.22 22.22 23.22 24.22 22.22 20.775 19.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([20.775 22.22 21.22 19.775 20.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([19.775 21.22 22.22 20.775 19.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([20.775 24.22 23.22 22.22 21.22 19.775 20.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "BadPkt_In" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Rx _Int_goodPkt3" SID "3390" Ports [1, 1] Position [1060, 675, 1105, 685] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 45 45 0 0 ],[0 0 10 10 0 ]);\npatch([19.775 21.22 22.22 23.22 24.22 22.22 20.775 19.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([20.775 22.22 21.22 19.775 20.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([19.775 21.22 22.22 20.775 19.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([20.775 24.22 23.22 22.22 21.22 19.775 20.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "GoodPkt_In" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Rx _Int_goodPkt4" SID "3391" Ports [1, 1] Position [1060, 690, 1105, 700] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 45 45 0 0 ],[0 0 10 10 0 ]);\npatch([19.775 21.22 22.22 23.22 24.22 22.22 20.775 19.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([20.775 22.22 21.22 19.775 20.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([19.775 21.22 22.22 20.775 19.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([20.775 24.22 23.22 22.22 21.22 19.775 20.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Good Pkt Int" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Rx _Int_goodPkt5" SID "3392" Ports [1, 1] Position [1060, 705, 1105, 715] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 45 45 0 0 ],[0 0 10 10 0 ]);\npatch([19.775 21.22 22.22 23.22 24.22 22.22 20.775 19.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([20.775 22.22 21.22 19.775 20.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([19.775 21.22 22.22 20.775 19.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([20.775 24.22 23.22 22.22 21.22 19.775 20.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Bad Pkt Int" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Rx _Int_goodPkt6" SID "3393" Ports [1, 1] Position [1060, 735, 1105, 745] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 45 45 0 0 ],[0 0 10 10 0 ]);\npatch([19.775 21.22 22.22 23.22 24.22 22.22 20.775 19.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([20.775 22.22 21.22 19.775 20.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([19.775 21.22 22.22 20.775 19.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([20.775 24.22 23.22 22.22 21.22 19.775 20.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Bad Hdr Int" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Rx _Int_goodPkt7" SID "3394" Ports [1, 1] Position [1060, 780, 1105, 790] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 45 45 0 0 ],[0 0 10 10 0 ]);\npatch([19.775 21.22 22.22 23.22 24.22 22.22 20.775 19.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([20.775 22.22 21.22 19.775 20.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([19.775 21.22 22.22 20.775 19.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([20.775 24.22 23.22 22.22 21.22 19.775 20.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Tx Running" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Rx _Int_goodPkt8" SID "3395" Ports [1, 1] Position [1060, 750, 1105, 760] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 45 45 0 0 ],[0 0 10 10 0 ]);\npatch([19.775 21.22 22.22 23.22 24.22 22.22 20.775 19.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([20.775 22.22 21.22 19.775 20.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([19.775 21.22 22.22 20.775 19.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([20.775 24.22 23.22 22.22 21.22 19.775 20.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Good Hdr_In" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Rx _Int_goodPkt9" SID "3396" Ports [1, 1] Position [1060, 765, 1105, 775] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 45 45 0 0 ],[0 0 10 10 0 ]);\npatch([19.775 21.22 22.22 23.22 24.22 22.22 20.775 19.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([20.775 22.22 21.22 19.775 20.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([19.775 21.22 22.22 20.775 19.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([20.775 24.22 23.22 22.22 21.22 19.775 20.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Bad Hdr_In" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Rx_Int_badHeader" SID "3397" Ports [1, 1] Position [1080, 567, 1140, 583] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "60,16,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 16 16 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.985 0.979 0.895" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_Int_badPkt" SID "3398" Ports [1, 1] Position [1080, 392, 1140, 408] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "60,16,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 16 16 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.985 0.979 0.895" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_Int_goodHeader" SID "3399" Ports [1, 1] Position [1080, 482, 1140, 498] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "60,16,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 16 16 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.985 0.979 0.895" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "3400" Ports [1, 1] Position [975, 301, 1005, 329] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "30,28,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "3401" Ports [1, 1] Position [975, 386, 1005, 414] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "30,28,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample3" SID "3402" Ports [1, 1] Position [975, 476, 1005, 504] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "30,28,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample4" SID "3403" Ports [1, 1] Position [975, 561, 1005, 589] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "30,28,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Line { SrcBlock "Pkt Interrupt Control" SrcPort 1 Points [270, 0; 0, 115] DstBlock "Register2" DstPort 1 } Line { SrcBlock "Pkt Interrupt Control" SrcPort 3 Points [250, 0; 0, 170] DstBlock "Register1" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 Points [55, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, 85] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "From" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Logical5" DstPort 2 } Branch { Points [0, 160] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 Points [45, 0] Branch { Points [130, 0] Branch { DstBlock "Up Sample1" DstPort 1 } Branch { Points [0, -100] Branch { DstBlock "Goto1" DstPort 1 } Branch { Labels [0, 0] Points [0, -45] DstBlock "PktStaus Reg" DstPort 4 } } Branch { Points [0, 380] DstBlock "Rx _Int_goodPkt4" DstPort 1 } } Branch { Points [0, -40] DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "Register1" SrcPort 1 Points [45, 0] Branch { Points [120, 0] Branch { DstBlock "Up Sample2" DstPort 1 } Branch { Points [0, -165] Branch { DstBlock "Goto5" DstPort 1 } Branch { Labels [0, 0] Points [0, -80] DstBlock "PktStaus Reg" DstPort 3 } } Branch { Points [0, 310] DstBlock "Rx _Int_goodPkt5" DstPort 1 } } Branch { Points [0, -25] DstBlock "Delay2" DstPort 1 } } Line { Name "BadPkt_In" Labels [0, 0] SrcBlock "Rx _Int_goodPkt2" SrcPort 1 DstBlock "PktDone\nInterrupts" DstPort 1 } Line { Name "GoodPkt_In" Labels [0, 0] SrcBlock "Rx _Int_goodPkt3" SrcPort 1 DstBlock "PktDone\nInterrupts" DstPort 2 } Line { Name "Good Pkt Int" Labels [0, 0] SrcBlock "Rx _Int_goodPkt4" SrcPort 1 DstBlock "PktDone\nInterrupts" DstPort 3 } Line { Name "Bad Pkt Int" Labels [0, 0] SrcBlock "Rx _Int_goodPkt5" SrcPort 1 DstBlock "PktDone\nInterrupts" DstPort 4 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Rx _Int_goodPkt" DstPort 1 } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Rx_Int_badPkt" DstPort 1 } Line { SrcBlock "GoodHeader" SrcPort 1 Points [130, 0] Branch { DstBlock "Register3" DstPort 3 } Branch { Labels [2, 0] Points [0, 240] DstBlock "Rx _Int_goodPkt8" DstPort 1 } } Line { SrcBlock "Pkt Interrupt Control" SrcPort 5 Points [220, 0; 0, 230] DstBlock "Register3" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 Points [155, 0] Branch { DstBlock "Up Sample3" DstPort 1 } Branch { Points [0, -235] Branch { DstBlock "Goto2" DstPort 1 } Branch { Labels [0, 0] Points [0, -115] DstBlock "PktStaus Reg" DstPort 2 } } Branch { Points [0, 235] DstBlock "Rx _Int_goodPkt1" DstPort 1 } } Line { SrcBlock "Up Sample3" SrcPort 1 DstBlock "Rx_Int_goodHeader" DstPort 1 } Line { Name "Good Hdr Int" Labels [0, 0] SrcBlock "Rx _Int_goodPkt1" SrcPort 1 DstBlock "PktDone\nInterrupts" DstPort 5 } Line { Name "Bad Hdr Int" Labels [0, 0] SrcBlock "Rx _Int_goodPkt6" SrcPort 1 DstBlock "PktDone\nInterrupts" DstPort 6 } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "Rx_Int_badHeader" DstPort 1 } Line { SrcBlock "Register4" SrcPort 1 Points [145, 0] Branch { DstBlock "Up Sample4" DstPort 1 } Branch { Points [0, -300] Branch { DstBlock "Goto6" DstPort 1 } Branch { Labels [0, 0] Points [0, -150] DstBlock "PktStaus Reg" DstPort 1 } } Branch { Points [0, 165] DstBlock "Rx _Int_goodPkt6" DstPort 1 } } Line { SrcBlock "BadHeader" SrcPort 1 Points [120, 0] Branch { DstBlock "Register4" DstPort 3 } Branch { Points [0, 170] DstBlock "Rx _Int_goodPkt9" DstPort 1 } } Line { SrcBlock "Pkt Interrupt Control" SrcPort 6 Points [200, 0; 0, 300] DstBlock "Register4" DstPort 1 } Line { SrcBlock "Pkt Interrupt Control" SrcPort 4 Points [235, 0; 0, 275] DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [30, 0] Branch { DstBlock "Register3" DstPort 2 } Branch { Points [0, 85] DstBlock "Register4" DstPort 2 } } Line { SrcBlock "Pkt Interrupt Control" SrcPort 2 Points [260, 0; 0, 115] DstBlock "Logical5" DstPort 1 } Line { Name "Tx Running" Labels [0, 0] SrcBlock "Rx _Int_goodPkt7" SrcPort 1 DstBlock "PktDone\nInterrupts" DstPort 9 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Rx _Int_goodPkt7" DstPort 1 } Line { SrcBlock "GoodPkt" SrcPort 1 Points [180, 0] Branch { DstBlock "Register2" DstPort 3 } Branch { Points [0, 340] DstBlock "Rx _Int_goodPkt3" DstPort 1 } } Line { SrcBlock "BadPkt" SrcPort 1 Points [170, 0] Branch { DstBlock "Register1" DstPort 3 } Branch { Points [0, 240] DstBlock "Rx _Int_goodPkt2" DstPort 1 } } Line { Name "Bad Hdr_In" Labels [0, 0] SrcBlock "Rx _Int_goodPkt9" SrcPort 1 DstBlock "PktDone\nInterrupts" DstPort 8 } Line { Name "Good Hdr_In" Labels [0, 0] SrcBlock "Rx _Int_goodPkt8" SrcPort 1 DstBlock "PktDone\nInterrupts" DstPort 7 } } } Block { BlockType Outport Name "ResetRx" SID "3404" Position [770, 173, 800, 187] IconDisplay "Port number" } Line { SrcBlock "Vin" SrcPort 1 Points [95, 0] Branch { DstBlock "CRC32 Calc" DstPort 2 } Branch { Points [0, -50] DstBlock "CRC16 Calc" DstPort 2 } } Line { SrcBlock "ByteIn" SrcPort 1 Points [130, 0] Branch { DstBlock "CRC32 Calc" DstPort 1 } Branch { Points [0, -50] DstBlock "CRC16 Calc" DstPort 1 } } Line { SrcBlock "Rst" SrcPort 1 Points [65, 0] Branch { DstBlock "CRC32 Calc" DstPort 3 } Branch { Points [0, -50] DstBlock "CRC16 Calc" DstPort 3 } Branch { Points [0, 40] DstBlock "Error Checking1" DstPort 3 } } Line { SrcBlock "ByteAddr" SrcPort 1 DstBlock "Error Checking1" DstPort 5 } Line { SrcBlock "NumBytes" SrcPort 1 DstBlock "Error Checking1" DstPort 4 } Line { SrcBlock "CRC32 Calc" SrcPort 1 DstBlock "Error Checking1" DstPort 2 } Line { SrcBlock "CRC16 Calc" SrcPort 1 DstBlock "Error Checking1" DstPort 1 } Line { SrcBlock "Error Checking1" SrcPort 1 DstBlock "ResetRx" DstPort 1 } Line { SrcBlock "Error Checking1" SrcPort 2 DstBlock "Pkt Interrupt Outputs" DstPort 1 } Line { SrcBlock "Error Checking1" SrcPort 3 DstBlock "Pkt Interrupt Outputs" DstPort 2 } Line { SrcBlock "Error Checking1" SrcPort 4 DstBlock "Pkt Interrupt Outputs" DstPort 3 } Line { SrcBlock "Error Checking1" SrcPort 5 DstBlock "Pkt Interrupt Outputs" DstPort 4 } } } Block { BlockType SubSystem Name "Header Decoding" SID "3405" Ports [4, 2] Position [430, 317, 545, 378] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Header Decoding" Location [202, 82, 1325, 769] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "RxByteAddr" SID "3406" Position [345, 222, 375, 238] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "RxByte" SID "3407" Position [540, 193, 570, 207] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "RxByteWE" SID "3408" Position [455, 214, 480, 226] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "3409" Position [540, 163, 570, 177] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "4LSB" SID "3410" Ports [1, 1] Position [870, 341, 905, 359] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "4MSB" SID "3411" Ports [1, 1] Position [870, 366, 905, 384] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB" SID "3412" Ports [1, 1] Position [295, 306, 330, 324] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+8" SID "3413" Ports [1, 1] Position [295, 391, 330, 409] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8MSB" SID "3414" Ports [1, 1] Position [295, 536, 330, 554] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert1" SID "3415" Ports [1, 1] Position [1115, 301, 1145, 319] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,423" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,9657e937,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert2" SID "3416" Ports [1, 1] Position [765, 496, 795, 514] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,423" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,9657e937,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From2" SID "3417" Position [15, 392, 175, 408] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_headerByteNums" TagVisibility "global" } Block { BlockType Reference Name "Logical1" SID "3418" Ports [2, 1] Position [555, 513, 580, 542] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 29 29 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[17.33 " "17.33 20.33 17.33 20.33 20.33 20.33 17.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[14.33 14.33 17.33" " 17.33 14.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[11.33 11.33 14.33 14.33 11.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[8.33 8.33 11.33 8.33 11.33 11.33 8.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "3419" Ports [2, 1] Position [550, 366, 580, 399] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "3420" Ports [2, 1] Position [550, 281, 580, 314] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Mod Masks Sanity\nChecking" SID "3421" Ports [1, 1] Position [910, 484, 1015, 526] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Mod Masks Sanity\nChecking" Location [202, 82, 1918, 1026] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "ModMasks" SID "3422" Position [385, 228, 415, 242] IconDisplay "Port number" } Block { BlockType Reference Name "4LSB" SID "3423" Ports [1, 1] Position [510, 351, 545, 369] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "4MSB" SID "3424" Ports [1, 1] Position [510, 226, 545, 244] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat1" SID "3425" Ports [2, 1] Position [865, 358, 895, 427] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1.3" sg_icon_stat "30,69,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 69 69 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 69 69 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[38.44 38.4" "4 42.44 38.44 42.44 42.44 42.44 38.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[34.44 34.44 38.44 38.44 " "34.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[30.44 30.44 34.44 34.44 30.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[26.44 26.44 30.44 26.44 30.44 30.44 26.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmod" "e','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "3426" Ports [0, 1] Position [615, 316, 645, 334] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "3427" Ports [0, 1] Position [510, 241, 540, 259] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "6" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,0,1,white,blue,0,f0403ad7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'6');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "3428" Ports [3, 1] Position [735, 349, 755, 471] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,122,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 17.4286 104.571 122 0 " "],[0.77 0.82 0.91 ]);\nplot([0 20 20 0 0 ],[0 17.4286 104.571 122 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.4" "4 7.55 5.55 ],[63.22 63.22 65.22 63.22 65.22 65.22 65.22 63.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ]," "[61.22 61.22 63.22 63.22 61.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[59.22 59.22 61.22 6" "1.22 59.22 ],[1 1 1 ]);\npatch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[57.22 57.22 59.22 57.22 59.22 59.22 57." "22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_lab" "el('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "3429" Ports [3, 1] Position [735, 224, 755, 346] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,122,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 17.4286 104.571 122 0 " "],[0.77 0.82 0.91 ]);\nplot([0 20 20 0 0 ],[0 17.4286 104.571 122 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.4" "4 7.55 5.55 ],[63.22 63.22 65.22 63.22 65.22 65.22 65.22 63.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ]," "[61.22 61.22 63.22 63.22 61.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[59.22 59.22 61.22 6" "1.22 59.22 ],[1 1 1 ]);\npatch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[57.22 57.22 59.22 57.22 59.22 59.22 57." "22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_lab" "el('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "3430" Ports [2, 1] Position [610, 351, 655, 384] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,33,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 33 33 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b'," "'texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "3431" Ports [2, 1] Position [610, 226, 655, 259] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,33,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 33 33 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b'," "'texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name " ModMasks" SID "3432" Position [1020, 388, 1050, 402] IconDisplay "Port number" } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Mux1" DstPort 1 } Line { SrcBlock "4LSB" SrcPort 1 Points [30, 0] Branch { DstBlock "Relational2" DstPort 1 } Branch { Points [0, 50] DstBlock "Mux1" DstPort 2 } } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "Concat1" SrcPort 1 DstBlock " ModMasks" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Mux2" DstPort 1 } Line { SrcBlock "4MSB" SrcPort 1 Points [30, 0] Branch { Points [0, 50] DstBlock "Mux2" DstPort 2 } Branch { DstBlock "Relational3" DstPort 1 } } Line { SrcBlock "Constant2" SrcPort 1 Points [30, 0] Branch { DstBlock "Relational3" DstPort 2 } Branch { Points [0, 125] DstBlock "Relational2" DstPort 2 } } Line { SrcBlock "Mux2" SrcPort 1 Points [45, 0; 0, 90] DstBlock "Concat1" DstPort 1 } Line { SrcBlock "ModMasks" SrcPort 1 Points [40, 0] Branch { DstBlock "4MSB" DstPort 1 } Branch { Points [0, 125] DstBlock "4LSB" DstPort 1 } } Line { SrcBlock "Constant1" SrcPort 1 Points [55, 0] Branch { DstBlock "Mux2" DstPort 3 } Branch { Points [0, 125] DstBlock "Mux1" DstPort 3 } } } } Block { BlockType Reference Name "Register1" SID "3433" Ports [3, 1] Position [670, 470, 715, 540] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "34" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,70,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 70 70 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 70 70 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[41.66 4" "1.66 47.66 41.66 47.66 47.66 47.66 41.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[35.66 35.66 41.66 " "41.66 35.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[29.66 29.66 35.66 35.66 29.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 23.66 29.66 29.66 23.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "3434" Ports [2, 1] Position [430, 513, 475, 557] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "3435" Ports [2, 1] Position [435, 283, 480, 327] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "3436" Ports [2, 1] Position [435, 368, 480, 412] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "numBytesUpdate1" SID "3437" Ports [6, 1] Position [1000, 262, 1085, 353] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "numBytesUpdate1" Location [202, 82, 1918, 1026] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "rst" SID "3438" Position [145, 273, 175, 287] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "d" SID "3439" Position [200, 248, 230, 262] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "lsb_EN" SID "3440" Position [145, 408, 175, 422] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "msb_EN" SID "3441" Position [145, 298, 175, 312] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "modMask_AntA" SID "3442" Position [145, 513, 175, 527] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "modMask_AntB" SID "3443" Position [145, 553, 175, 567] Port "6" IconDisplay "Port number" } Block { BlockType Reference Name "Concat1" SID "3444" Ports [2, 1] Position [485, 312, 535, 363] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\" "fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Display Name "Display" SID "3445" Ports [1] Position [925, 509, 1040, 531] ShowName off Decimation "1" Lockdown off } Block { BlockType Display Name "Display1" SID "3446" Ports [1] Position [925, 549, 1040, 571] ShowName off Decimation "1" Lockdown off } Block { BlockType Display Name "Display2" SID "3447" Ports [1] Position [925, 474, 1040, 496] ShowName off Decimation "1" Lockdown off } Block { BlockType Reference Name "Gateway Out" SID "3448" Ports [1, 1] Position [850, 513, 885, 527] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "Gateway Out1" SID "3449" Ports [1, 1] Position [850, 553, 885, 567] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "Gateway Out2" SID "3450" Ports [1, 1] Position [850, 478, 885, 492] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType SubSystem Name "Length Sanity\nChecking" SID "3451" Ports [3, 1] Position [780, 354, 875, 426] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Length Sanity\nChecking" Location [202, 74, 1910, 1156] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Req Len" SID "3452" Position [240, 398, 270, 412] IconDisplay "Port number" } Block { BlockType Inport Name "modMask_AntA" SID "3453" Position [300, 268, 330, 282] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "modMask_AntB" SID "3454" Position [300, 283, 330, 297] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Concat" SID "3455" Ports [2, 1] Position [790, 350, 815, 425] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1.3" sg_icon_stat "25,75,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 75 75 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[40.33 " "40.33 43.33 40.33 43.33 43.33 43.33 40.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[37.33 37.33 40.33" " 40.33 37.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[34.33 34.33 37.33 37.33 34.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[31.33 31.33 34.33 31.33 34.33 34.33 31.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{2" "0}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat1" SID "3456" Ports [2, 1] Position [390, 266, 415, 299] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1.3" sg_icon_stat "25,33,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 33 33 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[19.33 " "19.33 22.33 19.33 22.33 22.33 22.33 19.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[16.33 16.33 19.33" " 19.33 16.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[13.33 13.33 16.33 16.33 13.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[10.33 10.33 13.33 10.33 13.33 13.33 10.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{2" "0}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "3457" Ports [0, 1] Position [395, 412, 450, 428] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "4095" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "12" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,16,0,1,white,blue,0,6b47c4e1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 16 16 0 ]);\npatch([22.55 25.44 27.44 29.44 31.44 27.44 24.55 22.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([24.55 27.44 25.44 22.55 24.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([22.55 25.44 27.44 24.55 22.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([24.55 31.44 29.44 27.44 25.44 22.55 24.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'4095');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "3458" Ports [0, 1] Position [390, 241, 410, 259] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "3459" Position [930, 397, 1090, 413] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_fixedLenMode" TagVisibility "global" } Block { BlockType From Name "From2" SID "3460" Position [930, 507, 1090, 523] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_fixedLen_maxNumBytes" TagVisibility "global" } Block { BlockType From Name "From3" SID "3461" Position [175, 352, 335, 368] ShowName off CloseFcn "tagdialog Close" GotoTag "regTxRx_numHeaderBytes" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "3462" Ports [1, 1] Position [670, 388, 695, 402] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "3463" Ports [2, 1] Position [720, 342, 750, 378] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,36,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 36 36 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[22.44 22.4" "4 26.44 22.44 26.44 26.44 26.44 22.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[18.44 18.44 22.44 22.44 " "18.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[14.44 14.44 18.44 18.44 14.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[10.44 10.44 14.44 10.44 14.44 14.44 10.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "3464" Ports [2, 1] Position [720, 387, 750, 423] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,36,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 36 36 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[22.44 22.4" "4 26.44 22.44 26.44 26.44 26.44 22.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[18.44 18.44 22.44 22.44 " "18.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[14.44 14.44 18.44 18.44 14.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[10.44 10.44 14.44 10.44 14.44 14.44 10.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "3465" Ports [4, 1] Position [880, 364, 905, 551] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,187,4,1,white,blue,3,58b3489d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 26.7143 160.286 187 0 " "],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 26.7143 160.286 187 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12." "66 8.325 5.325 ],[96.33 96.33 99.33 96.33 99.33 99.33 99.33 96.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8." "325 ],[93.33 93.33 96.33 96.33 93.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[90.33 90.3" "3 93.33 93.33 90.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[87.33 87.33 90.33 87.33 90." "33 90.33 87.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i" "con text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('bla" "ck');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\n\ncolor('black');disp('\\bf{}','te" "xmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux2" SID "3466" Ports [3, 1] Position [1135, 376, 1160, 544] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,168,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 24 144 168 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 24 144 168 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[" "87.33 87.33 90.33 87.33 90.33 90.33 90.33 87.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[84.33 84.33" " 87.33 87.33 84.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[81.33 81.33 84.33 84.33 81.3" "3 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[78.33 78.33 81.33 78.33 81.33 81.33 78.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('i" "nput',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "3467" Ports [2, 1] Position [560, 396, 605, 429] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,33,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 33 33 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b'," "'texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "3468" Ports [2, 1] Position [560, 351, 605, 384] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,33,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 33 33 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b'," "'texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "3469" Ports [2, 1] Position [470, 253, 515, 297] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Len" SID "3470" Position [1255, 453, 1285, 467] IconDisplay "Port number" } Line { SrcBlock "Req Len" SrcPort 1 Points [250, 0] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 30] DstBlock "Mux1" DstPort 2 } Branch { Points [0, -30] DstBlock "Relational2" DstPort 2 } } Line { SrcBlock "Constant1" SrcPort 1 Points [65, 0] Branch { Points [0, 60] DstBlock "Mux1" DstPort 3 } Branch { DstBlock "Relational1" DstPort 2 } } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Mux2" DstPort 2 } Line { SrcBlock "From3" SrcPort 1 Points [175, 0] Branch { Points [0, 165] DstBlock "Mux1" DstPort 4 } Branch { DstBlock "Relational2" DstPort 1 } } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Mux1" DstPort 1 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "modMask_AntA" SrcPort 1 DstBlock "Concat1" DstPort 1 } Line { SrcBlock "modMask_AntB" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 Points [20, 0; 0, 15] DstBlock "Relational3" DstPort 1 } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [0, 10] DstBlock "Concat" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 Points [135, 0; 0, 75] Branch { DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "Mux2" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Mux2" DstPort 3 } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "Len" DstPort 1 } } } Block { BlockType Reference Name "Logical4" SID "3471" Ports [2, 1] Position [580, 142, 610, 213] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,71,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 71 71 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 71 71 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[39.44 39.4" "4 43.44 39.44 43.44 43.44 43.44 39.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[35.44 35.44 39.44 39.44 " "35.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[31.44 31.44 35.44 35.44 31.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[27.44 27.44 31.44 27.44 31.44 31.44 27.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge" SID "3472" Ports [1, 1] Position [614, 260, 636, 295] BlockRotation 270 BlockMirror on NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge" Location [202, 70, 1799, 1056] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "3473" Position [35, 33, 65, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Inverter" SID "3474" Ports [1, 1] Position [110, 49, 150, 71] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,22,1,1,white,blue,0,e69ac283,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\nnot');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Reference Name "Logical" SID "3475" Ports [2, 1] Position [205, 28, 250, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3476" Position [275, 43, 305, 57] IconDisplay "Port number" } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 20] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType Reference Name "Register4" SID "3477" Ports [3, 1] Position [385, 245, 430, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,70,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 70 70 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 70 70 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[41.66 4" "1.66 47.66 41.66 47.66 47.66 47.66 41.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[35.66 35.66 41.66 " "41.66 35.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[29.66 29.66 35.66 35.66 29.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 23.66 29.66 29.66 23.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register5" SID "3478" Ports [3, 1] Position [385, 355, 430, 425] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "100" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,70,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 70 70 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 70 70 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[41.66 4" "1.66 47.66 41.66 47.66 47.66 47.66 41.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[35.66 35.66 41.66 " "41.66 35.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[29.66 29.66 35.66 35.66 29.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 23.66 29.66 29.66 23.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register6" SID "3479" Ports [3, 1] Position [665, 330, 710, 400] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "100" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,70,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 70 70 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 70 70 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[41.66 4" "1.66 47.66 41.66 47.66 47.66 47.66 41.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[35.66 35.66 41.66 " "41.66 35.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[29.66 29.66 35.66 35.66 29.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 23.66 29.66 29.66 23.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType SubSystem Name "SR Latch " SID "3480" Ports [2, 1] Position [485, 142, 530, 173] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch " Location [202, 70, 1799, 1056] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "3481" Position [125, 223, 155, 237] IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "3482" Position [170, 243, 200, 257] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "3483" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "3484" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3485" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType SubSystem Name "SR Latch 1" SID "3486" Ports [2, 1] Position [485, 177, 530, 208] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 1" Location [202, 70, 1799, 1056] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "3487" Position [125, 223, 155, 237] IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "3488" Position [170, 243, 200, 257] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "3489" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "3490" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3491" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType Outport Name "numBytes" SID "3492" Position [1030, 383, 1060, 397] IconDisplay "Port number" } Line { SrcBlock "d" SrcPort 1 Points [10, 0] Branch { DstBlock "Register4" DstPort 1 } Branch { Points [0, 110] DstBlock "Register5" DstPort 1 } } Line { SrcBlock "rst" SrcPort 1 Points [10, 0] Branch { Points [160, 0] Branch { DstBlock "Register4" DstPort 2 } Branch { Points [0, 110] Branch { DstBlock "Register5" DstPort 2 } Branch { Points [0, 50; 255, 0; 0, -75] DstBlock "Register6" DstPort 2 } } } Branch { Points [0, -130; 270, 0] Branch { DstBlock "SR Latch " DstPort 1 } Branch { Points [0, 35] DstBlock "SR Latch 1" DstPort 1 } } } Line { SrcBlock "lsb_EN" SrcPort 1 Points [140, 0] Branch { DstBlock "Register5" DstPort 3 } Branch { Points [0, -215] DstBlock "SR Latch 1" DstPort 2 } } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "Register6" DstPort 1 } Line { SrcBlock "Register4" SrcPort 1 Points [15, 0; 0, 45] DstBlock "Concat1" DstPort 1 } Line { SrcBlock "Register5" SrcPort 1 Points [15, 0; 0, -40] DstBlock "Concat1" DstPort 2 } Line { SrcBlock "msb_EN" SrcPort 1 Points [130, 0] Branch { DstBlock "Register4" DstPort 3 } Branch { Points [0, -140] DstBlock "SR Latch " DstPort 2 } } Line { SrcBlock "SR Latch " SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "SR Latch 1" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 Points [10, 0] DstBlock "Posedge" DstPort 1 } Line { SrcBlock "Posedge" SrcPort 1 Points [0, 90] DstBlock "Register6" DstPort 3 } Line { SrcBlock "Length Sanity\nChecking" SrcPort 1 Points [60, 0] Branch { DstBlock "numBytes" DstPort 1 } Branch { Points [0, 70; -105, 0] DstBlock "Gateway Out2" DstPort 1 } } Line { Labels [0, 0] SrcBlock "Register6" SrcPort 1 DstBlock "Length Sanity\nChecking" DstPort 1 } Line { SrcBlock "modMask_AntA" SrcPort 1 Points [545, 0] Branch { Points [0, -130] DstBlock "Length Sanity\nChecking" DstPort 2 } Branch { DstBlock "Gateway Out" DstPort 1 } } Line { SrcBlock "modMask_AntB" SrcPort 1 Points [555, 0] Branch { Points [0, -145] DstBlock "Length Sanity\nChecking" DstPort 3 } Branch { DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "Gateway Out" SrcPort 1 DstBlock "Display" DstPort 1 } Line { SrcBlock "Gateway Out1" SrcPort 1 DstBlock "Display1" DstPort 1 } Line { SrcBlock "Gateway Out2" SrcPort 1 DstBlock "Display2" DstPort 1 } Annotation { Name "This register has an initial value of 100,\nwhich will let the Rx process 100 bytes should\nsomething" " go very wrong in decoding the\nheader. A default value of 0 will break\nthe Rx state machine!" Position [780, 287] } } } Block { BlockType Outport Name "numBytes" SID "3493" Position [1215, 303, 1245, 317] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "modMask" SID "3494" Position [1155, 498, 1185, 512] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "8LSB+8" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "8LSB" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Rst" SrcPort 1 Points [50, 0; 0, 100] Branch { Points [0, 235] DstBlock "Register1" DstPort 2 } Branch { DstBlock "numBytesUpdate1" DstPort 1 } } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "numBytesUpdate1" DstPort 3 } Line { SrcBlock "Logical2" SrcPort 1 Points [25, 0; 0, -70] DstBlock "numBytesUpdate1" DstPort 4 } Line { SrcBlock "numBytesUpdate1" SrcPort 1 DstBlock "Assert1" DstPort 1 } Line { SrcBlock "Assert1" SrcPort 1 DstBlock "numBytes" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 Points [0, 0; 55, 0] Branch { Points [0, 0] Branch { DstBlock "8LSB+8" DstPort 1 } Branch { Points [0, -85] DstBlock "8LSB" DstPort 1 } } Branch { Points [0, 145] DstBlock "8MSB" DstPort 1 } } Line { SrcBlock "RxByteWE" SrcPort 1 Points [25, 0; 0, 70] Branch { DstBlock "Logical4" DstPort 1 } Branch { Points [0, 85] Branch { Points [0, 145] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Logical2" DstPort 1 } } } Line { SrcBlock "RxByte" SrcPort 1 Points [40, 0; 0, 85] Branch { Points [0, 195] DstBlock "Register1" DstPort 1 } Branch { DstBlock "numBytesUpdate1" DstPort 2 } } Line { SrcBlock "RxByteAddr" SrcPort 1 Points [20, 0; 0, 65] Branch { DstBlock "Relational2" DstPort 1 } Branch { Points [0, 85] Branch { DstBlock "Relational3" DstPort 1 } Branch { Points [0, 145] DstBlock "Relational1" DstPort 1 } } } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [0, 0] DstBlock "Register1" DstPort 3 } Line { SrcBlock "8MSB" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Assert2" DstPort 1 } Line { SrcBlock "Assert2" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -130] Branch { DstBlock "4MSB" DstPort 1 } Branch { Points [0, -25] DstBlock "4LSB" DstPort 1 } } Branch { DstBlock "Mod Masks Sanity\nChecking" DstPort 1 } } Line { SrcBlock "4LSB" SrcPort 1 Points [60, 0; 0, -20] DstBlock "numBytesUpdate1" DstPort 5 } Line { SrcBlock "4MSB" SrcPort 1 Points [70, 0; 0, -30] DstBlock "numBytesUpdate1" DstPort 6 } Line { SrcBlock "Mod Masks Sanity\nChecking" SrcPort 1 DstBlock "modMask" DstPort 1 } } } Block { BlockType Outport Name "numBytes" SID "3495" Position [880, 328, 910, 342] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "modMask" SID "3496" Position [880, 358, 910, 372] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "ResetRx" SID "3497" Position [820, 418, 850, 432] Port "3" IconDisplay "Port number" } Line { SrcBlock "Payload_Addr" SrcPort 1 DstBlock "Descrambling\n& Pkt Buffer" DstPort 1 } Line { SrcBlock "Payload_Data" SrcPort 1 DstBlock "Descrambling\n& Pkt Buffer" DstPort 2 } Line { SrcBlock "Payload_WE" SrcPort 1 DstBlock "Descrambling\n& Pkt Buffer" DstPort 3 } Line { SrcBlock "Rst" SrcPort 1 Points [75, 0] Branch { DstBlock "Error Checking" DstPort 5 } Branch { Points [0, 25] DstBlock "AutoResponse Processing" DstPort 1 } Branch { Points [0, -95] Branch { DstBlock "Header Decoding" DstPort 4 } Branch { Points [0, -110] DstBlock "BER Calc" DstPort 4 } } } Line { SrcBlock "Descrambling\n& Pkt Buffer" SrcPort 1 Points [90, 0] Branch { Points [0, 110] Branch { DstBlock "Header Decoding" DstPort 1 } Branch { Points [0, 80] Branch { DstBlock "Error Checking" DstPort 2 } Branch { Points [0, 95] DstBlock "AutoResponse Processing" DstPort 2 } } } Branch { DstBlock "BER Calc" DstPort 1 } } Line { SrcBlock "Descrambling\n& Pkt Buffer" SrcPort 2 Points [80, 0] Branch { Points [0, 110] Branch { DstBlock "Header Decoding" DstPort 2 } Branch { Points [0, 85] Branch { DstBlock "Error Checking" DstPort 3 } Branch { Points [0, 85] DstBlock "AutoResponse Processing" DstPort 3 } } } Branch { DstBlock "BER Calc" DstPort 2 } } Line { SrcBlock "Descrambling\n& Pkt Buffer" SrcPort 3 Points [70, 0] Branch { Points [0, 110] Branch { DstBlock "Header Decoding" DstPort 3 } Branch { Points [0, 90] Branch { DstBlock "Error Checking" DstPort 4 } Branch { Points [0, 75] DstBlock "AutoResponse Processing" DstPort 4 } } } Branch { DstBlock "BER Calc" DstPort 3 } } Line { SrcBlock "Header Decoding" SrcPort 1 Points [45, 0] Branch { Points [0, 50] DstBlock "Error Checking" DstPort 1 } Branch { Points [0, -30; -175, 0; 0, -30] DstBlock "BER Calc" DstPort 5 } Branch { DstBlock "numBytes" DstPort 1 } } Line { SrcBlock "Header Decoding" SrcPort 2 DstBlock "modMask" DstPort 1 } Line { SrcBlock "PktDone" SrcPort 1 DstBlock "AutoResponse Processing" DstPort 5 } Line { SrcBlock "Error Checking" SrcPort 1 DstBlock "ResetRx" DstPort 1 } Annotation { Position [533, 519] } } } Block { BlockType Scope Name "Decoder" SID "3498" Ports [10] Position [1285, 13, 1355, 172] NamePlacement "alternate" Floating off Location [1, 52, 1681, 1019] Open off NumInputPorts "10" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" axes8 "%" axes9 "%" axes10 "%" } TimeRange "14000" YMin "-1~-1~0~-1~-0.75~-1~0~0~0~-1" YMax "2~2~75~5~0.75~1~2~150~300~2" SaveName "ScopeData33" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Scope Name "Decoder2" SID "3499" Ports [6] Position [1640, 153, 1710, 252] NamePlacement "alternate" Floating off Location [1681, 52, 2961, 1023] Open off NumInputPorts "6" ZoomMode "yonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" } TimeRange "15000" YMin "-1~-1~-1~-1~-1~-1" YMax "2~2~1~2~2~2" SaveName "ScopeData35" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Scope Name "Decoder3" SID "3500" Ports [9] Position [1640, 1224, 1710, 1366] NamePlacement "alternate" Floating off Location [631, 227, 1915, 1194] Open off NumInputPorts "9" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" axes8 "%" axes9 "%" } TimeRange "6724.590163934425" YMin "-1~-1~-1~-1~0~0~0~-5~-5" YMax "2~2~1~2~1~3500~1~5~5" SaveName "ScopeData24" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "Delay1" SID "3501" Ports [1, 1] Position [310, 1042, 335, 1068] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "3502" Ports [1, 1] Position [310, 697, 335, 723] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "3503" Ports [1, 1] Position [195, 1042, 220, 1068] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "3504" Ports [1, 1] Position [135, 441, 160, 459] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "3505" Ports [1, 1] Position [220, 456, 245, 474] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "3506" Ports [1, 1] Position [255, 471, 280, 489] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "3507" Ports [1, 1] Position [285, 486, 310, 504] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay8" SID "3508" Ports [1, 1] Position [315, 501, 340, 519] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay9" SID "3509" Ports [1, 1] Position [555, 211, 580, 229] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode','on')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Display Name "Display" SID "3510" Ports [1] Position [305, 209, 385, 231] BlockMirror on NamePlacement "alternate" ShowName off Decimation "1" Lockdown off } Block { BlockType Reference Name "Down Sample" SID "3511" Ports [1, 1] Position [1270, 264, 1300, 296] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,368,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,32,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "3512" Ports [1, 1] Position [1270, 294, 1300, 326] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,368,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,32,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample2" SID "3513" Ports [1, 1] Position [1270, 324, 1300, 356] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,368,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,32,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "3514" Ports [1, 1] Position [1270, 354, 1300, 386] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,368,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,32,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType SubSystem Name "EVM Calc" SID "3515" Ports [8] Position [310, 926, 395, 1014] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "EVM Calc" Location [2, 82, 1678, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Rx Bits" SID "3516" Position [230, 308, 260, 322] IconDisplay "Port number" } Block { BlockType Inport Name "Mod Sel" SID "3517" Position [230, 358, 260, 372] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Eq I" SID "3518" Position [485, 283, 515, 297] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Eq Q" SID "3519" Position [485, 333, 515, 347] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Xk_ind" SID "3520" Position [190, 713, 220, 727] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Sym_ind" SID "3521" Position [190, 778, 220, 792] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "3522" Position [230, 523, 260, 537] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "Done" SID "3523" Position [230, 588, 260, 602] Port "8" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "3524" Ports [2, 1] Position [745, 278, 785, 327] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "40,49,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 49 49 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[29.55 29." "55 34.55 29.55 34.55 34.55 34.55 29.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[24.55 24.55 29.55 2" "9.55 24.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[19.55 19.55 24.55 24.55 19.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[14.55 14.55 19.55 14.55 19.55 19.55 14.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "3525" Ports [2, 1] Position [745, 328, 785, 377] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "40,49,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 49 49 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[29.55 29." "55 34.55 29.55 34.55 34.55 34.55 29.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[24.55 24.55 29.55 2" "9.55 24.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[19.55 19.55 24.55 24.55 19.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[14.55 14.55 19.55 14.55 19.55 19.55 14.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "ComplexMag\n(Latency=2)" SID "3526" Ports [2, 1] Position [845, 280, 890, 380] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ComplexMag\n(Latency=2)" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[A]" SID "3527" Position [55, 528, 85, 542] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[A]" SID "3528" Position [55, 553, 85, 567] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Add2" SID "3529" Ports [2, 1] Position [565, 533, 610, 577] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "14" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "3530" Ports [0, 1] Position [104, 400, 156, 450] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "4" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "1" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "52,50,0,1,white,blue,0,7ac47ef5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 52 52 0 0 ],[0 0 50 50 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 52 52 0 0 ],[0 0 50 50 0 ]);\npatch([10.425 20.54 27.54 34.54 41.54 27.54 17.425 10.425 ],[32" ".77 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([17.425 27.54 20.54 10.425 17.425 ],[25.77 25." "77 32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([10.425 20.54 27.54 17.425 10.425 ],[18.77 18.77 25.77 25.7" "7 18.77 ],[1 1 1 ]);\npatch([17.425 41.54 34.54 27.54 20.54 10.425 17.425 ],[11.77 11.77 18.77 11.77 18.77 18.77" " 11.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "3531" Ports [1, 1] Position [470, 554, 500, 576] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "3532" Ports [1, 1] Position [760, 537, 795, 573] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult3" SID "3533" Ports [2, 1] Position [395, 523, 440, 567] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "19" bin_pt "15" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux3" SID "3534" Ports [3, 1] Position [305, 494, 340, 576] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,82,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 11.7143 70.2857 82 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10." "875 5.875 ],[46.55 46.55 51.55 46.55 51.55 51.55 51.55 46.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 " "],[41.55 41.55 46.55 46.55 41.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[36.55 36.55 41" ".55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 31.55 36.55 36" ".55 31.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon t" "ext');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Up Sample5" SID "3535" Ports [1, 1] Position [135, 549, 170, 571] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample7" SID "3536" Ports [1, 1] Position [135, 524, 170, 546] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "abs(A)" SID "3537" Position [880, 548, 910, 562] IconDisplay "Port number" } Line { SrcBlock "Counter1" SrcPort 1 Points [0, 30; 140, 0; 0, 25] DstBlock "Mux3" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Add2" DstPort 2 } Line { SrcBlock "Mult3" SrcPort 1 Points [5, 0] Branch { DstBlock "Add2" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay3" DstPort 1 } } Line { SrcBlock "Up Sample5" SrcPort 1 DstBlock "Mux3" DstPort 3 } Line { SrcBlock "Mux3" SrcPort 1 Points [25, 0] Branch { DstBlock "Mult3" DstPort 1 } Branch { Points [0, 20] DstBlock "Mult3" DstPort 2 } } Line { SrcBlock "Up Sample7" SrcPort 1 DstBlock "Mux3" DstPort 2 } Line { SrcBlock "Re[A]" SrcPort 1 DstBlock "Up Sample7" DstPort 1 } Line { SrcBlock "Im[A]" SrcPort 1 DstBlock "Up Sample5" DstPort 1 } Line { SrcBlock "Add2" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "abs(A)" DstPort 1 } } } Block { BlockType Reference Name "Constant" SID "3538" Ports [0, 1] Position [285, 453, 315, 477] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "30,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.3" "3 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "3539" Ports [1, 1] Position [1155, 337, 1190, 353] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "3540" Ports [1, 1] Position [580, 439, 625, 471] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "45,32,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 32 32 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "3541" Ports [1, 1] Position [390, 514, 435, 546] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "45,32,1,1,white,blue,0,d390c2d8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 32 32 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "3542" Ports [1, 1] Position [590, 327, 625, 353] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "35,26,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "3543" Ports [1, 1] Position [590, 277, 625, 303] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "35,26,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "3544" Ports [1, 1] Position [590, 707, 625, 733] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "35,26,1,1,white,blue,0,d390c2d8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "3545" Ports [1, 1] Position [590, 772, 625, 798] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "35,26,1,1,white,blue,0,d390c2d8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "3546" Ports [1, 1] Position [1005, 772, 1040, 798] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "35,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay8" SID "3547" Ports [1, 1] Position [1005, 747, 1040, 773] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "35,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "EVM " SID "3548" Ports [7] Position [1340, 144, 1380, 226] Floating off Location [6, 49, 1686, 873] Open off NumInputPorts "7" ZoomMode "yonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "8000" YMin "0~91~-1~-1~0~0~0" YMax "70~92~0.75~1~1.25~1~0.003" SaveName "ScopeData78" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "EVM per Subcarrier" SID "3549" Ports [4] Position [1090, 468, 1205, 537] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "EVM per Subcarrier" Location [917, 626, 1370, 1048] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "EVM_d1" SID "3550" Position [500, 173, 530, 187] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Vin_d1#" SID "3551" Position [505, 253, 535, 267] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "SC ind_d0" SID "3552" Position [150, 368, 180, 382] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Sym Ind" SID "3553" Position [160, 493, 190, 507] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub3" SID "3554" Ports [2, 1] Position [750, 223, 790, 272] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "32" bin_pt "22" quantization "Truncate" overflow "Saturate" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "40,49,2,1,white,blue,0,e139daf6,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 49 49 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[29.55 29." "55 34.55 29.55 34.55 34.55 34.55 29.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[24.55 24.55 29.55 2" "9.55 24.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[19.55 19.55 24.55 24.55 19.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[14.55 14.55 19.55 14.55 19.55 19.55 14.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "3555" Ports [0, 1] Position [160, 508, 190, 532] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "30,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.3" "3 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "3556" Ports [0, 1] Position [615, 413, 645, 437] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "30,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.3" "3 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "3557" Ports [0, 1] Position [160, 438, 190, 462] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "63" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "30,24,0,1,white,blue,0,346a66ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.3" "3 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('output',1,'63');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "3558" Ports [1, 1] Position [635, 287, 670, 313] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "35,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "3559" Ports [1, 1] Position [635, 247, 670, 273] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "35,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Dual Port RAM" SID "3560" Ports [7, 2] Position [740, 292, 815, 458] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "64" initVector "0" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b on en_a off en_b off latency "1" write_mode_A "Read After Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,384,398" block_type "dpram" block_version "10.1.3" sg_icon_stat "75,166,7,2,white,blue,0,7d88b3c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 75 75 0 0 ],[0 0 166 166 0 ],[0.77 0." "82 0.91 ]);\nplot([0 75 75 0 0 ],[0 0 166 166 0 ]);\npatch([14.75 29.2 39.2 49.2 59.2 39.2 24.75 14.75 ],[94.1 9" "4.1 104.1 94.1 104.1 104.1 104.1 94.1 ],[1 1 1 ]);\npatch([24.75 39.2 29.2 14.75 24.75 ],[84.1 84.1 94.1 94.1 84" ".1 ],[0.931 0.946 0.973 ]);\npatch([14.75 29.2 39.2 24.75 14.75 ],[74.1 74.1 84.1 84.1 74.1 ],[1 1 1 ]);\npatch(" "[24.75 59.2 49.2 39.2 29.2 14.75 24.75 ],[64.1 64.1 74.1 64.1 74.1 74.1 64.1 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "addra');\ncolor('black');port_label('input',2,'dina');\ncolor('black');port_label('input',3,'wea');\ncolor('blac" "k');port_label('input',4,'addrb');\ncolor('black');port_label('input',5,'dinb');\ncolor('black');port_label('inp" "ut',6,'web');\ncolor('black');port_label('input',7,'rstb');\ncolor('black');port_label('output',1,'A');\ncolor('" "black');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Inverter1" SID "3561" Ports [1, 1] Position [570, 248, 605, 272] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "35,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "3562" Ports [2, 1] Position [255, 489, 305, 531] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "50,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 42 42 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[27.66" " 27.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[21.66 21.66 27." "66 27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[15.66 15.66 21.66 21.66 15.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1," "'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "3563" Ports [2, 1] Position [255, 419, 305, 461] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "50,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 42 42 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[27.66" " 27.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[21.66 21.66 27." "66 27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[15.66 15.66 21.66 21.66 15.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1," "'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch1" SID "3564" Ports [2, 1] Position [385, 430, 435, 470] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch1" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "3565" Position [115, 98, 145, 112] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "3566" Position [115, 108, 145, 122] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant2" SID "3567" Ports [0, 1] Position [155, 62, 170, 78] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 " "12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "3568" Ports [3, 1] Position [215, 87, 260, 123] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,36,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 36 36 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[23.55 2" "3.55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[18.55 18.55 23.5" "5 23.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[13.55 13.55 18.55 18.55 13.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3," "'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Outport Name "D" SID "3569" Position [320, 98, 350, 112] IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "D" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register" DstPort 3 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 Points [0, 25] DstBlock "Register" DstPort 1 } } } Block { BlockType Reference Name "Shared Memory" SID "3570" Ports [3, 1] Position [735, 475, 815, 565] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shared Memory" SourceType "Xilinx Shared Memory Random Access Memory Block" shared_memory_name "'EVM_perSC'" depth "64" ownership "Locally Owned and Initialized" initVector "0" en off mutex "Unprotected" mode "Read and Write" write_mode "Read Before Write" time_out "0" latency "1" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "32" bin_pt "22" preci_type "Single" xl_use_area off xl_area "[0,0,0,0,0,0,0]" implementation "Block RAM" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,384,381" block_type "shmem" block_version "10.1.3" sg_icon_stat "80,90,3,1,white,blue,0,bf435243,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 90 90 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[57" ".21 57.21 68.21 57.21 68.21 68.21 68.21 57.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[46.21 46." "21 57.21 57.21 46.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[35.21 35.21 46.21 46.2" "1 35.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[24.21 24.21 35.21 24.21 35.21 35.21" " 24.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');p" "ort_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Terminator Name "Terminator" SID "3571" Position [875, 326, 890, 344] ShowName off } Block { BlockType Terminator Name "Terminator1" SID "3572" Position [885, 511, 900, 529] ShowName off } Block { BlockType Reference Name "done1" SID "3573" Ports [1, 1] Position [745, 655, 780, 665] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "3574" Ports [1, 1] Position [745, 645, 780, 655] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done3" SID "3575" Ports [1, 1] Position [745, 675, 780, 685] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "3576" Ports [1, 1] Position [745, 665, 780, 675] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "3577" Ports [1, 1] Position [745, 695, 780, 705] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done6" SID "3578" Ports [1, 1] Position [745, 685, 780, 695] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done7" SID "3579" Ports [1, 1] Position [745, 705, 780, 715] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Dual Port RAM" SrcPort 2 Points [85, 0] Branch { Points [0, -160] DstBlock "AddSub3" DstPort 2 } Branch { Points [50, 0; 0, 385; -260, 0; 0, -105] DstBlock "done5" DstPort 1 } } Line { SrcBlock "AddSub3" SrcPort 1 Points [-30, 0; 0, 75] Branch { DstBlock "Dual Port RAM" DstPort 2 } Branch { Points [0, 75] Branch { DstBlock "Dual Port RAM" DstPort 5 } Branch { Points [0, 120] Branch { DstBlock "Shared Memory" DstPort 2 } Branch { Points [0, 140] DstBlock "done1" DstPort 1 } } } } Line { SrcBlock "Delay6" SrcPort 1 Points [30, 0] Branch { DstBlock "Dual Port RAM" DstPort 1 } Branch { Points [0, 190] Branch { DstBlock "Shared Memory" DstPort 1 } Branch { Points [0, 160] DstBlock "done2" DstPort 1 } } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "Delay7" SrcPort 1 Points [25, 0; 0, 90] Branch { DstBlock "Dual Port RAM" DstPort 3 } Branch { Points [0, 200] Branch { DstBlock "Shared Memory" DstPort 3 } Branch { Points [0, 120] DstBlock "done4" DstPort 1 } } } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Dual Port RAM" DstPort 6 } Line { SrcBlock "Dual Port RAM" SrcPort 1 DstBlock "Terminator" DstPort 1 } Line { SrcBlock "Shared Memory" SrcPort 1 DstBlock "Terminator1" DstPort 1 } Line { SrcBlock "EVM_d1" SrcPort 1 Points [320, 0] Branch { Points [0, 55] DstBlock "AddSub3" DstPort 1 } Branch { Points [110, 0; 0, 640; -275, 0; 0, -110] DstBlock "done7" DstPort 1 } } Line { SrcBlock "Vin_d1#" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Sym Ind" SrcPort 1 Points [30, 0] Branch { DstBlock "Relational" DstPort 1 } Branch { Points [0, 190] DstBlock "done6" DstPort 1 } } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Relational" DstPort 2 } Line { SrcBlock "done2" SrcPort 1 Points [105, 0] } Line { SrcBlock "done1" SrcPort 1 Points [105, 0] } Line { SrcBlock "done4" SrcPort 1 Points [105, 0] } Line { SrcBlock "done3" SrcPort 1 Points [105, 0] } Line { SrcBlock "done6" SrcPort 1 Points [105, 0] } Line { SrcBlock "done5" SrcPort 1 Points [105, 0] } Line { SrcBlock "done7" SrcPort 1 Points [105, 0] } Line { SrcBlock "Relational" SrcPort 1 Points [40, 0; 0, -50] DstBlock "S-R Latch1" DstPort 2 } Line { SrcBlock "SC ind_d0" SrcPort 1 Points [35, 0] Branch { Points [0, 55] DstBlock "Relational1" DstPort 1 } Branch { Points [370, 0] Branch { DstBlock "Dual Port RAM" DstPort 4 } Branch { Points [0, -75] DstBlock "Delay6" DstPort 1 } } } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "S-R Latch1" DstPort 1 } Line { SrcBlock "S-R Latch1" SrcPort 1 Points [205, 0] Branch { DstBlock "Dual Port RAM" DstPort 7 } Branch { Points [0, 230] DstBlock "done3" DstPort 1 } } Annotation { Name "Latch asserts reset at beginning of\neach packet, lasting through the first \nsymbol written." Position [460, 515] } } } Block { BlockType SubSystem Name "EVM per Symbol" SID "3580" Ports [3] Position [1095, 721, 1205, 799] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "EVM per Symbol" Location [202, 70, 1918, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "EVM" SID "3581" Position [225, 458, 255, 472] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "SC ind" SID "3582" Position [115, 478, 145, 492] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Sym Ind" SID "3583" Position [95, 293, 125, 307] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "8LSB" SID "3584" Ports [1, 1] Position [230, 322, 260, 338] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+1" SID "3585" Ports [1, 1] Position [230, 292, 260, 308] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Accumulator" SID "3586" Ports [2, 1] Position [440, 451, 500, 509] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. Output type and binary point position match the input.

Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to run " "at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "32" overflow "Saturate" scale "1" rst on hasbypass on en off dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,457" block_type "accum" block_version "10.1.3" sg_icon_stat "60,58,2,1,white,blue,0,6949434e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 58 58 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[37.88 37" ".88 45.88 37.88 45.88 45.88 45.88 37.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[29.88 29.88 37.88 37." "88 29.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[21.88 21.88 29.88 29.88 21.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[13.88 13.88 21.88 13.88 21.88 21.88 13.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'\\bf+" "=b','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "3587" Ports [0, 1] Position [200, 493, 230, 517] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "30,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.3" "3 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "3588" Ports [0, 1] Position [205, 573, 235, 597] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "63" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "30,24,0,1,white,blue,0,346a66ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.3" "3 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('output',1,'63');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "3589" Position [90, 261, 240, 279] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType Reference Name "Mux" SID "3590" Ports [3, 1] Position [385, 258, 410, 342] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "10.1.3" sg_icon_stat "25,84,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 12 72 84 0 ],[0.77 0.8" "2 0.91 ]);\nplot([0 25 25 0 0 ],[0 12 72 84 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[45.3" "3 45.33 48.33 45.33 48.33 48.33 48.33 45.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[42.33 42.33 45." "33 45.33 42.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[39.33 39.33 42.33 42.33 39.33 ]," "[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[36.33 36.33 39.33 36.33 39.33 39.33 36.33 ],[0.93" "1 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input" "',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "3591" Ports [2, 1] Position [255, 474, 305, 516] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "50,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 42 42 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[27.66" " 27.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[21.66 21.66 27." "66 27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[15.66 15.66 21.66 21.66 15.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1," "'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "3592" Ports [2, 1] Position [285, 554, 335, 596] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "50,42,2,1,white,blue,0,3618233f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 42 42 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[27.66" " 27.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[21.66 21.66 27." "66 27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[15.66 15.66 21.66 21.66 15.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1," "'\\bfa = b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n" " ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shared Memory" SID "3593" Ports [3, 1] Position [640, 435, 720, 525] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shared Memory" SourceType "Xilinx Shared Memory Random Access Memory Block" shared_memory_name "'EVM_perSym'" depth "256" ownership "Locally Owned and Initialized" initVector "0" en off mutex "Unprotected" mode "Read and Write" write_mode "Read After Write" time_out "0" latency "1" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "32" bin_pt "14" preci_type "Single" xl_use_area off xl_area "[0,0,0,0,0,0,0]" implementation "Block RAM" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,384,381" block_type "shmem" block_version "10.1.3" sg_icon_stat "80,90,3,1,white,blue,0,bf435243,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 90 90 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[57" ".21 57.21 68.21 57.21 68.21 68.21 68.21 57.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[46.21 46." "21 57.21 57.21 46.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[35.21 35.21 46.21 46.2" "1 35.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[24.21 24.21 35.21 24.21 35.21 35.21" " 24.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');p" "ort_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Terminator Name "Terminator1" SID "3594" Position [790, 471, 805, 489] ShowName off } Block { BlockType Reference Name "done1" SID "3595" Ports [1, 1] Position [1020, 370, 1055, 380] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "3596" Ports [1, 1] Position [1020, 360, 1055, 370] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done3" SID "3597" Ports [1, 1] Position [1020, 390, 1055, 400] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "3598" Ports [1, 1] Position [1020, 380, 1055, 390] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "3599" Ports [1, 1] Position [1020, 410, 1055, 420] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done6" SID "3600" Ports [1, 1] Position [1020, 400, 1055, 410] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done7" SID "3601" Ports [1, 1] Position [1020, 420, 1055, 430] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType SubSystem Name "posedge" SID "3602" Ports [1, 1] Position [465, 566, 500, 584] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge" Location [2, 74, 1278, 978] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "3603" Position [280, 183, 310, 197] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "3604" Ports [1, 1] Position [425, 153, 460, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "3605" Ports [1, 1] Position [490, 156, 515, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "3606" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3607" Position [610, 173, 640, 187] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [70, 0] Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Line { SrcBlock "Shared Memory" SrcPort 1 Points [35, 0] Branch { DstBlock "Terminator1" DstPort 1 } Branch { Points [0, -55] DstBlock "done7" DstPort 1 } } Line { SrcBlock "EVM" SrcPort 1 Points [150, 0] Branch { DstBlock "Accumulator" DstPort 1 } Branch { Points [0, -80] DstBlock "done4" DstPort 1 } } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Relational" DstPort 2 } Line { SrcBlock "SC ind" SrcPort 1 Points [35, 0] Branch { DstBlock "Relational" DstPort 1 } Branch { Points [0, 80] DstBlock "Relational1" DstPort 1 } Branch { Points [0, -110] DstBlock "done1" DstPort 1 } } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Accumulator" DstPort 2 } Line { SrcBlock "Accumulator" SrcPort 1 Points [105, 0] Branch { DstBlock "Shared Memory" DstPort 2 } Branch { Points [0, -75] DstBlock "done6" DstPort 1 } } Line { SrcBlock "Sym Ind" SrcPort 1 Points [75, 0] Branch { DstBlock "8LSB+1" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "8LSB" DstPort 1 } Branch { Points [0, 35] DstBlock "done2" DstPort 1 } } } Line { SrcBlock "From1" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "8LSB" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "8LSB+1" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 Points [145, 0; 0, 95] Branch { Points [0, 55] DstBlock "Shared Memory" DstPort 1 } Branch { DstBlock "done3" DstPort 1 } } Line { SrcBlock "posedge" SrcPort 1 Points [65, 0; 0, -65; 45, 0] Branch { DstBlock "Shared Memory" DstPort 3 } Branch { Points [0, -95] DstBlock "done5" DstPort 1 } } Line { SrcBlock "done2" SrcPort 1 Points [105, 0] } Line { SrcBlock "done1" SrcPort 1 Points [105, 0] } Line { SrcBlock "done4" SrcPort 1 Points [105, 0] } Line { SrcBlock "done3" SrcPort 1 Points [105, 0] } Line { SrcBlock "done6" SrcPort 1 Points [105, 0] } Line { SrcBlock "done5" SrcPort 1 Points [105, 0] } Line { SrcBlock "done7" SrcPort 1 Points [105, 0] } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "posedge" DstPort 1 } } } Block { BlockType Goto Name "Goto" SID "3608" Position [1205, 389, 1325, 411] ShowName off GotoTag "DebugOut_EVM" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "3609" Ports [1, 1] Position [480, 518, 515, 542] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "35,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "3610" Ports [3, 1] Position [720, 450, 760, 490] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "40,40,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge6" SID "3611" Ports [1, 1] Position [445, 569, 480, 591] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge6" Location [480, 85, 1060, 386] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "3612" Position [35, 33, 65, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Inverter" SID "3613" Ports [1, 1] Position [110, 49, 150, 71] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,22,1,1,white,blue,0,e69ac283,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\nnot');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Reference Name "Logical" SID "3614" Ports [2, 1] Position [205, 28, 250, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3615" Position [275, 43, 305, 57] IconDisplay "Port number" } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 20] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType SubSystem Name "Re-modulator" SID "3616" Ports [2, 2] Position [370, 289, 465, 391] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Re-modulator" Location [160, 82, 1918, 1026] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Mod Bits" SID "3617" Position [215, 293, 245, 307] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Mod Sel" SID "3618" Position [260, 113, 290, 127] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "16QAM Mapper" SID "3619" Ports [1, 1] Position [430, 208, 480, 232] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "max(size(modConstellation_qam16))" initVector "modConstellation_qam16" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,24,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([21.325 31.66 28.66 25.66 22.66 18.325 21.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: e" "nd icon text');\n" } Block { BlockType Reference Name "16QAM Mapper1" SID "3620" Ports [1, 1] Position [430, 458, 480, 482] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "max(size(modConstellation_qam16))" initVector "modConstellation_qam16" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,24,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([21.325 31.66 28.66 25.66 22.66 18.325 21.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: e" "nd icon text');\n" } Block { BlockType Reference Name "1LSB" SID "3621" Ports [1, 1] Position [325, 411, 355, 429] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "1LSB+1" SID "3622" Ports [1, 1] Position [325, 171, 355, 189] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "-1" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "2LSB" SID "3623" Ports [1, 1] Position [325, 461, 355, 479] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "2LSB+2" SID "3624" Ports [1, 1] Position [325, 211, 355, 229] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "3LSB" SID "3625" Ports [1, 1] Position [325, 511, 355, 529] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "3" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "3LSB+3" SID "3626" Ports [1, 1] Position [325, 251, 355, 269] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "3" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "64QAM Mapper" SID "3627" Ports [1, 1] Position [430, 248, 480, 272] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "max(size(modConstellation_qam64))" initVector "modConstellation_qam64" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,24,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([21.325 31.66 28.66 25.66 22.66 18.325 21.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: e" "nd icon text');\n" } Block { BlockType Reference Name "64QAM Mapper1" SID "3628" Ports [1, 1] Position [430, 508, 480, 532] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "max(size(modConstellation_qam64))" initVector "modConstellation_qam64" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,24,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([21.325 31.66 28.66 25.66 22.66 18.325 21.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: e" "nd icon text');\n" } Block { BlockType Reference Name "Constant7" SID "3629" Ports [0, 1] Position [370, 361, 395, 379] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "8" bin_pt "7" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "3630" Ports [1, 1] Position [440, 107, 465, 133] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "3631" Ports [10, 1] Position [570, 105, 620, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "9" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[36 0 0 72 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,210,10,1,white,blue,3,cebb31ed,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 30 180 210 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 50 50 0 0 ],[0 30 180 210 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ]" ",[112.77 112.77 119.77 112.77 119.77 119.77 119.77 112.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ]" ",[105.77 105.77 112.77 112.77 105.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[98.77 98" ".77 105.77 105.77 98.77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[91.77 91.77 98.77 91" ".77 98.77 98.77 91.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: " "begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol" "or('black');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('" "input',5,'d3');\ncolor('black');port_label('input',6,'d4');\ncolor('black');port_label('input',7,'d5');\ncolor('" "black');port_label('input',8,'d6');\ncolor('black');port_label('input',9,'d7');\ncolor('black');port_label('inpu" "t',10,'d8');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux3" SID "3632" Ports [10, 1] Position [575, 336, 620, 579] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "9" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[36 0 0 72 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,243,10,1,white,blue,3,cebb31ed,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 34.7143 208.286 243 0 " "],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 34.7143 208.286 243 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23." "32 14.65 8.65 ],[127.66 127.66 133.66 127.66 133.66 133.66 133.66 127.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 " "8.65 14.65 ],[121.66 121.66 127.66 127.66 121.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ]," "[115.66 115.66 121.66 121.66 115.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[109.66 109." "66 115.66 109.66 115.66 115.66 109.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprin" "tf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('inpu" "t',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('blac" "k');port_label('input',5,'d3');\ncolor('black');port_label('input',6,'d4');\ncolor('black');port_label('input',7" ",'d5');\ncolor('black');port_label('input',8,'d6');\ncolor('black');port_label('input',9,'d7');\ncolor('black');" "port_label('input',10,'d8');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');\n" } Block { BlockType SubSystem Name "QPSK Map" SID "3633" Ports [1, 1] Position [430, 167, 480, 193] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "QPSK Map" Location [-139, 149, 1249, 1075] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Bit" SID "3634" Position [215, 58, 245, 72] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Constant6" SID "3635" Ports [0, 1] Position [180, 80, 225, 110] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "modConstellation_qpsk(1)" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,0,1,white,blue,0,145c935e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('output',1,'0.7109375');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant7" SID "3636" Ports [0, 1] Position [130, 112, 225, 138] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "modConstellation_qpsk(2)" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "95,26,0,1,white,blue,0,21fb1025,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 95 95 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 95 95 0 0 ],[0 0 26 26 0 ]);\npatch([40.325 44.66 47.66 50.66 53.66 47.66 43.325 40.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([43.325 47.66 44.66 40.325 43.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([40.325 44.66 47.66 43.325 40.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([43.325 53.66 50.66 47.66 44.66 40.325 43.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'-0.7109375');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux2" SID "3637" Ports [3, 1] Position [270, 51, 295, 139] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,88,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 12.5714 75.4286 88 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 12.5714 75.4286 88 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[47.33 47.33 50.33 47.33 50.33 50.33 50.33 47.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[44.33 44.33 47.33 47.33 44.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[41.33 41.33 " "44.33 44.33 41.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[38.33 38.33 41.33 38.33 41.33" " 41.33 38.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Outport Name "Sym" SID "3638" Position [320, 88, 350, 102] IconDisplay "Port number" } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "Sym" DstPort 1 } Line { SrcBlock "Bit" SrcPort 1 DstBlock "Mux2" DstPort 1 } Line { SrcBlock "Constant7" SrcPort 1 DstBlock "Mux2" DstPort 3 } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "Mux2" DstPort 2 } } } Block { BlockType SubSystem Name "QPSK Map1" SID "3639" Ports [1, 1] Position [430, 407, 480, 433] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "QPSK Map1" Location [-129, 84, 1259, 1010] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Bit" SID "3640" Position [215, 58, 245, 72] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Constant6" SID "3641" Ports [0, 1] Position [180, 80, 225, 110] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "modConstellation_qpsk(1)" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,0,1,white,blue,0,145c935e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('output',1,'0.7109375');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant7" SID "3642" Ports [0, 1] Position [130, 112, 225, 138] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "modConstellation_qpsk(2)" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "95,26,0,1,white,blue,0,21fb1025,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 95 95 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 95 95 0 0 ],[0 0 26 26 0 ]);\npatch([40.325 44.66 47.66 50.66 53.66 47.66 43.325 40.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([43.325 47.66 44.66 40.325 43.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([40.325 44.66 47.66 43.325 40.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([43.325 53.66 50.66 47.66 44.66 40.325 43.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'-0.7109375');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux2" SID "3643" Ports [3, 1] Position [270, 51, 295, 139] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,88,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 12.5714 75.4286 88 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 12.5714 75.4286 88 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[47.33 47.33 50.33 47.33 50.33 50.33 50.33 47.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[44.33 44.33 47.33 47.33 44.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[41.33 41.33 " "44.33 44.33 41.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[38.33 38.33 41.33 38.33 41.33" " 41.33 38.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Outport Name "Sym" SID "3644" Position [320, 88, 350, 102] IconDisplay "Port number" } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "Mux2" DstPort 2 } Line { SrcBlock "Constant7" SrcPort 1 DstBlock "Mux2" DstPort 3 } Line { SrcBlock "Bit" SrcPort 1 DstBlock "Mux2" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "Sym" DstPort 1 } } } Block { BlockType Outport Name "I" SID "3645" Position [750, 203, 780, 217] IconDisplay "Port number" } Block { BlockType Outport Name "Q" SID "3646" Position [750, 453, 780, 467] Port "2" IconDisplay "Port number" } Line { SrcBlock "Constant7" SrcPort 1 Points [145, 0; 0, -10] Branch { Points [0, 5] Branch { Points [0, -85] Branch { Points [0, -40] Branch { Points [0, -40] DstBlock "Mux2" DstPort 5 } Branch { DstBlock "Mux2" DstPort 7 } } Branch { DstBlock "Mux2" DstPort 9 } } Branch { Points [0, 5] Branch { Points [0, 25] Branch { DstBlock "Mux3" DstPort 3 } Branch { Points [0, 45] Branch { Points [0, 50] Branch { Points [0, 5] DstBlock "Mux3" DstPort 7 } Branch { Points [0, 55] Branch { DstBlock "Mux3" DstPort 9 } Branch { Points [0, 25] DstBlock "Mux3" DstPort 10 } } } Branch { Points [0, 5] DstBlock "Mux3" DstPort 5 } } } Branch { Points [0, 0] DstBlock "Mux3" DstPort 2 } } } Branch { Points [0, -60] Branch { Points [0, -160] DstBlock "Mux2" DstPort 2 } Branch { DstBlock "Mux2" DstPort 10 } } } Line { SrcBlock "1LSB" SrcPort 1 DstBlock "QPSK Map1" DstPort 1 } Line { SrcBlock "1LSB+1" SrcPort 1 DstBlock "QPSK Map" DstPort 1 } Line { SrcBlock "2LSB" SrcPort 1 DstBlock "16QAM Mapper1" DstPort 1 } Line { SrcBlock "2LSB+2" SrcPort 1 DstBlock "16QAM Mapper" DstPort 1 } Line { SrcBlock "Mod Bits" SrcPort 1 Points [60, 0] Branch { Points [0, -40] Branch { Points [0, -40] Branch { DstBlock "2LSB+2" DstPort 1 } Branch { DstBlock "1LSB+1" DstPort 1 } } Branch { DstBlock "3LSB+3" DstPort 1 } } Branch { Points [0, 120] Branch { Points [0, 50] Branch { DstBlock "2LSB" DstPort 1 } Branch { DstBlock "3LSB" DstPort 1 } } Branch { DstBlock "1LSB" DstPort 1 } } } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "I" DstPort 1 } Line { SrcBlock "Mux3" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "3LSB" SrcPort 1 DstBlock "64QAM Mapper1" DstPort 1 } Line { SrcBlock "3LSB+3" SrcPort 1 DstBlock "64QAM Mapper" DstPort 1 } Line { SrcBlock "QPSK Map" SrcPort 1 DstBlock "Mux2" DstPort 4 } Line { SrcBlock "16QAM Mapper" SrcPort 1 DstBlock "Mux2" DstPort 6 } Line { SrcBlock "64QAM Mapper" SrcPort 1 DstBlock "Mux2" DstPort 8 } Line { SrcBlock "QPSK Map1" SrcPort 1 Points [20, 0] Branch { DstBlock "Mux3" DstPort 4 } Branch { Points [0, -260] DstBlock "Mux2" DstPort 3 } } Line { SrcBlock "16QAM Mapper1" SrcPort 1 DstBlock "Mux3" DstPort 6 } Line { SrcBlock "64QAM Mapper1" SrcPort 1 DstBlock "Mux3" DstPort 8 } Line { SrcBlock "Mod Sel" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 Points [55, 0] Branch { Points [0, 225] DstBlock "Mux3" DstPort 1 } Branch { DstBlock "Mux2" DstPort 1 } } Annotation { Name "In this block the bytes that will be modulated \ncome into the system syncronized with their respecti" "ve \nmodulation types. From here, some of the bits are \nstripped off if 256-QAM is not desired.\n (i.e. all th" "e bits are stripped off if 0-QAM is used, \n7 bits are stripped off if BPSK is used,\n6 bits are stripped off if" " 4-QAM is used, so on and so forth.\nThe remaining bits are then modulated with \ntheir respective modulation ty" "pes." Position [557, 672] HorizontalAlignment "left" } Annotation { Name "No idea why BSPK-I uses the Q path for EVM; it just works this way..." Position [924, 158] } } } Block { BlockType Reference Name "Register2" SID "3647" Ports [2, 1] Position [1000, 316, 1030, 369] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "30,53,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 53 53 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[30.44 30.4" "4 34.44 30.44 34.44 34.44 34.44 30.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[26.44 26.44 30.44 30.44 " "26.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[22.44 22.44 26.44 26.44 22.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[18.44 18.44 22.44 18.44 22.44 22.44 18.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Relational" SID "3648" Ports [2, 1] Position [375, 434, 425, 476] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "50,42,2,1,white,blue,0,3618233f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 42 42 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[27.66" " 27.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[21.66 21.66 27." "66 27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[15.66 15.66 21.66 21.66 15.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1," "'\\bfa = b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n" " ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_debug_EVM" SID "3649" Ports [1, 1] Position [1335, 340, 1370, 350] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.985 0.979 0.895 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.985 0.979 0.8" "95 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprint" "f('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "SRLatch" SID "3650" Ports [2, 1] Position [565, 571, 610, 604] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SRLatch" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "3651" Position [125, 223, 155, 237] IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "3652" Position [155, 243, 185, 257] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "3653" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "3654" Ports [1, 1] Position [205, 223, 230, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "3655" Ports [1, 1] Position [205, 243, 230, 257] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "3656" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3657" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType Reference Name "Up Sample" SID "3658" Ports [1, 1] Position [1245, 331, 1275, 359] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "30,28,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done1" SID "3659" Ports [1, 1] Position [1190, 170, 1225, 180] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Eq I" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done2" SID "3660" Ports [1, 1] Position [1190, 150, 1225, 160] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Xk ind" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done3" SID "3661" Ports [1, 1] Position [1190, 180, 1225, 190] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Eq Q" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done4" SID "3662" Ports [1, 1] Position [1190, 160, 1225, 170] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Sym Ind" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done5" SID "3663" Ports [1, 1] Position [1190, 190, 1225, 200] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Raw EVM" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done6" SID "3664" Ports [1, 1] Position [1190, 200, 1225, 210] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Rst" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done7" SID "3665" Ports [1, 1] Position [1190, 210, 1225, 220] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Valid EVM" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Line { SrcBlock "Mod Sel" SrcPort 1 Points [75, 0] Branch { DstBlock "Re-modulator" DstPort 2 } Branch { Points [0, 80] DstBlock "Relational" DstPort 1 } } Line { SrcBlock "Eq I" SrcPort 1 DstBlock "Delay4" DstPort 1 } Line { SrcBlock "Re-modulator" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Re-modulator" SrcPort 2 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Eq Q" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "ComplexMag\n(Latency=2)" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "ComplexMag\n(Latency=2)" DstPort 2 } Line { SrcBlock "ComplexMag\n(Latency=2)" SrcPort 1 Points [45, 0] Branch { Points [0, -135] DstBlock "done5" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 Points [90, 0] Branch { DstBlock "AddSub1" DstPort 1 } Branch { Points [0, -155] DstBlock "done3" DstPort 1 } } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Relational" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 Points [30, 0] Branch { Points [0, -130] DstBlock "done7" DstPort 1 } Branch { DstBlock "Convert1" DstPort 1 } Branch { Points [0, 55] Branch { DstBlock "Goto" DstPort 1 } Branch { Labels [0, 0] Points [0, 80] Branch { DstBlock "EVM per Subcarrier" DstPort 1 } Branch { Points [0, 255] DstBlock "EVM per Symbol" DstPort 1 } } } } Line { SrcBlock "Rx Bits" SrcPort 1 DstBlock "Re-modulator" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "Delay4" SrcPort 1 Points [80, 0] Branch { DstBlock "AddSub" DstPort 1 } Branch { Points [0, -115] DstBlock "done1" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Vin" SrcPort 1 Points [90, 0] Branch { DstBlock "Delay2" DstPort 1 } Branch { Points [0, 50] DstBlock "Posedge6" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 Points [120, 0; 0, -60] DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [220, 0] Branch { Points [0, -115] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -150] DstBlock "done6" DstPort 1 } } Branch { Labels [0, 0] Points [0, 25] DstBlock "EVM per Subcarrier" DstPort 2 } } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Up Sample" SrcPort 1 DstBlock "Rx_debug_EVM" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Up Sample" DstPort 1 } Line { SrcBlock "Xk_ind" SrcPort 1 DstBlock "Delay5" DstPort 1 } Line { Name "Eq I" Labels [0, 0] SrcBlock "done1" SrcPort 1 DstBlock "EVM " DstPort 3 } Line { Name "Eq Q" Labels [0, 0] SrcBlock "done3" SrcPort 1 DstBlock "EVM " DstPort 4 } Line { Name "Raw EVM" Labels [0, 0] SrcBlock "done5" SrcPort 1 DstBlock "EVM " DstPort 5 } Line { Name "Rst" Labels [0, 0] SrcBlock "done6" SrcPort 1 DstBlock "EVM " DstPort 6 } Line { Name "Valid EVM" Labels [0, 0] SrcBlock "done7" SrcPort 1 DstBlock "EVM " DstPort 7 } Line { Labels [0, 0] SrcBlock "Delay5" SrcPort 1 Points [45, 0] Branch { Points [110, 0] Branch { Points [0, -210] DstBlock "EVM per Subcarrier" DstPort 3 } Branch { Points [0, 40] DstBlock "Delay8" DstPort 1 } } Branch { Points [0, -65; -480, 0; 0, -500] DstBlock "done2" DstPort 1 } } Line { Name "Xk ind" Labels [0, 0] SrcBlock "done2" SrcPort 1 DstBlock "EVM " DstPort 1 } Line { Name "Sym Ind" Labels [0, 0] SrcBlock "done4" SrcPort 1 DstBlock "EVM " DstPort 2 } Line { SrcBlock "Sym_ind" SrcPort 1 DstBlock "Delay6" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 Points [60, 0] Branch { Points [110, 0] Branch { DstBlock "Delay7" DstPort 1 } Branch { Points [0, -260] DstBlock "EVM per Subcarrier" DstPort 4 } } Branch { Points [0, -135; -485, 0; 0, -485] DstBlock "done4" DstPort 1 } } Line { SrcBlock "Delay7" SrcPort 1 DstBlock "EVM per Symbol" DstPort 3 } Line { SrcBlock "Delay8" SrcPort 1 DstBlock "EVM per Symbol" DstPort 2 } Line { SrcBlock "SRLatch" SrcPort 1 Points [75, 0; 0, -105] DstBlock "Logical" DstPort 3 } Line { SrcBlock "Posedge6" SrcPort 1 DstBlock "SRLatch" DstPort 1 } Line { SrcBlock "Done" SrcPort 1 DstBlock "SRLatch" DstPort 2 } } } Block { BlockType SubSystem Name "FEC Decoder" SID "9879" Ports [8, 8] Position [855, 140, 985, 390] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "FEC Decoder" Location [852, 183, 1144, 419] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "160" Block { BlockType Inport Name "nrst" SID "9940" Position [50, 53, 80, 67] IconDisplay "Port number" } Block { BlockType Inport Name "fec_reg" SID "9941" Position [50, 83, 80, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "start" SID "9942" Position [50, 113, 80, 127] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "vin" SID "9943" Position [50, 143, 80, 157] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "xk_index" SID "9944" Position [50, 173, 80, 187] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "mod_level" SID "9945" Position [50, 203, 80, 217] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "rx_i" SID "9946" Position [50, 233, 80, 247] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "rx_q" SID "9947" Position [50, 263, 80, 277] Port "8" IconDisplay "Port number" } Block { BlockType SubSystem Name "Decoder (impl)" SID "9914" Ports [8, 8] Position [185, 313, 265, 547] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Decoder (impl)" Location [397, 87, 822, 393] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "nrst" SID "9915" Position [265, 133, 295, 147] IconDisplay "Port number" } Block { BlockType Inport Name "fec_reg" SID "9916" Position [265, 163, 295, 177] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "start" SID "9917" Position [265, 193, 295, 207] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "vin" SID "9918" Position [265, 223, 295, 237] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "xk_index" SID "9919" Position [265, 253, 295, 267] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "mod_level" SID "9920" Position [265, 283, 295, 297] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "rx_i" SID "9921" Position [265, 313, 295, 327] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "rx_q" SID "9922" Position [265, 343, 295, 357] Port "8" IconDisplay "Port number" } Block { BlockType Reference Name "Black Box" SID "9923" Ports [8, 8] Position [375, 118, 550, 372] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Black Box" SourceType "Xilinx Black Box Block" infoedit " Incorporates black box HDL and simulation model into a System Generator design.

You must " "supply a Black Box with certain information about the HDL component you would like to bring into System Generato" "r. This information is provided through a Matlab function.

When \"Simulation mode\" is set to \"Inactive\"" ", you will typically want to provide a separate simulation model by using a Simulation Multiplexer.
When \"Si" "mulation mode\" is set to \"External co-simulator\", you must include a ModelSim block in the design." init_code "fec_decoder_top_config" sim_method "Inactive" verbose off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "blackbox2" sg_icon_stat "175,254,8,8,white,blue,0,32ec0d18,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 175 175 0 0 ],[0 0 254 254 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 175 175 0 0 ],[0 0 254 254 0 ]);\npatch([31.375 67.5 92.5 117.5 142.5 92.5 56.375 31.375 " "],[154.75 154.75 179.75 154.75 179.75 179.75 179.75 154.75 ],[1 1 1 ]);\npatch([56.375 92.5 67.5 31.375 56.375 ]" ",[129.75 129.75 154.75 154.75 129.75 ],[0.931 0.946 0.973 ]);\npatch([31.375 67.5 92.5 56.375 31.375 ],[104.75 1" "04.75 129.75 129.75 104.75 ],[1 1 1 ]);\npatch([56.375 142.5 117.5 92.5 67.5 31.375 56.375 ],[79.75 79.75 104.75" " 79.75 104.75 104.75 79.75 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('input',1,'nrst');\ncolor('black');port_label('input',2,'fec_" "reg');\ncolor('black');port_label('input',3,'start');\ncolor('black');port_label('input',4,'vin');\ncolor('black" "');port_label('input',5,'xk_index');\ncolor('black');port_label('input',6,'mod_level');\ncolor('black');port_lab" "el('input',7,'rx_i');\ncolor('black');port_label('input',8,'rx_q');\ncolor('black');port_label('output',1,'rx_we" "');\ncolor('black');port_label('output',2,'rx_addr');\ncolor('black');port_label('output',3,'rx_data');\ncolor('" "black');port_label('output',4,'rx_done');\ncolor('black');port_label('output',5,'rx_we_2');\ncolor('black');port" "_label('output',6,'rx_addr_2');\ncolor('black');port_label('output',7,'rx_data_2');\ncolor('black');port_label('" "output',8,'rx_done_2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "rx_we" SID "9924" Position [665, 133, 695, 147] IconDisplay "Port number" } Block { BlockType Outport Name "rx_addr" SID "9925" Position [665, 163, 695, 177] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "rx_data" SID "9926" Position [665, 193, 695, 207] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "rx_done" SID "9927" Position [665, 223, 695, 237] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "rx_we_2" SID "9928" Position [665, 253, 695, 267] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "rx_addr_2" SID "9929" Position [665, 283, 695, 297] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "rx_data_2" SID "9930" Position [665, 313, 695, 327] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "rx_done_2" SID "9931" Position [665, 343, 695, 357] Port "8" IconDisplay "Port number" } Line { SrcBlock "rx_q" SrcPort 1 DstBlock "Black Box" DstPort 8 } Line { SrcBlock "rx_i" SrcPort 1 DstBlock "Black Box" DstPort 7 } Line { SrcBlock "mod_level" SrcPort 1 DstBlock "Black Box" DstPort 6 } Line { SrcBlock "xk_index" SrcPort 1 DstBlock "Black Box" DstPort 5 } Line { SrcBlock "vin" SrcPort 1 DstBlock "Black Box" DstPort 4 } Line { SrcBlock "start" SrcPort 1 DstBlock "Black Box" DstPort 3 } Line { SrcBlock "fec_reg" SrcPort 1 DstBlock "Black Box" DstPort 2 } Line { SrcBlock "nrst" SrcPort 1 DstBlock "Black Box" DstPort 1 } Line { SrcBlock "Black Box" SrcPort 7 DstBlock "rx_data_2" DstPort 1 } Line { SrcBlock "Black Box" SrcPort 6 DstBlock "rx_addr_2" DstPort 1 } Line { SrcBlock "Black Box" SrcPort 5 DstBlock "rx_we_2" DstPort 1 } Line { SrcBlock "Black Box" SrcPort 4 DstBlock "rx_done" DstPort 1 } Line { SrcBlock "Black Box" SrcPort 3 DstBlock "rx_data" DstPort 1 } Line { SrcBlock "Black Box" SrcPort 2 DstBlock "rx_addr" DstPort 1 } Line { SrcBlock "Black Box" SrcPort 1 DstBlock "rx_we" DstPort 1 } Line { SrcBlock "Black Box" SrcPort 8 DstBlock "rx_done_2" DstPort 1 } } } Block { BlockType SubSystem Name "Decoder (sim)" SID "9897" Ports [8, 8] Position [185, 47, 265, 283] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Decoder (sim)" Location [397, 87, 822, 393] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "nrst" SID "9956" Position [210, 138, 240, 152] IconDisplay "Port number" } Block { BlockType Inport Name "fec_reg" SID "9957" Position [210, 168, 240, 182] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "start" SID "9958" Position [210, 198, 240, 212] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "vin" SID "9959" Position [210, 228, 240, 242] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "xk_index" SID "9960" Position [210, 258, 240, 272] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "mod_level" SID "9961" Position [210, 288, 240, 302] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "rx_i" SID "9962" Position [210, 318, 240, 332] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "rx_q" SID "9963" Position [210, 348, 240, 362] Port "8" IconDisplay "Port number" } Block { BlockType Reference Name "Black Box" SID "9877" Ports [8, 8] Position [325, 123, 500, 377] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Black Box" SourceType "Xilinx Black Box Block" infoedit " Incorporates black box HDL and simulation model into a System Generator design.

You must " "supply a Black Box with certain information about the HDL component you would like to bring into System Generato" "r. This information is provided through a Matlab function.

When \"Simulation mode\" is set to \"Inactive\"" ", you will typically want to provide a separate simulation model by using a Simulation Multiplexer.
When \"Si" "mulation mode\" is set to \"External co-simulator\", you must include a ModelSim block in the design." init_code "fec_decoder_simOnly_config" sim_method "ISE Simulator" verbose off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "blackbox2" sg_icon_stat "175,254,8,8,white,blue,0,32ec0d18,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 175 175 0 0 ],[0 0 254 254 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 175 175 0 0 ],[0 0 254 254 0 ]);\npatch([31.375 67.5 92.5 117.5 142.5 92.5 56.375 31.375 " "],[154.75 154.75 179.75 154.75 179.75 179.75 179.75 154.75 ],[1 1 1 ]);\npatch([56.375 92.5 67.5 31.375 56.375 ]" ",[129.75 129.75 154.75 154.75 129.75 ],[0.931 0.946 0.973 ]);\npatch([31.375 67.5 92.5 56.375 31.375 ],[104.75 1" "04.75 129.75 129.75 104.75 ],[1 1 1 ]);\npatch([56.375 142.5 117.5 92.5 67.5 31.375 56.375 ],[79.75 79.75 104.75" " 79.75 104.75 104.75 79.75 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('input',1,'nrst');\ncolor('black');port_label('input',2,'fec_" "reg');\ncolor('black');port_label('input',3,'start');\ncolor('black');port_label('input',4,'vin');\ncolor('black" "');port_label('input',5,'xk_index');\ncolor('black');port_label('input',6,'mod_level');\ncolor('black');port_lab" "el('input',7,'rx_i');\ncolor('black');port_label('input',8,'rx_q');\ncolor('black');port_label('output',1,'rx_we" "');\ncolor('black');port_label('output',2,'rx_addr');\ncolor('black');port_label('output',3,'rx_data');\ncolor('" "black');port_label('output',4,'rx_done');\ncolor('black');port_label('output',5,'rx_we_2');\ncolor('black');port" "_label('output',6,'rx_addr_2');\ncolor('black');port_label('output',7,'rx_data_2');\ncolor('black');port_label('" "output',8,'rx_done_2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disregard Subsystem" SID "9939" Tag "discardX" Ports [] Position [373, 437, 431, 495] ShowName off AttributesFormatString "Disregard Subsystem\\nFor Generation" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Disregard Subsystem" SourceType "Xilinx Disregard Subsystem For Generation Block" infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code gener" "ation. This block can be used in combination with the Simulation Multiplexer block to provide an alternative sim" "ulation model for another subsystem (e.g., to provide a simulation model for a black box)." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "disregard" sg_icon_stat "58,58,-1,-1,darkgray,black,0,07734,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 0 ],[0 0 58 58 0 ],[0.1 0.1 0" ".1 ]);\nplot([0 58 58 0 0 ],[0 0 58 58 0 ]);\npatch([11.2 22.76 30.76 38.76 46.76 30.76 19.2 11.2 ],[37.88 37.88" " 45.88 37.88 45.88 45.88 45.88 37.88 ],[0.33 0.33 0.33 ]);\npatch([19.2 30.76 22.76 11.2 19.2 ],[29.88 29.88 37." "88 37.88 29.88 ],[0.261 0.261 0.261 ]);\npatch([11.2 22.76 30.76 19.2 11.2 ],[21.88 21.88 29.88 29.88 21.88 ],[0" ".33 0.33 0.33 ]);\npatch([19.2 46.76 38.76 30.76 22.76 11.2 19.2 ],[13.88 13.88 21.88 13.88 21.88 21.88 13.88 ]," "[0.261 0.261 0.261 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "rx_we" SID "9964" Position [610, 138, 640, 152] IconDisplay "Port number" } Block { BlockType Outport Name "rx_addr" SID "9965" Position [610, 168, 640, 182] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "rx_data" SID "9966" Position [610, 198, 640, 212] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "rx_done" SID "9967" Position [610, 228, 640, 242] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "rx_we_2" SID "9968" Position [610, 258, 640, 272] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "rx_addr_2" SID "9969" Position [610, 288, 640, 302] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "rx_data_2" SID "9970" Position [610, 318, 640, 332] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "rx_done_2" SID "9971" Position [610, 348, 640, 362] Port "8" IconDisplay "Port number" } Line { SrcBlock "Black Box" SrcPort 8 DstBlock "rx_done_2" DstPort 1 } Line { SrcBlock "Black Box" SrcPort 1 DstBlock "rx_we" DstPort 1 } Line { SrcBlock "Black Box" SrcPort 2 DstBlock "rx_addr" DstPort 1 } Line { SrcBlock "Black Box" SrcPort 3 DstBlock "rx_data" DstPort 1 } Line { SrcBlock "Black Box" SrcPort 4 DstBlock "rx_done" DstPort 1 } Line { SrcBlock "Black Box" SrcPort 5 DstBlock "rx_we_2" DstPort 1 } Line { SrcBlock "Black Box" SrcPort 6 DstBlock "rx_addr_2" DstPort 1 } Line { SrcBlock "Black Box" SrcPort 7 DstBlock "rx_data_2" DstPort 1 } Line { SrcBlock "nrst" SrcPort 1 DstBlock "Black Box" DstPort 1 } Line { SrcBlock "fec_reg" SrcPort 1 DstBlock "Black Box" DstPort 2 } Line { SrcBlock "start" SrcPort 1 DstBlock "Black Box" DstPort 3 } Line { SrcBlock "vin" SrcPort 1 DstBlock "Black Box" DstPort 4 } Line { SrcBlock "xk_index" SrcPort 1 DstBlock "Black Box" DstPort 5 } Line { SrcBlock "mod_level" SrcPort 1 DstBlock "Black Box" DstPort 6 } Line { SrcBlock "rx_i" SrcPort 1 DstBlock "Black Box" DstPort 7 } Line { SrcBlock "rx_q" SrcPort 1 DstBlock "Black Box" DstPort 8 } } } Block { BlockType Reference Name "Simulation Multiplexer" SID "9896" Ports [2, 1] Position [410, 54, 465, 76] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "simmux" sg_icon_stat "55,22,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "fprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX,hwS" "wLineY);\n" } Block { BlockType Reference Name "Simulation Multiplexer1" SID "9932" Ports [2, 1] Position [410, 84, 465, 106] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "simmux" sg_icon_stat "55,22,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "fprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX,hwS" "wLineY);\n" } Block { BlockType Reference Name "Simulation Multiplexer2" SID "9933" Ports [2, 1] Position [410, 114, 465, 136] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "simmux" sg_icon_stat "55,22,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "fprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX,hwS" "wLineY);\n" } Block { BlockType Reference Name "Simulation Multiplexer3" SID "9934" Ports [2, 1] Position [410, 144, 465, 166] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "simmux" sg_icon_stat "55,22,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "fprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX,hwS" "wLineY);\n" } Block { BlockType Reference Name "Simulation Multiplexer4" SID "9935" Ports [2, 1] Position [410, 174, 465, 196] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "simmux" sg_icon_stat "55,22,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "fprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX,hwS" "wLineY);\n" } Block { BlockType Reference Name "Simulation Multiplexer5" SID "9936" Ports [2, 1] Position [410, 204, 465, 226] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "simmux" sg_icon_stat "55,22,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "fprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX,hwS" "wLineY);\n" } Block { BlockType Reference Name "Simulation Multiplexer6" SID "9937" Ports [2, 1] Position [410, 234, 465, 256] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "simmux" sg_icon_stat "55,22,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "fprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX,hwS" "wLineY);\n" } Block { BlockType Reference Name "Simulation Multiplexer7" SID "9938" Ports [2, 1] Position [410, 264, 465, 286] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "simmux" sg_icon_stat "55,22,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "fprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX,hwS" "wLineY);\n" } Block { BlockType Outport Name "rx_we" SID "9948" Position [565, 58, 595, 72] IconDisplay "Port number" } Block { BlockType Outport Name "rx_addr" SID "9949" Position [565, 88, 595, 102] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "rx_data" SID "9950" Position [565, 118, 595, 132] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "rx_done" SID "9951" Position [565, 148, 595, 162] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "rx_we_2" SID "9952" Position [565, 178, 595, 192] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "rx_addr_2" SID "9953" Position [565, 208, 595, 222] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "rx_data_2" SID "9954" Position [565, 238, 595, 252] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "rx_done_2" SID "9955" Position [565, 268, 595, 282] Port "8" IconDisplay "Port number" } Line { SrcBlock "nrst" SrcPort 1 Points [80, 0] Branch { Points [0, 265] DstBlock "Decoder (impl)" DstPort 1 } Branch { DstBlock "Decoder (sim)" DstPort 1 } } Line { SrcBlock "start" SrcPort 1 Points [70, 0] Branch { Points [0, 265] DstBlock "Decoder (impl)" DstPort 3 } Branch { DstBlock "Decoder (sim)" DstPort 3 } } Line { SrcBlock "vin" SrcPort 1 Points [65, 0] Branch { Points [0, 265] DstBlock "Decoder (impl)" DstPort 4 } Branch { DstBlock "Decoder (sim)" DstPort 4 } } Line { SrcBlock "xk_index" SrcPort 1 Points [60, 0] Branch { Points [0, 265] DstBlock "Decoder (impl)" DstPort 5 } Branch { DstBlock "Decoder (sim)" DstPort 5 } } Line { SrcBlock "mod_level" SrcPort 1 Points [55, 0] Branch { Points [0, 265] DstBlock "Decoder (impl)" DstPort 6 } Branch { DstBlock "Decoder (sim)" DstPort 6 } } Line { SrcBlock "rx_i" SrcPort 1 Points [50, 0] Branch { Points [0, 265] DstBlock "Decoder (impl)" DstPort 7 } Branch { DstBlock "Decoder (sim)" DstPort 7 } } Line { SrcBlock "rx_q" SrcPort 1 Points [45, 0] Branch { Points [0, 265] DstBlock "Decoder (impl)" DstPort 8 } Branch { DstBlock "Decoder (sim)" DstPort 8 } } Line { SrcBlock "fec_reg" SrcPort 1 Points [75, 0] Branch { Points [0, 265] DstBlock "Decoder (impl)" DstPort 2 } Branch { DstBlock "Decoder (sim)" DstPort 2 } } Line { SrcBlock "Simulation Multiplexer" SrcPort 1 DstBlock "rx_we" DstPort 1 } Line { SrcBlock "Simulation Multiplexer1" SrcPort 1 DstBlock "rx_addr" DstPort 1 } Line { SrcBlock "Simulation Multiplexer2" SrcPort 1 DstBlock "rx_data" DstPort 1 } Line { SrcBlock "Simulation Multiplexer3" SrcPort 1 DstBlock "rx_done" DstPort 1 } Line { SrcBlock "Simulation Multiplexer4" SrcPort 1 DstBlock "rx_we_2" DstPort 1 } Line { SrcBlock "Simulation Multiplexer5" SrcPort 1 DstBlock "rx_addr_2" DstPort 1 } Line { SrcBlock "Simulation Multiplexer6" SrcPort 1 DstBlock "rx_data_2" DstPort 1 } Line { SrcBlock "Simulation Multiplexer7" SrcPort 1 DstBlock "rx_done_2" DstPort 1 } Line { SrcBlock "Decoder (impl)" SrcPort 1 Points [45, 0; 0, -255] DstBlock "Simulation Multiplexer" DstPort 2 } Line { SrcBlock "Decoder (impl)" SrcPort 2 Points [50, 0; 0, -255] DstBlock "Simulation Multiplexer1" DstPort 2 } Line { SrcBlock "Decoder (impl)" SrcPort 3 Points [55, 0; 0, -255] DstBlock "Simulation Multiplexer2" DstPort 2 } Line { SrcBlock "Decoder (impl)" SrcPort 4 Points [60, 0; 0, -255] DstBlock "Simulation Multiplexer3" DstPort 2 } Line { SrcBlock "Decoder (impl)" SrcPort 5 Points [65, 0; 0, -255] DstBlock "Simulation Multiplexer4" DstPort 2 } Line { SrcBlock "Decoder (impl)" SrcPort 6 Points [70, 0; 0, -255] DstBlock "Simulation Multiplexer5" DstPort 2 } Line { SrcBlock "Decoder (impl)" SrcPort 7 Points [75, 0; 0, -255] DstBlock "Simulation Multiplexer6" DstPort 2 } Line { SrcBlock "Decoder (impl)" SrcPort 8 Points [80, 0; 0, -255] DstBlock "Simulation Multiplexer7" DstPort 2 } Line { SrcBlock "Decoder (sim)" SrcPort 1 DstBlock "Simulation Multiplexer" DstPort 1 } Line { SrcBlock "Decoder (sim)" SrcPort 2 DstBlock "Simulation Multiplexer1" DstPort 1 } Line { SrcBlock "Decoder (sim)" SrcPort 3 DstBlock "Simulation Multiplexer2" DstPort 1 } Line { SrcBlock "Decoder (sim)" SrcPort 4 DstBlock "Simulation Multiplexer3" DstPort 1 } Line { SrcBlock "Decoder (sim)" SrcPort 5 DstBlock "Simulation Multiplexer4" DstPort 1 } Line { SrcBlock "Decoder (sim)" SrcPort 6 DstBlock "Simulation Multiplexer5" DstPort 1 } Line { SrcBlock "Decoder (sim)" SrcPort 7 DstBlock "Simulation Multiplexer6" DstPort 1 } Line { SrcBlock "Decoder (sim)" SrcPort 8 DstBlock "Simulation Multiplexer7" DstPort 1 } } } Block { BlockType SubSystem Name "FEC Reset" SID "3666" Ports [0, 1] Position [335, 140, 380, 160] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "FEC Reset" Location [7, 70, 412, 323] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType From Name "From1" SID "3667" Position [115, 320, 245, 340] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType SubSystem Name "Reset Generator\nSimulation Only" SID "3668" Ports [0, 1] Position [160, 238, 225, 272] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Reset Generator\nSimulation Only" Location [2, 82, 1278, 988] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "106" Block { BlockType Reference Name "Constant" SID "3669" Ports [0, 1] Position [620, 302, 675, 328] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "55,26,0,1,white,blue,0,1c72b5be,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter" SID "3670" Ports [2, 1] Position [510, 165, 570, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "2" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "60,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38" ".88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38." "88 30.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf" "++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disregard Subsystem" SID "3671" Tag "discardX" Ports [] Position [223, 256, 281, 314] ShowName off AttributesFormatString "Disregard Subsystem\\nFor Generation" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Disregard Subsystem" SourceType "Xilinx Disregard Subsystem For Generation Block" infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code gener" "ation. This block can be used in combination with the Simulation Multiplexer block to provide an alternative sim" "ulation model for another subsystem (e.g., to provide a simulation model for a black box)." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "disregard" block_version "10.1.3" sg_icon_stat "58,58,-1,-1,darkgray,black,0,0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 ],[0 0 58 58 ],[0.1 0.1 0.1])" ";\npatch([14 4 18 4 14 29 33 37 53 40 28 19 33 19 28 40 53 37 33 29 14 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 " "16 7 19 6 6 10 6 6 ],[0.33 0.33 0.33]);\nplot([0 58 58 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon gra" "phics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType From Name "From1" SID "3672" Position [110, 170, 240, 190] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType Reference Name "Relational" SID "3673" Ports [2, 1] Position [505, 272, 560, 328] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a!=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "55,56,2,1,white,blue,0,850de6e7,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 56 56 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[35" ".77 35.77 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[28.77 28." "77 35.77 35.77 28.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[21.77 21.77 28.77 28.7" "7 21.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[14.77 14.77 21.77 14.77 21.77 21.77" " 14.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_l" "abel('output',1,'\\bfa \\neq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text'" ");" } Block { BlockType Scope Name "Wave3" SID "3674" Ports [2] Position [765, 440, 835, 540] NamePlacement "alternate" Floating off Location [5, 51, 1289, 1018] Open off NumInputPorts "2" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" } TimeRange "15000" YMin "-1~-1" YMax "2~2" SaveName "ScopeData36" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "done1" SID "3675" Ports [1, 1] Position [670, 510, 705, 520] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "local_reset" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done28" SID "3676" Ports [1, 1] Position [675, 460, 710, 470] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "glb_rst" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Outport Name "local_reset" SID "3677" Position [720, 348, 750, 362] IconDisplay "Port number" } Line { SrcBlock "From1" SrcPort 1 Points [145, 0] Branch { DstBlock "Counter" DstPort 1 } Branch { Points [0, 285] DstBlock "done28" DstPort 1 } } Line { SrcBlock "Counter" SrcPort 1 Points [10, 0; 0, 90] DstBlock "Relational" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Relational" DstPort 2 } Line { SrcBlock "Relational" SrcPort 1 Points [-15, 0] Branch { Points [0, -90] DstBlock "Counter" DstPort 2 } Branch { Points [0, 55; 155, 0] Branch { DstBlock "local_reset" DstPort 1 } Branch { Points [0, 160] DstBlock "done1" DstPort 1 } } } Line { Name "glb_rst" Labels [0, 0] SrcBlock "done28" SrcPort 1 DstBlock "Wave3" DstPort 1 } Line { Name "local_reset" Labels [0, 0] SrcBlock "done1" SrcPort 1 DstBlock "Wave3" DstPort 2 } Annotation { Position [674, 130] } Annotation { Name "This block generates a reset signal for the FEC Decoder. \nThis block is only required in the simulat" "ion mode. \nThe FEC Decoder needs a reset signal at time t=0. \nCurrent RX_Reset signal can not support this req" "uirement." Position [383, 59] DropShadow on } } } Block { BlockType Reference Name "Simulation Multiplexer" SID "3678" Ports [2, 1] Position [385, 242, 435, 293] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "20,20,336,197" block_type "simmux" block_version "10.1.3" sg_icon_stat "50,51,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n" "\n\nfprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX" ",hwSwLineY);\n" } Block { BlockType Outport Name "Rst" SID "3679" Position [510, 263, 540, 277] IconDisplay "Port number" } Line { SrcBlock "Reset Generator\nSimulation Only" SrcPort 1 DstBlock "Simulation Multiplexer" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 Points [30, 0; 0, -50] DstBlock "Simulation Multiplexer" DstPort 2 } Line { SrcBlock "Simulation Multiplexer" SrcPort 1 DstBlock "Rst" DstPort 1 } } } Block { BlockType From Name "From" SID "3680" Position [555, 749, 650, 771] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType From Name "From2" SID "3681" Position [285, 181, 380, 199] ShowName off CloseFcn "tagdialog Close" GotoTag "FEC_Reg" TagVisibility "global" } Block { BlockType From Name "From4" SID "3682" Position [15, 317, 110, 333] ShowName off CloseFcn "tagdialog Close" GotoTag "valid_sym" TagVisibility "global" } Block { BlockType SubSystem Name "Hard Decision" SID "3683" Ports [3, 1] Position [295, 767, 350, 843] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Hard Decision" Location [2, 82, 1661, 987] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "183" Block { BlockType Inport Name "Mod Sel" SID "3684" Position [670, 218, 700, 232] IconDisplay "Port number" } Block { BlockType Inport Name "I" SID "3685" Position [45, 243, 75, 257] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "3686" Position [45, 293, 75, 307] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Concat" SID "3687" Ports [2, 1] Position [635, 287, 685, 338] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\" "fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat1" SID "3688" Ports [2, 1] Position [640, 677, 690, 728] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\" "fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat5" SID "3689" Ports [2, 1] Position [640, 432, 690, 483] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\" "fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat6" SID "3690" Ports [2, 1] Position [640, 532, 690, 583] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\" "fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant7" SID "3691" Ports [0, 1] Position [740, 511, 765, 529] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "3692" Ports [1, 1] Position [530, 237, 560, 263] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "3693" Ports [1, 1] Position [530, 287, 560, 313] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "3694" Ports [10, 1] Position [835, 345, 885, 555] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "9" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "8" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[36 0 0 72 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,306" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,210,10,1,white,blue,3,cebb31ed,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 30 180 210 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 50 50 0 0 ],[0 30 180 210 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ]" ",[112.77 112.77 119.77 112.77 119.77 119.77 119.77 112.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ]" ",[105.77 105.77 112.77 112.77 105.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[98.77 98" ".77 105.77 105.77 98.77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[91.77 91.77 98.77 91" ".77 98.77 98.77 91.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: " "begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol" "or('black');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('" "input',5,'d3');\ncolor('black');port_label('input',6,'d4');\ncolor('black');port_label('input',7,'d5');\ncolor('" "black');port_label('input',8,'d6');\ncolor('black');port_label('input',9,'d7');\ncolor('black');port_label('inpu" "t',10,'d8');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "ROM" SID "3695" Ports [1, 1] Position [525, 354, 575, 406] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "[0 1 3 2]" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 2 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "ROM1" SID "3696" Ports [1, 1] Position [525, 419, 575, 471] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "[0 1 3 2]" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 2 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "ROM2" SID "3697" Ports [1, 1] Position [525, 504, 575, 556] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "8" initVector "[1 0 2 3 7 6 4 5]" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[2 3 0 3 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "ROM3" SID "3698" Ports [1, 1] Position [525, 569, 575, 621] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "8" initVector "[1 0 2 3 7 6 4 5]" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[2 3 0 3 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "ROM4" SID "3699" Ports [1, 1] Position [525, 644, 575, 696] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "16" initVector "[1 0 2 3 5 4 6 7 15 14 12 13 11 10 8 9]" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "4" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "ROM5" SID "3700" Ports [1, 1] Position [525, 709, 575, 761] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "16" initVector "[1 0 2 3 5 4 6 7 15 14 12 13 11 10 8 9]" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "4" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "Slice" SID "3701" Ports [1, 1] Position [435, 236, 480, 264] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,460,380" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice1" SID "3702" Ports [1, 1] Position [435, 286, 480, 314] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice2" SID "3703" Ports [1, 1] Position [435, 366, 480, 394] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice3" SID "3704" Ports [1, 1] Position [435, 431, 480, 459] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice4" SID "3705" Ports [1, 1] Position [435, 516, 480, 544] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "3" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice5" SID "3706" Ports [1, 1] Position [435, 581, 480, 609] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "3" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice6" SID "3707" Ports [1, 1] Position [435, 656, 480, 684] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice7" SID "3708" Ports [1, 1] Position [435, 721, 480, 749] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice8" SID "3709" Ports [1, 1] Position [190, 286, 235, 314] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice9" SID "3710" Ports [1, 1] Position [190, 236, 235, 264] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,460,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "bits" SID "3711" Position [975, 443, 1005, 457] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 Points [0, 0; 40, 0] Branch { Points [0, 50] DstBlock "Concat" DstPort 1 } Branch { Points [185, 0; 0, 150] DstBlock "Mux2" DstPort 3 } } Line { SrcBlock "Delay1" SrcPort 1 Points [15, 0; 0, 25] DstBlock "Concat" DstPort 2 } Line { SrcBlock "Slice9" SrcPort 1 Points [0, 0; 130, 0] Branch { DstBlock "Slice" DstPort 1 } Branch { Points [0, 130] Branch { Points [0, 150] Branch { DstBlock "Slice4" DstPort 1 } Branch { Points [0, 140] DstBlock "Slice6" DstPort 1 } } Branch { DstBlock "Slice2" DstPort 1 } } } Line { SrcBlock "Slice8" SrcPort 1 Points [0, 0; 105, 0] Branch { Points [0, 145] Branch { Points [0, 150] Branch { DstBlock "Slice5" DstPort 1 } Branch { Points [0, 140] DstBlock "Slice7" DstPort 1 } } Branch { DstBlock "Slice3" DstPort 1 } } Branch { DstBlock "Slice1" DstPort 1 } } Line { SrcBlock "Slice5" SrcPort 1 DstBlock "ROM3" DstPort 1 } Line { SrcBlock "Slice4" SrcPort 1 DstBlock "ROM2" DstPort 1 } Line { SrcBlock "ROM3" SrcPort 1 Points [25, 0; 0, -25] DstBlock "Concat6" DstPort 2 } Line { SrcBlock "ROM2" SrcPort 1 Points [25, 0; 0, 15] DstBlock "Concat6" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [15, 0; 0, 25] DstBlock "Concat5" DstPort 2 } Line { SrcBlock "ROM" SrcPort 1 Points [35, 0; 0, 65] DstBlock "Concat5" DstPort 1 } Line { SrcBlock "ROM5" SrcPort 1 Points [25, 0; 0, -20] DstBlock "Concat1" DstPort 2 } Line { SrcBlock "ROM4" SrcPort 1 Points [25, 0; 0, 20] DstBlock "Concat1" DstPort 1 } Line { SrcBlock "Slice7" SrcPort 1 DstBlock "ROM5" DstPort 1 } Line { SrcBlock "Slice6" SrcPort 1 DstBlock "ROM4" DstPort 1 } Line { SrcBlock "Concat1" SrcPort 1 Points [60, 0; 0, -165] DstBlock "Mux2" DstPort 10 } Line { SrcBlock "Constant7" SrcPort 1 Points [0, 0; 25, 0] Branch { Points [0, -40] Branch { DstBlock "Mux2" DstPort 7 } Branch { Points [0, -40] Branch { DstBlock "Mux2" DstPort 5 } Branch { Points [0, -60] DstBlock "Mux2" DstPort 2 } } } Branch { DstBlock "Mux2" DstPort 9 } } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "bits" DstPort 1 } Line { SrcBlock "Mod Sel" SrcPort 1 Points [100, 0; 0, 135] DstBlock "Mux2" DstPort 1 } Line { SrcBlock "Concat6" SrcPort 1 Points [40, 0; 0, -60] DstBlock "Mux2" DstPort 8 } Line { SrcBlock "Concat5" SrcPort 1 DstBlock "Mux2" DstPort 6 } Line { SrcBlock "Slice3" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "Slice2" SrcPort 1 DstBlock "ROM" DstPort 1 } Line { SrcBlock "Concat" SrcPort 1 Points [90, 0; 0, 105] DstBlock "Mux2" DstPort 4 } Line { SrcBlock "Q" SrcPort 1 DstBlock "Slice8" DstPort 1 } Line { SrcBlock "Slice1" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "Slice" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "I" SrcPort 1 DstBlock "Slice9" DstPort 1 } Annotation { Name "This block demaps the signal according to its modulation scheme by slicing off a certain number of mo" "st signicant bits and then using that sliced number for a lookup table that \nreverses the grey coding and produ" "ces the bit values." Position [578, 104] DropShadow on } Annotation { Name "[0 1 3 2]" Position [650, 393] } Annotation { Position [674, 130] } } } Block { BlockType Reference Name "Inverter" SID "3712" Ports [1, 1] Position [1405, 843, 1455, 877] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,34,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 34 34 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 34 34 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[21.44 21.44 25" ".44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[17.44 17.44 21.44 21.44 17.44" " ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\npatch(" "[20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "3713" Ports [1, 1] Position [1260, 912, 1305, 938] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,26,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 26 26 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[16.33 16" ".33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[10.33 10.33 13.33 13.33 10.33 ]," "[1 1 1 ]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bl" "ack');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Invertr" SID "3714" Ports [1, 1] Position [555, 147, 580, 173] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,248" block_type "inv" block_version "10.1.3" sg_icon_stat "25,26,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "3715" Ports [3, 1] Position [1113, 685, 1157, 730] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "44,45,3,1,white,blue,0,98d76266,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 44 44 0 0 ],[0 0 45 45 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 44 44 0 0 ],[0 0 45 45 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "3716" Ports [3, 1] Position [1335, 933, 1380, 977] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "3717" Ports [2, 1] Position [1330, 838, 1375, 882] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "3718" Ports [3, 1] Position [700, 728, 730, 762] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[4 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,34,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 34 34 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 34 34 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[21.44 21.44 25.4" "4 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[17.44 17.44 21.44 21.44 17.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('or');\nfprintf" "('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical5" SID "3719" Ports [2, 1] Position [1635, 413, 1680, 457] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "3720" Ports [2, 1] Position [485, 140, 520, 175] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22.55 27." "55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 22.55 17." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "3721" Ports [2, 1] Position [180, 371, 215, 404] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 33 33 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([12.1" " 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Modulation RAM" SID "3722" Ports [3, 1] Position [165, 679, 250, 741] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Modulation RAM" Location [2, 82, 1678, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "130" Block { BlockType Inport Name "Xk_index" SID "3723" Position [60, 208, 90, 222] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Sym Index" SID "3724" Position [60, 233, 90, 247] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "FullRateMasks" SID "3725" Position [55, 138, 85, 152] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "1MSB-1" SID "3726" Ports [1, 1] Position [340, 118, 375, 132] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-1" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "4LSB" SID "3727" Ports [1, 1] Position [195, 138, 230, 152] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "4MSB" SID "3728" Ports [1, 1] Position [195, 158, 230, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Addr Gen" SID "3729" Ports [2, 3] Position [155, 200, 255, 250] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Addr Gen" Location [2, 82, 1678, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "126" Block { BlockType Inport Name "Xk_index" SID "3730" Position [615, 228, 645, 242] IconDisplay "Port number" } Block { BlockType Inport Name "Sym Index" SID "3731" Position [615, 158, 645, 172] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "1LSB" SID "3732" Ports [1, 1] Position [720, 193, 755, 207] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,460,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "1b Zero" SID "3733" Ports [0, 1] Position [240, 107, 275, 123] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,16,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "3734" Ports [2, 1] Position [315, 107, 370, 138] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,31,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 31 31 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat1" SID "3735" Ports [3, 1] Position [1070, 115, 1105, 195] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "3" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,80,3,1,white,blue,0,61ef8218,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 80 80 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 80 80 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[45.55 45." "55 50.55 45.55 50.55 50.55 50.55 45.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[40.55 40.55 45.55 4" "5.55 40.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[35.55 35.55 40.55 40.55 35.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[30.55 30.55 35.55 30.55 35.55 35.55 30.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'hi');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('\\fontsize{20" "}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "3736" Ports [1, 1] Position [980, 120, 1015, 140] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "3737" Ports [1, 1] Position [980, 145, 1015, 165] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "3738" Ports [1, 1] Position [815, 190, 850, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,470,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "3739" Position [340, 286, 465, 304] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType From Name "From3" SID "3740" Position [40, 118, 245, 142] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_numTrainPlusBaseRateSyms" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "3741" Ports [1, 1] Position [555, 286, 595, 304] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "3742" Ports [1, 1] Position [815, 135, 850, 155] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,201" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "3743" Ports [2, 1] Position [890, 139, 935, 166] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 27 27 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "3744" Ports [3, 1] Position [920, 260, 965, 300] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,40,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 40 40 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "3745" Ports [3, 1] Position [555, 92, 580, 158] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "8.2.02" sg_icon_stat "25,66,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 9.42857 56.5714 66 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 9.42857 56.5714 66 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[36.33 36.33 39.33 36.33 39.33 39.33 39.33 36.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[33.33 33.33 36.33 36.33 33.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[30.33 30.33 " "33.33 33.33 30.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33 27.33 30.33" " 30.33 27.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');" } Block { BlockType Reference Name "Relational8" SID "3746" Ports [2, 1] Position [705, 103, 760, 187] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,84,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 84 84 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 84 84 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[49" ".77 49.77 56.77 49.77 56.77 56.77 56.77 49.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[42.77 42." "77 49.77 49.77 42.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[35.77 35.77 42.77 42.7" "7 35.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[28.77 28.77 35.77 28.77 35.77 35.77" " 28.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_l" "abel('output',1,'\\bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "3747" Ports [1, 1] Position [425, 111, 470, 139] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,370" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "IgnoreSym" SID "3748" Position [1180, 273, 1210, 287] IconDisplay "Port number" } Block { BlockType Outport Name "Mod Addr" SID "3749" Position [1175, 148, 1205, 162] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "FullRate" SID "3750" Position [1180, 68, 1210, 82] Port "3" IconDisplay "Port number" } Line { SrcBlock "Sym Index" SrcPort 1 Points [30, 0] Branch { DstBlock "Relational8" DstPort 2 } Branch { Points [0, 35] DstBlock "1LSB" DstPort 1 } } Line { SrcBlock "Relational8" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter2" DstPort 1 } Branch { Points [0, 0] Branch { Points [0, -15] DstBlock "Convert" DstPort 1 } Branch { Points [0, 120] DstBlock "Logical2" DstPort 1 } } } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "Mod Addr" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Xk_index" SrcPort 1 Points [275, 0; 0, -55] DstBlock "Concat1" DstPort 3 } Line { SrcBlock "1LSB" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Inverter2" SrcPort 1 Points [15, 0] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, -70] DstBlock "FullRate" DstPort 1 } } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Concat1" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 Points [20, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, 80] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Shift" DstPort 1 } Line { SrcBlock "1b Zero" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 Points [35, 0] Branch { DstBlock "Concat" DstPort 2 } Branch { Points [0, 15] DstBlock "Mux1" DstPort 3 } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "IgnoreSym" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 Points [60, 0] Branch { DstBlock "Inverter1" DstPort 1 } Branch { Points [0, -190] DstBlock "Mux1" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical2" DstPort 3 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Relational8" DstPort 1 } Annotation { Name "The modulation RAM stores 3x(numSubcarriers) values:\n[0:numSc-1]: Masks for antenna A full rate symb" "ols\n[numSc:2*numSc-1]: Masks for antenna B full rate symbols\n[2*numSc:3*numSc-1]: Masks for base rate symbols " "(same for both antennas)" Position [255, 628] HorizontalAlignment "left" } Annotation { Name "This block produces the correct memory address to lookup the modulation mask for a given subcarrier i" "n a given OFDM symbol.\nThe LSB of the symbol index is treated as the antenna selector. During base rate symbols" ", this bit is forced to zero so that both\nantennas use the same set of modulation masks for their base rate sym" "bols." Position [250, 568] HorizontalAlignment "left" } } } Block { BlockType Reference Name "Concat" SID "3751" Ports [4, 1] Position [705, 206, 755, 259] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "4" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,53,4,1,white,blue,0,47d3d416,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 53 53 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp" "('\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat1" SID "3752" Ports [4, 1] Position [540, 71, 590, 124] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "4" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,53,4,1,white,blue,0,47d3d416,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 53 53 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp" "('\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat2" SID "3753" Ports [4, 1] Position [610, 152, 645, 188] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "4" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,4,1,white,blue,0,47d3d416,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp('\\fontsize{20}\\" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "3754" Ports [1, 1] Position [460, 232, 495, 248] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2.02" sg_icon_stat "35,16,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "3755" Ports [1, 1] Position [405, 117, 440, 133] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2.02" sg_icon_stat "35,16,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From2" SID "3756" Position [225, 66, 420, 84] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_simpleDynRxModulationEn" TagVisibility "global" } Block { BlockType Goto Name "Goto23" SID "3757" Position [1075, 397, 1220, 413] ShowName off GotoTag "valid_sym" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "3758" Ports [1, 1] Position [455, 201, 495, 219] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,201" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,e69ac283,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\nnot');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "3759" Ports [1, 1] Position [455, 66, 495, 84] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "3760" Ports [1, 1] Position [550, 166, 590, 184] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "3761" Ports [2, 1] Position [930, 223, 975, 267] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "3762" Ports [2, 1] Position [815, 133, 860, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "3763" Ports [3, 1] Position [710, 104, 755, 186] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,82,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 82 82 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 82 82 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[47.66 4" "7.66 53.66 47.66 53.66 53.66 53.66 47.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[41.66 41.66 47.66 " "47.66 41.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[35.66 35.66 41.66 41.66 35.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[29.66 29.66 35.66 29.66 35.66 35.66 29.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Modulation Masks" SID "3764" Ports [1, 1] Position [380, 337, 475, 373] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Modulation Masks" Location [197, 82, 1439, 814] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Addr" SID "3765" Position [375, 533, 405, 547] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Constant" SID "3766" Ports [0, 1] Position [375, 557, 430, 583] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "4" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.2" sg_icon_stat "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "3767" Ports [0, 1] Position [375, 587, 430, 613] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "4" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.2" sg_icon_stat "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shared Memory" SID "3768" Ports [3, 1] Position [500, 525, 580, 615] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shared Memory" SourceType "Xilinx Shared Memory Random Access Memory Block" shared_memory_name "'RxModulation'" depth "numSubcarriers*3 %AntA, AntB, BaseRate" ownership "Locally Owned and Initialized" initVector "subcarrier_QAM_Values" en off mutex "Unprotected" mode "Read and Write" write_mode "Read After Write" time_out "0" latency "1" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "4" bin_pt "0" preci_type "Single" xl_use_area off xl_area "[0,0,0,0,0,0,0]" implementation "Block RAM" use_rpm "off" has_advanced_control "0" sggui_pos "209,178,484,424" block_type "shmem" block_version "10.1.2" sg_icon_stat "80,90,3,1,white,blue,0,bf435243,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 90 90 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[57" ".21 57.21 68.21 57.21 68.21 68.21 68.21 57.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[46.21 46." "21 57.21 57.21 46.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[35.21 35.21 46.21 46.2" "1 35.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[24.21 24.21 35.21 24.21 35.21 35.21" " 24.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');p" "ort_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Outport Name "ModMask" SID "3769" Position [660, 563, 690, 577] IconDisplay "Port number" } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Shared Memory" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Shared Memory" DstPort 3 } Line { SrcBlock "Addr" SrcPort 1 DstBlock "Shared Memory" DstPort 1 } Line { SrcBlock "Shared Memory" SrcPort 1 DstBlock "ModMask" DstPort 1 } } } Block { BlockType Reference Name "Mux1" SID "3770" Ports [3, 1] Position [475, 112, 500, 178] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "8.2.02" sg_icon_stat "25,66,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 9.42857 56.5714 66 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 9.42857 56.5714 66 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[36.33 36.33 39.33 36.33 39.33 39.33 39.33 36.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[33.33 33.33 36.33 36.33 33.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[30.33 30.33 " "33.33 33.33 30.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33 27.33 30.33" " 30.33 27.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');" } Block { BlockType Outport Name "mod" SID "3771" Position [1065, 238, 1095, 252] IconDisplay "Port number" } Line { SrcBlock "Xk_index" SrcPort 1 DstBlock "Addr Gen" DstPort 1 } Line { SrcBlock "Sym Index" SrcPort 1 DstBlock "Addr Gen" DstPort 2 } Line { SrcBlock "Addr Gen" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 Points [100, 0] Branch { Points [75, 0] Branch { Points [0, 15] Branch { Points [0, 15] Branch { Points [0, 15] DstBlock "Concat" DstPort 4 } Branch { DstBlock "Concat" DstPort 3 } } Branch { DstBlock "Concat" DstPort 2 } } Branch { DstBlock "Concat" DstPort 1 } } Branch { Points [0, 195] DstBlock "Goto23" DstPort 1 } } Line { SrcBlock "Addr Gen" SrcPort 2 Points [50, 0] Branch { Points [0, -100] DstBlock "1MSB-1" DstPort 1 } Branch { Points [0, 130] DstBlock "Modulation Masks" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "mod" DstPort 1 } Line { SrcBlock "Addr Gen" SrcPort 3 DstBlock "Delay" DstPort 1 } Line { SrcBlock "1MSB-1" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "FullRateMasks" SrcPort 1 Points [0, 0; 60, 0] Branch { DstBlock "4LSB" DstPort 1 } Branch { Points [0, 20] DstBlock "4MSB" DstPort 1 } } Line { SrcBlock "4LSB" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "4MSB" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 Points [40, 0; 0, 80] DstBlock "Logical" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Concat" SrcPort 1 Points [25, 0; 0, -70] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Concat1" SrcPort 1 Points [0, 20] DstBlock "Logical3" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 Points [20, 0] Branch { DstBlock "Concat1" DstPort 1 } Branch { Points [0, 15] Branch { DstBlock "Concat1" DstPort 2 } Branch { Points [0, 15] Branch { DstBlock "Concat1" DstPort 3 } Branch { Points [0, 15] DstBlock "Concat1" DstPort 4 } } } } Line { SrcBlock "Concat2" SrcPort 1 DstBlock "Logical3" DstPort 3 } Line { SrcBlock "Inverter2" SrcPort 1 Points [0, 0; 0, -20] Branch { DstBlock "Concat2" DstPort 1 } Branch { Points [0, 10] Branch { Points [0, 10] Branch { DstBlock "Concat2" DstPort 4 } Branch { DstBlock "Concat2" DstPort 3 } } Branch { DstBlock "Concat2" DstPort 2 } } } Line { SrcBlock "Delay" SrcPort 1 Points [25, 0; 0, -65] DstBlock "Inverter2" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Mux1" DstPort 1 } Line { SrcBlock "Modulation Masks" SrcPort 1 Points [430, 0; 0, -100] DstBlock "Logical" DstPort 2 } Annotation { Position [240, 234] } } } Block { BlockType Reference Name "Register" SID "3772" Ports [1, 1] Position [1630, 842, 1675, 878] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "8.2.02" sg_icon_stat "45,36,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 36 36 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 36 36 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[23.55 23.55 2" "8.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[18.55 18.55 23.55 23.55 " "18.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1 1 ])" ";\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0.973 ]" ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label(" "'input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprint" "f('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "3773" Ports [2, 1] Position [1260, 833, 1305, 877] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice1" SID "3780" Ports [1, 1] Position [160, 106, 205, 134] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice2" SID "3781" Ports [1, 1] Position [160, 141, 205, 169] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice3" SID "3782" Ports [1, 1] Position [160, 176, 205, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice4" SID "3783" Ports [1, 1] Position [160, 211, 205, 239] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "4" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice5" SID "3784" Ports [1, 1] Position [160, 246, 205, 274] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice6" SID "3785" Ports [1, 1] Position [160, 281, 205, 309] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "6" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice7" SID "3786" Ports [1, 1] Position [160, 316, 205, 344] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "7" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3787" Position [520, 183, 550, 197] IconDisplay "Port number" } Line { SrcBlock "\nbyte mux1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "SliceSel" SrcPort 1 DstBlock "\nbyte mux1" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 50, 0] Branch { Points [0, 35] Branch { Points [0, 35] Branch { Points [0, 35] Branch { DstBlock "Slice3" DstPort 1 } Branch { Points [0, 35] Branch { Points [0, 35] Branch { Points [0, 35] Branch { DstBlock "Slice6" DstPort 1 } Branch { DstBlock "Slice7" DstPort 1 } } Branch { DstBlock "Slice5" DstPort 1 } } Branch { DstBlock "Slice4" DstPort 1 } } } Branch { DstBlock "Slice2" DstPort 1 } } Branch { DstBlock "Slice1" DstPort 1 } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 DstBlock "\nbyte mux1" DstPort 2 } Line { SrcBlock "Slice1" SrcPort 1 DstBlock "\nbyte mux1" DstPort 3 } Line { SrcBlock "Slice2" SrcPort 1 DstBlock "\nbyte mux1" DstPort 4 } Line { SrcBlock "Slice3" SrcPort 1 DstBlock "\nbyte mux1" DstPort 5 } Line { SrcBlock "Slice4" SrcPort 1 DstBlock "\nbyte mux1" DstPort 6 } Line { SrcBlock "Slice5" SrcPort 1 DstBlock "\nbyte mux1" DstPort 7 } Line { SrcBlock "Slice6" SrcPort 1 DstBlock "\nbyte mux1" DstPort 8 } Line { SrcBlock "Slice7" SrcPort 1 DstBlock "\nbyte mux1" DstPort 9 } Annotation { Name "8MSB" Position [184, 61] } Annotation { Name "8MSB-7" Position [180, 357] } } } Block { BlockType Reference Name "Up Sample1" SID "3788" Ports [1, 1] Position [610, 208, 635, 232] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples off en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,262" block_type "usamp" block_version "10.1.3" sg_icon_stat "25,24,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsiz" "e{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "3789" Ports [1, 1] Position [610, 298, 635, 322] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,262" block_type "usamp" block_version "10.1.3" sg_icon_stat "25,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsiz" "e{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample3" SID "3790" Ports [1, 1] Position [610, 328, 635, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,262" block_type "usamp" block_version "10.1.3" sg_icon_stat "25,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsiz" "e{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample4" SID "3791" Ports [1, 1] Position [610, 238, 635, 262] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "2" copy_samples off en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,262" block_type "usamp" block_version "10.1.3" sg_icon_stat "25,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsiz" "e{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample5" SID "3792" Ports [1, 1] Position [610, 268, 635, 292] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "2" copy_samples off en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,262" block_type "usamp" block_version "10.1.3" sg_icon_stat "25,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsiz" "e{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample6" SID "3793" Ports [1, 1] Position [610, 358, 635, 382] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,262" block_type "usamp" block_version "10.1.3" sg_icon_stat "25,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsiz" "e{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample7" SID "3794" Ports [1, 1] Position [610, 148, 635, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,262" block_type "usamp" block_version "10.1.3" sg_icon_stat "25,24,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsiz" "e{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "Wave" SID "3795" Ports [8] Position [635, 430, 675, 545] NamePlacement "alternate" Floating off Location [5, 52, 1685, 1019] Open off NumInputPorts "8" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" axes8 "%" } TimeRange "18000" YMin "-1~-1~-1~24.7~0.00168152~-0.75~0~0" YMax "2~2~1~27.3~0.00185852~0.75~2~5" SaveName "ScopeData21" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "done1" SID "3796" Ports [1, 1] Position [530, 445, 565, 455] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "vin" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done10" SID "3797" Ports [1, 1] Position [1520, 1260, 1555, 1270] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "Data" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done11" SID "3798" Ports [1, 1] Position [1520, 1275, 1555, 1285] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "Vin" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done12" SID "3799" Ports [1, 1] Position [1520, 1290, 1555, 1300] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "xk" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done13" SID "3800" Ports [1, 1] Position [1520, 1305, 1555, 1315] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "Sym" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done14" SID "3801" Ports [1, 1] Position [1520, 1320, 1555, 1330] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "done" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done15" SID "3802" Ports [1, 1] Position [1520, 1335, 1555, 1345] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "ResetRx" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done16" SID "3803" Ports [1, 1] Position [530, 535, 565, 545] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "mod" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done17" SID "3804" Ports [1, 1] Position [1520, 1350, 1555, 1360] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "numBytes" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done18" SID "3805" Ports [1, 1] Position [1160, 20, 1195, 30] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "start" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done19" SID "3806" Ports [1, 1] Position [1160, 35, 1195, 45] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "vin" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done2" SID "3807" Ports [1, 1] Position [530, 460, 565, 470] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "xk" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done20" SID "3808" Ports [1, 1] Position [1160, 50, 1195, 60] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "xk_index" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done21" SID "3809" Ports [1, 1] Position [1160, 65, 1195, 75] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "mod_level" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done22" SID "3810" Ports [1, 1] Position [1160, 80, 1195, 90] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "rx_i" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done23" SID "3811" Ports [1, 1] Position [1160, 95, 1195, 105] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "rx_q" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done24" SID "3812" Ports [1, 1] Position [1160, 110, 1195, 120] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "rx_we_2" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done25" SID "3813" Ports [1, 1] Position [1160, 125, 1195, 135] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "rx_addr_2" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done26" SID "3814" Ports [1, 1] Position [1160, 140, 1195, 150] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "rx_data_2" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done27" SID "3815" Ports [1, 1] Position [1160, 155, 1195, 165] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "rx_done_2" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done28" SID "3816" Ports [1, 1] Position [1535, 160, 1570, 170] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "rx_we" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done29" SID "3817" Ports [1, 1] Position [1535, 175, 1570, 185] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "rx_addr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done3" SID "3818" Ports [1, 1] Position [530, 475, 565, 485] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "sym" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done30" SID "3819" Ports [1, 1] Position [1535, 190, 1570, 200] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "rx_data" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done31" SID "3820" Ports [1, 1] Position [1535, 205, 1570, 215] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "rx_done" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done32" SID "3821" Ports [1, 1] Position [1535, 220, 1570, 230] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "nrst" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done33" SID "3822" Ports [1, 1] Position [1580, 235, 1615, 245] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "grst" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done34" SID "9388" Ports [1, 1] Position [420, 215, 455, 225] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done4" SID "3823" Ports [1, 1] Position [530, 430, 565, 440] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "start" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done5" SID "3824" Ports [1, 1] Position [530, 490, 565, 500] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "I" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done6" SID "3825" Ports [1, 1] Position [530, 505, 565, 515] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "Q" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done7" SID "3826" Ports [1, 1] Position [530, 520, 565, 530] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "valid_sym" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done8" SID "3827" Ports [1, 1] Position [1520, 1230, 1555, 1240] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "WE" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "done9" SID "3828" Ports [1, 1] Position [1520, 1245, 1555, 1255] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "Addr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "index acc1" SID "3830" Ports [3, 1] Position [855, 639, 905, 691] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. Output type and binary point position match the input.

" "Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to run at the" " system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "4" overflow "Wrap" scale "1" rst on hasbypass off en on dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,457" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,3,1,white,blue,0,ee9eb47a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.77 33.7" "7 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 33.77 33" ".77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19.77 ],[1 1 " "1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en')" ";\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "done" SID "3831" Position [1720, 428, 1750, 442] IconDisplay "Port number" } Line { SrcBlock "Delay2" SrcPort 1 Points [95, 0] Branch { Points [0, -75; 230, 0] Branch { DstBlock "AddSub1" DstPort 1 } Branch { Points [0, -25] DstBlock "AddSub3" DstPort 1 } } Branch { Points [0, 175] DstBlock "Barrel Shifter" DstPort 1 } } Line { SrcBlock "Data Buffer" SrcPort 1 Points [10, 0; 0, -50; -385, 0] Branch { DstBlock "Relational" DstPort 2 } Branch { Points [0, 360] DstBlock "done17" DstPort 1 } } Line { SrcBlock "Logical4" SrcPort 1 Points [55, 0] Branch { Points [0, -80] DstBlock "index acc1" DstPort 2 } Branch { Points [150, 0; 0, 85; 160, 0] Branch { DstBlock "Counter1" DstPort 1 } Branch { Points [0, 270] DstBlock "Data Buffer" DstPort 4 } } } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "index acc1" DstPort 1 } Line { SrcBlock "Shift8" SrcPort 1 Points [-60, 0; 0, 105] DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "index acc1" SrcPort 1 Points [10, 0] DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "Assert2" DstPort 1 } Line { SrcBlock ">=8?" SrcPort 1 Points [0, -5] Branch { DstBlock "Shift8" DstPort 1 } Branch { Points [90, 0] DstBlock "Convert2" DstPort 1 } } Line { SrcBlock "Barrel Shifter" SrcPort 1 DstBlock "Slicer" DstPort 2 } Line { SrcBlock " " SrcPort 1 Points [15, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 115; 50, 0; 0, 225; -1395, 0; 0, -195] DstBlock "EVM Calc" DstPort 8 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock " " DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 Points [0, 20] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -20; -25, 0; 0, 315] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "Logical1" SrcPort 1 Points [0, 125] DstBlock "Counter1" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 Points [0, 0] Branch { Points [0, 40; -60, 0] DstBlock "Logical2" DstPort 1 } Branch { Points [0, -205; -230, 0] DstBlock "Logical1" DstPort 3 } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Convert3" SrcPort 1 Points [0, 35; -95, 0; 0, 140] DstBlock "Slicer" DstPort 1 } Line { SrcBlock "Modulation RAM" SrcPort 1 Points [15, 0] Branch { Points [0, 70] Branch { DstBlock "Hard Decision" DstPort 1 } Branch { Points [0, 165] DstBlock "EVM Calc" DstPort 2 } } Branch { Points [15, 0] Branch { DstBlock "Delay2" DstPort 1 } Branch { Points [0, -170; 65, 0] Branch { DstBlock "done16" DstPort 1 } Branch { Points [0, -230] DstBlock "Up Sample2" DstPort 1 } } } } Line { SrcBlock "Xk_index" SrcPort 1 Points [25, 0] Branch { Points [0, 285] DstBlock "EVM Calc" DstPort 5 } Branch { Points [10, 0] Branch { Points [50, 0] Branch { DstBlock "Modulation RAM" DstPort 1 } Branch { Points [0, -225] DstBlock "Delay5" DstPort 1 } } Branch { Points [0, 605] DstBlock "done12" DstPort 1 } } } Line { SrcBlock "Sym Index" SrcPort 1 Points [10, 0] Branch { Points [20, 0] Branch { Points [0, 275] DstBlock "EVM Calc" DstPort 6 } Branch { Points [70, 0] Branch { Points [0, -230] DstBlock "Delay6" DstPort 1 } Branch { DstBlock "Modulation RAM" DstPort 2 } } } Branch { Points [0, 600] DstBlock "done13" DstPort 1 } } Line { SrcBlock "Hard Decision" SrcPort 1 Points [50, 0; 0, 75] Branch { Points [0, 25] DstBlock "Barrel Shifter" DstPort 2 } Branch { Points [-110, 0] DstBlock "EVM Calc" DstPort 1 } } Line { SrcBlock "I" SrcPort 1 Points [40, 0] Branch { Points [0, 150] DstBlock "EVM Calc" DstPort 3 } Branch { Points [20, 0] Branch { DstBlock "Hard Decision" DstPort 2 } Branch { Points [0, -310] DstBlock "Delay7" DstPort 1 } } } Line { SrcBlock "Q" SrcPort 1 Points [35, 0] Branch { Points [0, 135] DstBlock "EVM Calc" DstPort 4 } Branch { Points [35, 0] Branch { DstBlock "Hard Decision" DstPort 3 } Branch { Points [0, -320] DstBlock "Delay8" DstPort 1 } } } Line { SrcBlock "Start" SrcPort 1 Points [15, 0] Branch { DstBlock "Logical4" DstPort 1 } Branch { Points [0, -300] Branch { DstBlock "done4" DstPort 1 } Branch { Points [0, -215] DstBlock "Delay9" DstPort 1 } } } Line { SrcBlock "From" SrcPort 1 Points [0, -15; 20, 0] Branch { DstBlock "Logical4" DstPort 2 } Branch { Points [0, 10] DstBlock "Logical4" DstPort 3 } } Line { SrcBlock "Assert2" SrcPort 1 Points [5, 0] Branch { DstBlock "Convert3" DstPort 1 } Branch { DstBlock ">=8?" DstPort 1 } } Line { SrcBlock "Vin" SrcPort 1 Points [65, 0] Branch { Points [45, 0] Branch { Points [15, 0] Branch { DstBlock "Delay3" DstPort 1 } Branch { Points [0, -60] DstBlock "EVM Calc" DstPort 7 } } Branch { Points [0, 225] DstBlock "done11" DstPort 1 } } Branch { Points [0, -605] DstBlock "Delay4" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 Points [210, 0; 0, -85] Branch { Points [0, -45] DstBlock "Barrel Shifter" DstPort 3 } Branch { Points [290, 0] Branch { Points [0, -175] Branch { DstBlock "index acc1" DstPort 3 } Branch { Points [230, 0; 0, -125] DstBlock "Logical1" DstPort 1 } } Branch { DstBlock "Logical2" DstPort 3 } } } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "Data Buffer" SrcPort 2 Points [15, 0; 0, 95; -1565, 0; 0, -445] DstBlock "Modulation RAM" DstPort 3 } Line { SrcBlock "Relational" SrcPort 1 Points [0, -5] DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 Points [0, -55] DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Assert1" SrcPort 1 Points [-45, 0; 0, -230] DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Data Buffer" SrcPort 3 Points [5, 0] Branch { Points [0, 40; -285, 0] Branch { DstBlock "Assert1" DstPort 1 } Branch { Points [0, 185] DstBlock "done15" DstPort 1 } } Branch { Points [80, 0; 0, -310; -170, 0] DstBlock " 2" DstPort 1 } } Line { Name "start" Labels [0, 0] SrcBlock "done4" SrcPort 1 DstBlock "Wave" DstPort 1 } Line { Name "vin" Labels [0, 0] SrcBlock "done1" SrcPort 1 DstBlock "Wave" DstPort 2 } Line { Name "xk" Labels [0, 0] SrcBlock "done2" SrcPort 1 DstBlock "Wave" DstPort 3 } Line { Name "sym" Labels [0, 0] SrcBlock "done3" SrcPort 1 DstBlock "Wave" DstPort 4 } Line { Name "I" Labels [0, 0] SrcBlock "done5" SrcPort 1 DstBlock "Wave" DstPort 5 } Line { Name "Q" Labels [0, 0] SrcBlock "done6" SrcPort 1 DstBlock "Wave" DstPort 6 } Line { Name "valid_sym" Labels [0, 0] SrcBlock "done7" SrcPort 1 DstBlock "Wave" DstPort 7 } Line { Name "WE" Labels [0, 0] SrcBlock "done8" SrcPort 1 DstBlock "Decoder3" DstPort 1 } Line { Name "Addr" Labels [0, 0] SrcBlock "done9" SrcPort 1 DstBlock "Decoder3" DstPort 2 } Line { Name "Data" Labels [0, 0] SrcBlock "done10" SrcPort 1 DstBlock "Decoder3" DstPort 3 } Line { Name "Vin" Labels [0, 0] SrcBlock "done11" SrcPort 1 DstBlock "Decoder3" DstPort 4 } Line { Name "xk" Labels [0, 0] SrcBlock "done12" SrcPort 1 DstBlock "Decoder3" DstPort 5 } Line { Name "Sym" Labels [0, 0] SrcBlock "done13" SrcPort 1 DstBlock "Decoder3" DstPort 6 } Line { Name "done" Labels [0, 0] SrcBlock "done14" SrcPort 1 DstBlock "Decoder3" DstPort 7 } Line { Name "ResetRx" Labels [0, 0] SrcBlock "done15" SrcPort 1 DstBlock "Decoder3" DstPort 8 } Line { Name "mod" Labels [0, 0] SrcBlock "done16" SrcPort 1 DstBlock "Wave" DstPort 8 } Line { Name "numBytes" Labels [0, 0] SrcBlock "done17" SrcPort 1 DstBlock "Decoder3" DstPort 9 } Line { SrcBlock "Delay5" SrcPort 1 Points [60, 0] Branch { DstBlock "done2" DstPort 1 } Branch { Points [0, -185] DstBlock "Up Sample5" DstPort 1 } } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "done3" DstPort 1 } Line { SrcBlock "Delay7" SrcPort 1 Points [60, 0] Branch { DstBlock "done5" DstPort 1 } Branch { Points [0, -155] DstBlock "Up Sample3" DstPort 1 } } Line { SrcBlock "Delay8" SrcPort 1 Points [50, 0] Branch { DstBlock "done6" DstPort 1 } Branch { Points [0, -140] DstBlock "Up Sample6" DstPort 1 } } Line { SrcBlock "Invertr" SrcPort 1 DstBlock "Up Sample7" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Assert4" DstPort 1 } Line { SrcBlock "Assert4" SrcPort 1 Points [25, 0] Branch { Points [0, -195] DstBlock "done18" DstPort 1 } Branch { DstBlock "FEC Decoder" DstPort 3 } } Line { SrcBlock "Delay9" SrcPort 1 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "Assert5" DstPort 1 } Line { SrcBlock "Assert5" SrcPort 1 Points [35, 0] Branch { Points [0, -210] DstBlock "done19" DstPort 1 } Branch { DstBlock "FEC Decoder" DstPort 4 } } Line { SrcBlock "Assert6" SrcPort 1 Points [45, 0] Branch { Points [0, -225] DstBlock "done20" DstPort 1 } Branch { DstBlock "FEC Decoder" DstPort 5 } } Line { SrcBlock "Up Sample5" SrcPort 1 DstBlock "Assert6" DstPort 1 } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Assert7" DstPort 1 } Line { SrcBlock "Assert7" SrcPort 1 Points [55, 0] Branch { Points [0, -240] DstBlock "done21" DstPort 1 } Branch { DstBlock "FEC Decoder" DstPort 6 } } Line { SrcBlock "Up Sample3" SrcPort 1 DstBlock "Assert8" DstPort 1 } Line { SrcBlock "Assert8" SrcPort 1 Points [65, 0] Branch { Points [0, -255] DstBlock "done22" DstPort 1 } Branch { DstBlock "FEC Decoder" DstPort 7 } } Line { SrcBlock "Up Sample6" SrcPort 1 DstBlock "Assert9" DstPort 1 } Line { SrcBlock "Assert9" SrcPort 1 Points [75, 0] Branch { Points [0, -270] DstBlock "done23" DstPort 1 } Branch { DstBlock "FEC Decoder" DstPort 8 } } Line { SrcBlock "From2" SrcPort 1 Points [105, 0] Branch { DstBlock "Assert10" DstPort 1 } Branch { Points [0, 30] DstBlock "done34" DstPort 1 } } Line { Name "start" Labels [0, 0] SrcBlock "done18" SrcPort 1 DstBlock "Decoder" DstPort 1 } Line { Name "xk_index" Labels [0, 0] SrcBlock "done20" SrcPort 1 DstBlock "Decoder" DstPort 3 } Line { Name "mod_level" Labels [0, 0] SrcBlock "done21" SrcPort 1 DstBlock "Decoder" DstPort 4 } Line { Name "rx_i" Labels [0, 0] SrcBlock "done22" SrcPort 1 DstBlock "Decoder" DstPort 5 } Line { Name "rx_q" Labels [0, 0] SrcBlock "done23" SrcPort 1 DstBlock "Decoder" DstPort 6 } Line { Name "rx_we_2" Labels [0, 0] SrcBlock "done24" SrcPort 1 DstBlock "Decoder" DstPort 7 } Line { Name "rx_addr_2" Labels [0, 0] SrcBlock "done25" SrcPort 1 DstBlock "Decoder" DstPort 8 } Line { Name "rx_data_2" Labels [0, 0] SrcBlock "done26" SrcPort 1 DstBlock "Decoder" DstPort 9 } Line { Name "rx_done_2" Labels [0, 0] SrcBlock "done27" SrcPort 1 DstBlock "Decoder" DstPort 10 } Line { Name "vin" Labels [0, 0] SrcBlock "done19" SrcPort 1 DstBlock "Decoder" DstPort 2 } Line { Name "rx_we" Labels [0, 0] SrcBlock "done28" SrcPort 1 DstBlock "Decoder2" DstPort 1 } Line { Name "rx_addr" Labels [0, 0] SrcBlock "done29" SrcPort 1 DstBlock "Decoder2" DstPort 2 } Line { Name "rx_data" Labels [0, 0] SrcBlock "done30" SrcPort 1 DstBlock "Decoder2" DstPort 3 } Line { Name "rx_done" Labels [0, 0] SrcBlock "done31" SrcPort 1 DstBlock "Decoder2" DstPort 4 } Line { Name "nrst" Labels [0, 0] SrcBlock "done32" SrcPort 1 DstBlock "Decoder2" DstPort 5 } Line { SrcBlock "Down Sample" SrcPort 1 Points [200, 0; 0, 735; -70, 0; 0, 45] Branch { DstBlock "Data Buffer" DstPort 2 } Branch { Points [0, 175] DstBlock "done8" DstPort 1 } } Line { SrcBlock "Down Sample1" SrcPort 1 Points [180, 0; 0, 665; -65, 0; 0, 65] Branch { DstBlock "Data Buffer" DstPort 1 } Branch { Points [0, 210] DstBlock "done9" DstPort 1 } } Line { SrcBlock "Down Sample2" SrcPort 1 Points [160, 0; 0, 620; -60, 0; 0, 120] Branch { DstBlock "Data Buffer" DstPort 3 } Branch { Points [0, 185] DstBlock "done10" DstPort 1 } } Line { SrcBlock "Down Sample3" SrcPort 1 Points [85, 0] Branch { Points [0, 750] Branch { DstBlock "Data Buffer" DstPort 5 } Branch { Points [0, 205] DstBlock "done14" DstPort 1 } } Branch { Points [180, 0; 0, 55] DstBlock "Logical5" DstPort 1 } } Line { SrcBlock "Assert3" SrcPort 1 Points [105, 0] Branch { Points [0, 280; 700, 0] DstBlock "done32" DstPort 1 } Branch { DstBlock "FEC Decoder" DstPort 1 } } Line { Name "grst" Labels [0, 0] SrcBlock "done33" SrcPort 1 DstBlock "Decoder2" DstPort 6 } Line { SrcBlock "Up Sample7" SrcPort 1 Points [5, 0] Branch { DstBlock "Assert3" DstPort 1 } Branch { Points [0, -155; 730, 0; 0, 235] DstBlock "done33" DstPort 1 } } Line { SrcBlock "FEC Reset" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock " 2" SrcPort 1 Points [10, 0] Branch { Points [0, 35; -825, 0; 0, -75; -515, 0; 0, -240] DstBlock "Logical6" DstPort 2 } Branch { DstBlock "Logical5" DstPort 2 } } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "done" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Invertr" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 Points [0, 55; 10, 0] Branch { DstBlock "Logical7" DstPort 1 } Branch { Points [0, 145] DstBlock "done7" DstPort 1 } } Line { SrcBlock "Delay4" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Logical7" SrcPort 1 Points [20, 0] Branch { Points [0, -140] DstBlock "Up Sample4" DstPort 1 } Branch { Points [0, 60] DstBlock "done1" DstPort 1 } } Line { SrcBlock "done34" SrcPort 1 DstBlock "Display" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 Points [25, 0] Branch { Points [0, -210] DstBlock "done27" DstPort 1 } Branch { DstBlock "Down Sample3" DstPort 1 } } Line { SrcBlock "Convert" SrcPort 1 Points [10, 0] Branch { DstBlock "Down Sample" DstPort 1 } Branch { Points [0, -165] DstBlock "done24" DstPort 1 } } Line { SrcBlock "Assert10" SrcPort 1 DstBlock "FEC Decoder" DstPort 2 } Line { SrcBlock "FEC Decoder" SrcPort 8 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "FEC Decoder" SrcPort 7 Points [75, 0] Branch { DstBlock "Down Sample2" DstPort 1 } Branch { Points [0, -195] DstBlock "done26" DstPort 1 } } Line { SrcBlock "FEC Decoder" SrcPort 6 Points [60, 0] Branch { DstBlock "Down Sample1" DstPort 1 } Branch { Points [0, -180] DstBlock "done25" DstPort 1 } } Line { SrcBlock "FEC Decoder" SrcPort 5 DstBlock "Convert" DstPort 1 } Line { SrcBlock "FEC Decoder" SrcPort 4 Points [480, 0; 0, -40] DstBlock "done31" DstPort 1 } Line { SrcBlock "FEC Decoder" SrcPort 3 Points [420, 0; 0, -25] DstBlock "done30" DstPort 1 } Line { SrcBlock "FEC Decoder" SrcPort 2 Points [445, 0; 0, -10] DstBlock "done29" DstPort 1 } Line { SrcBlock "FEC Decoder" SrcPort 1 Points [35, 0; 0, 20; 375, 0; 0, -15] DstBlock "done28" DstPort 1 } Annotation { Position [1319, 101] } } } Block { BlockType RealImagToComplex Name "Real-Imag to\nComplex" SID "3832" Ports [2, 1] Position [945, 271, 975, 309] Input "Real and imag" } Block { BlockType Reference Name "Rx_debug_EQ_I" SID "3833" Ports [1, 1] Position [830, 275, 865, 285] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.985 0.979 0.895 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.985 0." "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_debug_EQ_Q" SID "3834" Ports [1, 1] Position [830, 295, 865, 305] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.985 0.979 0.895 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.985 0." "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Scaling" SID "3835" Ports [5, 5] Position [470, 322, 575, 498] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Scaling" Location [2, 74, 1184, 830] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "66" Block { BlockType Inport Name "Eq-I" SID "3836" Position [415, 488, 445, 502] IconDisplay "Port number" } Block { BlockType Inport Name "Eq-Q" SID "3837" Position [415, 543, 445, 557] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Xk_index" SID "3838" Position [375, 228, 405, 242] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "3839" Position [515, 613, 545, 627] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Sym Index" SID "3840" Position [375, 263, 405, 277] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Reference Name " To_UFix16_11" SID "3841" Ports [1, 1] Position [340, 412, 385, 428] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes type of samples without altering their binary representation.

Hardware notes: In hardwar" "e this block costs nothing.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and t" "he output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) " "becomes an output of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "11" has_advanced_control "0" sggui_pos "20,20,356,278" block_type "cast" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "16LSB" SID "3842" Ports [1, 1] Position [270, 362, 300, 378] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "LSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "16MSB" SID "3843" Ports [1, 1] Position [270, 412, 300, 428] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "LSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "1LSB" SID "3844" Ports [1, 1] Position [485, 313, 520, 327] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "3845" Ports [1, 1] Position [540, 223, 565, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "3846" Ports [1, 1] Position [675, 608, 700, 632] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "3847" Ports [1, 1] Position [540, 258, 565, 282] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "3848" Ports [1, 1] Position [185, 356, 215, 384] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType From Name "From3" SID "3849" Position [15, 361, 130, 379] ShowName off CloseFcn "tagdialog Close" GotoTag "RxReg_PostEQScaling" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "3850" Position [940, 492, 1035, 508] ShowName off GotoTag "EQ_I" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "3851" Position [940, 512, 1035, 528] ShowName off GotoTag "EQ_Q" TagVisibility "global" } Block { BlockType Reference Name "Mult" SID "3852" Ports [2, 1] Position [665, 457, 715, 508] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipel" "ine for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "symbol_unmap_nb" bin_pt "symbol_unmap_bp" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[12 0 0 20 0 1 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.77 32.7" "7 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 32.77 32" ".77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18.77 ],[1 1 " "1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa" " \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n '" ");\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult1" SID "3853" Ports [2, 1] Position [665, 512, 715, 563] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipel" "ine for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "symbol_unmap_nb" bin_pt "symbol_unmap_bp" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[12 0 0 20 0 1 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.77 32.7" "7 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 32.77 32" ".77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18.77 ],[1 1 " "1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa" " \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n '" ");\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux" SID "3854" Ports [3, 1] Position [580, 298, 605, 442] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,144,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 20.5714 123.429 144 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 20.5714 123.429 144 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.3" "25 5.325 ],[75.33 75.33 78.33 75.33 78.33 78.33 78.33 75.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[7" "2.33 72.33 75.33 75.33 72.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[69.33 69.33 72.33 72" ".33 69.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[66.33 66.33 69.33 66.33 69.33 69.33 66." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "To_UFix16_11" SID "3855" Ports [1, 1] Position [340, 362, 385, 378] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes type of samples without altering their binary representation.

Hardware notes: In hardwar" "e this block costs nothing.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and t" "he output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) " "becomes an output of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "11" has_advanced_control "0" sggui_pos "20,20,356,278" block_type "cast" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "I" SID "3856" Position [1075, 478, 1105, 492] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "Q" SID "3857" Position [1075, 533, 1105, 547] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name " Xk_index" SID "3858" Position [1075, 228, 1105, 242] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Vout" SID "3859" Position [830, 613, 860, 627] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Outport Name " Sym Index" SID "3860" Position [1075, 263, 1105, 277] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Line { SrcBlock "Eq-Q" SrcPort 1 Points [0, 0] DstBlock "Mult1" DstPort 2 } Line { SrcBlock "Eq-I" SrcPort 1 Points [0, 0] DstBlock "Mult" DstPort 2 } Line { SrcBlock "Mult1" SrcPort 1 Points [135, 0] Branch { Points [0, -20] DstBlock "Goto3" DstPort 1 } Branch { DstBlock "Q" DstPort 1 } } Line { SrcBlock "Mult" SrcPort 1 Points [135, 0] Branch { Points [0, 15] DstBlock "Goto2" DstPort 1 } Branch { DstBlock "I" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 Points [10, 0; 0, 100] Branch { Points [0, 55] DstBlock "Mult1" DstPort 1 } Branch { DstBlock "Mult" DstPort 1 } } Line { SrcBlock "1LSB" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock " To_UFix16_11" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "To_UFix16_11" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Xk_index" SrcPort 1 Points [0, 0] DstBlock "Delay1" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock " Xk_index" DstPort 1 } Line { SrcBlock "Vin" SrcPort 1 Points [0, 0] DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 Points [0, 0] DstBlock "Vout" DstPort 1 } Line { SrcBlock "Sym Index" SrcPort 1 Points [0, 0; 50, 0] Branch { DstBlock "Delay4" DstPort 1 } Branch { Points [0, 50] DstBlock "1LSB" DstPort 1 } } Line { SrcBlock "From3" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "16LSB" SrcPort 1 Points [0, 0] DstBlock "To_UFix16_11" DstPort 1 } Line { SrcBlock "16MSB" SrcPort 1 DstBlock " To_UFix16_11" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 Points [20, 0] Branch { DstBlock "16LSB" DstPort 1 } Branch { Points [0, 50] DstBlock "16MSB" DstPort 1 } } Line { SrcBlock "Delay4" SrcPort 1 DstBlock " Sym Index" DstPort 1 } Annotation { Name "This block scales the equalized constellation so it can be easily sliced/demapped for hard decisions," Position [708, 661] DropShadow on } } } Block { BlockType Reference Name "Up Sample1" SID "3861" Ports [1, 1] Position [740, 266, 770, 294] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sampl" "e.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a m" "ux and single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "30,28,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "3862" Ports [1, 1] Position [740, 286, 770, 314] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sampl" "e.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a m" "ux and single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "30,28,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType ZeroOrderHold Name "Zero-Order\nHold" SID "3863" Position [900, 273, 920, 287] ShowName off } Block { BlockType ZeroOrderHold Name "Zero-Order\nHold1" SID "3864" Position [900, 293, 920, 307] ShowName off } Block { BlockType Reference Name "done1" SID "3865" Ports [1, 1] Position [505, 630, 540, 640] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "3866" Ports [1, 1] Position [505, 645, 540, 655] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done3" SID "3867" Ports [1, 1] Position [505, 660, 540, 670] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "3868" Ports [1, 1] Position [505, 600, 540, 610] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "3869" Ports [1, 1] Position [505, 615, 540, 625] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done6" SID "3870" Ports [1, 1] Position [505, 675, 540, 685] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "posedge" SID "3871" Ports [1, 1] Position [455, 516, 490, 534] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge" Location [2, 74, 1278, 978] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "3872" Position [280, 183, 310, 197] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "3873" Ports [1, 1] Position [425, 153, 460, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15.33 15" ".33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "3874" Ports [1, 1] Position [490, 156, 515, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "3875" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 32.66 3" "8.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 32.66 26" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3876" Position [610, 173, 640, 187] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [70, 0] Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Block { BlockType Outport Name "done" SID "3877" Position [930, 423, 960, 437] IconDisplay "Port number" } Line { SrcBlock "SubCar Index" SrcPort 1 DstBlock "Equalizer" DstPort 9 } Line { SrcBlock "Sym Index" SrcPort 1 DstBlock "Equalizer" DstPort 8 } Line { SrcBlock "Scaling" SrcPort 1 Points [30, 0] Branch { DstBlock "Packet_Constructor" DstPort 1 } Branch { Points [0, -60] DstBlock "Convert4" DstPort 1 } } Line { SrcBlock "Scaling" SrcPort 2 Points [40, 0] Branch { DstBlock "Packet_Constructor" DstPort 2 } Branch { Points [0, -75] DstBlock "Convert5" DstPort 1 } } Line { SrcBlock "Scaling" SrcPort 3 DstBlock "Packet_Constructor" DstPort 3 } Line { SrcBlock "Scaling" SrcPort 4 DstBlock "Packet_Constructor" DstPort 4 } Line { SrcBlock "Scaling" SrcPort 5 DstBlock "Packet_Constructor" DstPort 5 } Line { SrcBlock "Packet_Constructor" SrcPort 1 DstBlock "done" DstPort 1 } Line { SrcBlock "H-I" SrcPort 1 DstBlock "Equalizer" DstPort 5 } Line { SrcBlock "H-Q" SrcPort 1 DstBlock "Equalizer" DstPort 6 } Line { SrcBlock "Vin" SrcPort 1 DstBlock "Equalizer" DstPort 7 } Line { SrcBlock "Y_I" SrcPort 1 DstBlock "Equalizer" DstPort 3 } Line { SrcBlock "Y_Q" SrcPort 1 DstBlock "Equalizer" DstPort 4 } Line { SrcBlock "Payload" SrcPort 1 Points [175, 0] Branch { DstBlock "posedge" DstPort 1 } Branch { Points [0, 155] DstBlock "done6" DstPort 1 } } Line { SrcBlock "posedge" SrcPort 1 Points [150, 0] DstBlock "Packet_Constructor" DstPort 6 } Line { SrcBlock "Equalizer" SrcPort 1 Points [40, 0] Branch { DstBlock "Scaling" DstPort 1 } Branch { Points [0, 265] DstBlock "done4" DstPort 1 } } Line { SrcBlock "Equalizer" SrcPort 2 Points [35, 0] Branch { DstBlock "Scaling" DstPort 2 } Branch { Points [0, 245] DstBlock "done5" DstPort 1 } } Line { SrcBlock "Equalizer" SrcPort 3 Points [30, 0] Branch { DstBlock "Scaling" DstPort 3 } Branch { Points [0, 225] DstBlock "done1" DstPort 1 } } Line { SrcBlock "Equalizer" SrcPort 4 Points [25, 0] Branch { DstBlock "Scaling" DstPort 4 } Branch { Points [0, 205] DstBlock "done2" DstPort 1 } } Line { SrcBlock "Equalizer" SrcPort 5 Points [20, 0] Branch { DstBlock "Scaling" DstPort 5 } Branch { Points [0, 185] DstBlock "done3" DstPort 1 } } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Rx_debug_EQ_Q" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Rx_debug_EQ_I" DstPort 1 } Line { SrcBlock "Convert5" SrcPort 1 Points [0, 0] DstBlock "Up Sample2" DstPort 1 } Line { SrcBlock "Convert4" SrcPort 1 Points [0, 0] DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "Phases I" SrcPort 1 DstBlock "Equalizer" DstPort 1 } Line { SrcBlock "Phases Q" SrcPort 1 DstBlock "Equalizer" DstPort 2 } Line { SrcBlock "Rx_debug_EQ_I" SrcPort 1 DstBlock "Zero-Order\nHold" DstPort 1 } Line { SrcBlock "Rx_debug_EQ_Q" SrcPort 1 DstBlock "Zero-Order\nHold1" DstPort 1 } Line { SrcBlock "Real-Imag to\nComplex" SrcPort 1 Points [30, 0] } Line { SrcBlock "Zero-Order\nHold" SrcPort 1 DstBlock "Real-Imag to\nComplex" DstPort 1 } Line { SrcBlock "Zero-Order\nHold1" SrcPort 1 DstBlock "Real-Imag to\nComplex" DstPort 2 } Line { SrcBlock "done4" SrcPort 1 DstBlock "Eq" DstPort 1 } Line { SrcBlock "done5" SrcPort 1 DstBlock "Eq" DstPort 2 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Eq" DstPort 3 } Line { SrcBlock "done2" SrcPort 1 DstBlock "Eq" DstPort 4 } Line { SrcBlock "done3" SrcPort 1 DstBlock "Eq" DstPort 5 } Line { SrcBlock "done6" SrcPort 1 DstBlock "Eq" DstPort 6 } } } Block { BlockType SubSystem Name "FFT & Chan Est" SID "3878" Ports [5, 9] Position [520, 290, 650, 390] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "FFT & Chan Est" Location [-110, 203, 1648, 1147] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "111" Block { BlockType Inport Name "Payload" SID "3879" Position [35, 368, 65, 382] IconDisplay "Port number" } Block { BlockType Inport Name "AntA I" SID "3880" Position [35, 223, 65, 237] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "AntA Q" SID "3881" Position [35, 238, 65, 252] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "AntB I" SID "3882" Position [35, 293, 65, 307] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "AntB Q" SID "3883" Position [35, 313, 65, 327] Port "5" IconDisplay "Port number" } Block { BlockType SubSystem Name "Addr Gen1" SID "3884" Ports [3, 3] Position [685, 490, 795, 540] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Addr Gen1" Location [160, 74, 1894, 1156] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "FFT Done" SID "3885" Position [85, 453, 115, 467] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Payload" SID "3886" Position [155, 483, 185, 497] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "NotTraining" SID "3887" Position [155, 498, 185, 512] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "1MSB" SID "3888" Ports [1, 1] Position [1125, 378, 1160, 392] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "MSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "6LSB" SID "3889" Ports [1, 1] Position [1185, 473, 1220, 487] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "6" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "LSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "3890" Ports [0, 1] Position [990, 585, 1035, 615] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "numSubcarriers*2-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(numSubcarriers*2))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,0,1,white,blue,0,a8544230,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'127');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Copy_Downsample" SID "3891" Ports [1, 1] Position [145, 451, 210, 469] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Copy_Downsample" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "3892" Position [110, 353, 140, 367] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "3893" Ports [1, 1] Position [210, 347, 235, 373] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "3894" Ports [1, 1] Position [390, 355, 415, 385] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 30 30 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[18.33 " "18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[15.33 15.33 18.33" " 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "3895" Ports [2, 1] Position [280, 348, 325, 392] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3896" Position [475, 363, 505, 377] NamePlacement "alternate" IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [30, 0] Branch { DstBlock "Delay" DstPort 1 } Branch { Points [0, 20] DstBlock "Logical" DstPort 2 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType Reference Name "Counter" SID "3897" Ports [2, 1] Position [1030, 454, 1075, 501] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter i" "s implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "127" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(numSubcarriers*2))" bin_pt "0" load_pin off rst on en on explicit_period "off" period "2" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[6 12 0 12 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,47,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 29.66 3" "5.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 29.66 23" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay" SID "3898" Ports [1, 1] Position [655, 456, 680, 484] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.2" sg_icon_stat "25,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 28 28 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[17.33 17.33 " "20.33 17.33 20.33 20.33 20.33 17.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[14.33 14.33 17.33 17.33 1" "4.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[11.33 11.33 14.33 14.33 11.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[8.33 8.33 11.33 8.33 11.33 11.33 8.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "3899" Ports [1, 1] Position [1135, 401, 1160, 429] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.2" sg_icon_stat "25,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 28 28 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[17.33 17.33 " "20.33 17.33 20.33 20.33 20.33 17.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[14.33 14.33 17.33 17.33 1" "4.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[11.33 11.33 14.33 14.33 11.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[8.33 8.33 11.33 8.33 11.33 11.33 8.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From2" SID "3900" Position [340, 586, 455, 604] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType From Name "From5" SID "3901" Position [915, 341, 1065, 359] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_SISOmode" TagVisibility "global" } Block { BlockType Reference Name "Inverter2" SID "3902" Ports [1, 1] Position [375, 466, 415, 484] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "3903" Ports [1, 1] Position [830, 446, 870, 464] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "3904" Ports [3, 1] Position [610, 418, 635, 522] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,104,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 104 104 0 ],[0.77 0.82 0" ".91 ]);\nplot([0 25 25 0 0 ],[0 0 104 104 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[55.33 55" ".33 58.33 55.33 58.33 58.33 58.33 55.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[52.33 52.33 55.33 55." "33 52.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[49.33 49.33 52.33 52.33 49.33 ],[1 1 1 ]" ");\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[46.33 46.33 49.33 46.33 49.33 49.33 46.33 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black'" ");disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical10" SID "3905" Ports [2, 1] Position [900, 473, 930, 502] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 29 29 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 29 29 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical11" SID "3906" Ports [2, 1] Position [900, 433, 930, 462] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 29 29 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 29 29 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "3907" Ports [2, 1] Position [510, 558, 540, 607] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[4 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,49,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 49 49 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 49 49 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[28.44 28.44 32.4" "4 28.44 32.44 32.44 32.44 28.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[24.44 24.44 28.44 28.44 24.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[20.44 20.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 16.44 20.44 20.44 16.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "3908" Ports [2, 1] Position [955, 406, 985, 464] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,58,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 58 58 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 58 58 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[33.44 33.44 37.4" "4 33.44 37.44 37.44 37.44 33.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[29.44 29.44 33.44 33.44 29.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[25.44 25.44 29.44 29.44 25.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[21.44 21.44 25.44 21.44 25.44 25.44 21.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "3909" Ports [2, 1] Position [1205, 392, 1230, 423] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,31,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 31 31 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 31 31 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[18.33 18.33 " "21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[15.33 15.33 18.33 18.33 1" "5.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "3910" Ports [3, 1] Position [1280, 360, 1305, 460] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,100,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 100 100 0 ],[0.77 0.82 0" ".91 ]);\nplot([0 25 25 0 0 ],[0 0 100 100 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[53.33 53" ".33 56.33 53.33 56.33 56.33 56.33 53.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[50.33 50.33 53.33 53." "33 50.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[47.33 47.33 50.33 50.33 47.33 ],[1 1 1 ]" ");\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[44.33 44.33 47.33 44.33 47.33 47.33 44.33 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black'" ");disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "3911" Ports [2, 1] Position [1195, 357, 1240, 393] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "NAND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,36,2,1,white,blue,0,68c5cabf,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 36 36 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 36 36 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[23.55 23.55 2" "8.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[18.55 18.55 23.55 23.55 " "18.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1 1 ])" ";\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0.973 ]" ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp(" "'nand');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Oscillator" SID "3912" Ports [2, 1] Position [495, 450, 540, 485] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Oscillator" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "en" SID "3913" Position [260, 313, 290, 327] IconDisplay "Port number" } Block { BlockType Inport Name "rst" SID "3914" Position [260, 288, 290, 302] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Assert" SID "3915" Ports [1, 1] Position [425, 222, 470, 248] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type on type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,436" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,26,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 26 26 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "3916" Ports [1, 1] Position [345, 227, 375, 243] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,267846e5,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "3917" Ports [3, 1] Position [335, 259, 400, 331] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "65,72,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 72 72 0 ]);\npatch([11.975 24.98 33.98 42.98 51.98 33.98 20.975 11.975 ],[45" ".99 45.99 54.99 45.99 54.99 54.99 54.99 45.99 ],[1 1 1 ]);\npatch([20.975 33.98 24.98 11.975 20.975 ],[36.99 36." "99 45.99 45.99 36.99 ],[0.931 0.946 0.973 ]);\npatch([11.975 24.98 33.98 20.975 11.975 ],[27.99 27.99 36.99 36.9" "9 27.99 ],[1 1 1 ]);\npatch([20.975 51.98 42.98 33.98 24.98 11.975 20.975 ],[18.99 18.99 27.99 18.99 27.99 27.99" " 18.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port" "_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3918" Position [575, 288, 605, 302] IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 Points [150, 0] Branch { DstBlock "Q" DstPort 1 } Branch { Points [0, -60] DstBlock "Assert" DstPort 1 } } Line { SrcBlock "en" SrcPort 1 DstBlock "Register" DstPort 3 } Line { SrcBlock "Inverter1" SrcPort 1 Points [-25, 0; 0, 35] DstBlock "Register" DstPort 1 } Line { SrcBlock "rst" SrcPort 1 DstBlock "Register" DstPort 2 } Line { SrcBlock "Assert" SrcPort 1 DstBlock "Inverter1" DstPort 1 } } } Block { BlockType SubSystem Name "Output Sym Counter" SID "3919" Ports [4, 1] Position [1085, 226, 1220, 274] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Output Sym Counter" Location [383, 298, 1360, 469] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "FFT Done" SID "3920" Position [295, 333, 325, 347] IconDisplay "Port number" } Block { BlockType Inport Name "Not Training" SID "3921" Position [295, 293, 325, 307] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Payload" SID "3922" Position [295, 383, 325, 397] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Read Addr" SID "3923" Position [350, 208, 380, 222] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "3924" Ports [0, 1] Position [360, 184, 380, 206] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "numSubcarriers-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(numSubcarriers))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,22,0,1,white,blue,0,346a66ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[13.22 13." "22 15.22 13.22 15.22 15.22 15.22 13.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[11.22 11.22 13.22 13.22" " 11.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[9.22 9.22 11.22 11.22 9.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 7.22 9.22 9.22 7.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output" "',1,'63');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Counter1" SID "3925" Ports [2, 1] Position [920, 209, 965, 256] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "127" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(max_OFDM_symbols))" bin_pt "0" load_pin off rst on en on explicit_period "off" period "2" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[6 12 0 12 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,619" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,47,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 47 47 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 2" "9.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 " "29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{1" "4}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Inverter3" SID "3926" Ports [1, 1] Position [570, 291, 610, 309] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "3927" Ports [2, 1] Position [670, 185, 700, 265] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,80,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 80 80 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 80 80 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[44.44 44.4" "4 48.44 44.44 48.44 48.44 48.44 44.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[40.44 40.44 44.44 44.44 " "40.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[36.44 36.44 40.44 40.44 36.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[32.44 32.44 36.44 32.44 36.44 36.44 32.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "3928" Ports [2, 1] Position [830, 205, 860, 285] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,80,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 80 80 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 80 80 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[44.44 44.4" "4 48.44 44.44 48.44 48.44 48.44 44.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[40.44 40.44 44.44 44.44 " "40.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[36.44 36.44 40.44 40.44 36.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[32.44 32.44 36.44 32.44 36.44 36.44 32.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "3929" Ports [2, 1] Position [670, 280, 700, 360] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,80,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 80 80 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 80 80 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[44.44 44.4" "4 48.44 44.44 48.44 48.44 48.44 44.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[40.44 40.44 44.44 44.44 " "40.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[36.44 36.44 40.44 40.44 36.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[32.44 32.44 36.44 32.44 36.44 36.44 32.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "3930" Ports [2, 1] Position [605, 323, 635, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 29 29 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge" SID "3931" Ports [1, 1] Position [375, 332, 410, 348] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge" Location [267, 643, 607, 741] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "3932" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "3933" Ports [1, 1] Position [95, 46, 125, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "3934" Ports [1, 1] Position [160, 48, 185, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "3935" Ports [2, 1] Position [215, 28, 260, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3936" Position [285, 43, 315, 57] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType SubSystem Name "Posedge1" SID "3937" Ports [1, 1] Position [375, 382, 410, 398] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge1" Location [267, 643, 607, 741] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "3938" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "3939" Ports [1, 1] Position [95, 46, 125, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "3940" Ports [1, 1] Position [160, 48, 185, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "3941" Ports [2, 1] Position [215, 28, 260, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3942" Position [285, 43, 315, 57] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } } } Block { BlockType SubSystem Name "Posedge2" SID "3943" Ports [1, 1] Position [750, 217, 785, 233] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge2" Location [267, 643, 607, 741] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "3944" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "3945" Ports [1, 1] Position [95, 46, 125, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "3946" Ports [1, 1] Position [160, 48, 185, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "3947" Ports [2, 1] Position [215, 28, 260, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3948" Position [285, 43, 315, 57] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } } } Block { BlockType SubSystem Name "Posedge3" SID "3949" Ports [1, 1] Position [745, 312, 780, 328] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge3" Location [267, 643, 607, 741] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "3950" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "3951" Ports [1, 1] Position [95, 46, 125, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "3952" Ports [1, 1] Position [160, 48, 185, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "3953" Ports [2, 1] Position [215, 28, 260, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3954" Position [285, 43, 315, 57] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType Reference Name "Relational" SID "3955" Ports [2, 1] Position [465, 183, 510, 227] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch2" SID "3956" Ports [2, 1] Position [535, 333, 570, 357] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch2" Location [542, 167, 762, 256] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "3957" Position [115, 108, 145, 122] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "3958" Position [115, 98, 145, 112] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant2" SID "3959" Ports [0, 1] Position [155, 62, 170, 78] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 " "12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "3960" Ports [3, 1] Position [215, 87, 260, 123] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,36,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 36 36 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[23.55 2" "3.55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[18.55 18.55 23.5" "5 23.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[13.55 13.55 18.55 18.55 13.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3," "'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Outport Name "D" SID "3961" Position [320, 98, 350, 112] IconDisplay "Port number" } Line { SrcBlock "Constant2" SrcPort 1 Points [0, 25] DstBlock "Register" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register" DstPort 2 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register" DstPort 3 } Line { SrcBlock "Register" SrcPort 1 DstBlock "D" DstPort 1 } } } Block { BlockType Outport Name "Sym Index" SID "3962" Position [1055, 228, 1085, 242] IconDisplay "Port number" } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "S-R Latch2" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Posedge" SrcPort 1 Points [70, 0] Branch { DstBlock "S-R Latch2" DstPort 1 } Branch { Points [0, -10] DstBlock "Logical4" DstPort 1 } } Line { SrcBlock "FFT Done" SrcPort 1 DstBlock "Posedge" DstPort 1 } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Sym Index" DstPort 1 } Line { SrcBlock "Not Training" SrcPort 1 Points [200, 0] Branch { DstBlock "Inverter3" DstPort 1 } Branch { Points [0, -55] DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Payload" SrcPort 1 DstBlock "Posedge1" DstPort 1 } Line { SrcBlock "Posedge1" SrcPort 1 Points [95, 0] Branch { Points [0, -40] DstBlock "S-R Latch2" DstPort 2 } Branch { Points [370, 0; 0, -170] DstBlock "Counter1" DstPort 1 } } Line { SrcBlock "Read Addr" SrcPort 1 DstBlock "Relational" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Posedge2" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Posedge3" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Counter1" DstPort 2 } Line { SrcBlock "Posedge2" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Posedge3" SrcPort 1 Points [20, 0; 0, -55] DstBlock "Logical2" DstPort 2 } } } Block { BlockType SubSystem Name "Rd Delay" SID "3963" Ports [1, 1] Position [265, 449, 310, 471] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Rd Delay" Location [487, 618, 846, 821] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "3964" Position [115, 233, 145, 247] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Delay1" SID "3965" Ports [1, 1] Position [300, 310, 325, 330] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "3" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.2" sg_icon_stat "25,20,1,1,white,blue,0,83e6bb61,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12" ".22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12." "22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "3966" Ports [1, 1] Position [300, 230, 325, 250] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "35" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.2" sg_icon_stat "25,20,1,1,white,blue,0,05283a76,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12" ".22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12." "22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3" "5}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "3967" Position [180, 257, 305, 273] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "3968" Ports [1, 1] Position [330, 288, 355, 302] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "3969" Ports [2, 1] Position [420, 229, 460, 276] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "40,47,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 47 47 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 47 47 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[28.55 28." "55 33.55 28.55 33.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[23.55 23.55 28.55 2" "8.55 23.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[18.55 18.55 23.55 23.55 18.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[13.55 13.55 18.55 13.55 18.55 18.55 13.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "3970" Ports [2, 1] Position [530, 244, 570, 291] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "40,47,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 47 47 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 47 47 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[28.55 28." "55 33.55 28.55 33.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[23.55 23.55 28.55 2" "8.55 23.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[18.55 18.55 23.55 23.55 18.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[13.55 13.55 18.55 13.55 18.55 18.55 13.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "3971" Ports [2, 1] Position [420, 284, 460, 331] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "40,47,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 47 47 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 47 47 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[28.55 28." "55 33.55 28.55 33.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[23.55 23.55 28.55 2" "8.55 23.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[18.55 18.55 23.55 23.55 18.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[13.55 13.55 18.55 13.55 18.55 18.55 13.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3972" Position [635, 263, 665, 277] IconDisplay "Port number" } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 Points [40, 0; 0, -30] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 Points [5, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [20, 0] Branch { DstBlock "Delay2" DstPort 1 } Branch { Points [0, 80] DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Logical3" DstPort 2 } Annotation { Name "Delay the equalizer inputs in Alamout mode in order\nto calculate pilot phaes for both r0 and r1 befo" "re\nstarting the decoding process. In SISO/Multiplexing mode,\neach symbol has its own pilots, so there's a shor" "ter delay." Position [326, 194] } } } Block { BlockType Reference Name "Relational" SID "3973" Ports [2, 1] Position [885, 568, 930, 612] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 " "12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "3978" Ports [3, 1] Position [215, 87, 260, 123] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,36,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 36 36 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[23.55 2" "3.55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[18.55 18.55 23.5" "5 23.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[13.55 13.55 18.55 18.55 13.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3," "'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Outport Name "D" SID "3979" Position [320, 98, 350, 112] IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "D" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register" DstPort 3 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 Points [0, 25] DstBlock "Register" DstPort 1 } } } Block { BlockType Outport Name "SymIndex_out" SID "3980" Position [1450, 243, 1480, 257] IconDisplay "Port number" } Block { BlockType Outport Name "Rd Addr" SID "3981" Position [1490, 473, 1520, 487] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Vout" SID "3982" Position [1395, 403, 1425, 417] Port "3" IconDisplay "Port number" } Line { SrcBlock "Counter" SrcPort 1 Points [15, 0] Branch { DstBlock "6LSB" DstPort 1 } Branch { Points [0, 100] DstBlock "Relational" DstPort 1 } Branch { Points [0, -95] DstBlock "1MSB" DstPort 1 } } Line { SrcBlock "6LSB" SrcPort 1 Points [230, 0] Branch { DstBlock "Rd Addr" DstPort 1 } Branch { Points [0, -160; -430, 0; 0, -55] DstBlock "Output Sym Counter" DstPort 4 } } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Relational" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 Points [110, 0] DstBlock "Logical7" DstPort 1 } Line { SrcBlock "1MSB" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Payload" SrcPort 1 Points [115, 0; 0, -15; 30, 0] Branch { Points [0, -220] DstBlock "Output Sym Counter" DstPort 3 } Branch { DstBlock "Inverter2" DstPort 1 } Branch { Points [0, 155; 915, 0; 0, -185] DstBlock "Logical6" DstPort 3 } } Line { SrcBlock "Inverter2" SrcPort 1 Points [35, 0] Branch { DstBlock "Oscillator" DstPort 2 } Branch { Points [0, 95] DstBlock "Logical2" DstPort 1 } } Line { SrcBlock "NotTraining" SrcPort 1 Points [275, 0] Branch { DstBlock "Logical1" DstPort 3 } Branch { Points [0, -260] DstBlock "Output Sym Counter" DstPort 2 } } Line { SrcBlock "Oscillator" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "S-R Latch1" SrcPort 1 DstBlock "Logical10" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "Logical10" SrcPort 1 Points [70, 0] Branch { DstBlock "Counter" DstPort 2 } Branch { Points [0, -90; 110, 0] Branch { Points [0, 15] DstBlock "Delay1" DstPort 1 } Branch { DstBlock "Logical4" DstPort 1 } } } Line { SrcBlock "Relational" SrcPort 1 Points [-75, 0; 0, -95] Branch { DstBlock "Logical10" DstPort 2 } Branch { Points [0, -40] DstBlock "Inverter3" DstPort 1 } } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical11" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { Labels [2, 0] SrcBlock "Logical2" SrcPort 1 Points [155, 0; 0, -95] Branch { DstBlock "S-R Latch1" DstPort 2 } Branch { Points [0, -70] DstBlock "Logical3" DstPort 1 } } Line { SrcBlock "Copy_Downsample" SrcPort 1 Points [20, 0] Branch { Points [0, -265; 820, 0; 0, 40] DstBlock "Output Sym Counter" DstPort 1 } Branch { Labels [0, 0] DstBlock "Rd Delay" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 Points [10, 0] Branch { DstBlock "S-R Latch1" DstPort 1 } Branch { Points [0, -30] DstBlock "Logical11" DstPort 1 } } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Vout" DstPort 1 } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Output Sym Counter" SrcPort 1 DstBlock "SymIndex_out" DstPort 1 } Line { SrcBlock "Logical11" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 Points [25, 0] DstBlock "Counter" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "FFT Done" SrcPort 1 DstBlock "Copy_Downsample" DstPort 1 } Line { SrcBlock "Rd Delay" SrcPort 1 Points [140, 0] Branch { DstBlock "Oscillator" DstPort 1 } Branch { Points [0, -25] DstBlock "Logical1" DstPort 1 } } } } Block { BlockType SubSystem Name "Addr_Generator" SID "3983" Ports [2, 5] Position [170, 350, 290, 450] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Addr_Generator" Location [352, 625, 827, 731] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "119" Block { BlockType Inport Name "Payload" SID "3984" Position [120, 363, 150, 377] IconDisplay "Port number" } Block { BlockType Inport Name "FFT Xn_index" SID "3985" Position [65, 593, 95, 607] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "3986" Ports [2, 1] Position [430, 588, 475, 637] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "ceil(log2(max_num_subcarriers))+1" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[4 0 0 6 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,49,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 49 49 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 49 49 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 30.66 3" "6.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 30.66 24" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','tex" "mode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Assert" SID "3987" Ports [1, 1] Position [735, 666, 775, 684] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this blo" "ck costs nothing." assert_type on type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate off rate_source "Explicitly" period "1" output_port on has_advanced_control "0" sggui_pos "20,20,356,436" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Assert');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "3988" Ports [1, 1] Position [280, 589, 315, 611] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(max_num_subcarriers))+1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');po" "rt_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay" SID "3989" Ports [1, 1] Position [760, 503, 800, 527] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "64" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,24,1,1,white,blue,0,0603ebe1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 24 24 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[15.33 15" ".33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 " "1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-64}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "3990" Ports [1, 1] Position [440, 127, 470, 153] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,26,1,1,white,blue,0,80c3f0cd,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.33 16.3" "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 16.33 16" ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 " "1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "3991" Position [585, 287, 755, 303] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType From Name "From2" SID "3992" Position [175, 614, 345, 636] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_symbolTimingOffset" TagVisibility "global" } Block { BlockType From Name "From3" SID "3993" Position [205, 391, 330, 409] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset_DV2" TagVisibility "global" } Block { BlockType From Name "From4" SID "3994" Position [160, 197, 235, 213] ShowName off CloseFcn "tagdialog Close" GotoTag "localReset" } Block { BlockType From Name "From5" SID "3995" Position [525, 128, 705, 152] BlockMirror on NamePlacement "alternate" ShowName off CloseFcn "tagdialog Close" GotoTag "regRX_sampsPerSymMinusOne" TagVisibility "global" } Block { BlockType From Name "From6" SID "3996" Position [510, 712, 585, 728] ShowName off CloseFcn "tagdialog Close" GotoTag "localReset" } Block { BlockType Goto Name "Goto3" SID "3997" Position [450, 357, 555, 383] ShowName off GotoTag "localReset" TagVisibility "local" } Block { BlockType SubSystem Name "Initial Read Addr\nTiming Calc" SID "3998" Ports [0, 1] Position [415, 482, 480, 518] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Initial Read Addr\nTiming Calc" Location [239, 767, 1789, 1256] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "AddSub1" SID "3999" Ports [2, 1] Position [645, 388, 690, 437] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "ceil(log2(max_num_subcarriers))+1" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[4 0 0 6 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,49,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 49 49 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant1" SID "4000" Ports [0, 1] Position [320, 389, 345, 411] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0.75*numSubcarriers" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "log2(numSubcarriers)" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,c663a600,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'48');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType From Name "From1" SID "4001" Position [220, 414, 390, 436] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_symbolTimingOffset" TagVisibility "global" } Block { BlockType Reference Name "Up Sample4" SID "4002" Ports [1, 1] Position [465, 412, 490, 438] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "D" SID "4003" Position [795, 408, 825, 422] IconDisplay "Port number" } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "D" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Up Sample4" DstPort 1 } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Annotation { Name "The FFT runs 4x as fast as the input samples. As the input\nsamples are written to the buffers, the F" "FT waits to start\nuntil it can have access to the newest sample it needs\n1 cycle after it's written." Position [335, 332] } } } Block { BlockType Reference Name "Inverter" SID "4004" Ports [1, 1] Position [660, 664, 695, 686] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,251" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,267846e5,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "4005" Ports [1, 1] Position [790, 284, 825, 306] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,251" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "4006" Ports [3, 1] Position [365, 328, 400, 412] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,84,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 84 84 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 84 84 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[47.55 47.55 52." "55 47.55 52.55 52.55 52.55 47.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[42.55 42.55 47.55 47.55 42." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[37.55 37.55 42.55 42.55 37.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[32.55 32.55 37.55 32.55 37.55 37.55 32.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp(" "'or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4007" Ports [2, 1] Position [835, 477, 870, 528] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,51,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 51 51 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 51 51 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[30.55 30.55 35." "55 30.55 35.55 35.55 35.55 30.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[25.55 25.55 30.55 30.55 25." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[20.55 20.55 25.55 25.55 20.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[15.55 15.55 20.55 15.55 20.55 20.55 15.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('o" "r');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "4008" Ports [2, 1] Position [265, 167, 300, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,51,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 51 51 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 51 51 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[30.55 30.55 35." "55 30.55 35.55 35.55 35.55 30.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[25.55 25.55 30.55 30.55 25." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[20.55 20.55 25.55 25.55 20.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[15.55 15.55 20.55 15.55 20.55 20.55 15.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('o" "r');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "4009" Ports [3, 1] Position [1045, 464, 1080, 516] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,52,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 52 52 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 52 52 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[31.55 31.55 36." "55 31.55 36.55 36.55 36.55 31.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 31.55 26." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[21.55 21.55 26.55 26.55 21.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[16.55 16.55 21.55 16.55 21.55 21.55 16.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp(" "'and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical5" SID "4010" Ports [2, 1] Position [990, 372, 1020, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,31,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "MSB" SID "4011" Ports [1, 1] Position [225, 713, 260, 727] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Oscillator" SID "4012" Ports [2, 1] Position [330, 267, 380, 303] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Oscillator" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "en" SID "4013" Position [255, 338, 285, 352] IconDisplay "Port number" } Block { BlockType Inport Name "rst" SID "4014" Position [255, 313, 285, 327] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Assert" SID "4015" Ports [1, 1] Position [430, 224, 465, 246] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type on type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "4" output_port on has_advanced_control "0" sggui_pos "20,20,356,432" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "4016" Ports [1, 1] Position [345, 227, 375, 243] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,267846e5,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "4017" Ports [3, 1] Position [360, 284, 425, 356] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "65,72,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 72 72 0 ]);\npatch([11.975 24.98 33.98 42.98 51.98 33.98 20.975 11.975 ],[45" ".99 45.99 54.99 45.99 54.99 54.99 54.99 45.99 ],[1 1 1 ]);\npatch([20.975 33.98 24.98 11.975 20.975 ],[36.99 36." "99 45.99 45.99 36.99 ],[0.931 0.946 0.973 ]);\npatch([11.975 24.98 33.98 20.975 11.975 ],[27.99 27.99 36.99 36.9" "9 27.99 ],[1 1 1 ]);\npatch([20.975 51.98 42.98 33.98 24.98 11.975 20.975 ],[18.99 18.99 27.99 18.99 27.99 27.99" " 18.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port" "_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4018" Position [525, 313, 555, 327] IconDisplay "Port number" } Line { SrcBlock "rst" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Assert" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 Points [-25, 0; 0, 60] DstBlock "Register1" DstPort 1 } Line { SrcBlock "en" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 Points [60, 0] Branch { DstBlock "Q" DstPort 1 } Branch { Points [0, -85] DstBlock "Assert" DstPort 1 } } } } Block { BlockType SubSystem Name "Posedge" SID "4019" Ports [1, 1] Position [285, 360, 325, 380] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge" Location [267, 643, 607, 741] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "4020" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "4021" Ports [1, 1] Position [95, 46, 125, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "4022" Ports [1, 1] Position [160, 48, 185, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "4023" Ports [2, 1] Position [215, 28, 260, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4024" Position [285, 43, 315, 57] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } } } Block { BlockType Reference Name "Register" SID "4025" Ports [3, 1] Position [655, 695, 700, 745] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,50,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 50 50 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 50 50 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[31.66 31.66 3" "7.66 31.66 37.66 37.66 37.66 31.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[25.66 25.66 31.66 31.66 25" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[19.66 19.66 25.66 25.66 19.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[13.66 13.66 19.66 13.66 19.66 19.66 13.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('bl" "ack');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Reference Name "Relational" SID "4026" Ports [2, 1] Position [330, 128, 375, 172] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmo" "de','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "4027" Ports [2, 1] Position [660, 468, 705, 512] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmo" "de','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Samp Counter" SID "4028" Ports [2, 1] Position [330, 177, 380, 248] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter i" "s implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "1" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(max_num_subcarriers + max_CP_length))" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[5 7 0 9 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,619" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,71,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 71 71 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 71 71 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[42.77 42.7" "7 49.77 42.77 49.77 49.77 49.77 42.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[35.77 35.77 42.77 42" ".77 35.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[28.77 28.77 35.77 35.77 28.77 ],[1 1 " "1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[21.77 21.77 28.77 21.77 28.77 28.77 21.77 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\" "bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample1" SID "4029" Ports [1, 1] Position [595, 467, 620, 493] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fo" "ntsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "4030" Ports [1, 1] Position [595, 432, 620, 458] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fo" "ntsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample6" SID "4031" Ports [1, 1] Position [375, 612, 400, 638] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fo" "ntsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "negedge" SID "4032" Ports [1, 1] Position [350, 712, 385, 728] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "negedge" Location [267, 643, 607, 741] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "4033" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "4034" Ports [1, 1] Position [95, 26, 125, 54] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "4035" Ports [1, 1] Position [160, 48, 185, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "4036" Ports [2, 1] Position [215, 28, 260, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4037" Position [285, 43, 315, 57] IconDisplay "Port number" } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [10, 0] Branch { DstBlock "Delay" DstPort 1 } Branch { Points [0, 20] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical" DstPort 1 } } } Block { BlockType SubSystem Name "negedge1" SID "4038" Ports [1, 1] Position [285, 330, 325, 350] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "negedge1" Location [267, 643, 607, 741] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "4039" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "4040" Ports [1, 1] Position [95, 46, 125, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "4041" Ports [1, 1] Position [145, 28, 170, 52] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "4042" Ports [2, 1] Position [215, 28, 260, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4043" Position [285, 43, 315, 57] IconDisplay "Port number" } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType Outport Name "Write Addr" SID "4044" Position [710, 208, 740, 222] IconDisplay "Port number" } Block { BlockType Outport Name "Read Addr" SID "4045" Position [615, 608, 645, 622] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Ant Sel" SID "4046" Position [975, 713, 1005, 727] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Wr Slot" SID "4047" Position [480, 278, 510, 292] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "FFT Start" SID "4048" Position [1125, 483, 1155, 497] Port "5" IconDisplay "Port number" } Line { SrcBlock "negedge1" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Up Sample2" SrcPort 1 Points [260, 0; 0, 45] DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "FFT Start" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Register" DstPort 2 } Line { SrcBlock "Assert" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 Points [-25, 0; 0, 30] DstBlock "Register" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 Points [130, 0] Branch { Points [0, -45] DstBlock "Assert" DstPort 1 } Branch { DstBlock "Ant Sel" DstPort 1 } } Line { SrcBlock "negedge" SrcPort 1 Points [15, 0; 0, 15] DstBlock "Register" DstPort 3 } Line { SrcBlock "MSB" SrcPort 1 DstBlock "negedge" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Logical4" DstPort 3 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Relational1" DstPort 1 } Line { SrcBlock "FFT Xn_index" SrcPort 1 Points [60, 0] Branch { DstBlock "Convert" DstPort 1 } Branch { Points [0, 120] DstBlock "MSB" DstPort 1 } } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Logical2" DstPort 1 } Branch { Points [0, 25] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Read Addr" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical1" DstPort 3 } Line { SrcBlock "From4" SrcPort 1 Points [5, 0] Branch { DstBlock "Logical3" DstPort 2 } Branch { Points [0, 90] DstBlock "Oscillator" DstPort 2 } } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Samp Counter" DstPort 1 } Line { SrcBlock "Payload" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -30] Branch { DstBlock "negedge1" DstPort 1 } Branch { Points [0, -110] DstBlock "Samp Counter" DstPort 2 } } Branch { Points [0, 75] DstBlock "Up Sample2" DstPort 1 } Branch { DstBlock "Posedge" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "Posedge" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Relational" SrcPort 1 Points [-75, 0; 0, 30] Branch { DstBlock "Logical3" DstPort 1 } Branch { Points [0, 95] DstBlock "Oscillator" DstPort 1 } } Line { SrcBlock "Samp Counter" SrcPort 1 Points [20, 0] Branch { Points [165, 0] Branch { Points [0, 265] DstBlock "Up Sample1" DstPort 1 } Branch { DstBlock "Write Addr" DstPort 1 } } Branch { Points [0, -55] DstBlock "Relational" DstPort 2 } } Line { SrcBlock "From5" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Up Sample6" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Up Sample6" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Initial Read Addr\nTiming Calc" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Oscillator" SrcPort 1 Points [70, 0] Branch { DstBlock "Wr Slot" DstPort 1 } Branch { Points [0, 25; 495, 0; 0, 85] DstBlock "Logical5" DstPort 2 } } Line { SrcBlock "Logical5" SrcPort 1 Points [0, 85] DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 Points [125, 0; 0, 85] DstBlock "Logical5" DstPort 1 } Annotation { Name "The FFT core begins requesting input samples immediately\nafter its Start input is asserted. If Start is" " asserted again before\nthe first transform is complete, a second transform begins\nimmediately after the first. T" "his is how we sequence the pairs\nof transforms for the incoming OFDM symbols multiplexed between\nantennas. The F" "FT is started as soon as the incoming sample stream\npasses sample number (numSubcarriers/2)+symbolTimingOffset.\n" "This is the lowest latency scheme, loading the FFT core with the\ninput OFDM symbol exactly 1 clock cycle after it" "'s available." Position [585, 377] HorizontalAlignment "left" } Annotation { Name "The memory read address is the FFT input index plus an offset in [0,max_cyclic_prefix]. This is how we s" "trip\nthe cyclic prefix from the incoming sample stream- the FFT only gets numSubcarrier samples." Position [429, 663] } } } Block { BlockType Reference Name "Assert" SID "4049" Ports [1, 1] Position [305, 481, 355, 499] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware t" "his block costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "1" output_port on has_advanced_control "0" sggui_pos "20,20,356,436" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,18,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 18 18 0 ]);\npatch([20.55 23.44 25.44 27.44 29.44 25.44 22.55 20.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([22.55 25.44 23.44 20.55 22.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([20.55 23.44 25.44 22.55 20.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([22.55 29.44 27.44 25.44 23.44 20.55 22.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Channel Estimation\n& Pilot Processing" SID "4050" Ports [7, 5] Position [995, 535, 1090, 625] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Channel Estimation\n& Pilot Processing" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "4051" Position [55, 348, 85, 362] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "4052" Position [55, 358, 85, 372] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Xk Index" SID "4053" Position [25, 553, 55, 567] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "4054" Position [15, 393, 45, 407] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Sym Index" SID "4055" Position [15, 458, 45, 472] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Est Index" SID "4056" Position [20, 688, 50, 702] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "4057" Position [20, 233, 50, 247] NamePlacement "alternate" Port "7" IconDisplay "Port number" } Block { BlockType SubSystem Name "Actual Trainig\nWindow" SID "4058" Ports [2, 1] Position [340, 166, 435, 204] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Actual Trainig\nWindow" Location [398, 319, 835, 458] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "H Vin" SID "4059" Position [120, 173, 150, 187] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Train Sym" SID "4060" Position [120, 218, 150, 232] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Logical2" SID "4061" Ports [2, 1] Position [500, 183, 540, 212] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 29 29 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge" SID "4062" Ports [1, 1] Position [250, 171, 310, 189] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge" Location [435, 153, 872, 268] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "4063" Position [40, 38, 70, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Delay12" SID "4064" Ports [1, 1] Position [130, 29, 160, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "4065" Ports [1, 1] Position [175, 37, 215, 53] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4066" Ports [2, 1] Position [250, 35, 285, 75] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,40,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 40 40 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4067" Position [310, 48, 340, 62] IconDisplay "Port number" } Line { SrcBlock "Delay12" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [15, 0] Branch { DstBlock "Delay12" DstPort 1 } Branch { Points [0, 20] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType SubSystem Name "S-R Latch" SID "4068" Ports [2, 1] Position [370, 170, 420, 210] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch" Location [542, 167, 762, 256] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "4069" Position [115, 108, 145, 122] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "4070" Position [115, 98, 145, 112] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant2" SID "4071" Ports [0, 1] Position [155, 62, 170, 78] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 " "12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "4072" Ports [3, 1] Position [215, 87, 260, 123] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,36,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 36 36 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[23.55 2" "3.55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[18.55 18.55 23.5" "5 23.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[13.55 13.55 18.55 18.55 13.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3," "'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Outport Name "D" SID "4073" Position [320, 98, 350, 112] IconDisplay "Port number" } Line { SrcBlock "Constant2" SrcPort 1 Points [0, 25] DstBlock "Register" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register" DstPort 2 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register" DstPort 3 } Line { SrcBlock "Register" SrcPort 1 DstBlock "D" DstPort 1 } } } Block { BlockType SubSystem Name "negedge" SID "4074" Ports [1, 1] Position [250, 191, 310, 209] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "negedge" Location [435, 153, 872, 268] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "4075" Position [40, 38, 70, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Delay12" SID "4076" Ports [1, 1] Position [130, 29, 160, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "4077" Ports [1, 1] Position [175, 57, 215, 73] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4078" Ports [2, 1] Position [250, 35, 285, 75] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,40,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 40 40 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4079" Position [310, 48, 340, 62] IconDisplay "Port number" } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [15, 0] Branch { DstBlock "Delay12" DstPort 1 } Branch { Points [0, 20] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Delay12" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical2" DstPort 2 } } } Block { BlockType Outport Name "Train" SID "4080" Position [565, 193, 595, 207] IconDisplay "Port number" } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Posedge" SrcPort 1 DstBlock "S-R Latch" DstPort 1 } Line { SrcBlock "negedge" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "H Vin" SrcPort 1 DstBlock "Posedge" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Train" DstPort 1 } Line { SrcBlock "Train Sym" SrcPort 1 Points [80, 0] Branch { DstBlock "negedge" DstPort 1 } Branch { Points [250, 0] DstBlock "Logical2" DstPort 2 } } } } Block { BlockType SubSystem Name "Bus Creator" SID "4081" Ports [8, 2] Position [1315, 271, 1375, 394] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Bus Creator" Location [-303, 147, -133, 566] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "AA-I" SID "4082" Position [300, 173, 330, 187] IconDisplay "Port number" } Block { BlockType Inport Name "AA-Q" SID "4083" Position [300, 348, 330, 362] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "AB-I" SID "4084" Position [300, 203, 330, 217] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "AB-Q" SID "4085" Position [300, 378, 330, 392] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "BA-I" SID "4086" Position [260, 233, 290, 247] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "BA-Q" SID "4087" Position [255, 408, 285, 422] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "BB-I" SID "4088" Position [300, 263, 330, 277] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "BB-Q" SID "4089" Position [300, 438, 330, 452] Port "8" IconDisplay "Port number" } Block { BlockType BusCreator Name "Bus\nCreator1" SID "4090" Ports [4, 1] Position [385, 166, 390, 284] ShowName off DisplayOption "bar" } Block { BlockType BusCreator Name "Bus\nCreator2" SID "4091" Ports [4, 1] Position [385, 341, 390, 459] ShowName off DisplayOption "bar" } Block { BlockType Reference Name "Constant1" SID "4092" Ports [0, 1] Position [195, 459, 220, 481] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "4093" Ports [0, 1] Position [205, 279, 230, 301] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "I" SID "4094" Position [450, 218, 480, 232] IconDisplay "Port number" } Block { BlockType Outport Name "Q" SID "4095" Position [450, 393, 480, 407] Port "2" IconDisplay "Port number" } Line { SrcBlock "AA-I" SrcPort 1 Points [0, 0] DstBlock "Bus\nCreator1" DstPort 1 } Line { SrcBlock "AB-I" SrcPort 1 Points [0, 0] DstBlock "Bus\nCreator1" DstPort 2 } Line { SrcBlock "Bus\nCreator1" SrcPort 1 Points [0, 0] DstBlock "I" DstPort 1 } Line { SrcBlock "BA-I" SrcPort 1 DstBlock "Bus\nCreator1" DstPort 3 } Line { SrcBlock "BB-I" SrcPort 1 Points [0, 0] DstBlock "Bus\nCreator1" DstPort 4 } Line { SrcBlock "AA-Q" SrcPort 1 DstBlock "Bus\nCreator2" DstPort 1 } Line { SrcBlock "AB-Q" SrcPort 1 DstBlock "Bus\nCreator2" DstPort 2 } Line { SrcBlock "Bus\nCreator2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "BA-Q" SrcPort 1 DstBlock "Bus\nCreator2" DstPort 3 } Line { SrcBlock "BB-Q" SrcPort 1 DstBlock "Bus\nCreator2" DstPort 4 } } } Block { BlockType SubSystem Name "Chan Est Buffer\n& Mag Calc" SID "4096" Ports [10] Position [1315, 403, 1440, 517] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Chan Est Buffer\n& Mag Calc" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "117" Block { BlockType Inport Name "AA-I" SID "4097" Position [265, 308, 295, 322] IconDisplay "Port number" } Block { BlockType Inport Name "AA-Q" SID "4098" Position [265, 463, 295, 477] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "AB-I" SID "4099" Position [265, 338, 295, 352] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "AB-Q" SID "4100" Position [265, 493, 295, 507] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "BA-I" SID "4101" Position [265, 368, 295, 382] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "BA-Q" SID "4102" Position [265, 523, 295, 537] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "BB-I" SID "4103" Position [265, 398, 295, 412] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "BB-Q" SID "4104" Position [265, 553, 295, 567] Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "Est Vin" SID "4105" Position [15, 143, 45, 157] NamePlacement "alternate" Port "9" IconDisplay "Port number" } Block { BlockType Inport Name "SubCar Index" SID "4106" Position [15, 188, 45, 202] Port "10" IconDisplay "Port number" } Block { BlockType Reference Name "1MSB" SID "4107" Ports [1, 1] Position [185, 260, 230, 280] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "2x16b -> 32b" SID "4108" Ports [2, 2] Position [785, 337, 845, 373] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "2x16b -> 32b" Location [950, 637, 1239, 727] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "4109" Position [480, 383, 510, 397] IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "4110" Position [480, 368, 510, 382] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub2" SID "4111" Ports [2, 1] Position [715, 418, 750, 487] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "26" bin_pt "22" quantization "Truncate" overflow "Saturate" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,69,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 69 69 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 69 69 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[39.55 39." "55 44.55 39.55 44.55 44.55 44.55 39.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[34.55 34.55 39.55 3" "9.55 34.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[29.55 29.55 34.55 34.55 29.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[24.55 24.55 29.55 24.55 29.55 29.55 24.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat1" SID "4112" Ports [2, 1] Position [855, 367, 905, 398] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1.3" sg_icon_stat "50,31,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 31 31 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "4113" Ports [1, 1] Position [825, 251, 860, 269] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "4114" Ports [1, 1] Position [810, 446, 845, 464] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "22" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "4115" Ports [1, 1] Position [610, 380, 640, 400] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "4116" Ports [1, 1] Position [610, 365, 640, 385] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From3" SID "4117" Position [520, 306, 660, 324] ShowName off CloseFcn "tagdialog Close" GotoTag "RxReg_CaptureChanMags" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "4118" Position [1145, 209, 1290, 231] ShowName off GotoTag "Chipscope_ChanEst" TagVisibility "global" } Block { BlockType Reference Name "Mult" SID "4119" Ports [2, 1] Position [605, 416, 655, 449] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[12 0 0 20 0 1 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,33,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 33 33 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\tim" "es b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult1" SID "4120" Ports [2, 1] Position [605, 451, 655, 484] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[12 0 0 20 0 1 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,33,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 33 33 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\tim" "es b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "4121" Ports [3, 1] Position [1015, 280, 1045, 490] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,210,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 30 180 210 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 30 180 210 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[109." "44 109.44 113.44 109.44 113.44 113.44 113.44 109.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[105.44 105" ".44 109.44 109.44 105.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[101.44 101.44 105.44 105.4" "4 101.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[97.44 97.44 101.44 97.44 101.44 101.44 97" ".44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');" "\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_l" "abel('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "4122" Ports [3, 1] Position [1015, 158, 1045, 282] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,124,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 17.7143 106.286 124 0 " "],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 17.7143 106.286 124 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.8" "8 10.1 6.1 ],[66.44 66.44 70.44 66.44 70.44 70.44 70.44 66.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[" "62.44 62.44 66.44 66.44 62.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[58.44 58.44 62.44 62." "44 58.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[54.44 54.44 58.44 54.44 58.44 58.44 54.44" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_labe" "l('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret" SID "4123" Ports [1, 1] Position [700, 366, 740, 384] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal betw" "een signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothin" "g.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to " "unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of " "56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1.3" sg_icon_stat "40,18,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret1" SID "4124" Ports [1, 1] Position [700, 381, 740, 399] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal betw" "een signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothin" "g.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to " "unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of " "56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1.3" sg_icon_stat "40,18,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret2" SID "4125" Ports [1, 1] Position [900, 446, 940, 464] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal betw" "een signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothin" "g.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to " "unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of " "56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1.3" sg_icon_stat "40,18,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "[I Q]" SID "4126" Position [1115, 378, 1150, 392] IconDisplay "Port number" } Block { BlockType Outport Name "H_Mag" SID "4127" Position [1110, 658, 1145, 672] Port "2" IconDisplay "Port number" } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "Concat1" DstPort 1 } Line { SrcBlock "Reinterpret1" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "Q" SrcPort 1 Points [55, 0] Branch { Points [0, 50] Branch { DstBlock "Mult" DstPort 1 } Branch { Points [0, 15] DstBlock "Mult" DstPort 2 } } Branch { DstBlock "Delay3" DstPort 1 } } Line { SrcBlock "I" SrcPort 1 Points [50, 0] Branch { Points [0, 70] Branch { DstBlock "Mult1" DstPort 1 } Branch { Points [0, 15] DstBlock "Mult1" DstPort 2 } } Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, -170] DstBlock "Mux1" DstPort 2 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "[I Q]" DstPort 1 } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "From3" SrcPort 1 Points [300, 0] Branch { DstBlock "Mux" DstPort 1 } Branch { Points [0, -135] DstBlock "Mux1" DstPort 1 } } Line { SrcBlock "Mult" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 Points [20, 0] Branch { DstBlock "Convert3" DstPort 1 } Branch { Points [0, 210] DstBlock "H_Mag" DstPort 1 } Branch { Points [0, -195] DstBlock "Convert1" DstPort 1 } } Line { SrcBlock "Mult1" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Reinterpret" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Reinterpret1" DstPort 1 } Line { SrcBlock "Reinterpret2" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Reinterpret2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Goto1" DstPort 1 } Annotation { Name "Cast to sign-extend up\nto 32-bits (makes using\nvalues easier in code)" Position [834, 512] } } } Block { BlockType Reference Name "Concat" SID "4128" Ports [2, 1] Position [605, 172, 655, 203] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1.3" sg_icon_stat "50,31,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 31 31 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert10" SID "4129" Ports [1, 1] Position [420, 551, 455, 569] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "4130" Ports [1, 1] Position [420, 306, 455, 324] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "4131" Ports [1, 1] Position [420, 336, 455, 354] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert5" SID "4132" Ports [1, 1] Position [420, 366, 455, 384] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert6" SID "4133" Ports [1, 1] Position [420, 396, 455, 414] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "4134" Ports [1, 1] Position [420, 461, 455, 479] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert8" SID "4135" Ports [1, 1] Position [420, 491, 455, 509] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert9" SID "4136" Ports [1, 1] Position [420, 521, 455, 539] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter" SID "4137" Ports [2, 1] Position [495, 220, 530, 280] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "2" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[6 12 0 12 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,619" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 60 60 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "4138" Ports [1, 1] Position [495, 179, 525, 211] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "4139" Ports [1, 1] Position [710, 174, 740, 206] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "4140" Ports [1, 1] Position [795, 174, 825, 206] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "4141" Ports [1, 1] Position [795, 79, 825, 111] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "4142" Ports [1, 1] Position [710, 79, 740, 111] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From4" SID "4143" Position [255, 76, 405, 94] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_chanEst_RecordEn" TagVisibility "global" } Block { BlockType Reference Name "Logical1" SID "4144" Ports [2, 1] Position [380, 246, 415, 279] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 33 33 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4145" Ports [2, 1] Position [435, 76, 470, 109] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 33 33 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "4146" Ports [5, 1] Position [630, 420, 665, 580] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,160,5,1,white,blue,3,9e2a33b8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 22.8571 137.143 160 0 " "],[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 22.8571 137.143 160 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 1" "0.875 5.875 ],[85.55 85.55 90.55 85.55 90.55 90.55 90.55 85.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.87" "5 ],[80.55 80.55 85.55 85.55 80.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[75.55 75.55 " "80.55 80.55 75.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[70.55 70.55 75.55 70.55 75.55 " "75.55 70.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon" " text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black'" ");port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'" "d3');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "4147" Ports [5, 1] Position [630, 265, 665, 425] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,160,5,1,white,blue,3,9e2a33b8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 22.8571 137.143 160 0 " "],[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 22.8571 137.143 160 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 1" "0.875 5.875 ],[85.55 85.55 90.55 85.55 90.55 90.55 90.55 85.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.87" "5 ],[80.55 80.55 85.55 85.55 80.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[75.55 75.55 " "80.55 80.55 75.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[70.55 70.55 75.55 70.55 75.55 " "75.55 70.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon" " text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black'" ");port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'" "d3');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Negedge" SID "4148" Ports [1, 1] Position [275, 262, 310, 278] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Negedge" Location [267, 643, 607, 741] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "4149" Position [275, 338, 305, 352] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "4150" Ports [1, 1] Position [345, 351, 375, 379] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "4151" Ports [1, 1] Position [410, 333, 435, 357] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "4152" Ports [2, 1] Position [465, 333, 510, 377] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4153" Position [535, 348, 565, 362] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [15, 0] Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 1 } } } Block { BlockType Scope Name "Scope" SID "4154" Ports [6] Position [1100, 618, 1155, 672] Floating off Location [6, 36, 1690, 1044] Open off NumInputPorts "6" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" } YMin "-5~-5~-5~-5~-5~-5" YMax "5~5~5~5~5~5" SaveName "ScopeData6" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "Shared Memory" SID "4155" Ports [3, 1] Position [1000, 300, 1080, 390] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shared Memory" SourceType "Xilinx Shared Memory Random Access Memory Block" shared_memory_name "'ChannelEstimates'" depth "numSubcarriers * 4" ownership "Locally Owned and Initialized" initVector "zeros(1,numSubcarriers*4)" en off mutex "Unprotected" mode "Read and Write" write_mode "Read After Write" time_out "0" latency "1" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" xl_use_area off xl_area "[0,0,0,0,0,0,0]" implementation "Block RAM" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,384,381" block_type "shmem" block_version "10.1.3" sg_icon_stat "80,90,3,1,white,blue,0,bf435243,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 90 90 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[57" ".21 57.21 68.21 57.21 68.21 68.21 68.21 57.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[46.21 46." "21 57.21 57.21 46.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[35.21 35.21 46.21 46.2" "1 35.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[24.21 24.21 35.21 24.21 35.21 35.21" " 24.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');p" "ort_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "done1" SID "4156" Ports [1, 1] Position [1025, 625, 1060, 635] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "4157" Ports [1, 1] Position [1025, 635, 1060, 645] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done3" SID "4158" Ports [1, 1] Position [1025, 645, 1060, 655] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "4159" Ports [1, 1] Position [1025, 655, 1060, 665] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "4160" Ports [1, 1] Position [1025, 665, 1060, 675] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done9" SID "4161" Ports [1, 1] Position [1025, 615, 1060, 625] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType SubSystem Name "edge" SID "4162" Ports [1, 1] Position [380, 227, 415, 243] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "edge" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "4163" Position [275, 338, 305, 352] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "4164" Ports [1, 1] Position [370, 351, 400, 379] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "4165" Ports [2, 1] Position [465, 333, 510, 377] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,dc21e094,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4166" Position [535, 348, 565, 362] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [15, 0] Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical" DstPort 2 } } } Line { SrcBlock "SubCar Index" SrcPort 1 Points [90, 0] Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, 75] Branch { DstBlock "1MSB" DstPort 1 } Branch { Points [0, 360] DstBlock "done1" DstPort 1 } } } Line { SrcBlock "Est Vin" SrcPort 1 Points [295, 0] Branch { Points [0, 85] Branch { DstBlock "edge" DstPort 1 } Branch { Points [0, 20] DstBlock "Logical1" DstPort 1 } } Branch { Points [0, -50] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "1MSB" SrcPort 1 DstBlock "Negedge" DstPort 1 } Line { SrcBlock "Negedge" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Counter" DstPort 2 } Line { SrcBlock "edge" SrcPort 1 DstBlock "Counter" DstPort 1 } Line { SrcBlock "2x16b -> 32b" SrcPort 1 DstBlock "Shared Memory" DstPort 2 } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "Counter" SrcPort 1 Points [45, 0] Branch { Points [0, 35] Branch { DstBlock "Mux2" DstPort 1 } Branch { Points [0, 155] Branch { DstBlock "Mux1" DstPort 1 } Branch { Points [0, 230] DstBlock "done5" DstPort 1 } } } Branch { Points [0, -70] DstBlock "Concat" DstPort 1 } } Line { SrcBlock "AA-I" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "AB-I" SrcPort 1 DstBlock "Convert4" DstPort 1 } Line { SrcBlock "BA-I" SrcPort 1 DstBlock "Convert5" DstPort 1 } Line { SrcBlock "BB-I" SrcPort 1 DstBlock "Convert6" DstPort 1 } Line { SrcBlock "AA-Q" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "AB-Q" SrcPort 1 DstBlock "Convert8" DstPort 1 } Line { SrcBlock "BA-Q" SrcPort 1 DstBlock "Convert9" DstPort 1 } Line { SrcBlock "BB-Q" SrcPort 1 DstBlock "Convert10" DstPort 1 } Line { SrcBlock "Convert7" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Convert8" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Convert9" SrcPort 1 DstBlock "Mux1" DstPort 4 } Line { SrcBlock "Convert10" SrcPort 1 DstBlock "Mux1" DstPort 5 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Mux2" DstPort 2 } Line { SrcBlock "Convert4" SrcPort 1 DstBlock "Mux2" DstPort 3 } Line { SrcBlock "Convert5" SrcPort 1 DstBlock "Mux2" DstPort 4 } Line { SrcBlock "Convert6" SrcPort 1 DstBlock "Mux2" DstPort 5 } Line { SrcBlock "Mux2" SrcPort 1 Points [85, 0] Branch { DstBlock "2x16b -> 32b" DstPort 1 } Branch { Points [0, 275] DstBlock "done9" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "Mux1" SrcPort 1 Points [55, 0; 0, -135] DstBlock "2x16b -> 32b" DstPort 2 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 Points [120, 0; 0, 125] Branch { DstBlock "Shared Memory" DstPort 1 } Branch { Points [0, 325] DstBlock "done2" DstPort 1 } } Line { SrcBlock "done9" SrcPort 1 DstBlock "Scope" DstPort 1 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Scope" DstPort 2 } Line { SrcBlock "done2" SrcPort 1 DstBlock "Scope" DstPort 3 } Line { SrcBlock "done3" SrcPort 1 DstBlock "Scope" DstPort 4 } Line { SrcBlock "done4" SrcPort 1 DstBlock "Scope" DstPort 5 } Line { SrcBlock "done5" SrcPort 1 DstBlock "Scope" DstPort 6 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Delay5" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Delay4" SrcPort 1 Points [135, 0; 0, 280] Branch { DstBlock "Shared Memory" DstPort 3 } Branch { Points [0, 285] DstBlock "done4" DstPort 1 } } Line { SrcBlock "Delay5" SrcPort 1 DstBlock "Delay4" DstPort 1 } Line { SrcBlock "2x16b -> 32b" SrcPort 2 Points [65, 0; 0, 285] DstBlock "done3" DstPort 1 } Annotation { Name "Stores each channel coefficient as a\n32-bit word, combining [I Q] per word." Position [1070, 274] } } } Block { BlockType Reference Name "Delay1" SID "4167" Ports [1, 1] Position [390, 419, 420, 451] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming on xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay10" SID "4168" Ports [1, 1] Position [595, 719, 625, 751] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay11" SID "4169" Ports [1, 1] Position [830, 719, 860, 751] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "4170" Ports [1, 1] Position [515, 649, 545, 681] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "4171" Ports [1, 1] Position [390, 454, 420, 486] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming on xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "4172" Ports [1, 1] Position [380, 649, 410, 681] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "4173" Ports [1, 1] Position [390, 299, 420, 331] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "4174" Ports [1, 1] Position [390, 344, 420, 366] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.33 14.3" "3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 14.33 14" ".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('" "z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "4175" Ports [1, 1] Position [830, 679, 860, 711] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay8" SID "4176" Ports [1, 1] Position [390, 354, 420, 376] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.33 14.3" "3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 14.33 14" ".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('" "z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay9" SID "4177" Ports [1, 1] Position [390, 384, 420, 416] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "4178" Ports [1, 1] Position [985, 722, 1020, 748] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.2" sg_icon_stat "35,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16.33 16" ".33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.33 10.33 ]," "[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bl" "ack');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Downsamplng" SID "4179" Ports [8, 8] Position [1165, 269, 1225, 396] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Downsamplng" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "AA-I" SID "4180" Position [305, 128, 335, 142] IconDisplay "Port number" } Block { BlockType Inport Name "AA-Q" SID "4181" Position [305, 413, 335, 427] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "AB-I" SID "4182" Position [305, 158, 335, 172] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "AB-Q" SID "4183" Position [305, 443, 335, 457] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "BA-I" SID "4184" Position [305, 188, 335, 202] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "BA-Q" SID "4185" Position [305, 473, 335, 487] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "BB-I" SID "4186" Position [305, 218, 335, 232] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "BB-Q" SID "4187" Position [305, 503, 335, 517] Port "8" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample" SID "4188" Ports [1, 1] Position [380, 122, 415, 148] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.2" sg_icon_stat "35,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\b" "f\\downarrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "4189" Ports [1, 1] Position [380, 152, 415, 178] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.2" sg_icon_stat "35,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\b" "f\\downarrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample2" SID "4190" Ports [1, 1] Position [380, 182, 415, 208] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.2" sg_icon_stat "35,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\b" "f\\downarrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "4191" Ports [1, 1] Position [380, 212, 415, 238] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.2" sg_icon_stat "35,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\b" "f\\downarrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "4192" Ports [1, 1] Position [380, 407, 415, 433] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.2" sg_icon_stat "35,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\b" "f\\downarrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample5" SID "4193" Ports [1, 1] Position [380, 437, 415, 463] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.2" sg_icon_stat "35,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\b" "f\\downarrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample6" SID "4194" Ports [1, 1] Position [380, 467, 415, 493] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.2" sg_icon_stat "35,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\b" "f\\downarrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample7" SID "4195" Ports [1, 1] Position [380, 497, 415, 523] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.2" sg_icon_stat "35,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\b" "f\\downarrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name " AA-I" SID "4196" Position [575, 128, 605, 142] IconDisplay "Port number" } Block { BlockType Outport Name " AA-Q" SID "4197" Position [575, 413, 605, 427] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name " AB-I" SID "4198" Position [575, 158, 605, 172] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name " AB-Q" SID "4199" Position [575, 443, 605, 457] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name " BA-I" SID "4200" Position [575, 188, 605, 202] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name " BA-Q" SID "4201" Position [575, 473, 605, 487] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name " BB-I" SID "4202" Position [575, 218, 605, 232] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name " BB-Q" SID "4203" Position [575, 503, 605, 517] Port "8" IconDisplay "Port number" } Line { SrcBlock "AA-I" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "AB-I" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "AA-Q" SrcPort 1 DstBlock "Down Sample4" DstPort 1 } Line { SrcBlock "BA-I" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "AB-Q" SrcPort 1 DstBlock "Down Sample5" DstPort 1 } Line { SrcBlock "BB-I" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "BA-Q" SrcPort 1 DstBlock "Down Sample6" DstPort 1 } Line { SrcBlock "BB-Q" SrcPort 1 DstBlock "Down Sample7" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock " AA-I" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock " AB-I" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock " BA-I" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock " BB-I" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock " AA-Q" DstPort 1 } Line { SrcBlock "Down Sample5" SrcPort 1 DstBlock " AB-Q" DstPort 1 } Line { SrcBlock "Down Sample6" SrcPort 1 DstBlock " BA-Q" DstPort 1 } Line { SrcBlock "Down Sample7" SrcPort 1 DstBlock " BB-Q" DstPort 1 } } } Block { BlockType From Name "From1" SID "4204" Position [295, 76, 445, 94] ShowName off CloseFcn "tagdialog Close" GotoTag "ChanEstMagCheck_MaskBA" TagVisibility "global" } Block { BlockType From Name "From5" SID "4205" Position [295, 96, 445, 114] ShowName off CloseFcn "tagdialog Close" GotoTag "ChanEstMagCheck_MaskAA" TagVisibility "global" } Block { BlockType SubSystem Name "H_A-A Estimate Buffer" SID "4206" Ports [6, 4] Position [800, 267, 895, 358] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "H_A-A Estimate Buffer" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "4207" Position [400, 218, 430, 232] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "4208" Position [315, 363, 345, 377] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Est_WE" SID "4209" Position [240, 248, 270, 262] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Est_Reset" SID "4210" Position [240, 263, 270, 277] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "FFT_Addr" SID "4211" Position [315, 233, 345, 247] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "EQ_Addr" SID "4212" Position [315, 298, 345, 312] NamePlacement "alternate" Port "6" IconDisplay "Port number" } Block { BlockType SubSystem Name "I Estimate Buffer" SID "4213" Ports [5, 2] Position [500, 212, 610, 298] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "I Estimate Buffer" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Est_Data" SID "4214" Position [145, 218, 175, 232] IconDisplay "Port number" } Block { BlockType Inport Name "Fast_Addr" SID "4215" Position [145, 313, 175, 327] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Est_WE" SID "4216" Position [140, 278, 170, 292] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "4217" Position [145, 358, 175, 372] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Slow_Addr" SID "4218" Position [145, 418, 175, 432] Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub2" SID "4219" Ports [2, 1] Position [405, 193, 450, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant\nRead State" SID "4220" Ports [0, 1] Position [415, 338, 435, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,14,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22" " 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 1" "4.44 12.44 10.44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant4" SID "4221" Ports [0, 1] Position [415, 318, 435, 332] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,14,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22" " 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 1" "4.44 12.44 10.44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "4222" Ports [1, 1] Position [510, 155, 555, 185] BlockMirror on ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "4223" Ports [1, 1] Position [635, 325, 680, 355] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "4224" Ports [1, 1] Position [340, 276, 360, 294] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "4225" Ports [1, 1] Position [340, 246, 360, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "4226" Ports [1, 1] Position [340, 216, 360, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Dual Port RAM" SID "4227" Ports [7, 2] Position [500, 233, 570, 377] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "numSubcarriers" initVector "zeros(1,numSubcarriers)" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b on en_a off en_b off latency "1" write_mode_A "Read After Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,384,398" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,144,7,2,white,blue,0,7d88b3c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 144 144 0 ],[0.77 0." "82 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 144 144 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[83.1 8" "3.1 93.1 83.1 93.1 93.1 93.1 83.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[73.1 73.1 83.1 83.1 73.1 ]" ",[0.931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[63.1 63.1 73.1 73.1 63.1 ],[1 1 1 ]);\npatch([22." "75 57.2 47.2 37.2 27.2 12.75 22.75 ],[53.1 53.1 63.1 53.1 63.1 63.1 53.1 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr" "a');\ncolor('black');port_label('input',2,'dina');\ncolor('black');port_label('input',3,'wea');\ncolor('black');" "port_label('input',4,'addrb');\ncolor('black');port_label('input',5,'dinb');\ncolor('black');port_label('input'," "6,'web');\ncolor('black');port_label('input',7,'rstb');\ncolor('black');port_label('output',1,'A');\ncolor('blac" "k');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "h[n]" SID "4228" Position [765, 333, 795, 347] IconDisplay "Port number" } Block { BlockType Outport Name "h[n] (fast)" SID "4229" Position [765, 263, 795, 277] Port "2" IconDisplay "Port number" } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "h[n]" DstPort 1 } Line { SrcBlock "Dual Port RAM" SrcPort 2 Points [40, 0] Branch { Points [0, -170] DstBlock "Convert1" DstPort 1 } Branch { DstBlock "Convert2" DstPort 1 } } Line { SrcBlock "Est_Data" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Dual Port RAM" DstPort 7 } Line { SrcBlock "Fast_Addr" SrcPort 1 Points [115, 0; 0, -65] DstBlock "Delay6" DstPort 1 } Line { SrcBlock "Est_WE" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Delay7" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Dual Port RAM" DstPort 3 } Line { SrcBlock "Delay6" SrcPort 1 Points [80, 0; 0, -10] DstBlock "Dual Port RAM" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 Points [-115, 0] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 Points [5, 0; 0, 50] DstBlock "Dual Port RAM" DstPort 2 } Line { SrcBlock "Constant\nRead State" SrcPort 1 DstBlock "Dual Port RAM" DstPort 6 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Dual Port RAM" DstPort 5 } Line { SrcBlock "Slow_Addr" SrcPort 1 Points [130, 0; 0, -120] DstBlock "Dual Port RAM" DstPort 4 } Line { SrcBlock "Dual Port RAM" SrcPort 1 DstBlock "h[n] (fast)" DstPort 1 } Annotation { Name "data" Position [348, 206] } } } Block { BlockType SubSystem Name "Q Estimate Buffer" SID "4230" Ports [5, 2] Position [500, 357, 610, 443] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Q Estimate Buffer" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Est_Data" SID "4231" Position [145, 218, 175, 232] IconDisplay "Port number" } Block { BlockType Inport Name "Fast_Addr" SID "4232" Position [145, 313, 175, 327] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Est_WE" SID "4233" Position [140, 278, 170, 292] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "4234" Position [145, 358, 175, 372] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Slow_Addr" SID "4235" Position [145, 418, 175, 432] Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub2" SID "4236" Ports [2, 1] Position [405, 193, 450, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant\nRead State" SID "4237" Ports [0, 1] Position [415, 338, 435, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,14,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22" " 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 1" "4.44 12.44 10.44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant4" SID "4238" Ports [0, 1] Position [415, 318, 435, 332] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,14,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22" " 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 1" "4.44 12.44 10.44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "4239" Ports [1, 1] Position [510, 155, 555, 185] BlockMirror on ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "4240" Ports [1, 1] Position [635, 325, 680, 355] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "4241" Ports [1, 1] Position [340, 276, 360, 294] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "4242" Ports [1, 1] Position [340, 246, 360, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "4243" Ports [1, 1] Position [340, 216, 360, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Dual Port RAM" SID "4244" Ports [7, 2] Position [500, 233, 570, 377] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "numSubcarriers" initVector "zeros(1,numSubcarriers)" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b on en_a off en_b off latency "1" write_mode_A "Read After Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,384,398" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,144,7,2,white,blue,0,7d88b3c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 144 144 0 ],[0.77 0." "82 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 144 144 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[83.1 8" "3.1 93.1 83.1 93.1 93.1 93.1 83.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[73.1 73.1 83.1 83.1 73.1 ]" ",[0.931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[63.1 63.1 73.1 73.1 63.1 ],[1 1 1 ]);\npatch([22." "75 57.2 47.2 37.2 27.2 12.75 22.75 ],[53.1 53.1 63.1 53.1 63.1 63.1 53.1 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr" "a');\ncolor('black');port_label('input',2,'dina');\ncolor('black');port_label('input',3,'wea');\ncolor('black');" "port_label('input',4,'addrb');\ncolor('black');port_label('input',5,'dinb');\ncolor('black');port_label('input'," "6,'web');\ncolor('black');port_label('input',7,'rstb');\ncolor('black');port_label('output',1,'A');\ncolor('blac" "k');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "h[n]" SID "4245" Position [765, 333, 795, 347] IconDisplay "Port number" } Block { BlockType Outport Name "h[n] (fast)" SID "4246" Position [765, 263, 795, 277] Port "2" IconDisplay "Port number" } Line { SrcBlock "Dual Port RAM" SrcPort 1 DstBlock "h[n] (fast)" DstPort 1 } Line { SrcBlock "Slow_Addr" SrcPort 1 Points [130, 0; 0, -120] DstBlock "Dual Port RAM" DstPort 4 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Dual Port RAM" DstPort 5 } Line { SrcBlock "Constant\nRead State" SrcPort 1 DstBlock "Dual Port RAM" DstPort 6 } Line { SrcBlock "AddSub2" SrcPort 1 Points [5, 0; 0, 50] DstBlock "Dual Port RAM" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 Points [-115, 0] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 Points [80, 0; 0, -10] DstBlock "Dual Port RAM" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Dual Port RAM" DstPort 3 } Line { SrcBlock "Delay7" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Est_WE" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Fast_Addr" SrcPort 1 Points [115, 0; 0, -65] DstBlock "Delay6" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Dual Port RAM" DstPort 7 } Line { SrcBlock "Est_Data" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "Dual Port RAM" SrcPort 2 Points [40, 0] Branch { DstBlock "Convert2" DstPort 1 } Branch { Points [0, -170] DstBlock "Convert1" DstPort 1 } } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "h[n]" DstPort 1 } Annotation { Name "data" Position [348, 206] } } } Block { BlockType Outport Name "EstI_fast" SID "4247" Position [775, 273, 805, 287] IconDisplay "Port number" } Block { BlockType Outport Name "EstQ_fast" SID "4248" Position [775, 418, 805, 432] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "EstI" SID "4249" Position [775, 228, 805, 242] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "EstQ" SID "4250" Position [775, 373, 805, 387] Port "4" IconDisplay "Port number" } Line { SrcBlock "Est_Reset" SrcPort 1 Points [190, 0] Branch { DstBlock "I Estimate Buffer" DstPort 4 } Branch { Points [0, 145] DstBlock "Q Estimate Buffer" DstPort 4 } } Line { SrcBlock "Est_WE" SrcPort 1 Points [195, 0] Branch { DstBlock "I Estimate Buffer" DstPort 3 } Branch { Points [0, 145] DstBlock "Q Estimate Buffer" DstPort 3 } } Line { SrcBlock "I Estimate Buffer" SrcPort 1 DstBlock "EstI" DstPort 1 } Line { SrcBlock "FFT_Addr" SrcPort 1 Points [125, 0] Branch { DstBlock "I Estimate Buffer" DstPort 2 } Branch { Points [0, 145] DstBlock "Q Estimate Buffer" DstPort 2 } } Line { SrcBlock "I" SrcPort 1 DstBlock "I Estimate Buffer" DstPort 1 } Line { SrcBlock "I Estimate Buffer" SrcPort 2 DstBlock "EstI_fast" DstPort 1 } Line { SrcBlock "EQ_Addr" SrcPort 1 Points [65, 0; 0, -20; 45, 0] Branch { DstBlock "I Estimate Buffer" DstPort 5 } Branch { Points [0, 145] DstBlock "Q Estimate Buffer" DstPort 5 } } Line { SrcBlock "Q" SrcPort 1 DstBlock "Q Estimate Buffer" DstPort 1 } Line { SrcBlock "Q Estimate Buffer" SrcPort 1 DstBlock "EstQ" DstPort 1 } Line { SrcBlock "Q Estimate Buffer" SrcPort 2 DstBlock "EstQ_fast" DstPort 1 } } } Block { BlockType SubSystem Name "H_A-B Estimate Buffer" SID "4251" Ports [5, 2] Position [800, 347, 885, 433] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "H_A-B Estimate Buffer" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "4252" Position [365, 218, 395, 232] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "4253" Position [365, 283, 395, 297] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Est_WE" SID "4254" Position [240, 248, 270, 262] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Est_Reset" SID "4255" Position [240, 263, 270, 277] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Xk_Index" SID "4256" Position [325, 233, 355, 247] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType SubSystem Name "I Estimate Buffer" SID "4257" Ports [4, 1] Position [490, 217, 570, 278] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "I Estimate Buffer" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Est_Data" SID "4258" Position [150, 218, 180, 232] IconDisplay "Port number" } Block { BlockType Inport Name "Est_Addr" SID "4259" Position [145, 313, 175, 327] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Est_WE" SID "4260" Position [140, 278, 170, 292] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "4261" Position [145, 358, 175, 372] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub2" SID "4262" Ports [2, 1] Position [405, 193, 450, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant\nRead State" SID "4263" Ports [0, 1] Position [415, 338, 435, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,14,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22" " 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 1" "4.44 12.44 10.44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant4" SID "4264" Ports [0, 1] Position [415, 318, 435, 332] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,14,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22" " 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 1" "4.44 12.44 10.44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "4265" Ports [1, 1] Position [510, 155, 555, 185] BlockMirror on ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "4266" Ports [1, 1] Position [635, 325, 680, 355] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "4267" Ports [1, 1] Position [340, 276, 360, 294] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "4268" Ports [1, 1] Position [340, 246, 360, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "4269" Ports [1, 1] Position [340, 216, 360, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Dual Port RAM" SID "4270" Ports [7, 2] Position [500, 233, 570, 377] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "numSubcarriers" initVector "zeros(1,numSubcarriers)" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b on en_a off en_b off latency "1" write_mode_A "Read Before Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,144,7,2,white,blue,0,7d88b3c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 144 144 0 ],[0.77 0." "82 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 144 144 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[83.1 8" "3.1 93.1 83.1 93.1 93.1 93.1 83.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[73.1 73.1 83.1 83.1 73.1 ]" ",[0.931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[63.1 63.1 73.1 73.1 63.1 ],[1 1 1 ]);\npatch([22." "75 57.2 47.2 37.2 27.2 12.75 22.75 ],[53.1 53.1 63.1 53.1 63.1 63.1 53.1 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr" "a');\ncolor('black');port_label('input',2,'dina');\ncolor('black');port_label('input',3,'wea');\ncolor('black');" "port_label('input',4,'addrb');\ncolor('black');port_label('input',5,'dinb');\ncolor('black');port_label('input'," "6,'web');\ncolor('black');port_label('input',7,'rstb');\ncolor('black');port_label('output',1,'A');\ncolor('blac" "k');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "h[n]" SID "4271" Position [765, 333, 795, 347] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Dual Port RAM" DstPort 5 } Line { SrcBlock "Constant\nRead State" SrcPort 1 DstBlock "Dual Port RAM" DstPort 6 } Line { SrcBlock "AddSub2" SrcPort 1 Points [5, 0; 0, 50] DstBlock "Dual Port RAM" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 Points [-115, 0] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 Points [80, 0; 0, -10] DstBlock "Dual Port RAM" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Dual Port RAM" DstPort 3 } Line { SrcBlock "Delay7" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Est_WE" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Est_Addr" SrcPort 1 Points [115, 0; 0, -15] Branch { Points [0, -50] DstBlock "Delay6" DstPort 1 } Branch { DstBlock "Dual Port RAM" DstPort 4 } } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Dual Port RAM" DstPort 7 } Line { SrcBlock "Est_Data" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "Dual Port RAM" SrcPort 2 Points [40, 0] Branch { DstBlock "Convert2" DstPort 1 } Branch { Points [0, -170] DstBlock "Convert1" DstPort 1 } } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "h[n]" DstPort 1 } Annotation { Name "data" Position [348, 206] } } } Block { BlockType SubSystem Name "Q Estimate Buffer" SID "4272" Ports [4, 1] Position [490, 282, 570, 343] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Q Estimate Buffer" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Est_Data" SID "4273" Position [150, 218, 180, 232] IconDisplay "Port number" } Block { BlockType Inport Name "Est_Addr" SID "4274" Position [145, 313, 175, 327] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Est_WE" SID "4275" Position [140, 278, 170, 292] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "4276" Position [145, 358, 175, 372] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub2" SID "4277" Ports [2, 1] Position [405, 193, 450, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant\nRead State" SID "4278" Ports [0, 1] Position [415, 338, 435, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,14,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22" " 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 1" "4.44 12.44 10.44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant4" SID "4279" Ports [0, 1] Position [415, 318, 435, 332] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,14,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22" " 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 1" "4.44 12.44 10.44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "4280" Ports [1, 1] Position [510, 155, 555, 185] BlockMirror on ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "4281" Ports [1, 1] Position [635, 325, 680, 355] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "4282" Ports [1, 1] Position [340, 276, 360, 294] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "4283" Ports [1, 1] Position [340, 246, 360, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "4284" Ports [1, 1] Position [340, 216, 360, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Dual Port RAM" SID "4285" Ports [7, 2] Position [505, 233, 575, 377] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "numSubcarriers" initVector "zeros(1,numSubcarriers)" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b on en_a off en_b off latency "1" write_mode_A "Read Before Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,144,7,2,white,blue,0,7d88b3c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 144 144 0 ],[0.77 0." "82 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 144 144 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[83.1 8" "3.1 93.1 83.1 93.1 93.1 93.1 83.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[73.1 73.1 83.1 83.1 73.1 ]" ",[0.931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[63.1 63.1 73.1 73.1 63.1 ],[1 1 1 ]);\npatch([22." "75 57.2 47.2 37.2 27.2 12.75 22.75 ],[53.1 53.1 63.1 53.1 63.1 63.1 53.1 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr" "a');\ncolor('black');port_label('input',2,'dina');\ncolor('black');port_label('input',3,'wea');\ncolor('black');" "port_label('input',4,'addrb');\ncolor('black');port_label('input',5,'dinb');\ncolor('black');port_label('input'," "6,'web');\ncolor('black');port_label('input',7,'rstb');\ncolor('black');port_label('output',1,'A');\ncolor('blac" "k');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "h[n]" SID "4286" Position [765, 333, 795, 347] IconDisplay "Port number" } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "h[n]" DstPort 1 } Line { SrcBlock "Dual Port RAM" SrcPort 2 Points [35, 0] Branch { Points [0, -170] DstBlock "Convert1" DstPort 1 } Branch { DstBlock "Convert2" DstPort 1 } } Line { SrcBlock "Est_Data" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Dual Port RAM" DstPort 7 } Line { SrcBlock "Est_Addr" SrcPort 1 Points [115, 0; 0, -15] Branch { Points [0, -50] DstBlock "Delay6" DstPort 1 } Branch { DstBlock "Dual Port RAM" DstPort 4 } } Line { SrcBlock "Est_WE" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Delay7" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Dual Port RAM" DstPort 3 } Line { SrcBlock "Delay6" SrcPort 1 Points [80, 0; 0, -10] DstBlock "Dual Port RAM" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 Points [-115, 0] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 Points [5, 0; 0, 50] DstBlock "Dual Port RAM" DstPort 2 } Line { SrcBlock "Constant\nRead State" SrcPort 1 DstBlock "Dual Port RAM" DstPort 6 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Dual Port RAM" DstPort 5 } Annotation { Name "data" Position [348, 206] } } } Block { BlockType Outport Name "EstI" SID "4287" Position [685, 243, 715, 257] IconDisplay "Port number" } Block { BlockType Outport Name "EstQ" SID "4288" Position [685, 308, 715, 322] Port "2" IconDisplay "Port number" } Line { SrcBlock "I" SrcPort 1 DstBlock "I Estimate Buffer" DstPort 1 } Line { SrcBlock "Xk_Index" SrcPort 1 Points [105, 0] Branch { DstBlock "I Estimate Buffer" DstPort 2 } Branch { Points [0, 65] DstBlock "Q Estimate Buffer" DstPort 2 } } Line { SrcBlock "I Estimate Buffer" SrcPort 1 DstBlock "EstI" DstPort 1 } Line { SrcBlock "Est_WE" SrcPort 1 Points [150, 0] Branch { DstBlock "I Estimate Buffer" DstPort 3 } Branch { Points [0, 65] DstBlock "Q Estimate Buffer" DstPort 3 } } Line { SrcBlock "Est_Reset" SrcPort 1 Points [145, 0] Branch { DstBlock "I Estimate Buffer" DstPort 4 } Branch { Points [0, 65] DstBlock "Q Estimate Buffer" DstPort 4 } } Line { SrcBlock "Q Estimate Buffer" SrcPort 1 DstBlock "EstQ" DstPort 1 } Line { SrcBlock "Q" SrcPort 1 DstBlock "Q Estimate Buffer" DstPort 1 } } } Block { BlockType SubSystem Name "H_B-A Estimate Buffer" SID "4289" Ports [6, 4] Position [800, 469, 895, 556] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "H_B-A Estimate Buffer" Location [202, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "4290" Position [400, 218, 430, 232] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "4291" Position [315, 363, 345, 377] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Est_WE" SID "4292" Position [240, 248, 270, 262] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Est_Reset" SID "4293" Position [240, 263, 270, 277] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "FFT_Addr" SID "4294" Position [315, 233, 345, 247] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "EQ_Addr" SID "4295" Position [315, 298, 345, 312] NamePlacement "alternate" Port "6" IconDisplay "Port number" } Block { BlockType SubSystem Name "I Estimate Buffer" SID "4296" Ports [5, 2] Position [500, 212, 610, 298] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "I Estimate Buffer" Location [202, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Est_Data" SID "4297" Position [145, 218, 175, 232] IconDisplay "Port number" } Block { BlockType Inport Name "Fast_Addr" SID "4298" Position [145, 313, 175, 327] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Est_WE" SID "4299" Position [140, 278, 170, 292] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "4300" Position [145, 358, 175, 372] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Slow_Addr" SID "4301" Position [145, 418, 175, 432] Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub2" SID "4302" Ports [2, 1] Position [405, 193, 450, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant\nRead State" SID "4303" Ports [0, 1] Position [415, 338, 435, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,14,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22" " 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 1" "4.44 12.44 10.44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant4" SID "4304" Ports [0, 1] Position [415, 318, 435, 332] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,14,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22" " 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 1" "4.44 12.44 10.44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "4305" Ports [1, 1] Position [510, 155, 555, 185] BlockMirror on ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "4306" Ports [1, 1] Position [635, 325, 680, 355] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "4307" Ports [1, 1] Position [340, 276, 360, 294] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "4308" Ports [1, 1] Position [340, 246, 360, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "4309" Ports [1, 1] Position [340, 216, 360, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Dual Port RAM" SID "4310" Ports [7, 2] Position [500, 233, 570, 377] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "numSubcarriers" initVector "zeros(1,numSubcarriers)" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b on en_a off en_b off latency "1" write_mode_A "Read After Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,384,398" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,144,7,2,white,blue,0,7d88b3c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 144 144 0 ],[0.77 0." "82 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 144 144 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[83.1 8" "3.1 93.1 83.1 93.1 93.1 93.1 83.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[73.1 73.1 83.1 83.1 73.1 ]" ",[0.931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[63.1 63.1 73.1 73.1 63.1 ],[1 1 1 ]);\npatch([22." "75 57.2 47.2 37.2 27.2 12.75 22.75 ],[53.1 53.1 63.1 53.1 63.1 63.1 53.1 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr" "a');\ncolor('black');port_label('input',2,'dina');\ncolor('black');port_label('input',3,'wea');\ncolor('black');" "port_label('input',4,'addrb');\ncolor('black');port_label('input',5,'dinb');\ncolor('black');port_label('input'," "6,'web');\ncolor('black');port_label('input',7,'rstb');\ncolor('black');port_label('output',1,'A');\ncolor('blac" "k');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "h[n]" SID "4311" Position [765, 333, 795, 347] IconDisplay "Port number" } Block { BlockType Outport Name "h[n] (fast)" SID "4312" Position [765, 263, 795, 277] Port "2" IconDisplay "Port number" } Line { SrcBlock "Dual Port RAM" SrcPort 1 DstBlock "h[n] (fast)" DstPort 1 } Line { SrcBlock "Slow_Addr" SrcPort 1 Points [130, 0; 0, -120] DstBlock "Dual Port RAM" DstPort 4 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Dual Port RAM" DstPort 5 } Line { SrcBlock "Constant\nRead State" SrcPort 1 DstBlock "Dual Port RAM" DstPort 6 } Line { SrcBlock "AddSub2" SrcPort 1 Points [5, 0; 0, 50] DstBlock "Dual Port RAM" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 Points [-115, 0] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 Points [80, 0; 0, -10] DstBlock "Dual Port RAM" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Dual Port RAM" DstPort 3 } Line { SrcBlock "Delay7" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Est_WE" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Fast_Addr" SrcPort 1 Points [115, 0; 0, -65] DstBlock "Delay6" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Dual Port RAM" DstPort 7 } Line { SrcBlock "Est_Data" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "Dual Port RAM" SrcPort 2 Points [40, 0] Branch { DstBlock "Convert2" DstPort 1 } Branch { Points [0, -170] DstBlock "Convert1" DstPort 1 } } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "h[n]" DstPort 1 } Annotation { Name "data" Position [348, 206] } } } Block { BlockType SubSystem Name "Q Estimate Buffer" SID "4313" Ports [5, 2] Position [500, 357, 610, 443] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Q Estimate Buffer" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Est_Data" SID "4314" Position [145, 218, 175, 232] IconDisplay "Port number" } Block { BlockType Inport Name "Fast_Addr" SID "4315" Position [145, 313, 175, 327] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Est_WE" SID "4316" Position [140, 278, 170, 292] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "4317" Position [145, 358, 175, 372] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Slow_Addr" SID "4318" Position [145, 418, 175, 432] Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub2" SID "4319" Ports [2, 1] Position [405, 193, 450, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant\nRead State" SID "4320" Ports [0, 1] Position [415, 338, 435, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,14,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22" " 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 1" "4.44 12.44 10.44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant4" SID "4321" Ports [0, 1] Position [415, 318, 435, 332] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,14,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22" " 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 1" "4.44 12.44 10.44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "4322" Ports [1, 1] Position [510, 155, 555, 185] BlockMirror on ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "4323" Ports [1, 1] Position [635, 325, 680, 355] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "4324" Ports [1, 1] Position [340, 276, 360, 294] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "4325" Ports [1, 1] Position [340, 246, 360, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "4326" Ports [1, 1] Position [340, 216, 360, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Dual Port RAM" SID "4327" Ports [7, 2] Position [500, 233, 570, 377] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "numSubcarriers" initVector "zeros(1,numSubcarriers)" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b on en_a off en_b off latency "1" write_mode_A "Read After Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,384,398" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,144,7,2,white,blue,0,7d88b3c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 144 144 0 ],[0.77 0." "82 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 144 144 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[83.1 8" "3.1 93.1 83.1 93.1 93.1 93.1 83.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[73.1 73.1 83.1 83.1 73.1 ]" ",[0.931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[63.1 63.1 73.1 73.1 63.1 ],[1 1 1 ]);\npatch([22." "75 57.2 47.2 37.2 27.2 12.75 22.75 ],[53.1 53.1 63.1 53.1 63.1 63.1 53.1 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr" "a');\ncolor('black');port_label('input',2,'dina');\ncolor('black');port_label('input',3,'wea');\ncolor('black');" "port_label('input',4,'addrb');\ncolor('black');port_label('input',5,'dinb');\ncolor('black');port_label('input'," "6,'web');\ncolor('black');port_label('input',7,'rstb');\ncolor('black');port_label('output',1,'A');\ncolor('blac" "k');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "h[n]" SID "4328" Position [765, 333, 795, 347] IconDisplay "Port number" } Block { BlockType Outport Name "h[n] (fast)" SID "4329" Position [765, 263, 795, 277] Port "2" IconDisplay "Port number" } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "h[n]" DstPort 1 } Line { SrcBlock "Dual Port RAM" SrcPort 2 Points [40, 0] Branch { Points [0, -170] DstBlock "Convert1" DstPort 1 } Branch { DstBlock "Convert2" DstPort 1 } } Line { SrcBlock "Est_Data" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Dual Port RAM" DstPort 7 } Line { SrcBlock "Fast_Addr" SrcPort 1 Points [115, 0; 0, -65] DstBlock "Delay6" DstPort 1 } Line { SrcBlock "Est_WE" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Delay7" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Dual Port RAM" DstPort 3 } Line { SrcBlock "Delay6" SrcPort 1 Points [80, 0; 0, -10] DstBlock "Dual Port RAM" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 Points [-115, 0] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 Points [5, 0; 0, 50] DstBlock "Dual Port RAM" DstPort 2 } Line { SrcBlock "Constant\nRead State" SrcPort 1 DstBlock "Dual Port RAM" DstPort 6 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Dual Port RAM" DstPort 5 } Line { SrcBlock "Slow_Addr" SrcPort 1 Points [130, 0; 0, -120] DstBlock "Dual Port RAM" DstPort 4 } Line { SrcBlock "Dual Port RAM" SrcPort 1 DstBlock "h[n] (fast)" DstPort 1 } Annotation { Name "data" Position [348, 206] } } } Block { BlockType Outport Name "EstI_fast" SID "4330" Position [815, 273, 845, 287] IconDisplay "Port number" } Block { BlockType Outport Name "EstQ_fast" SID "4331" Position [800, 418, 830, 432] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "EstI" SID "4332" Position [815, 228, 845, 242] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "EstQ" SID "4333" Position [795, 373, 825, 387] Port "4" IconDisplay "Port number" } Line { SrcBlock "Q Estimate Buffer" SrcPort 2 DstBlock "EstQ_fast" DstPort 1 } Line { SrcBlock "Q Estimate Buffer" SrcPort 1 DstBlock "EstQ" DstPort 1 } Line { SrcBlock "Q" SrcPort 1 DstBlock "Q Estimate Buffer" DstPort 1 } Line { SrcBlock "EQ_Addr" SrcPort 1 Points [65, 0; 0, -20; 45, 0] Branch { Points [0, 145] DstBlock "Q Estimate Buffer" DstPort 5 } Branch { DstBlock "I Estimate Buffer" DstPort 5 } } Line { SrcBlock "I Estimate Buffer" SrcPort 2 DstBlock "EstI_fast" DstPort 1 } Line { SrcBlock "I" SrcPort 1 DstBlock "I Estimate Buffer" DstPort 1 } Line { SrcBlock "FFT_Addr" SrcPort 1 Points [125, 0] Branch { Points [0, 145] DstBlock "Q Estimate Buffer" DstPort 2 } Branch { DstBlock "I Estimate Buffer" DstPort 2 } } Line { SrcBlock "I Estimate Buffer" SrcPort 1 DstBlock "EstI" DstPort 1 } Line { SrcBlock "Est_WE" SrcPort 1 Points [195, 0] Branch { Points [0, 145] DstBlock "Q Estimate Buffer" DstPort 3 } Branch { DstBlock "I Estimate Buffer" DstPort 3 } } Line { SrcBlock "Est_Reset" SrcPort 1 Points [190, 0] Branch { Points [0, 145] DstBlock "Q Estimate Buffer" DstPort 4 } Branch { DstBlock "I Estimate Buffer" DstPort 4 } } } } Block { BlockType SubSystem Name "H_B-B Estimate Buffer" SID "4334" Ports [5, 2] Position [800, 562, 885, 648] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "H_B-B Estimate Buffer" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "4335" Position [365, 218, 395, 232] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "4336" Position [365, 283, 395, 297] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Est_WE" SID "4337" Position [240, 248, 270, 262] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Est_Reset" SID "4338" Position [240, 263, 270, 277] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Xk_Index" SID "4339" Position [325, 233, 355, 247] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType SubSystem Name "I Estimate Buffer" SID "4340" Ports [4, 1] Position [490, 217, 570, 278] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "I Estimate Buffer" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Est_Data" SID "4341" Position [150, 218, 180, 232] IconDisplay "Port number" } Block { BlockType Inport Name "Est_Addr" SID "4342" Position [145, 313, 175, 327] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Est_WE" SID "4343" Position [140, 278, 170, 292] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "4344" Position [145, 358, 175, 372] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub2" SID "4345" Ports [2, 1] Position [405, 193, 450, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant\nRead State" SID "4346" Ports [0, 1] Position [415, 338, 435, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,14,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22" " 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 1" "4.44 12.44 10.44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant4" SID "4347" Ports [0, 1] Position [415, 318, 435, 332] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,14,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22" " 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 1" "4.44 12.44 10.44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "4348" Ports [1, 1] Position [510, 155, 555, 185] BlockMirror on ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "4349" Ports [1, 1] Position [635, 325, 680, 355] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "4350" Ports [1, 1] Position [340, 276, 360, 294] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "4351" Ports [1, 1] Position [340, 246, 360, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "4352" Ports [1, 1] Position [340, 216, 360, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Dual Port RAM" SID "4353" Ports [7, 2] Position [500, 233, 570, 377] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "numSubcarriers" initVector "zeros(1,numSubcarriers)" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b on en_a off en_b off latency "1" write_mode_A "Read Before Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,144,7,2,white,blue,0,7d88b3c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 144 144 0 ],[0.77 0." "82 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 144 144 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[83.1 8" "3.1 93.1 83.1 93.1 93.1 93.1 83.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[73.1 73.1 83.1 83.1 73.1 ]" ",[0.931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[63.1 63.1 73.1 73.1 63.1 ],[1 1 1 ]);\npatch([22." "75 57.2 47.2 37.2 27.2 12.75 22.75 ],[53.1 53.1 63.1 53.1 63.1 63.1 53.1 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr" "a');\ncolor('black');port_label('input',2,'dina');\ncolor('black');port_label('input',3,'wea');\ncolor('black');" "port_label('input',4,'addrb');\ncolor('black');port_label('input',5,'dinb');\ncolor('black');port_label('input'," "6,'web');\ncolor('black');port_label('input',7,'rstb');\ncolor('black');port_label('output',1,'A');\ncolor('blac" "k');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "h[n]" SID "4354" Position [765, 333, 795, 347] IconDisplay "Port number" } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "h[n]" DstPort 1 } Line { SrcBlock "Dual Port RAM" SrcPort 2 Points [40, 0] Branch { Points [0, -170] DstBlock "Convert1" DstPort 1 } Branch { DstBlock "Convert2" DstPort 1 } } Line { SrcBlock "Est_Data" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Dual Port RAM" DstPort 7 } Line { SrcBlock "Est_Addr" SrcPort 1 Points [115, 0; 0, -15] Branch { DstBlock "Dual Port RAM" DstPort 4 } Branch { Points [0, -50] DstBlock "Delay6" DstPort 1 } } Line { SrcBlock "Est_WE" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Delay7" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Dual Port RAM" DstPort 3 } Line { SrcBlock "Delay6" SrcPort 1 Points [80, 0; 0, -10] DstBlock "Dual Port RAM" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 Points [-115, 0] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 Points [5, 0; 0, 50] DstBlock "Dual Port RAM" DstPort 2 } Line { SrcBlock "Constant\nRead State" SrcPort 1 DstBlock "Dual Port RAM" DstPort 6 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Dual Port RAM" DstPort 5 } Annotation { Name "data" Position [348, 206] } } } Block { BlockType SubSystem Name "Q Estimate Buffer" SID "4355" Ports [4, 1] Position [490, 282, 570, 343] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Q Estimate Buffer" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Est_Data" SID "4356" Position [150, 218, 180, 232] IconDisplay "Port number" } Block { BlockType Inport Name "Est_Addr" SID "4357" Position [145, 313, 175, 327] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Est_WE" SID "4358" Position [140, 278, 170, 292] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "4359" Position [145, 358, 175, 372] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub2" SID "4360" Ports [2, 1] Position [405, 193, 450, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant\nRead State" SID "4361" Ports [0, 1] Position [415, 338, 435, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,14,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22" " 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 1" "4.44 12.44 10.44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant4" SID "4362" Ports [0, 1] Position [415, 318, 435, 332] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,14,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 14 14 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[9.22 9.22" " 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([7.55 1" "4.44 12.44 10.44 8.44 5.55 7.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "4363" Ports [1, 1] Position [510, 155, 555, 185] BlockMirror on ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "4364" Ports [1, 1] Position [635, 325, 680, 355] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "4365" Ports [1, 1] Position [340, 276, 360, 294] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "4366" Ports [1, 1] Position [340, 246, 360, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "4367" Ports [1, 1] Position [340, 216, 360, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Dual Port RAM" SID "4368" Ports [7, 2] Position [505, 233, 575, 377] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "numSubcarriers" initVector "zeros(1,numSubcarriers)" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b on en_a off en_b off latency "1" write_mode_A "Read Before Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,144,7,2,white,blue,0,7d88b3c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 144 144 0 ],[0.77 0." "82 0.91 ]);\nplot([0 70 70 0 0 ],[0 0 144 144 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[83.1 8" "3.1 93.1 83.1 93.1 93.1 93.1 83.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[73.1 73.1 83.1 83.1 73.1 ]" ",[0.931 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[63.1 63.1 73.1 73.1 63.1 ],[1 1 1 ]);\npatch([22." "75 57.2 47.2 37.2 27.2 12.75 22.75 ],[53.1 53.1 63.1 53.1 63.1 63.1 53.1 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr" "a');\ncolor('black');port_label('input',2,'dina');\ncolor('black');port_label('input',3,'wea');\ncolor('black');" "port_label('input',4,'addrb');\ncolor('black');port_label('input',5,'dinb');\ncolor('black');port_label('input'," "6,'web');\ncolor('black');port_label('input',7,'rstb');\ncolor('black');port_label('output',1,'A');\ncolor('blac" "k');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "h[n]" SID "4369" Position [765, 333, 795, 347] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Dual Port RAM" DstPort 5 } Line { SrcBlock "Constant\nRead State" SrcPort 1 DstBlock "Dual Port RAM" DstPort 6 } Line { SrcBlock "AddSub2" SrcPort 1 Points [5, 0; 0, 50] DstBlock "Dual Port RAM" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 Points [-115, 0] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 Points [80, 0; 0, -10] DstBlock "Dual Port RAM" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Dual Port RAM" DstPort 3 } Line { SrcBlock "Delay7" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Est_WE" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Est_Addr" SrcPort 1 Points [115, 0; 0, -15] Branch { DstBlock "Dual Port RAM" DstPort 4 } Branch { Points [0, -50] DstBlock "Delay6" DstPort 1 } } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Dual Port RAM" DstPort 7 } Line { SrcBlock "Est_Data" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "Dual Port RAM" SrcPort 2 Points [35, 0] Branch { DstBlock "Convert2" DstPort 1 } Branch { Points [0, -170] DstBlock "Convert1" DstPort 1 } } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "h[n]" DstPort 1 } Annotation { Name "data" Position [348, 206] } } } Block { BlockType Outport Name "EstI" SID "4370" Position [715, 243, 745, 257] IconDisplay "Port number" } Block { BlockType Outport Name "EstQ" SID "4371" Position [715, 308, 745, 322] Port "2" IconDisplay "Port number" } Line { SrcBlock "Q" SrcPort 1 DstBlock "Q Estimate Buffer" DstPort 1 } Line { SrcBlock "Q Estimate Buffer" SrcPort 1 DstBlock "EstQ" DstPort 1 } Line { SrcBlock "Est_Reset" SrcPort 1 Points [145, 0] Branch { Points [0, 65] DstBlock "Q Estimate Buffer" DstPort 4 } Branch { DstBlock "I Estimate Buffer" DstPort 4 } } Line { SrcBlock "Est_WE" SrcPort 1 Points [150, 0] Branch { Points [0, 65] DstBlock "Q Estimate Buffer" DstPort 3 } Branch { DstBlock "I Estimate Buffer" DstPort 3 } } Line { SrcBlock "I Estimate Buffer" SrcPort 1 DstBlock "EstI" DstPort 1 } Line { SrcBlock "Xk_Index" SrcPort 1 Points [105, 0] Branch { Points [0, 65] DstBlock "Q Estimate Buffer" DstPort 2 } Branch { DstBlock "I Estimate Buffer" DstPort 2 } } Line { SrcBlock "I" SrcPort 1 DstBlock "I Estimate Buffer" DstPort 1 } } } Block { BlockType Reference Name "Inverter" SID "4372" Ports [1, 1] Position [450, 727, 490, 743] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,201" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,e69ac283,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\new" "line ','texmode','on');\ncolor('black');disp(' \\nnot');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "4373" Ports [2, 1] Position [735, 509, 755, 531] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,22,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[13.22 13.22 15." "22 13.22 15.22 15.22 15.22 13.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[11.22 11.22 13.22 13.22 11.22 ]" ",[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[9.22 9.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 " "14.44 12.44 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 7.22 9.22 9.22 7.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4374" Ports [2, 1] Position [725, 299, 745, 321] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,22,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[13.22 13.22 15." "22 13.22 15.22 15.22 15.22 13.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[11.22 11.22 13.22 13.22 11.22 ]" ",[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[9.22 9.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([7.55 " "14.44 12.44 10.44 8.44 5.55 7.55 ],[7.22 7.22 9.22 7.22 9.22 9.22 7.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType SubSystem Name "Mult by training" SID "4375" Ports [3, 2] Position [540, 349, 610, 381] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Mult by training" Location [2, 74, 1270, 980] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "AR" SID "4376" Position [190, 243, 220, 257] IconDisplay "Port number" } Block { BlockType Inport Name "AI" SID "4377" Position [195, 413, 225, 427] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "BR" SID "4378" Position [190, 183, 220, 197] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "4379" Ports [0, 1] Position [410, 377, 430, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "2" bin_pt "1" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 26 26 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[15.22 15." "22 17.22 15.22 17.22 17.22 17.22 15.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[13.22 13.22 15.22 15.22" " 13.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[11.22 11.22 13.22 13.22 11.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 9.22 11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('o" "utput',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "4380" Ports [0, 1] Position [410, 207, 430, 233] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "2" bin_pt "1" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 26 26 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[15.22 15." "22 17.22 15.22 17.22 17.22 17.22 15.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[13.22 13.22 15.22 15.22" " 13.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[11.22 11.22 13.22 13.22 11.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 9.22 11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('o" "utput',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux3" SID "4381" Ports [4, 1] Position [470, 178, 495, 292] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,114,4,1,white,blue,3,c14c4dfe,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 16.2857 97.7143 114 0 " "],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 16.2857 97.7143 114 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12." "66 8.325 5.325 ],[60.33 60.33 63.33 60.33 63.33 63.33 63.33 60.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8." "325 ],[57.33 57.33 60.33 60.33 57.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[54.33 54.3" "3 57.33 57.33 54.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[51.33 51.33 54.33 51.33 54." "33 54.33 51.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i" "con text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('bla" "ck');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\n\ncolor('black');disp('\\bf{ z^{-" "1}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux4" SID "4382" Ports [4, 1] Position [470, 348, 495, 462] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,114,4,1,white,blue,3,c14c4dfe,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 16.2857 97.7143 114 0 " "],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 16.2857 97.7143 114 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12." "66 8.325 5.325 ],[60.33 60.33 63.33 60.33 63.33 63.33 63.33 60.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8." "325 ],[57.33 57.33 60.33 60.33 57.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[54.33 54.3" "3 57.33 57.33 54.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[51.33 51.33 54.33 51.33 54." "33 54.33 51.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i" "con text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('bla" "ck');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\n\ncolor('black');disp('\\bf{ z^{-" "1}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate" SID "4383" Ports [1, 1] Position [340, 263, 380, 297] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,34,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.44 21" ".44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.44 21." "44 17.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate1" SID "4384" Ports [1, 1] Position [345, 433, 385, 467] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,34,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.44 21" ".44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.44 21." "44 17.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret" SID "4385" Ports [1, 1] Position [270, 181, 305, 199] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes type of samples without altering their binary representation.

Hardware notes: In har" "dware this block costs nothing.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits," " and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's comp" "lement) becomes an output of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "20,20,356,278" block_type "cast" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "PR" SID "4386" Position [570, 228, 600, 242] IconDisplay "Port number" } Block { BlockType Outport Name "PI" SID "4387" Position [565, 398, 595, 412] Port "2" IconDisplay "Port number" } Line { SrcBlock "Reinterpret" SrcPort 1 Points [130, 0] Branch { Points [0, 170] DstBlock "Mux4" DstPort 1 } Branch { DstBlock "Mux3" DstPort 1 } } Line { SrcBlock "Mux3" SrcPort 1 DstBlock "PR" DstPort 1 } Line { SrcBlock "Negate" SrcPort 1 DstBlock "Mux3" DstPort 4 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Mux3" DstPort 2 } Line { SrcBlock "Mux4" SrcPort 1 DstBlock "PI" DstPort 1 } Line { SrcBlock "Negate1" SrcPort 1 DstBlock "Mux4" DstPort 4 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Mux4" DstPort 2 } Line { SrcBlock "AI" SrcPort 1 Points [90, 0] Branch { Points [0, 0; 0, 30] DstBlock "Negate1" DstPort 1 } Branch { DstBlock "Mux4" DstPort 3 } } Line { SrcBlock "BR" SrcPort 1 DstBlock "Reinterpret" DstPort 1 } Line { SrcBlock "AR" SrcPort 1 Points [90, 0] Branch { DstBlock "Mux3" DstPort 3 } Branch { Points [0, 30] DstBlock "Negate" DstPort 1 } } } } Block { BlockType Reference Name "Mux3" SID "4388" Ports [3, 1] Position [575, 593, 600, 677] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,84,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 12 72 84 0 ],[0.77 0.82 0." "91 ]);\nplot([0 25 25 0 0 ],[0 12 72 84 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[45.33 45.3" "3 48.33 45.33 48.33 48.33 48.33 45.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[42.33 42.33 45.33 45.33" " 42.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[39.33 39.33 42.33 42.33 39.33 ],[1 1 1 ]);" "\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[36.33 36.33 39.33 36.33 39.33 39.33 36.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\n\nco" "lor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Pilot Processing" SID "4389" Ports [10, 2] Position [1060, 118, 1170, 242] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Pilot Processing" Location [2, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "129" Block { BlockType Inport Name "Rst" SID "4390" Position [50, 508, 80, 522] IconDisplay "Port number" } Block { BlockType Inport Name "I" SID "4391" Position [45, 303, 75, 317] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "4392" Position [45, 318, 75, 332] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Xk_Index" SID "4393" Position [105, 333, 135, 347] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Sym_Index" SID "4394" Position [150, 348, 180, 362] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Train" SID "4395" Position [50, 478, 80, 492] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "HAA_I" SID "4396" Position [50, 388, 80, 402] NamePlacement "alternate" Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "HAA_Q" SID "4397" Position [50, 403, 80, 417] Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "HBA_I" SID "4398" Position [95, 433, 125, 447] NamePlacement "alternate" Port "9" IconDisplay "Port number" } Block { BlockType Inport Name "HBA_Q" SID "4399" Position [95, 448, 125, 462] Port "10" IconDisplay "Port number" } Block { BlockType SubSystem Name "CFO Calculation" SID "4400" Ports [3, 2] Position [715, 448, 790, 492] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "CFO Calculation" Location [202, 70, 1840, 1180] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "127" Block { BlockType Inport Name "Phase Err" SID "4401" Position [75, 133, 105, 147] IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "4402" Position [75, 163, 105, 177] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "4403" Position [75, 193, 105, 207] Port "3" IconDisplay "Port number" } Block { BlockType Sum Name "Add" SID "4404" Ports [2, 1] Position [1000, 377, 1030, 408] ShowName off Inputs "+-" InputSameDT off OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Constant Name "Constant" SID "4405" Position [950, 373, 965, 397] ShowName off } Block { BlockType SubSystem Name "Correction" SID "4406" Ports [2, 2] Position [535, 138, 625, 227] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Correction" Location [202, 70, 1918, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Phase Err" SID "4407" Position [470, 228, 500, 242] IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "4408" Position [470, 263, 500, 277] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Delay2" SID "4409" Ports [1, 1] Position [810, 296, 850, 314] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From5" SID "4410" Position [435, 206, 620, 224] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_PilotCFOCalc_Correction" TagVisibility "global" } Block { BlockType Reference Name "Mult" SID "4411" Ports [3, 1] Position [790, 207, 845, 263] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "32" bin_pt "32" quantization "Round (unbiased: +/- Inf)" overflow "Wrap" en on latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "55,56,3,1,white,blue,0,ba9ee9a2,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 56 56 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[35" ".77 35.77 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[28.77 28." "77 35.77 35.77 28.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[21.77 21.77 28.77 28.7" "7 21.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[14.77 14.77 21.77 14.77 21.77 21.77" " 14.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_l" "abel('input',3,'en');\ncolor('black');port_label('output',1,'\\bfa \\times b','texmode','on');\ncolor('black');d" "isp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "AvgErr" SID "4412" Position [1060, 228, 1090, 242] IconDisplay "Port number" } Block { BlockType Outport Name "Vout" SID "4413" Position [1060, 298, 1090, 312] Port "2" IconDisplay "Port number" } Line { SrcBlock "From5" SrcPort 1 DstBlock "Mult" DstPort 1 } Line { SrcBlock "Phase Err" SrcPort 1 DstBlock "Mult" DstPort 2 } Line { SrcBlock "Vin" SrcPort 1 Points [250, 0] Branch { Points [0, 35] DstBlock "Delay2" DstPort 1 } Branch { Points [0, -15] DstBlock "Mult" DstPort 3 } } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "Vout" DstPort 1 } Line { SrcBlock "Mult" SrcPort 1 DstBlock "AvgErr" DstPort 1 } } } Block { BlockType Reference Name "Delay6" SID "4414" Ports [2, 1] Position [770, 328, 815, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en on latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,24,2,1,white,blue,0,7c0ac154,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 24 24 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncol" "or('black');port_label('input',2,'en');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: e" "nd icon text');" } Block { BlockType SubSystem Name "Diff Calc" SID "4415" Ports [3, 2] Position [355, 136, 445, 224] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Diff Calc" Location [372, 121, 1192, 349] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Phase Err" SID "4416" Position [405, 298, 435, 312] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "4417" Position [405, 398, 435, 412] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "4418" Position [405, 368, 435, 382] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Counter1" SID "4419" Ports [2, 1] Position [505, 360, 565, 420] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "8" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "60,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38" ".88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38." "88 30.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf" "++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "4420" Ports [1, 1] Position [775, 446, 815, 464] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "3" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,83e6bb61,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-3}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult" SID "4421" Ports [2, 1] Position [780, 325, 835, 380] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "32" bin_pt "28" quantization "Round (unbiased: +/- Inf)" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "55,55,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[34" ".77 34.77 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[27.77 27." "77 34.77 34.77 27.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[20.77 20.77 27.77 27.7" "7 20.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[13.77 13.77 20.77 13.77 20.77 20.77" " 13.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_l" "abel('output',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncol" "or('black');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "ROM" SID "4422" Ports [1, 1] Position [620, 369, 680, 411] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "256" initVector "[1./(5.*[1:256])]" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "24" bin_pt "24" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "10.1.3" sg_icon_stat "60,42,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 42 42 0 ]);\npatch([16.65 25.32 31.32 37.32 43.32 31.32 22.65 16.65 ],[27.66" " 27.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([22.65 31.32 25.32 16.65 22.65 ],[21.66 21.66 27." "66 27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([16.65 25.32 31.32 22.65 16.65 ],[15.66 15.66 21.66 21.66 15.66 ]" ",[1 1 1 ]);\npatch([22.65 43.32 37.32 31.32 25.32 16.65 22.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end ico" "n text');" } Block { BlockType Reference Name "Register2" SID "4423" Ports [3, 1] Position [520, 298, 555, 332] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "8.2.02" sg_icon_stat "35,34,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 34 34 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[21.44 21.4" "4 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[17.44 17.44 21.44 21.44 " "17.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('bl" "ack');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" } Block { BlockType Reference Name "Scale4" SID "4424" Ports [1, 1] Position [910, 343, 945, 367] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting the binary point position.

Hardware notes: In ha" "rdware this block costs nothing." scale_factor "-4" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1.2" sg_icon_stat "35,24,1,1,white,blue,0,df643265,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('\\bf{2^{-4}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "AvgErr" SID "4425" Position [1160, 348, 1190, 362] IconDisplay "Port number" } Block { BlockType Outport Name "Vout" SID "4426" Position [1165, 448, 1195, 462] Port "2" IconDisplay "Port number" } Line { SrcBlock "Scale4" SrcPort 1 DstBlock "AvgErr" DstPort 1 } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "ROM" DstPort 1 } Line { SrcBlock "ROM" SrcPort 1 Points [60, 0; 0, -25] DstBlock "Mult" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 Points [185, 0; 0, 25] DstBlock "Mult" DstPort 1 } Line { SrcBlock "Mult" SrcPort 1 DstBlock "Scale4" DstPort 1 } Line { SrcBlock "Phase Err" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 Points [30, 0] Branch { DstBlock "Counter1" DstPort 1 } Branch { Points [0, -60] DstBlock "Register2" DstPort 2 } } Line { SrcBlock "Vin" SrcPort 1 Points [35, 0] Branch { DstBlock "Counter1" DstPort 2 } Branch { Points [0, 50] DstBlock "Delay1" DstPort 1 } Branch { Points [0, -80] DstBlock "Register2" DstPort 3 } } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Vout" DstPort 1 } Annotation { Name "ROM provies 1/(5*n).\nDivide by 16, to complete (1/80) term." Position [944, 318] } } } Block { BlockType Reference Name "Gateway Out1" SID "4427" Ports [1, 1] Position [925, 319, 960, 331] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out2" SID "4428" Ports [1, 1] Position [925, 289, 960, 301] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out3" SID "4429" Ports [1, 1] Position [925, 334, 960, 346] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out4" SID "4430" Ports [1, 1] Position [925, 274, 960, 286] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out8" SID "4431" Ports [1, 1] Position [925, 304, 960, 316] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType SubSystem Name "Unwrapper" SID "4432" Ports [3, 2] Position [200, 127, 280, 213] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Unwrapper" Location [202, 74, 1910, 1132] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "120" Block { BlockType Inport Name "Phase" SID "4433" Position [15, 163, 45, 177] IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "4434" Position [145, 193, 175, 207] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "4435" Position [130, 223, 160, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "1LSB" SID "4436" Ports [1, 1] Position [575, 157, 610, 173] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "1LSB1" SID "4437" Ports [1, 1] Position [425, 222, 460, 238] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "1MSB" SID "4438" Ports [1, 1] Position [575, 177, 610, 193] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "1MSB1" SID "4439" Ports [1, 1] Position [445, 117, 480, 133] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "1MSB2" SID "4440" Ports [1, 1] Position [425, 252, 460, 268] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "2MSB" SID "4441" Ports [1, 1] Position [95, 162, 130, 178] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "4442" Ports [2, 1] Position [970, 134, 1005, 181] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "18" quantization "Round (unbiased: +/- Inf)" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,47,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 47 47 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 47 47 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[28.55 28." "55 33.55 28.55 33.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 2" "8.55 23.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[18.55 18.55 23.55 23.55 18.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[13.55 13.55 18.55 13.55 18.55 18.55 13.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter" SID "4443" Ports [3, 1] Position [850, 140, 910, 200] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up/Down" start_count "0" cnt_by_val "1" arith_type "Signed (2's comp)" n_bits "6" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "60,60,3,1,white,blue,0,3837bb23,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38" ".88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38." "88 30.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'up');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');" "\n\ncolor('black');disp('{\\fontsize{14}\\bf\\pm\\pm}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "4444" Ports [1, 1] Position [865, 279, 895, 301] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "4445" Ports [1, 1] Position [865, 59, 895, 81] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out1" SID "4446" Ports [1, 1] Position [1055, 484, 1090, 496] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out2" SID "4447" Ports [1, 1] Position [1055, 454, 1090, 466] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out4" SID "4448" Ports [1, 1] Position [1055, 439, 1090, 451] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out8" SID "4449" Ports [1, 1] Position [1055, 469, 1090, 481] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "4450" Ports [2, 1] Position [475, 155, 530, 215] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "55,60,2,1,white,blue,0,dc21e094,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[37" ".77 37.77 44.77 37.77 44.77 44.77 44.77 37.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[30.77 30." "77 37.77 37.77 30.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[23.77 23.77 30.77 30.7" "7 23.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[16.77 16.77 23.77 16.77 23.77 23.77" " 16.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\n\ncolor('black');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "4451" Ports [4, 1] Position [650, 159, 705, 216] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "55,57,4,1,white,blue,0,50b60d37,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 57 57 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 57 57 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[35" ".77 35.77 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[28.77 28." "77 35.77 35.77 28.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[21.77 21.77 28.77 28.7" "7 21.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[14.77 14.77 21.77 14.77 21.77 21.77" " 14.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\n\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical2" SID "4452" Ports [2, 1] Position [475, 215, 530, 275] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "55,60,2,1,white,blue,0,dc21e094,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[37" ".77 37.77 44.77 37.77 44.77 44.77 44.77 37.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[30.77 30." "77 37.77 37.77 30.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[23.77 23.77 30.77 30.7" "7 23.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[16.77 16.77 23.77 16.77 23.77 23.77" " 16.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\n\ncolor('black');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "4453" Ports [3, 1] Position [325, 180, 370, 220] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "45,40,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 40 40 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input" "',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType SubSystem Name "posedge" SID "4454" Ports [1, 1] Position [750, 178, 790, 202] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge" Location [2, 70, 1918, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "4455" Position [135, 123, 165, 137] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "4456" Ports [1, 1] Position [225, 119, 255, 141] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "4457" Ports [1, 1] Position [285, 119, 315, 141] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "30,22,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4458" Ports [2, 1] Position [360, 108, 395, 137] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "10.1.3" sg_icon_stat "35,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 29 29 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4459" Position [420, 118, 450, 132] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [15, 0] Branch { DstBlock "Delay" DstPort 1 } Branch { Points [0, -15] DstBlock "Logical2" DstPort 1 } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType Outport Name " Phase" SID "4460" Position [1095, 153, 1125, 167] IconDisplay "Port number" } Block { BlockType Outport Name "Vout" SID "4461" Position [1095, 283, 1125, 297] Port "2" IconDisplay "Port number" } Line { SrcBlock "Phase" SrcPort 1 Points [10, 0] Branch { DstBlock "2MSB" DstPort 1 } Branch { Points [0, -100] DstBlock "Delay2" DstPort 1 } Branch { Points [0, 275] DstBlock "Gateway Out4" DstPort 1 } } Line { SrcBlock "Vin" SrcPort 1 Points [15, 0; 0, 15] Branch { DstBlock "Register1" DstPort 3 } Branch { Points [0, 75; 425, 0] Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, -80] DstBlock "Logical1" DstPort 4 } } } Line { SrcBlock "Rst" SrcPort 1 Points [125, 0] Branch { Points [0, -30] DstBlock "Register1" DstPort 2 } Branch { Points [0, 80; 520, 0; 0, -140] DstBlock "Counter" DstPort 2 } } Line { SrcBlock "2MSB" SrcPort 1 Points [130, 0; 0, 15; 30, 0] Branch { DstBlock "Register1" DstPort 1 } Branch { Points [0, -15] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, -45] DstBlock "1MSB1" DstPort 1 } } } Line { SrcBlock "Register1" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical" DstPort 2 } Branch { Points [0, 30] Branch { DstBlock "1LSB1" DstPort 1 } Branch { Points [0, 30] DstBlock "1MSB2" DstPort 1 } } } Line { SrcBlock "Logical" SrcPort 1 Points [20, 0] Branch { DstBlock "1MSB" DstPort 1 } Branch { Points [0, -20] DstBlock "1LSB" DstPort 1 } } Line { SrcBlock "1LSB" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "1MSB" SrcPort 1 Points [20, 0] DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "posedge" DstPort 1 } Line { SrcBlock "1MSB1" SrcPort 1 Points [340, 0; 0, 25] DstBlock "Counter" DstPort 1 } Line { SrcBlock "posedge" SrcPort 1 DstBlock "Counter" DstPort 3 } Line { SrcBlock "Counter" SrcPort 1 Points [15, 0] Branch { DstBlock "AddSub1" DstPort 2 } Branch { Points [0, 290] DstBlock "Gateway Out2" DstPort 1 } } Line { SrcBlock "AddSub1" SrcPort 1 Points [20, 0] Branch { DstBlock " Phase" DstPort 1 } Branch { Points [0, 315] DstBlock "Gateway Out8" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 Points [95, 0] Branch { DstBlock "Vout" DstPort 1 } Branch { Points [0, 200] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "1LSB1" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "1MSB2" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 Points [75, 0; 0, -50] DstBlock "Logical1" DstPort 3 } Line { SrcBlock "Delay2" SrcPort 1 Points [55, 0] DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "Gateway Out8" SrcPort 1 Points [45, 0] } Line { SrcBlock "Gateway Out1" SrcPort 1 Points [45, 0] } Line { SrcBlock "Gateway Out2" SrcPort 1 Points [45, 0] } Line { Points [1095, 505; 45, 0] } Line { Points [1095, 520; 45, 0] } Line { SrcBlock "Gateway Out4" SrcPort 1 Points [45, 0] } Line { Points [1095, 535; 45, 0] } } } Block { BlockType Outport Name "CFO" SID "4462" Position [695, 153, 725, 167] IconDisplay "Port number" } Block { BlockType Outport Name "Vout" SID "4463" Position [700, 198, 730, 212] Port "2" IconDisplay "Port number" } Line { SrcBlock "Phase Err" SrcPort 1 Points [45, 0] Branch { DstBlock "Unwrapper" DstPort 1 } Branch { Points [0, 140] DstBlock "Gateway Out4" DstPort 1 } } Line { SrcBlock "Vin" SrcPort 1 Points [40, 0] Branch { DstBlock "Unwrapper" DstPort 2 } Branch { Points [0, 125] DstBlock "Gateway Out2" DstPort 1 } } Line { SrcBlock "Gateway Out8" SrcPort 1 Points [10, 0] Branch { Points [90, 0] } Branch { Points [0, 45] Branch { Points [90, 0] } Branch { Points [0, 45] DstBlock "Add" DstPort 2 } } } Line { SrcBlock "Gateway Out2" SrcPort 1 Points [100, 0] } Line { SrcBlock "Gateway Out4" SrcPort 1 Points [100, 0] } Line { SrcBlock "Rst" SrcPort 1 Points [35, 0] Branch { DstBlock "Unwrapper" DstPort 3 } Branch { Points [0, 30; 165, 0; 0, -20] DstBlock "Diff Calc" DstPort 3 } } Line { SrcBlock "Add" SrcPort 1 Points [15, 0; 0, -25; 15, 0] } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Add" DstPort 1 } Line { SrcBlock "Unwrapper" SrcPort 1 DstBlock "Diff Calc" DstPort 1 } Line { SrcBlock "Unwrapper" SrcPort 2 Points [25, 0; 0, -15] DstBlock "Diff Calc" DstPort 2 } Line { SrcBlock "Diff Calc" SrcPort 2 DstBlock "Correction" DstPort 2 } Line { SrcBlock "Diff Calc" SrcPort 1 DstBlock "Correction" DstPort 1 } Line { SrcBlock "Correction" SrcPort 1 Points [45, 0] Branch { DstBlock "CFO" DstPort 1 } Branch { Points [0, 150] Branch { Points [0, 25] DstBlock "Delay6" DstPort 1 } Branch { DstBlock "Gateway Out8" DstPort 1 } } } Line { SrcBlock "Correction" SrcPort 2 Points [40, 0] Branch { DstBlock "Vout" DstPort 1 } Branch { Points [0, 120] Branch { Points [0, 20] DstBlock "Delay6" DstPort 2 } Branch { DstBlock "Gateway Out1" DstPort 1 } } } Line { SrcBlock "Gateway Out1" SrcPort 1 Points [100, 0] } Line { SrcBlock "Gateway Out3" SrcPort 1 Points [100, 0] } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "Gateway Out3" DstPort 1 } } } Block { BlockType Reference Name "Convert3" SID "4464" Ports [1, 1] Position [805, 237, 840, 253] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay12" SID "4465" Ports [1, 1] Position [300, 300, 325, 320] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,20,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12" ".22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12." "22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay13" SID "4466" Ports [1, 1] Position [300, 315, 325, 335] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,20,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12" ".22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12." "22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-2" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay14" SID "4467" Ports [1, 1] Position [300, 345, 325, 365] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,20,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12" ".22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12." "22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Goto Name "Goto1" SID "4468" Position [985, 452, 1125, 468] ShowName off GotoTag "regRx_pilotCFOest" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "4469" Position [985, 472, 1125, 488] ShowName off GotoTag "regRx_pilotCFOest_en" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "4470" Position [905, 542, 1045, 558] ShowName off GotoTag "preSpin_pilotCFOest" TagVisibility "global" } Block { BlockType Goto Name "Goto4" SID "4471" Position [905, 562, 1045, 578] ShowName off GotoTag "preSpin_pilotCFOest_valid" TagVisibility "global" } Block { BlockType Goto Name "Goto5" SID "4472" Position [810, 202, 905, 218] ShowName off GotoTag "PilotPhaseErr" TagVisibility "global" } Block { BlockType SubSystem Name "Phase Noise Tracker" SID "4473" Ports [4, 2] Position [715, 296, 790, 399] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Phase Noise Tracker" Location [202, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Phase Err" SID "4474" Position [165, 188, 195, 202] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Reset" SID "4475" Position [205, 238, 235, 252] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "4476" Position [165, 213, 195, 227] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Sym Index" SID "4477" Position [215, 288, 245, 302] Port "4" IconDisplay "Port number" } Block { BlockType BusCreator Name "Bus\nCreator1" SID "4478" Ports [2, 1] Position [1255, 179, 1260, 321] ShowName off Inputs "2" DisplayOption "bar" } Block { BlockType BusCreator Name "Bus\nCreator2" SID "4479" Ports [2, 1] Position [1255, 334, 1260, 476] ShowName off Inputs "2" DisplayOption "bar" } Block { BlockType SubSystem Name "Coarse Tracking" SID "4480" Ports [3, 3] Position [325, 179, 425, 261] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Coarse Tracking" Location [2, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "127" Block { BlockType Inport Name "Phase Err" SID "4481" Position [220, 178, 250, 192] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "4482" Position [245, 398, 275, 412] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "4483" Position [265, 258, 295, 272] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "4484" Ports [2, 1] Position [955, 376, 1005, 449] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "30" bin_pt "19" quantization "Round (unbiased: +/- Inf)" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,73,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 73 73 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 73 73 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[43.7" "7 43.77 50.77 43.77 50.77 50.77 50.77 43.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[36.77 36.77 " "43.77 43.77 36.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[29.77 29.77 36.77 36.77 29." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[22.77 22.77 29.77 22.77 29.77 29.77 22.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "4485" Ports [1, 1] Position [605, 185, 645, 205] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "19" bin_pt "18" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "40,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Phase Diff Calc1" SID "4486" Ports [2, 1] Position [445, 175, 535, 215] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Phase Diff Calc1" Location [2, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "80" Block { BlockType Inport Name "PhaseErr" SID "4487" Position [435, 648, 465, 662] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "PhaseSum" SID "4488" Position [435, 683, 465, 697] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "18LSB" SID "4489" Ports [1, 1] Position [670, 667, 715, 683] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "18" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "1MSB" SID "4490" Ports [1, 1] Position [770, 622, 815, 638] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "45,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "4491" Ports [2, 1] Position [560, 496, 610, 569] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "18" quantization "Round (unbiased: +/- Inf)" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,73,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 73 73 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 73 73 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[43.7" "7 43.77 50.77 43.77 50.77 50.77 50.77 43.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[36.77 36.77 " "43.77 43.77 36.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[29.77 29.77 36.77 36.77 29." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[22.77 22.77 29.77 22.77 29.77 29.77 22.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub5" SID "4492" Ports [2, 1] Position [560, 636, 610, 709] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "26" bin_pt "18" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,73,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 73 73 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 73 73 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[43.7" "7 43.77 50.77 43.77 50.77 50.77 50.77 43.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[36.77 36.77 " "43.77 43.77 36.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[29.77 29.77 36.77 36.77 29." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[22.77 22.77 29.77 22.77 29.77 29.77 22.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "4493" Ports [2, 1] Position [880, 605, 925, 700] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1.3" sg_icon_stat "45,95,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 95 95 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 95 95 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[53.66 5" "3.66 59.66 53.66 59.66 59.66 59.66 53.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[47.66 47.66 53.66 " "53.66 47.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[41.66 41.66 47.66 47.66 41.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[35.66 35.66 41.66 35.66 41.66 41.66 35.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}" "\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret" SID "4494" Ports [1, 1] Position [1000, 647, 1045, 663] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal betw" "een signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothin" "g.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to " "unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of " "56 (111000 in binary)." force_arith_type on arith_type "Signed (2's comp)" force_bin_pt on bin_pt "18" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1.3" sg_icon_stat "45,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "d" SID "4495" Position [880, 528, 910, 542] IconDisplay "Port number" } Line { SrcBlock "PhaseSum" SrcPort 1 Points [35, 0] Branch { DstBlock "AddSub5" DstPort 2 } Branch { Points [0, -140] DstBlock "AddSub1" DstPort 2 } } Line { SrcBlock "AddSub5" SrcPort 1 DstBlock "18LSB" DstPort 1 } Line { SrcBlock "PhaseErr" SrcPort 1 Points [30, 0] Branch { DstBlock "AddSub5" DstPort 1 } Branch { Points [0, -140] DstBlock "AddSub1" DstPort 1 } } Line { SrcBlock "18LSB" SrcPort 1 Points [15, 0] Branch { DstBlock "Concat" DstPort 2 } Branch { Points [0, -45] DstBlock "1MSB" DstPort 1 } } Line { SrcBlock "Reinterpret" SrcPort 1 Points [45, 0] } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Reinterpret" DstPort 1 } Line { SrcBlock "1MSB" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "d" DstPort 1 } Annotation { Name "modulo 1 operation" Position [757, 742] } } } Block { BlockType Reference Name "Register" SID "4496" Ports [3, 1] Position [955, 450, 1005, 490] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "50,40,3,1,white,blue,0,30546de1,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 40 40 0 ]);\npatch([13.875 21.1 26.1 31.1 36.1 26.1 18.875 13.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([18.875 26.1 21.1 13.875 18.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([13.875 21.1 26.1 18.875 13.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([18.875 36.1 31.1 26.1 21.1 13.875 18.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input" "',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Times_Alpha" SID "4497" Ports [1, 1] Position [865, 383, 905, 407] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Times_Alpha" Location [2, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "M" SID "4498" Position [25, 58, 55, 72] IconDisplay "Port number" } Block { BlockType Reference Name "Mult_0.5" SID "4499" Ports [1, 1] Position [205, 54, 245, 76] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting the binary point position.

Hardware notes: In ha" "rdware this block costs nothing." scale_factor "-1" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "8.2.01" sg_icon_stat "40,22,1,1,white,blue,0,315b7d78,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('\\bf{2^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "P" SID "4500" Position [315, 58, 345, 72] IconDisplay "Port number" } Line { SrcBlock "Mult_0.5" SrcPort 1 DstBlock "P" DstPort 1 } Line { SrcBlock "M" SrcPort 1 DstBlock "Mult_0.5" DstPort 1 } Annotation { Name "We found in hardware that a value of 0.5\nalways worked, so we optimized away\nthe constant and multi" "plier altogether" Position [157, 129] } } } Block { BlockType Outport Name "phi" SID "4501" Position [995, 188, 1025, 202] IconDisplay "Port number" } Block { BlockType Outport Name "theta_coarse" SID "4502" Position [1100, 408, 1130, 422] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "vout" SID "4503" Position [1080, 553, 1110, 567] Port "3" IconDisplay "Port number" } Line { SrcBlock "Phase Err" SrcPort 1 DstBlock "Phase Diff Calc1" DstPort 1 } Line { SrcBlock "Times_Alpha" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 Points [45, 0] Branch { DstBlock "theta_coarse" DstPort 1 } Branch { Points [0, 40] DstBlock "Register" DstPort 1 } } Line { SrcBlock "Phase Diff Calc1" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Vin" SrcPort 1 Points [225, 0; 0, 50] Branch { Points [0, 105] DstBlock "vout" DstPort 1 } Branch { Points [215, 0; 0, 60; 300, 0] DstBlock "Register" DstPort 3 } } Line { SrcBlock "Convert" SrcPort 1 Points [180, 0] Branch { Points [0, 200] DstBlock "Times_Alpha" DstPort 1 } Branch { DstBlock "phi" DstPort 1 } } Line { SrcBlock "Rst" SrcPort 1 Points [295, 0; 0, 265; 440, 0; 0, -60] DstBlock "Register" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 Points [-45, 0] Branch { Points [0, -40] DstBlock "AddSub1" DstPort 2 } Branch { Points [-145, 0; 0, -100; -390, 0; 0, -165] DstBlock "Phase Diff Calc1" DstPort 2 } } } } Block { BlockType Reference Name "Convert1" SID "4504" Ports [1, 1] Position [985, 162, 1020, 178] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "4505" Ports [1, 1] Position [675, 197, 710, 213] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "16" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "DDS Compiler 4.0 " SID "9370" Ports [2, 2] Position [845, 199, 935, 226] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/DDS Compiler 4.0 " SourceType "Xilinx DDS Compiler 4.0 Block" partspresent "SIN_COS_LUT_only" dds_clock_rate "100" channels "1" parameter_entry "Hardware_Parameters" spurious_free_dynamic_range "36" frequency_resolution "0.4" noise_shaping "None" phase_width "16" output_width "16" output_selection "Sine_and_Cosine" negative_sine on negative_cosine off amplitude_mode "Full_Range" memory_type "Auto" optimization_goal "Auto" dsp48_use "Minimal" latency_configuration "Auto" latency "6" has_phase_out off sclr_pin off clock_enable on rfd off rdy off channel_pin off explicit_period off period "1" phase_increment "Fixed" output_frequency1 "0" output_frequency2 "0" output_frequency3 "0" output_frequency4 "0" output_frequency5 "0" output_frequency6 "0" output_frequency7 "0" output_frequency8 "0" output_frequency9 "0" output_frequency10 "0" output_frequency11 "0" output_frequency12 "0" output_frequency13 "0" output_frequency14 "0" output_frequency15 "0" output_frequency16 "0" pinc1 "'0'" pinc2 "'0'" pinc3 "'0'" pinc4 "'0'" pinc5 "'0'" pinc6 "'0'" pinc7 "'0'" pinc8 "'0'" pinc9 "'0'" pinc10 "'0'" pinc11 "'0'" pinc12 "'0'" pinc13 "'0'" pinc14 "'0'" pinc15 "'0'" pinc16 "'0'" phase_offset "None" phase_offset_angles1 "0" phase_offset_angles2 "0" phase_offset_angles3 "0" phase_offset_angles4 "0" phase_offset_angles5 "0" phase_offset_angles6 "0" phase_offset_angles7 "0" phase_offset_angles8 "0" phase_offset_angles9 "0" phase_offset_angles10 "0" phase_offset_angles11 "0" phase_offset_angles12 "0" phase_offset_angles13 "0" phase_offset_angles14 "0" phase_offset_angles15 "0" phase_offset_angles16 "0" poff1 "'0'" poff2 "'0'" poff3 "'0'" poff4 "'0'" poff5 "'0'" poff6 "'0'" poff7 "'0'" poff8 "'0'" poff9 "'0'" poff10 "'0'" poff11 "'0'" poff12 "'0'" poff13 "'0'" poff14 "'0'" poff15 "'0'" poff16 "'0'" por_mode "false" gui_behaviour "Sysgen" ip_name "DDS Compiler" ip_version "4.0" dsptool_ready "true" wrapper_available "true" port_translation_map "{ 'ce' => 'en', 'sclr' => 'rst' }" ipcore_xco_need_fpga_part "true" ipcore_fpga_part "xlipgetpartsetting(gcb, {'virtex4', 'xc4vsx35', '-10', 'ff668'})" ipcore_usecache "true" ipcore_useipmodelcache "true" ipcore_verbose "false" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dds_compiler_v4_0" sg_icon_stat "90,27,2,2,white,blue,0,393abcb7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 90 90 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 90 90 0 0 ],[0 0 27 27 0 ]);\npatch([38.325 42.66 45.66 48.66 51.66 45.66 41.325 38.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([41.325 45.66 42.66 38.325 41.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([38.325 42.66 45.66 41.325 38.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([41.325 51.66 48.66 45.66 42.66 38.325 41.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'phase_in');\ncolor('black');port_label('input',2,'en');\ncolor('black');por" "t_label('output',1,'sine');\ncolor('black');port_label('output',2,'cosine');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Delay1" SID "4506" Ports [1, 1] Position [795, 436, 835, 454] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "4507" Ports [1, 1] Position [795, 366, 835, 384] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "4508" Ports [1, 1] Position [1105, 425, 1135, 455] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample2" SID "4509" Ports [1, 1] Position [1105, 355, 1135, 385] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "4510" Ports [1, 1] Position [1105, 270, 1135, 300] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "4511" Ports [1, 1] Position [1105, 200, 1135, 230] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Fine Tracking" SID "4512" Ports [5, 3] Position [520, 184, 625, 306] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Fine Tracking" Location [2, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "phi" SID "4513" Position [275, 333, 305, 347] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "theta_coarse" SID "4514" Position [175, 183, 205, 197] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "4515" Position [140, 473, 170, 487] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "4516" Position [140, 443, 170, 457] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Sym Index" SID "4517" Position [140, 558, 170, 572] Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "1LSB" SID "4518" Ports [1, 1] Position [450, 843, 485, 857] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB" SID "4519" Ports [1, 1] Position [325, 580, 365, 600] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "ceil(log2(max_OFDM_symbols))-1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "8MSB" SID "4520" Ports [1, 1] Position [325, 555, 365, 575] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "ceil(log2(max_OFDM_symbols))-1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Accumulator1" SID "4521" Ports [3, 1] Position [545, 408, 595, 492] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. Output type and binary point position match the input.

Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to run " "at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "33" overflow "Flag as error" scale "1" rst on hasbypass off en on dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,457" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,84,3,1,white,blue,0,ee9eb47a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 84 84 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 84 84 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[49.7" "7 49.77 56.77 49.77 56.77 56.77 56.77 49.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[42.77 42.77 " "49.77 49.77 42.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[35.77 35.77 42.77 42.77 35." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[28.77 28.77 35.77 28.77 35.77 35.77 28.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label" "('input',3,'en');\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprintf('','COMMENT: end ico" "n text');" } Block { BlockType Reference Name "AddSub1" SID "4522" Ports [2, 1] Position [835, 186, 885, 259] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "16" quantization "Round (unbiased: +/- Inf)" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,73,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 73 73 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 73 73 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[43.7" "7 43.77 50.77 43.77 50.77 50.77 50.77 43.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[36.77 36.77 " "43.77 43.77 36.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[29.77 29.77 36.77 36.77 29." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[22.77 22.77 29.77 22.77 29.77 29.77 22.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub2" SID "4523" Ports [2, 1] Position [745, 328, 780, 432] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "32" bin_pt "28" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,104,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 104 104 0 ],[0.77 0." "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 104 104 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[57.55" " 57.55 62.55 57.55 62.55 62.55 62.55 57.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[52.55 52.55 57." "55 57.55 52.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[47.55 47.55 52.55 52.55 47.55 ]," "[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[42.55 42.55 47.55 42.55 47.55 47.55 42.55 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bla" "ck');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1" ",'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "4524" Ports [1, 1] Position [665, 746, 705, 764] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "4525" Ports [1, 1] Position [785, 731, 825, 749] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "4526" Ports [1, 1] Position [650, 196, 690, 214] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "4527" Ports [1, 1] Position [645, 346, 685, 364] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "4528" Position [640, 787, 765, 803] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType From Name "From2" SID "4529" Position [295, 517, 420, 533] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType Reference Name "Gateway Out1" SID "4530" Ports [1, 1] Position [1020, 124, 1055, 136] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out2" SID "4531" Ports [1, 1] Position [1020, 79, 1055, 91] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out3" SID "4532" Ports [1, 1] Position [1020, 139, 1055, 151] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out4" SID "4533" Ports [1, 1] Position [1020, 64, 1055, 76] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out5" SID "4534" Ports [1, 1] Position [1020, 154, 1055, 166] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out7" SID "4535" Ports [1, 1] Position [1020, 109, 1055, 121] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out8" SID "4536" Ports [1, 1] Position [1020, 94, 1055, 106] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "4537" Ports [1, 1] Position [810, 788, 835, 802] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "4538" Ports [1, 1] Position [810, 843, 835, 857] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "4539" Ports [3, 1] Position [1020, 735, 1055, 765] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,30,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 30 30 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('" "or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical1" SID "4540" Ports [2, 1] Position [870, 759, 910, 806] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "40,47,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 47 47 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 47 47 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[28.55 28." "55 33.55 28.55 33.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[23.55 23.55 28.55 2" "8.55 23.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[18.55 18.55 23.55 23.55 18.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[13.55 13.55 18.55 13.55 18.55 18.55 13.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4541" Ports [3, 1] Position [1025, 865, 1060, 895] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,30,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 30 30 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('" "or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical3" SID "4542" Ports [3, 1] Position [870, 811, 910, 859] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "40,48,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 48 48 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[29.55 29." "55 34.55 29.55 34.55 34.55 34.55 29.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[24.55 24.55 29.55 2" "9.55 24.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[19.55 19.55 24.55 24.55 19.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[14.55 14.55 19.55 14.55 19.55 19.55 14.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical4" SID "4543" Ports [3, 1] Position [870, 866, 910, 914] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "40,48,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 48 48 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[29.55 29." "55 34.55 29.55 34.55 34.55 34.55 29.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[24.55 24.55 29.55 2" "9.55 24.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[19.55 19.55 24.55 24.55 19.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[14.55 14.55 19.55 14.55 19.55 19.55 14.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult3" SID "4544" Ports [2, 1] Position [645, 437, 695, 488] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "32" bin_pt "28" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,460" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('bl" "ack');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "4545" Ports [3, 1] Position [490, 530, 510, 600] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "20,70,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 10 60 70 0 ],[0.77 0.8" "2 0.91 ]);\nplot([0 20 20 0 0 ],[0 10 60 70 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[37.22 3" "7.22 39.22 37.22 39.22 39.22 39.22 37.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[35.22 35.22 37.22 37." "22 35.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[33.22 33.22 35.22 35.22 33.22 ],[1 1 1 ])" ";\npatch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[31.22 31.22 33.22 31.22 33.22 33.22 31.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\n" "\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "ROM" SID "4546" Ports [2, 1] Position [550, 546, 605, 624] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "floor(max_OFDM_symbols/2)" initVector "0.5./[1:floor(max_OFDM_symbols/2)]" distributed_mem "Block RAM" rst off init_reg "0" en on latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "16" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,78,2,1,white,blue,0,68cc4267,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 78 78 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 78 78 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[46" ".77 46.77 53.77 46.77 53.77 53.77 53.77 46.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[39.77 39." "77 46.77 46.77 39.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[32.77 32.77 39.77 39.7" "7 32.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[25.77 25.77 32.77 25.77 32.77 32.77" " 25.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');" "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register" SID "4547" Ports [3, 1] Position [555, 335, 600, 375] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "45,40,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 40 40 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input" "',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "4548" Ports [3, 1] Position [390, 185, 435, 225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "45,40,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 40 40 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input" "',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "Scale4" SID "4549" Ports [1, 1] Position [530, 177, 585, 233] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting the binary point position.

Hardware notes: In ha" "rdware this block costs nothing." scale_factor "0" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1.3" sg_icon_stat "55,56,1,1,white,blue,0,e7f93c29,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 56 56 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[35" ".77 35.77 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[28.77 28." "77 35.77 35.77 28.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[21.77 21.77 28.77 28.7" "7 21.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[14.77 14.77 21.77 14.77 21.77 21.77" " 14.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\ncolor('black');disp('\\bf{2^{0}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Times_Beta" SID "4550" Ports [1, 1] Position [425, 408, 465, 432] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Times_Beta" Location [202, 70, 1799, 1056] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "M" SID "4551" Position [25, 58, 55, 72] IconDisplay "Port number" } Block { BlockType Reference Name "Mult_0.5" SID "4552" Ports [1, 1] Position [110, 54, 150, 76] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting the binary point position.

Hardware notes: In ha" "rdware this block costs nothing." scale_factor "-1" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "scale" block_version "8.2.01" sg_icon_stat "40,22,1,1,white,blue,0,315b7d78,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('\\bf{2^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "P" SID "4553" Position [220, 58, 250, 72] IconDisplay "Port number" } Line { SrcBlock "Mult_0.5" SrcPort 1 DstBlock "P" DstPort 1 } Line { SrcBlock "M" SrcPort 1 DstBlock "Mult_0.5" DstPort 1 } Annotation { Name "We found in hardware that a value of 0.5\nalways worked, so we optimized away\nthe constant and multi" "plier altogether" Position [157, 129] } } } Block { BlockType SubSystem Name "Times_Gamma" SID "4554" Ports [1, 1] Position [425, 328, 465, 352] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Times_Gamma" Location [412, 217, 632, 320] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "M" SID "4555" Position [25, 58, 55, 72] IconDisplay "Port number" } Block { BlockType Reference Name "Mult_0.5" SID "4556" Ports [1, 1] Position [110, 54, 150, 76] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting the binary point position.

Hardware notes: In ha" "rdware this block costs nothing." scale_factor "-1" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "scale" block_version "8.2.01" sg_icon_stat "40,22,1,1,white,blue,0,315b7d78,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('\\bf{2^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "P" SID "4557" Position [250, 58, 280, 72] IconDisplay "Port number" } Line { SrcBlock "M" SrcPort 1 Points [15, 0] Branch { DstBlock "Mult_0.5" DstPort 1 } Branch { Points [0, -40; 170, 0] } } Line { SrcBlock "Mult_0.5" SrcPort 1 DstBlock "P" DstPort 1 } Annotation { Name "We found in hardware that a value of 0.5\nalways worked, so we optimized away\nthe constant and multi" "plier altogether" Position [157, 129] } } } Block { BlockType Outport Name "theta" SID "4558" Position [1005, 218, 1035, 232] IconDisplay "Port number" } Block { BlockType Outport Name "r0_vout" SID "4559" Position [1115, 743, 1145, 757] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "r1_vout" SID "4560" Position [1110, 873, 1140, 887] Port "3" IconDisplay "Port number" } Line { SrcBlock "AddSub1" SrcPort 1 Points [45, 0] Branch { Points [0, -65] DstBlock "Gateway Out5" DstPort 1 } Branch { DstBlock "theta" DstPort 1 } } Line { SrcBlock "Times_Beta" SrcPort 1 DstBlock "Accumulator1" DstPort 1 } Line { SrcBlock "theta_coarse" SrcPort 1 Points [75, 0] Branch { DstBlock "Register1" DstPort 1 } Branch { Points [0, -105] DstBlock "Gateway Out2" DstPort 1 } } Line { SrcBlock "phi" SrcPort 1 Points [85, 0] Branch { DstBlock "Times_Gamma" DstPort 1 } Branch { Points [0, 80] DstBlock "Times_Beta" DstPort 1 } Branch { Points [0, -35; -35, 0; 0, -205] DstBlock "Gateway Out8" DstPort 1 } } Line { SrcBlock "Times_Gamma" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Accumulator1" SrcPort 1 DstBlock "Mult3" DstPort 1 } Line { SrcBlock "ROM" SrcPort 1 Points [10, 0; 0, -110] DstBlock "Mult3" DstPort 2 } Line { SrcBlock "Sym Index" SrcPort 1 Points [125, 0] Branch { DstBlock "8MSB" DstPort 1 } Branch { Points [0, 25] Branch { DstBlock "8LSB" DstPort 1 } Branch { Points [0, 260] DstBlock "1LSB" DstPort 1 } } } Line { SrcBlock "Mult3" SrcPort 1 Points [15, 0; 0, -60] Branch { DstBlock "AddSub2" DstPort 2 } Branch { Points [0, -275] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "AddSub2" SrcPort 1 Points [15, 0; 0, -140] DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Rst" SrcPort 1 Points [75, 0] Branch { Points [270, 0] Branch { DstBlock "Accumulator1" DstPort 2 } Branch { Points [0, -95] DstBlock "Register" DstPort 2 } Branch { Points [-270, 0; 0, 290] DstBlock "Delay2" DstPort 1 } } Branch { Points [0, -245] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "Vin" SrcPort 1 Points [90, 0] Branch { Points [105, 0] Branch { Points [-105, 0] Branch { DstBlock "Accumulator1" DstPort 3 } Branch { Points [0, 0; 0, 160] Branch { Points [0, 115] DstBlock "Delay1" DstPort 1 } Branch { Points [270, 0] DstBlock "ROM" DstPort 2 } } } Branch { Points [0, -110] DstBlock "Register" DstPort 3 } } Branch { Points [0, -260] Branch { DstBlock "Register1" DstPort 3 } Branch { Points [0, -150] DstBlock "Gateway Out4" DstPort 1 } } } Line { SrcBlock "8MSB" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Delay1" SrcPort 1 Points [145, 0; 0, 15] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "Logical3" DstPort 1 } Branch { DstBlock "Logical4" DstPort 1 } } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "r0_vout" DstPort 1 } Line { SrcBlock "1LSB" SrcPort 1 Points [295, 0] Branch { DstBlock "Inverter2" DstPort 1 } Branch { Points [0, 55] DstBlock "Logical4" DstPort 3 } } Line { SrcBlock "Delay2" SrcPort 1 Points [165, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 130] DstBlock "Logical2" DstPort 1 } } Line { SrcBlock "Register" SrcPort 1 DstBlock "Delay4" DstPort 1 } Line { SrcBlock "Scale4" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter1" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "Logical3" DstPort 2 } Branch { Points [0, 55] DstBlock "Logical4" DstPort 2 } } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [45, 0; 0, -35; 30, 0] Branch { DstBlock "Logical" DstPort 2 } Branch { Points [0, 130] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical3" DstPort 3 } Line { SrcBlock "Logical3" SrcPort 1 Points [55, 0; 0, -75] DstBlock "Logical" DstPort 3 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Logical2" DstPort 3 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "r1_vout" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Scale4" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 Points [80, 0] Branch { DstBlock "AddSub1" DstPort 1 } Branch { Points [0, -60] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "Gateway Out8" SrcPort 1 Points [45, 0] } Line { SrcBlock "Gateway Out7" SrcPort 1 Points [45, 0] } Line { SrcBlock "Gateway Out2" SrcPort 1 Points [45, 0] } Line { SrcBlock "Gateway Out1" SrcPort 1 Points [45, 0] } Line { SrcBlock "Gateway Out3" SrcPort 1 Points [45, 0] } Line { SrcBlock "Gateway Out4" SrcPort 1 Points [45, 0] } Line { SrcBlock "Gateway Out5" SrcPort 1 Points [45, 0] } Line { SrcBlock "Delay4" SrcPort 1 Points [10, 0] Branch { DstBlock "AddSub2" DstPort 1 } Branch { Points [0, -240] DstBlock "Gateway Out7" DstPort 1 } } Line { SrcBlock "From2" SrcPort 1 Points [50, 0] DstBlock "Mux" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "ROM" DstPort 1 } Line { SrcBlock "8LSB" SrcPort 1 DstBlock "Mux" DstPort 3 } Annotation { Name "Assert Vout on reset, so the sin/cos lookup\noutputs exp(j*0) instead of its last value\nfor the begi" "nning of the next packet." Position [812, 696] } Annotation { Name "In Alamouti mode, capture sequential phase error\nvalues for use in correcting phases in pairs of sym" "bols\nbefore STBC decoding. In SISO/Multiplexing mode,\ncapture only the current phase error value." Position [1167, 819] } } } Block { BlockType Reference Name "Gateway Out" SID "4561" Ports [1, 1] Position [1170, 529, 1200, 541] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out1" SID "4562" Ports [1, 1] Position [1170, 544, 1200, 556] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out2" SID "4563" Ports [1, 1] Position [1170, 559, 1200, 571] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out3" SID "4564" Ports [1, 1] Position [1170, 574, 1200, 586] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out4" SID "4565" Ports [1, 1] Position [1170, 589, 1200, 601] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out5" SID "4566" Ports [1, 1] Position [1170, 604, 1200, 616] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "4567" Ports [2, 1] Position [775, 210, 800, 230] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,20,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12" ".22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12." "22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "4568" Ports [2, 1] Position [1025, 196, 1065, 229] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "40,33,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolo" "r('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register3" SID "4569" Ports [2, 1] Position [1025, 266, 1065, 299] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "40,33,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolo" "r('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register4" SID "4570" Ports [2, 1] Position [1025, 351, 1065, 384] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "40,33,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolo" "r('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register5" SID "4571" Ports [2, 1] Position [1025, 421, 1065, 454] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "40,33,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolo" "r('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Rx_debug_PhaseCorrect" SID "4572" Ports [1, 1] Position [1120, 165, 1155, 175] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.985 0.979 0.895 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.985 0.979 0.8" "95 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprint" "f('','COMMENT: end icon text');" } Block { BlockType Outport Name "Phases_I" SID "4575" Position [1330, 398, 1360, 412] IconDisplay "Port number" } Block { BlockType Outport Name "Phases_Q" SID "4576" Position [1330, 243, 1360, 257] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Line { SrcBlock "Phase Err" SrcPort 1 DstBlock "Coarse Tracking" DstPort 1 } Line { SrcBlock "Vin" SrcPort 1 DstBlock "Coarse Tracking" DstPort 2 } Line { SrcBlock "Coarse Tracking" SrcPort 1 DstBlock "Fine Tracking" DstPort 1 } Line { SrcBlock "Coarse Tracking" SrcPort 2 DstBlock "Fine Tracking" DstPort 2 } Line { SrcBlock "Sym Index" SrcPort 1 DstBlock "Fine Tracking" DstPort 5 } Line { SrcBlock "Coarse Tracking" SrcPort 3 DstBlock "Fine Tracking" DstPort 3 } Line { SrcBlock "Fine Tracking" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Reset" SrcPort 1 Points [50, 0] Branch { DstBlock "Coarse Tracking" DstPort 3 } Branch { Points [0, 25] Branch { DstBlock "Fine Tracking" DstPort 4 } Branch { Points [0, 265] DstBlock "Gateway Out" DstPort 1 } } } Line { SrcBlock "DDS Compiler 4.0 " SrcPort 1 Points [40, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, 70] Branch { DstBlock "Register3" DstPort 1 } Branch { Points [0, 320] DstBlock "Gateway Out4" DstPort 1 } } } Line { SrcBlock "DDS Compiler 4.0 " SrcPort 2 Points [35, 0; 0, 140] Branch { DstBlock "Register4" DstPort 1 } Branch { Points [0, 70] Branch { DstBlock "Register5" DstPort 1 } Branch { Points [0, 150] DstBlock "Gateway Out3" DstPort 1 } } } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Rx_debug_PhaseCorrect" DstPort 1 } Line { SrcBlock "Fine Tracking" SrcPort 2 Points [60, 0] Branch { Points [0, -30] DstBlock "Logical" DstPort 1 } Branch { Points [0, 130] Branch { DstBlock "Delay3" DstPort 1 } Branch { Points [0, 175] DstBlock "Gateway Out1" DstPort 1 } } } Line { SrcBlock "Convert2" SrcPort 1 Points [35, 0] Branch { Points [0, -35] DstBlock "Convert1" DstPort 1 } Branch { DstBlock "DDS Compiler 4.0 " DstPort 1 } } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock "Bus\nCreator1" DstPort 1 } Line { SrcBlock "Bus\nCreator1" SrcPort 1 DstBlock "Phases_Q" DstPort 1 } Line { SrcBlock "Bus\nCreator2" SrcPort 1 DstBlock "Phases_I" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Bus\nCreator1" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "Bus\nCreator2" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Bus\nCreator2" DstPort 2 } Line { SrcBlock "Fine Tracking" SrcPort 3 Points [70, 0] Branch { Points [0, -60] DstBlock "Logical" DstPort 2 } Branch { Points [0, 160] Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, 120] DstBlock "Gateway Out2" DstPort 1 } } } Line { SrcBlock "Delay3" SrcPort 1 Points [155, 0] Branch { Points [0, -155] DstBlock "Register2" DstPort 2 } Branch { DstBlock "Register4" DstPort 2 } } Line { SrcBlock "Delay1" SrcPort 1 Points [160, 0] Branch { Points [0, -155] DstBlock "Register3" DstPort 2 } Branch { DstBlock "Register5" DstPort 2 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "DDS Compiler 4.0 " DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 Points [10, 0] Branch { DstBlock "Down Sample4" DstPort 1 } Branch { Points [0, 395] DstBlock "Gateway Out5" DstPort 1 } } Line { SrcBlock "Register3" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Register4" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Register5" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Gateway Out" SrcPort 1 Points [40, 0] } Line { SrcBlock "Gateway Out1" SrcPort 1 Points [40, 0] } Line { SrcBlock "Gateway Out2" SrcPort 1 Points [40, 0] } Line { SrcBlock "Gateway Out3" SrcPort 1 Points [40, 0] } Line { SrcBlock "Gateway Out4" SrcPort 1 Points [40, 0] } Line { SrcBlock "Gateway Out5" SrcPort 1 Points [40, 0] } Annotation { Name "http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1683187" Position [341, 584] } Annotation { Name "Adapted from the phase tracking system described by Akita, Sakata and Sato" Position [341, 564] } Annotation { Name "http://sciencelinks.jp/j-east/article/200415/000020041504A0494348.php" Position [341, 639] } Annotation { Name "http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1405003" Position [341, 614] } } } Block { BlockType SubSystem Name "Pilot Phase Error Calc" SID "4577" Ports [10, 4] Position [450, 303, 540, 452] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Pilot Phase Error Calc" Location [2, 74, 1910, 1156] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "127" Block { BlockType Inport Name "Raw I" SID "4578" Position [60, 453, 90, 467] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Raw Q" SID "4579" Position [60, 473, 90, 487] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Xk_index" SID "4580" Position [60, 413, 90, 427] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Sym Index" SID "4581" Position [60, 378, 90, 392] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "H_AA I" SID "4582" Position [315, 248, 345, 262] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "H_AA Q" SID "4583" Position [315, 273, 345, 287] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "H_BA I" SID "4584" Position [230, 298, 260, 312] NamePlacement "alternate" FontName "Arial" Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "H_BA Q" SID "4585" Position [230, 323, 260, 337] Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "Train" SID "4586" Position [15, 223, 45, 237] NamePlacement "alternate" Port "9" IconDisplay "Port number" } Block { BlockType Inport Name "Rst " SID "4587" Position [20, 278, 50, 292] NamePlacement "alternate" Port "10" IconDisplay "Port number" } Block { BlockType SubSystem Name "Averager" SID "4588" Ports [5, 3] Position [870, 205, 955, 285] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Averager" Location [2, 74, 1654, 956] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "105" Block { BlockType Inport Name "Rst" SID "4589" Position [255, 528, 285, 542] IconDisplay "Port number" } Block { BlockType Inport Name "d(Phase)" SID "4590" Position [115, 283, 145, 297] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "4591" Position [115, 333, 145, 347] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Use Both" SID "4592" Position [115, 593, 145, 607] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Sym Index" SID "4593" Position [130, 733, 160, 747] Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "17LSB" SID "4594" Ports [1, 1] Position [640, 278, 675, 292] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "17" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "17LSB1" SID "4595" Ports [1, 1] Position [640, 363, 675, 377] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "17" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Accumulator" SID "4596" Ports [3, 1] Position [450, 278, 495, 352] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. Output type and binary point position match the input.

Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to run " "at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "18" overflow "Flag as error" scale "1" rst on hasbypass off en on dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,367,457" block_type "accum" block_version "10.1.2" sg_icon_stat "45,74,3,1,white,blue,0,ee9eb47a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 74 74 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 74 74 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[43.66 4" "3.66 49.66 43.66 49.66 49.66 49.66 43.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[37.66 37.66 43.66 " "43.66 37.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[31.66 31.66 37.66 37.66 31.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[25.66 25.66 31.66 25.66 31.66 31.66 25.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Accumulator1" SID "4597" Ports [3, 1] Position [450, 358, 495, 432] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. Output type and binary point position match the input.

Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to run " "at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "18" overflow "Flag as error" scale "1" rst on hasbypass off en on dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,367,457" block_type "accum" block_version "10.1.2" sg_icon_stat "45,74,3,1,white,blue,0,ee9eb47a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 74 74 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 74 74 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[43.66 4" "3.66 49.66 43.66 49.66 49.66 49.66 43.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[37.66 37.66 43.66 " "43.66 37.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[31.66 31.66 37.66 37.66 31.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[25.66 25.66 31.66 25.66 31.66 31.66 25.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Calc Mode Sel" SID "4598" Ports [3, 1] Position [465, 195, 540, 235] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Calc Mode Sel" Location [2, 74, 1670, 956] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "172" Block { BlockType Inport Name "Phase" SID "4599" Position [100, 163, 130, 177] IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "4600" Position [165, 193, 195, 207] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "4601" Position [165, 228, 195, 242] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "2MSB" SID "4602" Ports [1, 1] Position [230, 162, 265, 178] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "4603" Ports [0, 1] Position [230, 274, 260, 296] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "3" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "30,22,0,1,white,blue,0,279a71c8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('output',1,'3');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "4604" Ports [0, 1] Position [230, 134, 260, 156] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "30,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "4605" Ports [2, 1] Position [365, 150, 390, 190] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,40,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 40 40 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[23.33 " "23.33 26.33 23.33 26.33 26.33 26.33 23.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[20.33 20.33 23.33" " 23.33 20.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[17.33 17.33 20.33 20.33 17.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[14.33 14.33 17.33 14.33 17.33 17.33 14.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4606" Ports [2, 1] Position [365, 245, 390, 285] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,40,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 40 40 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[23.33 " "23.33 26.33 23.33 26.33 26.33 26.33 23.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[20.33 20.33 23.33" " 23.33 20.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[17.33 17.33 20.33 20.33 17.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[14.33 14.33 17.33 14.33 17.33 17.33 14.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "4607" Ports [2, 1] Position [530, 175, 555, 215] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,40,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 40 40 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[23.33 " "23.33 26.33 23.33 26.33 26.33 26.33 23.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[20.33 20.33 23.33" " 23.33 20.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[17.33 17.33 20.33 20.33 17.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[14.33 14.33 17.33 14.33 17.33 17.33 14.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "4608" Ports [2, 1] Position [295, 131, 330, 184] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,53,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 53 53 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[31.55 31." "55 36.55 31.55 36.55 36.55 36.55 31.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 3" "1.55 26.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[21.55 21.55 26.55 26.55 21.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[16.55 16.55 21.55 16.55 21.55 21.55 16.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "4609" Ports [2, 1] Position [295, 246, 330, 299] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "35,53,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 53 53 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[31.55 31." "55 36.55 31.55 36.55 36.55 36.55 31.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 3" "1.55 26.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[21.55 21.55 26.55 26.55 21.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[16.55 16.55 21.55 16.55 21.55 21.55 16.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "SR - SmallNeg" SID "4610" Ports [2, 1] Position [435, 253, 475, 302] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR - SmallNeg" Location [2, 74, 1670, 956] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "4611" Position [175, 163, 205, 177] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "4612" Position [105, 153, 135, 167] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "4613" Ports [0, 1] Position [165, 142, 185, 158] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register5" SID "4614" Ports [3, 1] Position [230, 145, 255, 175] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,30,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 30 30 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[18.33 " "18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[15.33 15.33 18.33" " 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en" "');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMM" "ENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4615" Position [280, 153, 310, 167] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register5" DstPort 3 } Line { SrcBlock "Register5" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register5" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register5" DstPort 1 } } } Block { BlockType SubSystem Name "SR - SmallPos" SID "4616" Ports [2, 1] Position [435, 158, 475, 207] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR - SmallPos" Location [2, 74, 1670, 956] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "4617" Position [175, 163, 205, 177] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "4618" Position [105, 153, 135, 167] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "4619" Ports [0, 1] Position [165, 142, 185, 158] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register5" SID "4620" Ports [3, 1] Position [230, 145, 255, 175] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,30,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 30 30 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[18.33 " "18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[15.33 15.33 18.33" " 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en" "');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMM" "ENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4621" Position [280, 153, 310, 167] IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register5" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register5" DstPort 2 } Line { SrcBlock "Register5" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register5" DstPort 3 } } } Block { BlockType Outport Name "UseSigned" SID "4622" Position [600, 188, 630, 202] IconDisplay "Port number" } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "2MSB" SrcPort 1 Points [0, 0] Branch { DstBlock "Relational" DstPort 2 } Branch { Points [0, 90] DstBlock "Relational1" DstPort 1 } } Line { SrcBlock "Relational" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "SR - SmallPos" DstPort 1 } Line { SrcBlock "Phase" SrcPort 1 DstBlock "2MSB" DstPort 1 } Line { SrcBlock "SR - SmallPos" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 Points [210, 0] Branch { Points [0, -40] DstBlock "SR - SmallPos" DstPort 2 } Branch { Points [0, 55] DstBlock "SR - SmallNeg" DstPort 2 } } Line { SrcBlock "Vin" SrcPort 1 Points [135, 0] Branch { Points [0, -20] DstBlock "Logical1" DstPort 2 } Branch { Points [0, 55] DstBlock "Logical2" DstPort 1 } } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "SR - SmallNeg" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "SR - SmallNeg" SrcPort 1 Points [15, 0; 0, -75] DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "UseSigned" DstPort 1 } } } Block { BlockType Reference Name "Concat" SID "4623" Ports [2, 1] Position [725, 243, 750, 267] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,165" block_type "concat" block_version "10.1.3" sg_icon_stat "25,24,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','te" "xmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "4624" Ports [2, 1] Position [435, 518, 470, 562] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "3" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,44,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 44 44 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "4625" Ports [1, 1] Position [650, 551, 680, 569] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "3" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "30,18,1,1,white,blue,0,83e6bb61,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-3}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "4626" Ports [1, 1] Position [455, 731, 495, 749] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "4627" Position [25, 617, 150, 633] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType Reference Name "Gateway Out1" SID "4628" Ports [1, 1] Position [950, 199, 985, 211] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out10" SID "4629" Ports [1, 1] Position [950, 174, 985, 186] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out2" SID "4630" Ports [1, 1] Position [950, 74, 985, 86] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out7" SID "4631" Ports [1, 1] Position [950, 124, 985, 136] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out8" SID "4632" Ports [1, 1] Position [950, 99, 985, 111] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out9" SID "4633" Ports [1, 1] Position [950, 149, 985, 161] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "4634" Ports [1, 1] Position [195, 618, 220, 632] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,251" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "4635" Ports [2, 1] Position [260, 587, 285, 638] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,51,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 51 51 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[28.33 " "28.33 31.33 28.33 31.33 31.33 31.33 28.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[25.33 25.33 28.33" " 28.33 25.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[22.33 22.33 25.33 25.33 22.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[19.33 19.33 22.33 19.33 22.33 22.33 19.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4636" Ports [2, 1] Position [305, 519, 330, 541] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "4637" Ports [3, 1] Position [475, 605, 495, 675] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "20,70,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 10 60 70 0 ],[0.77 0.8" "2 0.91 ]);\nplot([0 20 20 0 0 ],[0 10 60 70 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[37.22 3" "7.22 39.22 37.22 39.22 39.22 39.22 37.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[35.22 35.22 37.22 37." "22 35.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[33.22 33.22 35.22 35.22 33.22 ],[1 1 1 ])" ";\npatch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[31.22 31.22 33.22 31.22 33.22 33.22 31.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\n" "\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "4638" Ports [5, 1] Position [810, 237, 830, 393] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "10.1.3" sg_icon_stat "20,156,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 22.2857 133.714 156 0 " "],[0.77 0.82 0.91 ]);\nplot([0 20 20 0 0 ],[0 22.2857 133.714 156 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.4" "4 7.55 5.55 ],[80.22 80.22 82.22 80.22 82.22 82.22 82.22 80.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ]," "[78.22 78.22 80.22 80.22 78.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[76.22 76.22 78.22 7" "8.22 76.22 ],[1 1 1 ]);\npatch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[74.22 74.22 76.22 74.22 76.22 76.22 74." "22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_lab" "el('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\nc" "olor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "4639" Ports [2, 1] Position [585, 88, 610, 117] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,29,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 29 29 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[17.33 " "17.33 20.33 17.33 20.33 20.33 20.33 17.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[14.33 14.33 17.33" " 17.33 14.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[11.33 11.33 14.33 14.33 11.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[8.33 8.33 11.33 8.33 11.33 11.33 8.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q'" ");\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register2" SID "4640" Ports [2, 1] Position [585, 63, 610, 92] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,29,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 29 29 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[17.33 " "17.33 20.33 17.33 20.33 20.33 20.33 17.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[14.33 14.33 17.33" " 17.33 14.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[11.33 11.33 14.33 14.33 11.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[8.33 8.33 11.33 8.33 11.33 11.33 8.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q'" ");\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register3" SID "4641" Ports [2, 1] Position [890, 163, 915, 192] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,29,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 29 29 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[17.33 " "17.33 20.33 17.33 20.33 20.33 20.33 17.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[14.33 14.33 17.33" " 17.33 14.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[11.33 11.33 14.33 14.33 11.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[8.33 8.33 11.33 8.33 11.33 11.33 8.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q'" ");\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Reinterpret" SID "4642" Ports [1, 1] Position [375, 282, 400, 298] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal betw" "een signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothin" "g.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to " "unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of " "56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt off bin_pt "0" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpr" "et');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret1" SID "4643" Ports [1, 1] Position [710, 362, 735, 378] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal betw" "een signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothin" "g.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to " "unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of " "56 (111000 in binary)." force_arith_type on arith_type "Signed (2's comp)" force_bin_pt on bin_pt "17" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpr" "et');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret2" SID "4644" Ports [1, 1] Position [710, 277, 735, 293] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal betw" "een signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothin" "g.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to " "unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of " "56 (111000 in binary)." force_arith_type on arith_type "Signed (2's comp)" force_bin_pt on bin_pt "17" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpr" "et');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret3" SID "4645" Ports [1, 1] Position [710, 307, 735, 323] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal betw" "een signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothin" "g.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to " "unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of " "56 (111000 in binary)." force_arith_type on arith_type "Signed (2's comp)" force_bin_pt on bin_pt "18" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpr" "et');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret4" SID "4646" Ports [1, 1] Position [710, 387, 735, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal betw" "een signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothin" "g.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to " "unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of " "56 (111000 in binary)." force_arith_type on arith_type "Signed (2's comp)" force_bin_pt on bin_pt "18" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpr" "et');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational6" SID "4647" Ports [2, 1] Position [585, 524, 620, 591] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 3 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,67,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38." "55 43.55 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 3" "8.55 33.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Scale" SID "4648" Ports [1, 1] Position [585, 273, 620, 297] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting the binary point position.

Hardware notes: In ha" "rdware this block costs nothing." scale_factor "-1" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1.2" sg_icon_stat "35,24,1,1,white,blue,0,315b7d78,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('\\bf{2^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Scale1" SID "4649" Ports [1, 1] Position [585, 303, 620, 327] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting the binary point position.

Hardware notes: In ha" "rdware this block costs nothing." scale_factor "-2" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1.2" sg_icon_stat "35,24,1,1,white,blue,0,0459bb18,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('\\bf{2^{-2}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Scale2" SID "4650" Ports [1, 1] Position [585, 358, 620, 382] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting the binary point position.

Hardware notes: In ha" "rdware this block costs nothing." scale_factor "-1" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1.2" sg_icon_stat "35,24,1,1,white,blue,0,315b7d78,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('\\bf{2^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Scale3" SID "4651" Ports [1, 1] Position [585, 383, 620, 407] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting the binary point position.

Hardware notes: In ha" "rdware this block costs nothing." scale_factor "-2" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1.2" sg_icon_stat "35,24,1,1,white,blue,0,0459bb18,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('\\bf{2^{-2}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "inv 2pi1" SID "4653" Ports [0, 1] Position [375, 653, 410, 677] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "4" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,0,1,white,blue,0,85f36853,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('output',1,'4');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "inv 2pi4" SID "4654" Ports [0, 1] Position [375, 628, 410, 652] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('output',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "posedge" SID "4655" Ports [1, 1] Position [770, 491, 825, 509] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge" Location [2, 74, 1670, 956] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "4656" Position [25, 25, 55, 40] BlockRotation 270 BlockMirror on IconDisplay "Port number" } Block { BlockType Reference Name "Inverter" SID "4657" Ports [1, 1] Position [65, 70, 100, 90] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,201" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,e69ac283,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\nnot');\nfprintf('','COMMENT: end icon text'" ");" } Block { BlockType Reference Name "Logical1" SID "4658" Ports [2, 1] Position [130, 48, 175, 92] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4659" Position [200, 63, 230, 77] IconDisplay "Port number" } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 0, 15] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, 20] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 Points [0, 0] DstBlock "Q" DstPort 1 } } } Block { BlockType Outport Name "Phase Err" SID "4660" Position [1015, 308, 1045, 322] IconDisplay "Port number" } Block { BlockType Outport Name "Vout" SID "4661" Position [1005, 493, 1035, 507] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name " Sym Index" SID "4662" Position [1010, 733, 1040, 747] Port "3" IconDisplay "Port number" } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Relational6" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 Points [45, 0; 0, -65] DstBlock "Relational6" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 Points [10, 0] Branch { DstBlock "Counter1" DstPort 1 } Branch { Points [0, -135] Branch { DstBlock "Accumulator1" DstPort 2 } Branch { Points [0, -80] Branch { DstBlock "Accumulator" DstPort 2 } Branch { Points [0, -85] DstBlock "Calc Mode Sel" DstPort 3 } } } } Line { SrcBlock "Relational6" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 Points [25, 0] Branch { Points [0, -145] DstBlock "Register3" DstPort 1 } Branch { DstBlock "Phase Err" DstPort 1 } } Line { SrcBlock "Rst" SrcPort 1 Points [0, 0] Branch { DstBlock "Logical2" DstPort 2 } Branch { Points [0, -60; 635, 0; 0, -270] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "inv 2pi4" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "inv 2pi1" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Scale" SrcPort 1 DstBlock "17LSB" DstPort 1 } Line { SrcBlock "Scale1" SrcPort 1 DstBlock "Reinterpret3" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [20, 0] Branch { DstBlock "Mux" DstPort 1 } Branch { Points [0, -40; -65, 0; 0, -315] DstBlock "Concat" DstPort 2 } } Line { SrcBlock "Delay" SrcPort 1 Points [10, 0; 0, -60] Branch { Points [-430, 0; 0, 25] DstBlock "Logical2" DstPort 1 } Branch { DstBlock "posedge" DstPort 1 } } Line { SrcBlock "posedge" SrcPort 1 Points [35, 0] Branch { DstBlock "Vout" DstPort 1 } Branch { Points [0, -315] DstBlock "Register3" DstPort 2 } } Line { SrcBlock "Gateway Out8" SrcPort 1 Points [60, 0] } Line { SrcBlock "Gateway Out7" SrcPort 1 Points [60, 0] } Line { SrcBlock "Gateway Out9" SrcPort 1 Points [60, 0] } Line { SrcBlock "Gateway Out10" SrcPort 1 Points [60, 0] } Line { SrcBlock "Accumulator" SrcPort 1 Points [60, 0] Branch { DstBlock "Scale1" DstPort 1 } Branch { Points [0, -30] Branch { DstBlock "Scale" DstPort 1 } Branch { Points [0, -155] DstBlock "Gateway Out7" DstPort 1 } } } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Gateway Out8" DstPort 1 } Line { SrcBlock "Reinterpret" SrcPort 1 Points [15, 0] Branch { DstBlock "Accumulator" DstPort 1 } Branch { Points [0, -195] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "Gateway Out2" SrcPort 1 Points [60, 0] } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Gateway Out2" DstPort 1 } Line { SrcBlock "Reinterpret2" SrcPort 1 Points [50, 0] Branch { DstBlock "Mux1" DstPort 2 } Branch { Points [0, -130] DstBlock "Gateway Out9" DstPort 1 } } Line { SrcBlock "Reinterpret3" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "17LSB" SrcPort 1 DstBlock "Reinterpret2" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 DstBlock "Gateway Out10" DstPort 1 } Line { SrcBlock "Accumulator1" SrcPort 1 Points [60, 0] Branch { DstBlock "Scale3" DstPort 1 } Branch { Points [0, -25] DstBlock "Scale2" DstPort 1 } } Line { SrcBlock "Scale2" SrcPort 1 DstBlock "17LSB1" DstPort 1 } Line { SrcBlock "17LSB1" SrcPort 1 DstBlock "Reinterpret1" DstPort 1 } Line { SrcBlock "Scale3" SrcPort 1 DstBlock "Reinterpret4" DstPort 1 } Line { SrcBlock "Reinterpret1" SrcPort 1 Points [45, 0; 0, -25] DstBlock "Mux1" DstPort 4 } Line { SrcBlock "Reinterpret4" SrcPort 1 Points [55, 0] DstBlock "Mux1" DstPort 5 } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Mux1" DstPort 1 } Line { SrcBlock "Calc Mode Sel" SrcPort 1 Points [155, 0; 0, 35] DstBlock "Concat" DstPort 1 } Line { SrcBlock "Gateway Out1" SrcPort 1 Points [60, 0] } Line { SrcBlock "d(Phase)" SrcPort 1 Points [205, 0] Branch { DstBlock "Reinterpret" DstPort 1 } Branch { Points [0, 80] DstBlock "Accumulator1" DstPort 1 } Branch { Points [0, -90] Branch { Points [0, -130] DstBlock "Register2" DstPort 1 } Branch { Labels [0, 0] DstBlock "Calc Mode Sel" DstPort 1 } } } Line { SrcBlock "Vin" SrcPort 1 Points [190, 0] Branch { DstBlock "Accumulator" DstPort 3 } Branch { Points [0, 80] Branch { Points [0, 130] DstBlock "Counter1" DstPort 2 } Branch { DstBlock "Accumulator1" DstPort 3 } } Branch { Points [0, -125] Branch { Points [0, -105; 215, 0] Branch { DstBlock "Register1" DstPort 2 } Branch { Points [0, -25] DstBlock "Register2" DstPort 2 } } Branch { DstBlock "Calc Mode Sel" DstPort 2 } } } Line { SrcBlock "Sym Index" SrcPort 1 DstBlock "Delay6" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 DstBlock " Sym Index" DstPort 1 } Line { SrcBlock "Use Both" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 2 } } } Block { BlockType SubSystem Name "Chan Phase RAM" SID "4663" Ports [9, 4] Position [670, 187, 775, 493] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Chan Phase RAM" Location [2, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Rst" SID "4664" Position [230, 443, 260, 457] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Train" SID "4665" Position [285, 473, 315, 487] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Phase" SID "4666" Position [355, 403, 385, 417] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "H_xA Vin" SID "4667" Position [225, 503, 255, 517] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "A Pilot Vin" SID "4668" Position [145, 523, 175, 537] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "B Pilot Vin" SID "4669" Position [145, 538, 175, 552] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Use A Pilots" SID "4670" Position [755, 593, 785, 607] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "Use B Pilots" SID "4671" Position [755, 633, 785, 647] Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "Sym Index" SID "4672" Position [145, 783, 175, 797] Port "9" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub2" SID "4673" Ports [2, 1] Position [730, 318, 770, 367] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "16" quantization "Round (unbiased: +/- Inf)" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,49,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 49 49 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[29.55 29." "55 34.55 29.55 34.55 34.55 34.55 29.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[24.55 24.55 29.55 2" "9.55 24.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[19.55 19.55 24.55 24.55 19.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[14.55 14.55 19.55 14.55 19.55 19.55 14.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "4674" Ports [1, 1] Position [1052, 235, 1068, 255] BlockRotation 270 ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "16,20,1,1,white,blue,0,edca21da,up,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 16 16 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 16 16 0 0 ],[0 0 20 20 0 ]);\npatch([3.55 6.44 8.44 10.44 12.44 8.44 5.55 3.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([5.55 8.44 6.44 3.55 5.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.931 0.946 0.973 ]);\npatch([3.55 6.44 8.44 5.55 3.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch(" "[5.55 12.44 10.44 8.44 6.44 3.55 5.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1" ",'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "4675" Ports [1, 1] Position [620, 576, 660, 594] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "4676" Ports [1, 1] Position [620, 616, 660, 634] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "4677" Ports [1, 1] Position [625, 321, 665, 339] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "4678" Ports [1, 1] Position [640, 781, 680, 799] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out1" SID "4679" Ports [1, 1] Position [1150, 209, 1185, 221] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out10" SID "4680" Ports [1, 1] Position [1150, 184, 1185, 196] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out2" SID "4681" Ports [1, 1] Position [1150, 234, 1185, 246] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out3" SID "4682" Ports [1, 1] Position [1150, 259, 1185, 271] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out4" SID "4683" Ports [1, 1] Position [1150, 284, 1185, 296] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out7" SID "4684" Ports [1, 1] Position [1150, 134, 1185, 146] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out8" SID "4685" Ports [1, 1] Position [1150, 109, 1185, 121] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out9" SID "4686" Ports [1, 1] Position [1150, 159, 1185, 171] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "4687" Ports [2, 1] Position [910, 616, 940, 649] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4688" Ports [2, 1] Position [980, 573, 1010, 657] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,84,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 84 84 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 84 84 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[46.44 46.4" "4 50.44 46.44 50.44 50.44 50.44 46.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 46.44 " "42.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[38.44 38.44 42.44 42.44 38.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[34.44 34.44 38.44 34.44 38.44 38.44 34.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "4689" Ports [2, 1] Position [475, 151, 505, 184] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,33,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "4690" Ports [2, 1] Position [910, 576, 940, 609] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "4691" Ports [2, 1] Position [275, 521, 305, 554] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,33,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "4692" Ports [2, 1] Position [1020, 696, 1050, 729] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Mem Control" SID "4693" Ports [4, 2] Position [370, 436, 460, 554] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Mem Control" Location [277, 481, 722, 650] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Rst" SID "4694" Position [100, 228, 130, 242] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Train" SID "4695" Position [580, 333, 610, 347] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "H_xA Vin" SID "4696" Position [95, 278, 125, 292] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Pilot Vin" SID "4697" Position [95, 293, 125, 307] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "2LSB" SID "4698" Ports [1, 1] Position [600, 273, 635, 287] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat1" SID "4699" Ports [2, 1] Position [735, 259, 760, 286] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1.3" sg_icon_stat "25,27,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 27 27 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat2" SID "4700" Ports [3, 1] Position [655, 366, 685, 454] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "3" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,165" block_type "concat" block_version "10.1.3" sg_icon_stat "30,88,3,1,white,blue,0,61ef8218,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 88 88 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 88 88 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[48.44 48.4" "4 52.44 48.44 52.44 52.44 52.44 48.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[44.44 44.44 48.44 48.44 " "44.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[40.44 40.44 44.44 44.44 40.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[36.44 36.44 40.44 36.44 40.44 40.44 36.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'hi');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant" SID "4701" Ports [0, 1] Position [700, 255, 715, 275] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "15,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 20 20 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[12.22 12.22 " "14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[10.22 10.22 12.22 12.22 10." "22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([" "4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "4702" Ports [1, 1] Position [740, 492, 760, 508] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1" ",'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter" SID "4703" Ports [2, 1] Position [400, 243, 435, 312] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "3" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,69,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 69 69 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 69 69 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[39.55 39." "55 44.55 39.55 44.55 44.55 44.55 39.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[34.55 34.55 39.55 3" "9.55 34.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[29.55 29.55 34.55 34.55 29.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[24.55 24.55 29.55 24.55 29.55 29.55 24.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType From Name "From1" SID "4704" Position [610, 237, 735, 253] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType Reference Name "Logical1" SID "4705" Ports [2, 1] Position [245, 276, 275, 309] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,33,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "4706" Ports [2, 1] Position [595, 362, 625, 398] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,36,2,1,white,blue,0,dc21e094,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 36 36 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[22.44 22.4" "4 26.44 22.44 26.44 26.44 26.44 22.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[18.44 18.44 22.44 22.44 " "18.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[14.44 14.44 18.44 18.44 14.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[10.44 10.44 14.44 10.44 14.44 14.44 10.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "4707" Ports [3, 1] Position [815, 227, 830, 323] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "15,96,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 13.7143 82.2857 96 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 15 15 0 0 ],[0 13.7143 82.2857 96 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.5" "5 2.55 ],[50.22 50.22 52.22 50.22 52.22 52.22 52.22 50.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[48.22" " 48.22 50.22 50.22 48.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[46.22 46.22 48.22 48.22 46" ".22 ],[1 1 1 ]);\npatch([4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[44.22 44.22 46.22 44.22 46.22 46.22 44.22 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('inpu" "t',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "4708" Ports [3, 1] Position [725, 342, 740, 478] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "15,136,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 19.4286 116.571 136 0 " "],[0.77 0.82 0.91 ]);\nplot([0 15 15 0 0 ],[0 19.4286 116.571 136 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4" ".55 2.55 ],[70.22 70.22 72.22 70.22 72.22 72.22 72.22 70.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[68." "22 68.22 70.22 70.22 68.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[66.22 66.22 68.22 68.22 " "66.22 ],[1 1 1 ]);\npatch([4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[64.22 64.22 66.22 64.22 66.22 66.22 64.22 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor(" "'black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('in" "put',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[0]" SID "4709" Ports [1, 1] Position [490, 433, 525, 447] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[1]" SID "4710" Ports [1, 1] Position [490, 403, 525, 417] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[2]" SID "4711" Ports [1, 1] Position [490, 363, 525, 377] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Addr" SID "4712" Position [875, 268, 905, 282] IconDisplay "Port number" } Block { BlockType Outport Name "We" SID "4713" Position [785, 493, 815, 507] Port "2" IconDisplay "Port number" } Line { SrcBlock "Pilot Vin" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Counter" DstPort 2 } Line { SrcBlock "H_xA Vin" SrcPort 1 Points [95, 0] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, 215] DstBlock "Convert1" DstPort 1 } } Line { SrcBlock "Rst" SrcPort 1 Points [80, 0; 0, 25] DstBlock "Counter" DstPort 1 } Line { SrcBlock "Counter" SrcPort 1 Points [20, 0] Branch { DstBlock "2LSB" DstPort 1 } Branch { Points [0, 90] Branch { Points [0, 40] Branch { DstBlock "b[1]" DstPort 1 } Branch { Points [0, 30] Branch { DstBlock "b[0]" DstPort 1 } Branch { Points [0, 30; 250, 0] DstBlock "Mux1" DstPort 3 } } } Branch { DstBlock "b[2]" DstPort 1 } } } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "We" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Addr" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "2LSB" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Concat1" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 Points [30, 0; 0, -105] DstBlock "Mux" DstPort 3 } Line { SrcBlock "Train" SrcPort 1 Points [95, 0] DstBlock "Mux1" DstPort 1 } Line { SrcBlock "b[0]" SrcPort 1 Points [45, 0] Branch { DstBlock "Concat2" DstPort 3 } Branch { Points [0, -50] DstBlock "Logical4" DstPort 2 } } Line { SrcBlock "b[1]" SrcPort 1 DstBlock "Concat2" DstPort 2 } Line { SrcBlock "b[2]" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Concat2" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Concat2" DstPort 1 } Annotation { Position [284, 67] } Annotation { Name "Store the channel coefficients as:\n\nAddr: Val\n0: H_AA[0]\n1: H_AA[1]\n2: H_AA[2]\n3: H_AA[3]\n4: H" "_BA[0] (Alamouti mode only)\n5: H_BA[1] (Alamouti mode only)\n6: H_BA[2] (Alamouti mode only)\n7: H_BA[3] (Alamo" "uti mode only)\n\nIn SISO/Multiplexing mode, read only the H_AA coefficients sequentially.\n\nIn Alamouti mode, " "read the coefficients in this order:\nH_AA[0] (0)\nH_BA[1] (5)\nH_AA[2] (2)\nH_BA[3] (7)\nH_BA[0] (4)\nH_AA[1] (" "1)\nH_BA[2] (6)\nH_AA[3] (3)" Position [903, 654] HorizontalAlignment "left" } } } Block { BlockType Reference Name "RAM" SID "4714" Ports [3, 1] Position [605, 361, 670, 459] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Single Port RAM" SourceType "Xilinx Single Port Random Access Memory Block" depth "8" initVector "0" distributed_mem "Distributed memory" write_mode "Read After Write" rst off init_reg "0" en off latency "1" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,368,345" block_type "spram" block_version "10.1.3" sg_icon_stat "65,98,3,1,white,blue,0,afe23399,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 98 98 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 98 98 0 ]);\npatch([11.975 24.98 33.98 42.98 51.98 33.98 20.975 11.975 ],[58" ".99 58.99 67.99 58.99 67.99 67.99 67.99 58.99 ],[1 1 1 ]);\npatch([20.975 33.98 24.98 11.975 20.975 ],[49.99 49." "99 58.99 58.99 49.99 ],[0.931 0.946 0.973 ]);\npatch([11.975 24.98 33.98 20.975 11.975 ],[40.99 40.99 49.99 49.9" "9 40.99 ],[1 1 1 ]);\npatch([20.975 51.98 42.98 33.98 24.98 11.975 20.975 ],[31.99 31.99 40.99 31.99 40.99 40.99" " 31.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'data');\ncolor('black');" "port_label('input',3,'we');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text" "');" } Block { BlockType Reference Name "Register1" SID "4715" Ports [2, 1] Position [1090, 173, 1115, 202] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,29,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 29 29 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[17.33 " "17.33 20.33 17.33 20.33 20.33 20.33 17.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[14.33 14.33 17.33" " 17.33 14.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[11.33 11.33 14.33 14.33 11.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[8.33 8.33 11.33 8.33 11.33 11.33 8.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q'" ");\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register2" SID "4716" Ports [2, 1] Position [1050, 148, 1075, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,29,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 29 29 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[17.33 " "17.33 20.33 17.33 20.33 20.33 20.33 17.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[14.33 14.33 17.33" " 17.33 14.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[11.33 11.33 14.33 14.33 11.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[8.33 8.33 11.33 8.33 11.33 11.33 8.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q'" ");\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "d(Phase)" SID "4717" Position [965, 338, 995, 352] IconDisplay "Port number" } Block { BlockType Outport Name "Vout" SID "4718" Position [1220, 608, 1250, 622] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Use Both" SID "4719" Position [1145, 708, 1175, 722] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name " Sym Index" SID "4720" Position [1065, 783, 1095, 797] Port "4" IconDisplay "Port number" } Line { SrcBlock "Phase" SrcPort 1 Points [160, 0] Branch { DstBlock "RAM" DstPort 2 } Branch { Points [0, -80] Branch { DstBlock "Delay3" DstPort 1 } Branch { Points [0, -215; 360, 0] Branch { DstBlock "Gateway Out8" DstPort 1 } Branch { Points [0, 40] DstBlock "Register2" DstPort 1 } } } } Line { SrcBlock "RAM" SrcPort 1 Points [20, 0; 0, -55] Branch { DstBlock "AddSub2" DstPort 2 } Branch { Points [0, -215] DstBlock "Gateway Out7" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 Points [55, 0] Branch { DstBlock "d(Phase)" DstPort 1 } Branch { Points [0, -165] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 Points [150, 0] Branch { DstBlock "Logical4" DstPort 1 } Branch { Points [0, -150; 290, 0; 0, -170] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "Mem Control" SrcPort 2 Points [115, 0; 0, -85] Branch { DstBlock "RAM" DstPort 3 } Branch { Points [0, -225] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Mem Control" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 Points [25, 0] Branch { DstBlock "Mem Control" DstPort 4 } Branch { Points [0, -380] DstBlock "Logical3" DstPort 1 } } Line { SrcBlock "H_xA Vin" SrcPort 1 Points [85, 0] Branch { DstBlock "Mem Control" DstPort 3 } Branch { Points [0, -335] DstBlock "Logical3" DstPort 2 } } Line { SrcBlock "Mem Control" SrcPort 1 Points [100, 0; 0, -85] Branch { DstBlock "RAM" DstPort 1 } Branch { Points [0, -140] DstBlock "Gateway Out2" DstPort 1 } } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Gateway Out8" SrcPort 1 Points [25, 0] } Line { SrcBlock "Gateway Out7" SrcPort 1 Points [25, 0] } Line { SrcBlock "Gateway Out9" SrcPort 1 Points [25, 0] } Line { SrcBlock "Gateway Out10" SrcPort 1 Points [25, 0] } Line { SrcBlock "Gateway Out1" SrcPort 1 Points [25, 0] } Line { SrcBlock "Gateway Out2" SrcPort 1 Points [25, 0] } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Gateway Out10" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Gateway Out9" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 Points [0, -35] DstBlock "Register1" DstPort 2 } Line { SrcBlock "Train" SrcPort 1 DstBlock "Mem Control" DstPort 2 } Line { SrcBlock "A Pilot Vin" SrcPort 1 Points [70, 0] Branch { DstBlock "Logical5" DstPort 1 } Branch { Points [0, 55] DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "B Pilot Vin" SrcPort 1 Points [65, 0] Branch { DstBlock "Logical5" DstPort 2 } Branch { Points [0, 80] DstBlock "Delay2" DstPort 1 } } Line { SrcBlock "Use A Pilots" SrcPort 1 Points [95, 0] Branch { DstBlock "Logical4" DstPort 2 } Branch { Points [0, 105] DstBlock "Logical6" DstPort 1 } } Line { SrcBlock "Delay2" SrcPort 1 Points [155, 0] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, -170; 295, 0; 0, -165] DstBlock "Gateway Out4" DstPort 1 } } Line { SrcBlock "Use B Pilots" SrcPort 1 Points [85, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, 80] DstBlock "Logical6" DstPort 2 } } Line { SrcBlock "Logical2" SrcPort 1 Points [45, 0] Branch { DstBlock "Vout" DstPort 1 } Branch { DstBlock "Convert1" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Use Both" DstPort 1 } Line { SrcBlock "Sym Index" SrcPort 1 DstBlock "Delay6" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 DstBlock " Sym Index" DstPort 1 } Line { SrcBlock "Gateway Out3" SrcPort 1 Points [25, 0] } Line { SrcBlock "Gateway Out4" SrcPort 1 Points [25, 0] } } } Block { BlockType Reference Name "Gateway Out1" SID "4721" Ports [1, 1] Position [715, 574, 750, 586] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out10" SID "4722" Ports [1, 1] Position [715, 559, 750, 571] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out2" SID "4723" Ports [1, 1] Position [715, 589, 750, 601] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out3" SID "4724" Ports [1, 1] Position [715, 604, 750, 616] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out7" SID "4725" Ports [1, 1] Position [715, 529, 750, 541] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out8" SID "4726" Ports [1, 1] Position [715, 514, 750, 526] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out9" SID "4727" Ports [1, 1] Position [715, 544, 750, 556] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType SubSystem Name "Phase Calculation" SID "4728" Ports [11, 8] Position [450, 220, 575, 490] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Phase Calculation" Location [186, 132, 823, 535] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "132" Block { BlockType Inport Name "Train" SID "4729" Position [75, 63, 105, 77] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "H_AA I" SID "4730" Position [520, 168, 550, 182] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "H_AA Q" SID "4731" Position [520, 278, 550, 292] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "H_BA I" SID "4732" Position [520, 193, 550, 207] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "H_BA Q" SID "4733" Position [520, 303, 550, 317] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Sym Index" SID "4734" Position [75, 103, 105, 117] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Subcar Ind" SID "4735" Position [95, 398, 125, 412] NamePlacement "alternate" Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "Pilot I" SID "4736" Position [465, 143, 495, 157] NamePlacement "alternate" Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "Pilot Q" SID "4737" Position [465, 253, 495, 267] NamePlacement "alternate" Port "9" IconDisplay "Port number" } Block { BlockType Inport Name "A_Pilot " SID "4738" Position [155, 458, 185, 472] NamePlacement "alternate" Port "10" IconDisplay "Port number" } Block { BlockType Inport Name "B_Pilot " SID "4739" Position [155, 473, 185, 487] Port "11" IconDisplay "Port number" } Block { BlockType Reference Name "1LSB" SID "4740" Ports [1, 1] Position [165, 103, 200, 117] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat1" SID "4741" Ports [2, 1] Position [405, 56, 430, 189] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1.3" sg_icon_stat "25,133,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 133 133 0 ],[0.77 0." "82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 133 133 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[69" ".33 69.33 72.33 69.33 72.33 72.33 72.33 69.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[66.33 66.33 6" "9.33 69.33 66.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[63.33 63.33 66.33 66.33 63.33 " "],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[60.33 60.33 63.33 60.33 63.33 63.33 60.33 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsi" "ze{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Cordic Arctan" SID "4742" Ports [2, 2] Position [835, 140, 885, 240] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Cordic Arctan" Location [2, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "4743" Position [555, 138, 585, 152] IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "4744" Position [555, 188, 585, 202] Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "CORDIC ATAN1" SID "9655" Ports [2, 2] Position [720, 118, 805, 222] BackgroundColor "yellow" CopyFcn "set_param(gcb, 'MaskSelfModifiable', 'on', 'LinkStatus', 'none');" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Xilinx CORDIC ATAN" MaskDescription "A parallel implementation, circular vectoring mode CORDIC processor for performing rectangu" "lar-to-polar conversion. The number of iteration stages (and resultant output accuracy) and the processor arith" "metic precision are controlled by the mask customization." MaskHelp "eval('');xlDoc('-book','sysgen','-topic','CORDIC_ATAN');" MaskPromptString "Number of Processing Elements (integer value starting from 1)|X, Y Data Width|X, Y Binary " "Point Position|Latency for each Processing Element [1 0 0 1]|Previous Number of Stages|Previous Pipeline Values" MaskStyleString "edit,edit,edit,edit,edit,edit" MaskVariables "stages=@1;pe_nbits=@2;pe_binpt=@3;pipeline_x=@4;prev_stages=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "on,on,on,on,off,off" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\nsav_gcb=gcb;\nstages =" " round(sum(abs(stages)));\nif (stages == 0)\n stages = prev_stages;\nend\nx = zeros(1,stages);\npipe_size = max(" "size(pipeline_x));\nif pipe_size >= stages\n x(1,1:stages) = pipeline_x(1,1:stages);\nelse\n x(1,1:pipe_size) = " "pipeline_x(1,1:pipe_size);\nend\n\nif (stages ~=prev_stages)\n pipeline=x;\n cordic_pe = find_system(gcb, 'lookU" "nderMasks', 'all', 'FollowLinks','on','masktype', 'CORDIC parallel PE');\n \n a=find_system(cordic_pe{1}, 'l" "ookUnderMasks', 'all', 'FollowLinks','on','masktype', 'CORDIC iteration PE');\n for i= 2:length(a)\n for j=1" ":3\n delete_line(cordic_pe{1}, ['CORDIC PE' int2str(i-1) '/' int2str(j)], ['CORDIC PE' int2str(i) '/' int2str(" "j)]);\n end\n end\n if length(a)>0,\n delete_line(cordic_pe{1}, 'x/1', 'CORDIC PE1/1');\n delet" "e_line(cordic_pe{1}, 'y/1', 'CORDIC PE1/2');\n delete_line(cordic_pe{1}, 'z/1', 'CORDIC PE1/3');\n del" "ete_line(cordic_pe{1}, ['CORDIC PE' int2str(length(a)) '/1'],'X/1');\n delete_line(cordic_pe{1}, ['CORDIC P" "E' int2str(length(a)) '/2'],'Terminator/1');\n delete_line(cordic_pe{1}, ['CORDIC PE' int2str(length(a)) '/" "3'],'Z/1');\n elseif length(a)==0\n temp_port=get_param([cordic_pe{1} '/x'],'porthandles');\n temp_" "line=get_param(temp_port.Outport,'line');\n if temp_line>=0 delete_line(temp_line); end\n temp_port=g" "et_param([cordic_pe{1} '/y'],'porthandles');\n temp_line=get_param(temp_port.Outport,'line');\n if tem" "p_line>=0 delete_line(temp_line); end\n temp_port=get_param([cordic_pe{1} '/z'],'porthandles');\n tem" "p_line=get_param(temp_port.Outport,'line');\n if temp_line>=0 delete_line(temp_line); end\n end\n\n " "for i=2:length(a)\n delete_block(a{i});\n end\n for i=2:stages,\n add_block([cordic_pe{1} '/CO" "RDIC PE1'], [cordic_pe{1} '/CORDIC PE' int2str(i)], 'ii', int2str(i-1),'pe_nbits', 'pe_nbits','pe_binpt', 'pe_bi" "npt','pipeline',['pipeline(1,' int2str(i) ')'],'position',[150+(i-1)*125, 70, 205+(i-1)*125, 130]);\n end\n\n" " for i= 2:stages,\n for j=1:3\n add_line(cordic_pe{1}, ['CORDIC PE' int2str(i-1) '/' int2str(j)], ['COR" "DIC PE' int2str(i) '/' int2str(j)], 'autorouting', 'on');\n end\n end\n\n if stages==0\n add_lin" "e(cordic_pe{1}, 'x/1', 'X/1', 'autorouting', 'on');\n add_line(cordic_pe{1}, 'y/1', 'Terminator/1', 'autoro" "uting', 'on');\n add_line(cordic_pe{1}, 'z/1', 'Z/1', 'autorouting', 'on');\n elseif stages>0\n add" "_line(cordic_pe{1}, 'x/1', 'CORDIC PE1/1', 'autorouting', 'on');\n add_line(cordic_pe{1}, 'y/1', 'CORDIC PE" "1/2', 'autorouting', 'on');\n add_line(cordic_pe{1}, 'z/1', 'CORDIC PE1/3', 'autorouting', 'on');\n\n " "set_param([cordic_pe{1} '/' 'X'], 'Position', [150+stages*125, 72, 180+stages*125, 86]);\n set_param([cordi" "c_pe{1} '/' 'Terminator'], 'Position', [210+stages*125, 92, 225+stages*125, 108]);\n set_param([cordic_pe{1" "} '/' 'Z'], 'Position', [240+stages*125, 113, 270+stages*125, 127]);\n\n add_line(cordic_pe{1}, ['CORDIC PE" "' int2str(stages) '/1'], 'X/1', 'autorouting', 'on');\n add_line(cordic_pe{1}, ['CORDIC PE' int2str(stages)" " '/2'], 'Terminator/1', 'autorouting', 'on');\n add_line(cordic_pe{1}, ['CORDIC PE' int2str(stages) '/3'],'" "Z/1', 'autorouting', 'on');\n\n % force a \"compile\" of the constituent constant blocks to\n % workar" "ound a data propagation problem\n find_system(cordic_pe{1}, 'lookUnderMasks', 'all', 'FollowLinks', 'on', '" "MaskType','Xilinx Constant Block');\n end\n set_param(sav_gcb, 'prev_stages', int2str(stages));\n set_param(sav" "_gcb, 'pipeline', [ '[' int2str(x) ']']);\nelse\n if (sum(pipeline~=x))\n set_param(gcb, 'pipeline', [ '[' int2" "str(x) ']']);\n end\nend\nstr = sprintf('-%d',sum(x) + 3);\n\n " MaskSelfModifiable on MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\ntext(iCx-6,i" "Cy,'z');\ntext(iCx,iCy+4,str);\nport_label('input',1,'x');\nport_label('input',2,'y');\nport_label('output',1,'m" "ag');\nport_label('output',2,'atan');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "15|18|15|[0 0 0 1 0 0 0 1 0 0 0 1 0 0 1]|15|[0 0 0 1 0 0 0 1 0 0 0 1 0 0 1]" System { Name "CORDIC ATAN1" Location [325, 375, 1110, 1027] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" SIDHighWatermark "441" Block { BlockType Inport Name "x" SID "9655:1" Position [35, 53, 65, 67] IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:2" Position [35, 98, 65, 112] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "CORDIC \nPipe Balance" SID "9655:3" Ports [1, 1] Position [550, 170, 590, 190] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Delay line having configurable length.

Hardware notes: A delay line is a chain, each link o" "f which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-" "flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "sum(pipeline)" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,d390c2d8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "CORDIC \nPipe Balance1" SID "9655:4" Ports [1, 1] Position [550, 195, 590, 215] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Delay line having configurable length.

Hardware notes: A delay line is a chain, each link o" "f which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-" "flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "sum(pipeline)+1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,ec356abf,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22 " "12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12.2" "2 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 " "1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black'" ");disp('z^{-5}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "CORDIC \nPipe Balance2" SID "9655:5" Ports [1, 1] Position [725, 45, 765, 65] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Delay line having configurable length.

Hardware notes: A delay line is a chain, each link o" "f which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-" "flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "CORDIC Fine Angle PE" SID "9655:6" Ports [3, 2] Position [535, 38, 595, 102] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC parallel PE" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "CORDIC Fine Angle PE" Location [182, 93, 967, 745] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:7" Position [15, 73, 45, 87] IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:8" Position [40, 93, 70, 107] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "9655:9" Position [65, 113, 95, 127] Port "3" IconDisplay "Port number" } Block { BlockType SubSystem Name "CORDIC PE1" SID "9655:10" Ports [3, 3] Position [185, 67, 240, 133] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "0|pe_nbits|pe_binpt|atan||pipeline(1,1)" System { Name "CORDIC PE1" Location [217, 310, 1439, 1107] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:11" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:12" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "9655:13" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "9655:14" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27" ".66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 2" "7.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "9655:15" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "AddSub2" SID "9655:16" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Constant" SID "9655:17" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,3da00a14,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22 " "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]" ");\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');port_la" "bel('output',1,'0.785400390625');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMENT: Make no changes a" "bove this line -- machine generated code. ');\n" } Block { BlockType Reference Name "Inverter" SID "9655:18" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "9655:19" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,f61b5d0e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Shift1" SID "9655:20" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,f61b5d0e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Slice" SID "9655:21" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "9655:22" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "9655:23" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:24" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [5, 0] Branch { Points [115, 0] Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } Branch { Points [145, 0] Branch { DstBlock "Shift1" DstPort 1 } Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } } } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } Branch { DstBlock "AddSub" DstPort 1 } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE10" SID "9655:265" Ports [3, 3] Position [1275, 70, 1330, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "9|pe_nbits|pe_binpt|atan||pipeline(1,10)" System { Name "CORDIC PE10" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:266" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:267" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "9655:268" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "9655:269" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27" ".66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 2" "7.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "9655:270" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "AddSub2" SID "9655:271" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Constant" SID "9655:272" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,2ab4629b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22 " "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]" ");\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');port_la" "bel('output',1,'0.001953125');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMENT: Make no changes abov" "e this line -- machine generated code. ');\n" } Block { BlockType Reference Name "Inverter" SID "9655:273" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "9655:274" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,7a8acb92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 9}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Shift1" SID "9655:275" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,7a8acb92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 9}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Slice" SID "9655:276" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "9655:277" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "9655:278" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:279" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [145, 0] Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "Shift1" DstPort 1 } } Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [115, 0] Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE11" SID "9655:280" Ports [3, 3] Position [1400, 70, 1455, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "10|pe_nbits|pe_binpt|atan||pipeline(1,11)" System { Name "CORDIC PE11" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:281" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:282" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "9655:283" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "9655:284" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27" ".66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 2" "7.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "9655:285" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "AddSub2" SID "9655:286" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Constant" SID "9655:287" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,4c089691,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22 " "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]" ");\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');port_la" "bel('output',1,'0.0009765625');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMENT: Make no changes abo" "ve this line -- machine generated code. ');\n" } Block { BlockType Reference Name "Inverter" SID "9655:288" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "9655:289" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,153141b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 10}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Shift1" SID "9655:290" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,153141b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 10}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Slice" SID "9655:291" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "9655:292" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "9655:293" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:294" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [145, 0] Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "Shift1" DstPort 1 } } Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [115, 0] Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE12" SID "9655:295" Ports [3, 3] Position [1525, 70, 1580, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "11|pe_nbits|pe_binpt|atan||pipeline(1,12)" System { Name "CORDIC PE12" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:296" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:297" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "9655:298" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "9655:299" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27" ".66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 2" "7.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline '" ",'texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";\n" } Block { BlockType Reference Name "AddSub1" SID "9655:300" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');\n" } Block { BlockType Reference Name "AddSub2" SID "9655:301" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');\n" } Block { BlockType Reference Name "Constant" SID "9655:302" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,6ce4429f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22 " "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]" ");\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');port_la" "bel('output',1,'0.00048828125');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMENT: Make no changes ab" "ove this line -- machine generated code. ');\n" } Block { BlockType Reference Name "Inverter" SID "9655:303" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "9655:304" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,5d31f610,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 11}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Shift1" SID "9655:305" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,5d31f610,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 11}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Slice" SID "9655:306" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "9655:307" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "9655:308" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:309" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [145, 0] Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "Shift1" DstPort 1 } } Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [115, 0] Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE13" SID "9655:310" Ports [3, 3] Position [1650, 70, 1705, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "12|pe_nbits|pe_binpt|atan||pipeline(1,13)" System { Name "CORDIC PE13" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:311" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:312" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "9655:313" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "9655:314" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27" ".66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 2" "7.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "9655:315" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "AddSub2" SID "9655:316" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Constant" SID "9655:317" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,747054a4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22 " "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]" ");\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');port_la" "bel('output',1,'0.000244140625');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMENT: Make no changes a" "bove this line -- machine generated code. ');\n" } Block { BlockType Reference Name "Inverter" SID "9655:318" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "9655:319" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,04b1d21b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 12}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Shift1" SID "9655:320" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,04b1d21b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 12}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Slice" SID "9655:321" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "9655:322" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "9655:323" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:324" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [145, 0] Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "Shift1" DstPort 1 } } Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [115, 0] Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE14" SID "9655:325" Ports [3, 3] Position [1775, 70, 1830, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "13|pe_nbits|pe_binpt|atan||pipeline(1,14)" System { Name "CORDIC PE14" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:326" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:327" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "9655:328" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "9655:329" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27" ".66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 2" "7.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "9655:330" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "AddSub2" SID "9655:331" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Constant" SID "9655:332" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,631ce90a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22 " "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]" ");\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');port_la" "bel('output',1,'0.0001220703125');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMENT: Make no changes " "above this line -- machine generated code. ');\n" } Block { BlockType Reference Name "Inverter" SID "9655:333" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "9655:334" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,829e9304,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 13}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Shift1" SID "9655:335" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,829e9304,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 13}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Slice" SID "9655:336" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "9655:337" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "9655:338" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:339" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [145, 0] Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "Shift1" DstPort 1 } } Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [115, 0] Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE15" SID "9655:340" Ports [3, 3] Position [1900, 70, 1955, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "14|pe_nbits|pe_binpt|atan||pipeline(1,15)" System { Name "CORDIC PE15" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:341" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:342" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "9655:343" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "9655:344" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27" ".66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 2" "7.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline '" ",'texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";\n" } Block { BlockType Reference Name "AddSub1" SID "9655:345" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');\n" } Block { BlockType Reference Name "AddSub2" SID "9655:346" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');\n" } Block { BlockType Reference Name "Constant" SID "9655:347" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,3f1ca338,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22 " "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]" ");\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');port_la" "bel('output',1,'6.103515625e-005');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMENT: Make no changes" " above this line -- machine generated code. ');\n" } Block { BlockType Reference Name "Inverter" SID "9655:348" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "9655:349" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,70926025,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 14}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Shift1" SID "9655:350" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,70926025,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 14}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Slice" SID "9655:351" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "9655:352" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "9655:353" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:354" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [145, 0] Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "Shift1" DstPort 1 } } Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [115, 0] Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE2" SID "9655:145" Ports [3, 3] Position [275, 70, 330, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "1|pe_nbits|pe_binpt|atan||pipeline(1,2)" System { Name "CORDIC PE2" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:146" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:147" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "9655:148" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "9655:149" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27" ".66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 2" "7.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "9655:150" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "AddSub2" SID "9655:151" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Constant" SID "9655:152" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,0291470a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22 " "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]" ");\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');port_la" "bel('output',1,'0.463653564453125');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMENT: Make no change" "s above this line -- machine generated code. ');\n" } Block { BlockType Reference Name "Inverter" SID "9655:153" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "9655:154" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,77cd8d92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Shift1" SID "9655:155" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,77cd8d92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Slice" SID "9655:156" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "9655:157" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "9655:158" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:159" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [145, 0] Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "Shift1" DstPort 1 } } Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [115, 0] Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE3" SID "9655:160" Ports [3, 3] Position [400, 70, 455, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "2|pe_nbits|pe_binpt|atan||pipeline(1,3)" System { Name "CORDIC PE3" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:161" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:162" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "9655:163" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "9655:164" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27" ".66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 2" "7.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "9655:165" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "AddSub2" SID "9655:166" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Constant" SID "9655:167" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,1f37424e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22 " "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]" ");\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');port_la" "bel('output',1,'0.244964599609375');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMENT: Make no change" "s above this line -- machine generated code. ');\n" } Block { BlockType Reference Name "Inverter" SID "9655:168" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "9655:169" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,b3ac20f4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 2}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Shift1" SID "9655:170" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,b3ac20f4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 2}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Slice" SID "9655:171" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "9655:172" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "9655:173" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:174" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [145, 0] Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "Shift1" DstPort 1 } } Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [115, 0] Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE4" SID "9655:175" Ports [3, 3] Position [525, 70, 580, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "3|pe_nbits|pe_binpt|atan||pipeline(1,4)" System { Name "CORDIC PE4" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:176" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:177" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "9655:178" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "9655:179" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27" ".66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 2" "7.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline '" ",'texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";\n" } Block { BlockType Reference Name "AddSub1" SID "9655:180" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');\n" } Block { BlockType Reference Name "AddSub2" SID "9655:181" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');\n" } Block { BlockType Reference Name "Constant" SID "9655:182" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,bc13d088,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22 " "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]" ");\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');port_la" "bel('output',1,'0.124359130859375');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMENT: Make no change" "s above this line -- machine generated code. ');\n" } Block { BlockType Reference Name "Inverter" SID "9655:183" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "9655:184" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,42eb502d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 3}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Shift1" SID "9655:185" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,42eb502d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 3}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Slice" SID "9655:186" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "9655:187" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "9655:188" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:189" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [145, 0] Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "Shift1" DstPort 1 } } Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [115, 0] Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE5" SID "9655:190" Ports [3, 3] Position [650, 70, 705, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "4|pe_nbits|pe_binpt|atan||pipeline(1,5)" System { Name "CORDIC PE5" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:191" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:192" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "9655:193" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "9655:194" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27" ".66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 2" "7.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "9655:195" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "AddSub2" SID "9655:196" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Constant" SID "9655:197" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,add59bf0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22 " "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]" ");\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');port_la" "bel('output',1,'0.062408447265625');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMENT: Make no change" "s above this line -- machine generated code. ');\n" } Block { BlockType Reference Name "Inverter" SID "9655:198" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "9655:199" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,f24dc431,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Shift1" SID "9655:200" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,f24dc431,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Slice" SID "9655:201" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "9655:202" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "9655:203" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:204" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [145, 0] Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "Shift1" DstPort 1 } } Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [115, 0] Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE6" SID "9655:205" Ports [3, 3] Position [775, 70, 830, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "5|pe_nbits|pe_binpt|atan||pipeline(1,6)" System { Name "CORDIC PE6" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:206" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:207" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "9655:208" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "9655:209" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27" ".66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 2" "7.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "9655:210" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "AddSub2" SID "9655:211" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Constant" SID "9655:212" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,d8519326,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22 " "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]" ");\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');port_la" "bel('output',1,'0.03125');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMENT: Make no changes above th" "is line -- machine generated code. ');\n" } Block { BlockType Reference Name "Inverter" SID "9655:213" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "9655:214" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,265c313f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 5}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Shift1" SID "9655:215" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,265c313f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 5}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Slice" SID "9655:216" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "9655:217" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "9655:218" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:219" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [145, 0] Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "Shift1" DstPort 1 } } Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [115, 0] Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE7" SID "9655:220" Ports [3, 3] Position [900, 70, 955, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "6|pe_nbits|pe_binpt|atan||pipeline(1,7)" System { Name "CORDIC PE7" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:221" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:222" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "9655:223" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "9655:224" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27" ".66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 2" "7.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "9655:225" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "AddSub2" SID "9655:226" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Constant" SID "9655:227" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,60ba886e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22 " "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]" ");\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');port_la" "bel('output',1,'0.015625');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMENT: Make no changes above t" "his line -- machine generated code. ');\n" } Block { BlockType Reference Name "Inverter" SID "9655:228" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "9655:229" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,57d4791a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 6}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Shift1" SID "9655:230" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,57d4791a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 6}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Slice" SID "9655:231" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "9655:232" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "9655:233" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:234" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [145, 0] Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "Shift1" DstPort 1 } } Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [115, 0] Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE8" SID "9655:235" Ports [3, 3] Position [1025, 70, 1080, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "7|pe_nbits|pe_binpt|atan||pipeline(1,8)" System { Name "CORDIC PE8" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:236" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:237" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "9655:238" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "9655:239" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27" ".66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 2" "7.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline '" ",'texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";\n" } Block { BlockType Reference Name "AddSub1" SID "9655:240" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');\n" } Block { BlockType Reference Name "AddSub2" SID "9655:241" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,5b906e43,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\ncolor('black');disp('z^{-1}\\newli" "ne ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');\n" } Block { BlockType Reference Name "Constant" SID "9655:242" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,6f4afd4f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22 " "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]" ");\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');port_la" "bel('output',1,'0.0078125');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMENT: Make no changes above " "this line -- machine generated code. ');\n" } Block { BlockType Reference Name "Inverter" SID "9655:243" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "9655:244" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,aa1a47e4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 7}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Shift1" SID "9655:245" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,aa1a47e4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 7}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Slice" SID "9655:246" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "9655:247" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "9655:248" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:249" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [145, 0] Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "Shift1" DstPort 1 } } Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [115, 0] Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType SubSystem Name "CORDIC PE9" SID "9655:250" Ports [3, 3] Position [1150, 70, 1205, 130] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "CORDIC iteration PE" MaskPromptString "Iteration Index ii|Number of X,Y,Z Bits|X,Y,Z Binary Point Position|Epsilon_k Function|eps" "ilon_k|Pipeline Latency" MaskStyleString "edit,edit,edit,popup(atan|atanh),edit,edit" MaskVariables "ii=@1;pe_nbits=@2;pe_binpt=@3;epsilon_k_fcn=@4;epsilon_k=@5;pipeline=@6;" MaskTunableValueString "on,on,on,on,on,on" MaskCallbackString "|||||" MaskEnableString "on,on,on,on,on,on" MaskVisibilityString "off,on,on,on,off,on" MaskToolTipString "on,on,on,on,on,on" MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);\n\nset_param(gcb, 'Link" "Status', 'none');\nswitch epsilon_k_fcn\n case 1\n epsilon_k = atan(1/2^ii);\n case 2\n epsilon_k = atan" "h(1/2^ii);\nend\n\n" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('input',3,'z');\nport_label('output',1,'X');\nport_label(" "'output',2,'Y');\nport_label('output',3,'Z');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "8|pe_nbits|pe_binpt|atan||pipeline(1,9)" System { Name "CORDIC PE9" Location [221, 117, 880, 541] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:251" Position [45, 68, 75, 82] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:252" Position [45, 83, 75, 97] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "z" SID "9655:253" Position [45, 223, 75, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "9655:254" Ports [3, 1] Position [455, 69, 500, 111] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27" ".66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 2" "7.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'sub');" "\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "9655:255" Ports [3, 1] Position [455, 143, 500, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "AddSub2" SID "9655:256" Ports [3, 1] Position [455, 223, 500, 267] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "pipeline" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28" ".66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 2" "8.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 " "1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Constant" SID "9655:257" Ports [0, 1] Position [155, 236, 240, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "epsilon_k" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "85,18,0,1,white,blue,0,f8092ba0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 85 85 0 0 ],[0 0 18 18 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 85 85 0 0 ],[0 0 18 18 0 ]);\npatch([37.55 40.44 42.44 44.44 46.44 42.44 39.55 37.55 ],[11.22 " "11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([39.55 42.44 40.44 37.55 39.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([37.55 40.44 42.44 39.55 37.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]" ");\npatch([39.55 46.44 44.44 42.44 40.44 37.55 39.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');port_la" "bel('output',1,'0.00390625');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMENT: Make no changes above" " this line -- machine generated code. ');\n" } Block { BlockType Reference Name "Inverter" SID "9655:258" Ports [1, 1] Position [220, 173, 260, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "9655:259" Ports [1, 1] Position [345, 158, 390, 172] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,6fdd366c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 8}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Shift1" SID "9655:260" Ports [1, 1] Position [345, 83, 390, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Right" shift_bits "ii" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,6fdd366c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9.22 9" ".22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npa" "tch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('\\b" "f{X >> 8}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Slice" SID "9655:261" Ports [1, 1] Position [155, 125, 195, 145] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "X" SID "9655:262" Position [570, 83, 600, 97] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "9655:263" Position [570, 158, 600, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:264" Position [570, 238, 600, 252] Port "3" IconDisplay "Port number" } Line { SrcBlock "x" SrcPort 1 Points [220, 0] Branch { Points [105, 0] DstBlock "AddSub" DstPort 1 } Branch { Points [0, 90] DstBlock "Shift" DstPort 1 } } Line { SrcBlock "y" SrcPort 1 Points [50, 0] Branch { Points [145, 0] Branch { Points [0, 60] DstBlock "AddSub1" DstPort 1 } Branch { DstBlock "Shift1" DstPort 1 } } Branch { Points [0, 45] DstBlock "Slice" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "z" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [140, 0] DstBlock "AddSub1" DstPort 3 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Shift1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Slice" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [115, 0] Branch { Points [0, 125] DstBlock "AddSub2" DstPort 3 } Branch { Points [0, -30] DstBlock "AddSub" DstPort 3 } } } Annotation { Name "X = x - y if y < 0, otherwise\n = x + y\nY = y + x if y < 0, otherwise\n = y - x\nZ = z - atan(1/" "2^i) if y < 0, otherwise\n = z + atan(1/2^i)" Position [210, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType Terminator Name "Terminator" SID "9655:115" Position [2085, 92, 2100, 108] NamePlacement "alternate" ShowName off } Block { BlockType Outport Name "X" SID "9655:116" Position [2025, 73, 2055, 87] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:117" Position [2115, 113, 2145, 127] Port "2" IconDisplay "Port number" } Line { SrcBlock "CORDIC PE1" SrcPort 1 DstBlock "CORDIC PE2" DstPort 1 } Line { SrcBlock "CORDIC PE1" SrcPort 2 DstBlock "CORDIC PE2" DstPort 2 } Line { SrcBlock "CORDIC PE1" SrcPort 3 DstBlock "CORDIC PE2" DstPort 3 } Line { SrcBlock "CORDIC PE2" SrcPort 1 DstBlock "CORDIC PE3" DstPort 1 } Line { SrcBlock "CORDIC PE2" SrcPort 2 DstBlock "CORDIC PE3" DstPort 2 } Line { SrcBlock "CORDIC PE2" SrcPort 3 DstBlock "CORDIC PE3" DstPort 3 } Line { SrcBlock "CORDIC PE3" SrcPort 1 DstBlock "CORDIC PE4" DstPort 1 } Line { SrcBlock "CORDIC PE3" SrcPort 2 DstBlock "CORDIC PE4" DstPort 2 } Line { SrcBlock "CORDIC PE3" SrcPort 3 DstBlock "CORDIC PE4" DstPort 3 } Line { SrcBlock "CORDIC PE4" SrcPort 1 DstBlock "CORDIC PE5" DstPort 1 } Line { SrcBlock "CORDIC PE4" SrcPort 2 DstBlock "CORDIC PE5" DstPort 2 } Line { SrcBlock "CORDIC PE4" SrcPort 3 DstBlock "CORDIC PE5" DstPort 3 } Line { SrcBlock "CORDIC PE5" SrcPort 1 DstBlock "CORDIC PE6" DstPort 1 } Line { SrcBlock "CORDIC PE5" SrcPort 2 DstBlock "CORDIC PE6" DstPort 2 } Line { SrcBlock "CORDIC PE5" SrcPort 3 DstBlock "CORDIC PE6" DstPort 3 } Line { SrcBlock "CORDIC PE6" SrcPort 1 DstBlock "CORDIC PE7" DstPort 1 } Line { SrcBlock "CORDIC PE6" SrcPort 2 DstBlock "CORDIC PE7" DstPort 2 } Line { SrcBlock "CORDIC PE6" SrcPort 3 DstBlock "CORDIC PE7" DstPort 3 } Line { SrcBlock "CORDIC PE7" SrcPort 1 DstBlock "CORDIC PE8" DstPort 1 } Line { SrcBlock "CORDIC PE7" SrcPort 2 DstBlock "CORDIC PE8" DstPort 2 } Line { SrcBlock "CORDIC PE7" SrcPort 3 DstBlock "CORDIC PE8" DstPort 3 } Line { SrcBlock "CORDIC PE8" SrcPort 1 DstBlock "CORDIC PE9" DstPort 1 } Line { SrcBlock "CORDIC PE8" SrcPort 2 DstBlock "CORDIC PE9" DstPort 2 } Line { SrcBlock "CORDIC PE8" SrcPort 3 DstBlock "CORDIC PE9" DstPort 3 } Line { SrcBlock "CORDIC PE9" SrcPort 1 DstBlock "CORDIC PE10" DstPort 1 } Line { SrcBlock "CORDIC PE9" SrcPort 2 DstBlock "CORDIC PE10" DstPort 2 } Line { SrcBlock "CORDIC PE9" SrcPort 3 DstBlock "CORDIC PE10" DstPort 3 } Line { SrcBlock "CORDIC PE10" SrcPort 1 DstBlock "CORDIC PE11" DstPort 1 } Line { SrcBlock "CORDIC PE10" SrcPort 2 DstBlock "CORDIC PE11" DstPort 2 } Line { SrcBlock "CORDIC PE10" SrcPort 3 DstBlock "CORDIC PE11" DstPort 3 } Line { SrcBlock "CORDIC PE11" SrcPort 1 DstBlock "CORDIC PE12" DstPort 1 } Line { SrcBlock "CORDIC PE11" SrcPort 2 DstBlock "CORDIC PE12" DstPort 2 } Line { SrcBlock "CORDIC PE11" SrcPort 3 DstBlock "CORDIC PE12" DstPort 3 } Line { SrcBlock "CORDIC PE12" SrcPort 1 DstBlock "CORDIC PE13" DstPort 1 } Line { SrcBlock "CORDIC PE12" SrcPort 2 DstBlock "CORDIC PE13" DstPort 2 } Line { SrcBlock "CORDIC PE12" SrcPort 3 DstBlock "CORDIC PE13" DstPort 3 } Line { SrcBlock "CORDIC PE13" SrcPort 1 DstBlock "CORDIC PE14" DstPort 1 } Line { SrcBlock "CORDIC PE13" SrcPort 2 DstBlock "CORDIC PE14" DstPort 2 } Line { SrcBlock "CORDIC PE13" SrcPort 3 DstBlock "CORDIC PE14" DstPort 3 } Line { SrcBlock "CORDIC PE14" SrcPort 1 DstBlock "CORDIC PE15" DstPort 1 } Line { SrcBlock "CORDIC PE14" SrcPort 2 DstBlock "CORDIC PE15" DstPort 2 } Line { SrcBlock "CORDIC PE14" SrcPort 3 DstBlock "CORDIC PE15" DstPort 3 } Line { SrcBlock "x" SrcPort 1 DstBlock "CORDIC PE1" DstPort 1 } Line { SrcBlock "y" SrcPort 1 DstBlock "CORDIC PE1" DstPort 2 } Line { SrcBlock "z" SrcPort 1 DstBlock "CORDIC PE1" DstPort 3 } Line { SrcBlock "CORDIC PE15" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "CORDIC PE15" SrcPort 2 DstBlock "Terminator" DstPort 1 } Line { SrcBlock "CORDIC PE15" SrcPort 3 DstBlock "Z" DstPort 1 } Annotation { Name "The fine angle rotation operation is performed iteratively in stages (0..stages-1). \nThe i-th PE rot" "ates its input vector by an angle +/- atan(1/2^i), driving its input y coordinate towards zero." Position [40, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" FontSize 14 } } } Block { BlockType Reference Name "Constant" SID "9655:118" Ports [0, 1] Position [20, 147, 65, 163] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,16,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Quadrant Correct" SID "9655:119" Ports [3, 1] Position [700, 71, 795, 149] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'Z in');\nport_label('input',2,'sgn(y)');\nport_label('input',3,'sgn(x)');\nport_label('output',1,'Z');" "\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Quadrant Correct" Location [-6, 124, 779, 776] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Z IN" SID "9655:120" Position [105, 48, 135, 62] IconDisplay "Port number" } Block { BlockType Inport Name "PI_ addsub" SID "9655:121" Position [15, 123, 45, 137] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Z MUX SEL" SID "9655:122" Position [55, 28, 85, 42] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "+PI" SID "9655:123" Ports [0, 1] Position [100, 158, 200, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "pi" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "100,24,0,1,white,blue,0,8a4b1ba4,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 100 100 0 0 ],[0 0 24 24 0 ],[0.77 0.8" "2 0.91 ]);\nplot([0 100 100 0 0 ],[0 0 24 24 0 ]);\npatch([43.325 47.66 50.66 53.66 56.66 50.66 46.325 43.325 ]," "[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([46.325 50.66 47.66 43.325 46.325 ],[12.33 " "12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([43.325 47.66 50.66 46.325 43.325 ],[9.33 9.33 12.33 12." "33 9.33 ],[1 1 1 ]);\npatch([46.325 56.66 53.66 50.66 47.66 43.325 46.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 " "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');c" "olor('black');port_label('output',1,'3.1416015625');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMENT" ": Make no changes above this line -- machine generated code. ');\n" } Block { BlockType Reference Name "-PI" SID "9655:124" Ports [0, 1] Position [100, 198, 200, 222] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "-pi" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "100,24,0,1,white,blue,0,c63dff26,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 100 100 0 0 ],[0 0 24 24 0 ],[0.77 0.8" "2 0.91 ]);\nplot([0 100 100 0 0 ],[0 0 24 24 0 ]);\npatch([43.325 47.66 50.66 53.66 56.66 50.66 46.325 43.325 ]," "[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([46.325 50.66 47.66 43.325 46.325 ],[12.33 " "12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([43.325 47.66 50.66 46.325 43.325 ],[9.33 9.33 12.33 12." "33 9.33 ],[1 1 1 ]);\npatch([46.325 56.66 53.66 50.66 47.66 43.325 46.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 " "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');c" "olor('black');port_label('output',1,'-3.1416015625');\nfprintf('','COMMENT: end icon text');\nfprintf('','COMMEN" "T: Make no changes above this line -- machine generated code. ');\n" } Block { BlockType Reference Name "AddSub" SID "9655:125" Ports [2, 1] Position [350, 152, 420, 228] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,76,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 70 70 0 0 ],[0 0 76 76 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 70 70 0 0 ],[0 0 76 76 0 ]);\npatch([12.75 27.2 37.2 47.2 57.2 37.2 22.75 12.75 ],[49.1 49.1 5" "9.1 49.1 59.1 59.1 59.1 49.1 ],[1 1 1 ]);\npatch([22.75 37.2 27.2 12.75 22.75 ],[39.1 39.1 49.1 49.1 39.1 ],[0.9" "31 0.946 0.973 ]);\npatch([12.75 27.2 37.2 22.75 12.75 ],[29.1 29.1 39.1 39.1 29.1 ],[1 1 1 ]);\npatch([22.75 57" ".2 47.2 37.2 27.2 12.75 22.75 ],[19.1 19.1 29.1 19.1 29.1 29.1 19.1 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');color('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a - b}','texmode','on');\nfp" "rintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert" SID "9655:126" Ports [1, 1] Position [105, 121, 145, 139] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "The input is presented at the output after quantization and overflow effects.

Hardware notes" ": Additional hardware is used when rounding or saturation is selected and output width is less than the input wi" "dth." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "8" bin_pt "6" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "9655:127" Ports [3, 1] Position [470, 26, 510, 84] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,58,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 40 40 0 0 ],[0 8.28571 49.7143 58 0 ]," "[0.77 0.82 0.91 ]);\nplot([0 40 40 0 0 ],[0 8.28571 49.7143 58 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.8" "75 8.875 ],[34.55 34.55 39.55 34.55 39.55 39.55 39.55 34.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ]" ",[29.55 29.55 34.55 34.55 29.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[24.55 24.55 29." "55 29.55 24.55 ],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[19.55 19.55 24.55 19.55 24.55 24." "55 19.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon " "text ');color('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end i" "con text');\n" } Block { BlockType Reference Name "Mux1" SID "9655:128" Ports [3, 1] Position [235, 110, 275, 230] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,120,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 40 40 0 0 ],[0 17.1429 102.857 120 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 40 40 0 0 ],[0 17.1429 102.857 120 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13" ".875 8.875 ],[65.55 65.55 70.55 65.55 70.55 70.55 70.55 65.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875" " ],[60.55 60.55 65.55 65.55 60.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[55.55 55.55 6" "0.55 60.55 55.55 ],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[50.55 50.55 55.55 50.55 55.55 5" "5.55 50.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin ico" "n text ');color('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black'" ");port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');\n" } Block { BlockType Outport Name "Z" SID "9655:129" Position [595, 48, 625, 62] IconDisplay "Port number" } Line { SrcBlock "PI_ addsub" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Z MUX SEL" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [15, 0; 0, -115] DstBlock "Mux" DstPort 3 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "Z IN" SrcPort 1 Points [160, 0] Branch { Points [0, 155] DstBlock "AddSub" DstPort 2 } Branch { DstBlock "Mux" DstPort 2 } } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Mux1" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "+PI" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "-PI" SrcPort 1 DstBlock "Mux1" DstPort 3 } Annotation { Name "The CORDIC algorithm coverges for angles between -pi/2 to +pi/2. The Quadrant Correct subsystem ref" "lects\nthe angle back to the 2nd and 3rd quadrant from the 1st and 4th quadarnt if reflection was applied during" " the\nquadarnt map stage. Reflection is applied by subtracting the output angle by pi if the original vector was" " in the\n2nd quadrant and -p if it was in the 3rd quadrant." Position [35, 325] HorizontalAlignment "left" DropShadow on FontName "Arial" FontSize 12 } } } Block { BlockType SubSystem Name "Quadrant Map" SID "9655:130" Ports [2, 4] Position [140, 36, 235, 124] BackgroundColor "yellow" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskInitialization "[bg,fg] = xlcmap('XBlock',0);\niPos = get_param(gcb,'Position');\niWidth=iPos(3)-iPos(1)" "; iHeight=iPos(4)-iPos(2);\niCx=iWidth/2;\niCy=iHeight/2;\n[logoX, logoY] = xlogo(iPos);" MaskDisplay "patch([0 iWidth iWidth 0],[0 0 iHeight iHeight] , bg);\npatch(logoX,logoY , fg);\nport_label('" "input',1,'x');\nport_label('input',2,'y');\nport_label('output',1,'X');\nport_label('output',2,'Y');\nport_label" "('output',3,'sgn(y)');\nport_label('output',4,'sgn(x)');\nplot([0 0 iWidth iWidth 0], [0 iHeight iHeight 0 0]);" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Quadrant Map" Location [215, 93, 860, 608] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "x" SID "9655:131" Position [55, 58, 85, 72] IconDisplay "Port number" } Block { BlockType Inport Name "y" SID "9655:132" Position [60, 158, 90, 172] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Delay3" SID "9655:133" Ports [1, 1] Position [350, 154, 395, 176] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,22,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 45 45 0 0 ],[0 0 22 22 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 45 45 0 0 ],[0 0 22 22 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[14." "33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[11.33 11.3" "3 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[8.33 8.33 11.33 11.33 8" ".33 ],[1 1 1 ]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\nc" "olor('black');disp('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay4" SID "9655:134" Ports [1, 1] Position [135, 57, 160, 73] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Delay line having configurable length.

Hardware notes: A delay line is a chain, each link o" "f which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-" "flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,16,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 " "8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black');disp('z^{-1}','" "texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux" SID "9655:135" Ports [3, 1] Position [455, 29, 495, 101] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" infoedit "Binary points are aligned automatically.

Hardware notes: A multiplexer using tristate buffer" "s requires fewer lookup tables but is slower." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,72,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 40 40 0 0 ],[0 10.2857 61.7143 72 0 ]," "[0.77 0.82 0.91 ]);\nplot([0 40 40 0 0 ],[0 10.2857 61.7143 72 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.8" "75 8.875 ],[41.55 41.55 46.55 41.55 46.55 46.55 46.55 41.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ]" ",[36.55 36.55 41.55 41.55 36.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[31.55 31.55 36." "55 36.55 31.55 ],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[26.55 26.55 31.55 26.55 31.55 31." "55 26.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon " "text ');color('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end i" "con text');\n" } Block { BlockType Reference Name "Negate1" SID "9655:136" Ports [1, 1] Position [310, 80, 340, 100] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "pe_nbits" bin_pt "pe_binpt" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[12.22 " "12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.22 12.2" "2 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 " "1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\n\ncolor('black'" ");disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "sgn(x)" SID "9655:137" Ports [1, 1] Position [240, 30, 280, 50] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "sgn(y)" SID "9655:138" Ports [1, 1] Position [475, 215, 515, 235] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics ');patch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82 " "0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22 " "12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12.2" "2 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 " "1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin icon text ');\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "X" SID "9655:139" Position [565, 58, 595, 72] IconDisplay "Port number" } Block { BlockType Outport Name "Y" SID "9655:140" Position [575, 158, 605, 172] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "sign(y)" SID "9655:141" Position [570, 218, 600, 232] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "sign(x)" SID "9655:142" Position [570, 263, 600, 277] Port "4" IconDisplay "Port number" } Line { SrcBlock "Delay4" SrcPort 1 Points [0, 0; 30, 0] Branch { DstBlock "Mux" DstPort 2 } Branch { Points [0, 25] DstBlock "Negate1" DstPort 1 } Branch { Points [0, -25] DstBlock "sgn(x)" DstPort 1 } } Line { SrcBlock "sgn(y)" SrcPort 1 DstBlock "sign(y)" DstPort 1 } Line { SrcBlock "sgn(x)" SrcPort 1 Points [135, 0] Branch { Points [0, 230] DstBlock "sign(x)" DstPort 1 } Branch { DstBlock "Mux" DstPort 1 } } Line { SrcBlock "x" SrcPort 1 DstBlock "Delay4" DstPort 1 } Line { SrcBlock "y" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "X" DstPort 1 } Line { SrcBlock "Negate1" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Delay3" SrcPort 1 Points [45, 0] Branch { Points [0, 60] DstBlock "sgn(y)" DstPort 1 } Branch { DstBlock "Y" DstPort 1 } } Annotation { Name "The CORDIC algorithm converges for angles between -pi/2 to +pi/2. The Quadrant Map subsystem always" " maps the\nabsolute value for x-axis. This reflects the input vector from the 2nd and 3rd quadrant to the 1st an" "d 4th quadrant, resp." Position [45, 360] HorizontalAlignment "left" DropShadow on FontName "Arial" FontSize 12 } } } Block { BlockType Outport Name "X" SID "9655:143" Position [840, 48, 870, 62] IconDisplay "Port number" } Block { BlockType Outport Name "Z" SID "9655:144" Position [840, 103, 870, 117] Port "2" IconDisplay "Port number" } Line { SrcBlock "Constant" SrcPort 1 Points [220, 0; 0, -65] DstBlock "CORDIC Fine Angle PE" DstPort 3 } Line { SrcBlock "Quadrant Map" SrcPort 1 DstBlock "CORDIC Fine Angle PE" DstPort 1 } Line { SrcBlock "Quadrant Map" SrcPort 2 DstBlock "CORDIC Fine Angle PE" DstPort 2 } Line { SrcBlock "x" SrcPort 1 DstBlock "Quadrant Map" DstPort 1 } Line { SrcBlock "y" SrcPort 1 DstBlock "Quadrant Map" DstPort 2 } Line { SrcBlock "Quadrant Map" SrcPort 3 Points [30, 0; 0, 90] DstBlock "CORDIC \nPipe Balance" DstPort 1 } Line { SrcBlock "Quadrant Map" SrcPort 4 Points [10, 0; 0, 95] DstBlock "CORDIC \nPipe Balance1" DstPort 1 } Line { SrcBlock "CORDIC \nPipe Balance" SrcPort 1 Points [45, 0; 0, -70] DstBlock "Quadrant Correct" DstPort 2 } Line { SrcBlock "CORDIC \nPipe Balance1" SrcPort 1 Points [65, 0; 0, -70] DstBlock "Quadrant Correct" DstPort 3 } Line { SrcBlock "CORDIC Fine Angle PE" SrcPort 2 DstBlock "Quadrant Correct" DstPort 1 } Line { SrcBlock "Quadrant Correct" SrcPort 1 DstBlock "Z" DstPort 1 } Line { SrcBlock "CORDIC Fine Angle PE" SrcPort 1 DstBlock "CORDIC \nPipe Balance2" DstPort 1 } Line { SrcBlock "CORDIC \nPipe Balance2" SrcPort 1 DstBlock "X" DstPort 1 } Annotation { Name "The CORDIC algorithm is implemented in 3 steps.\n\nStep 1: Coarse Angle Rotation. The algorithm conv" "erges only for angles between -pi/2 and pi/2, so if x < zero, the input vector is reflected \nto the 1st or 3rd " "quadrant by making the x-coordinate non-negative. \n\nStep 2: Fine Angle Rotation. For rectangular-to-polar con" "version, the resulting vector is rotated through progressively smaller angles, such that y goes\nto zero. In the" " i-th stage, the angular rotation is by either +/- atan(1/2^i), depending on whether or not its input y is less " "than or greater than zero. \n\nStep 3: Angle Correction. If there was a reflection applied in Step 1, this step " "applies the appropriate angle correction by subtracting it from +/- pi. " Position [20, 330] HorizontalAlignment "left" DropShadow on FontName "Arial" } } } Block { BlockType Reference Name "Gateway Out1" SID "9856" Ports [1, 1] Position [910, 349, 945, 361] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out2" SID "9857" Ports [1, 1] Position [910, 364, 945, 376] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out3" SID "9858" Ports [1, 1] Position [910, 379, 945, 391] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out8" SID "9854" Ports [1, 1] Position [910, 334, 945, 346] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Outport Name "Phase" SID "4746" Position [1140, 188, 1170, 202] IconDisplay "Port number" } Block { BlockType Outport Name "Mag" SID "4747" Position [1140, 138, 1170, 152] Port "2" IconDisplay "Port number" } Line { SrcBlock "CORDIC ATAN1" SrcPort 2 Points [50, 0] Branch { DstBlock "Phase" DstPort 1 } Branch { Points [0, 190] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "CORDIC ATAN1" SrcPort 1 Points [55, 0] Branch { DstBlock "Mag" DstPort 1 } Branch { Points [0, 225] DstBlock "Gateway Out2" DstPort 1 } } Line { SrcBlock "I" SrcPort 1 Points [90, 0] Branch { DstBlock "CORDIC ATAN1" DstPort 1 } Branch { Points [0, 195] DstBlock "Gateway Out8" DstPort 1 } } Line { SrcBlock "Q" SrcPort 1 Points [80, 0] Branch { DstBlock "CORDIC ATAN1" DstPort 2 } Branch { Points [0, 160] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "Gateway Out8" SrcPort 1 Points [30, 0] } Line { SrcBlock "Gateway Out1" SrcPort 1 Points [30, 0] } Line { SrcBlock "Gateway Out2" SrcPort 1 Points [30, 0] } Line { SrcBlock "Gateway Out3" SrcPort 1 Points [30, 0] } } } Block { BlockType Reference Name "Delay1" SID "4748" Ports [1, 1] Position [730, 511, 770, 529] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "8" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,e47f993a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-8}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "4749" Ports [1, 1] Position [730, 601, 770, 619] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "8" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,e47f993a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-8}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "4750" Ports [1, 1] Position [480, 466, 520, 484] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "4751" Ports [1, 1] Position [730, 566, 770, 584] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "8" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,e47f993a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-8}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "4752" Ports [1, 1] Position [730, 476, 770, 494] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "8" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,e47f993a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-8}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "4753" Ports [1, 1] Position [735, 36, 775, 54] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "8" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,e47f993a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-8}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "4754" Position [15, 82, 140, 98] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType SubSystem Name "H Magnitude Check" SID "4755" Ports [7, 2] Position [750, 340, 860, 410] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "H Magnitude Check" Location [2, 82, 1254, 987] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "128" Block { BlockType Inport Name "I" SID "4756" Position [135, 473, 165, 487] IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "4757" Position [135, 523, 165, 537] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Train" SID "4758" Position [140, 423, 170, 437] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Odd Sym" SID "4759" Position [140, 668, 170, 682] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "H_BA Vin" SID "4760" Position [135, 768, 165, 782] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "H_AA Vin" SID "4761" Position [135, 743, 165, 757] NamePlacement "alternate" Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Subcar Ind" SID "4762" Position [140, 233, 170, 247] NamePlacement "alternate" Port "7" IconDisplay "Port number" } Block { BlockType Reference Name "Accumulator" SID "4763" Ports [2, 1] Position [495, 211, 555, 269] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. Output type and binary point position match the input.

Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to run " "at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "32" overflow "Flag as error" scale "1" rst on hasbypass off en off dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,457" block_type "accum" block_version "10.1.3" sg_icon_stat "60,58,2,1,white,blue,0,6949434e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 58 58 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[37.88 37" ".88 45.88 37.88 45.88 45.88 45.88 37.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[29.88 29.88 37.88 37." "88 29.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[21.88 21.88 29.88 29.88 21.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[13.88 13.88 21.88 13.88 21.88 21.88 13.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'\\bf+" "=b','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub2" SID "4764" Ports [2, 1] Position [330, 473, 370, 542] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "15" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,69,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 69 69 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 69 69 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[39.55 39." "55 44.55 39.55 44.55 44.55 44.55 39.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[34.55 34.55 39.55 3" "9.55 34.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[29.55 29.55 34.55 34.55 29.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[24.55 24.55 29.55 24.55 29.55 29.55 24.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "Chan Mag" SID "4765" Ports [8] Position [1140, 31, 1185, 144] NamePlacement "alternate" Floating off Location [741, 306, 2421, 1273] Open off NumInputPorts "8" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" axes8 "%" } TimeRange "392.7801724137931" YMin "-0.5~-0.25~-1~-1~0~0~0~-5" YMax "0.5~0.15~1~1~1~3500~1~5" SaveName "ScopeData15" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "Channel Choice Logic" SID "4766" Ports [5, 2] Position [1095, 490, 1205, 600] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Channel Choice Logic" Location [1097, 326, 1512, 532] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "140" Block { BlockType Inport Name "Train" SID "4767" Position [15, 28, 45, 42] IconDisplay "Port number" } Block { BlockType Inport Name "HBA > Thresh" SID "4768" Position [170, 253, 200, 267] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "HAA > Thresh" SID "4769" Position [165, 133, 195, 147] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "HAA_Vin" SID "4770" Position [165, 153, 195, 167] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "HBA_Vin" SID "4771" Position [170, 268, 200, 282] Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "Convert1" SID "4772" Ports [1, 1] Position [260, 28, 285, 42] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "4773" Ports [1, 1] Position [195, 198, 220, 212] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "4774" Ports [1, 1] Position [260, 58, 285, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "4775" Ports [1, 1] Position [655, 288, 680, 302] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "4776" Position [15, 197, 140, 213] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType Goto Name "Goto" SID "4777" Position [720, 342, 880, 358] ShowName off GotoTag "regRx_pilotChanAA_aboveThresh" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "4778" Position [720, 287, 880, 303] ShowName off GotoTag "regRx_pilotChanBA_aboveThresh" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "4779" Ports [1, 1] Position [420, 56, 455, 74] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,251" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,267846e5,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "4780" Ports [1, 1] Position [300, 196, 335, 214] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "4781" Ports [3, 1] Position [420, 238, 450, 282] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,44,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 44 44 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[26.44 26.4" "4 30.44 26.44 30.44 30.44 30.44 26.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[22.44 22.44 26.44 26.44 " "22.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 22.44 18.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 14.44 18.44 18.44 14.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4782" Ports [2, 1] Position [420, 83, 450, 127] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 44 44 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[26.44 26.4" "4 30.44 26.44 30.44 30.44 30.44 26.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[22.44 22.44 26.44 26.44 " "22.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 22.44 18.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 14.44 18.44 18.44 14.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "4783" Ports [3, 1] Position [480, 80, 505, 220] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,140,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 140 140 0 ],[0.77 0." "82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 140 140 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[73" ".33 73.33 76.33 73.33 76.33 76.33 76.33 73.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[70.33 70.33 7" "3.33 73.33 70.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[67.33 67.33 70.33 70.33 67.33 " "],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[64.33 64.33 67.33 64.33 67.33 67.33 64.33 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "4784" Ports [2, 1] Position [420, 173, 450, 217] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 44 44 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[26.44 26.4" "4 30.44 26.44 30.44 30.44 30.44 26.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[22.44 22.44 26.44 26.44 " "22.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 22.44 18.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 14.44 18.44 18.44 14.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "4785" Ports [2, 1] Position [420, 128, 450, 172] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 44 44 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[26.44 26.4" "4 30.44 26.44 30.44 30.44 30.44 26.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[22.44 22.44 26.44 26.44 " "22.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 22.44 18.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 14.44 18.44 18.44 14.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "4786" Ports [2, 1] Position [545, 120, 595, 160] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch" Location [542, 167, 762, 256] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "4787" Position [115, 98, 145, 112] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "4788" Position [115, 108, 145, 122] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant2" SID "4789" Ports [0, 1] Position [155, 62, 170, 78] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 " "12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "4790" Ports [3, 1] Position [215, 87, 260, 123] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,36,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 36 36 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[23.55 2" "3.55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[18.55 18.55 23.5" "5 23.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[13.55 13.55 18.55 18.55 13.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3," "'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Outport Name "D" SID "4791" Position [320, 98, 350, 112] IconDisplay "Port number" } Line { SrcBlock "Constant2" SrcPort 1 Points [0, 25] DstBlock "Register" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register" DstPort 2 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register" DstPort 3 } Line { SrcBlock "Register" SrcPort 1 DstBlock "D" DstPort 1 } } } Block { BlockType SubSystem Name "S-R Latch1" SID "4792" Ports [2, 1] Position [545, 230, 595, 270] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch1" Location [202, 70, 1918, 1081] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "4793" Position [115, 98, 145, 112] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "4794" Position [115, 108, 145, 122] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant2" SID "4795" Ports [0, 1] Position [155, 62, 170, 78] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 " "12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "4796" Ports [3, 1] Position [215, 87, 260, 123] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,36,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 36 36 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[23.55 2" "3.55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[18.55 18.55 23.5" "5 23.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[13.55 13.55 18.55 18.55 13.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3," "'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Outport Name "D" SID "4797" Position [320, 98, 350, 112] IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "D" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register" DstPort 3 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 Points [0, 25] DstBlock "Register" DstPort 1 } } } Block { BlockType SubSystem Name "S-R Latch2" SID "4798" Ports [2, 1] Position [545, 330, 595, 370] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch2" Location [542, 167, 762, 256] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "4799" Position [115, 98, 145, 112] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "4800" Position [115, 108, 145, 122] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant2" SID "4801" Ports [0, 1] Position [155, 62, 170, 78] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 " "12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "4802" Ports [3, 1] Position [215, 87, 260, 123] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,36,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 36 36 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[23.55 2" "3.55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[18.55 18.55 23.5" "5 23.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[13.55 13.55 18.55 18.55 13.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3," "'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Outport Name "D" SID "4803" Position [320, 98, 350, 112] IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "D" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register" DstPort 3 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 Points [0, 25] DstBlock "Register" DstPort 1 } } } Block { BlockType SubSystem Name "negedge" SID "4804" Ports [1, 1] Position [155, 56, 210, 74] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "negedge" Location [202, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "4805" Position [40, 38, 70, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Delay12" SID "4806" Ports [1, 1] Position [130, 29, 160, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "4807" Ports [1, 1] Position [175, 57, 215, 73] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4808" Ports [2, 1] Position [250, 35, 285, 75] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,40,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 40 40 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4809" Position [310, 48, 340, 62] IconDisplay "Port number" } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [15, 0] Branch { DstBlock "Delay12" DstPort 1 } Branch { Points [0, 20] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Delay12" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical2" DstPort 2 } } } Block { BlockType SubSystem Name "posedge1" SID "4810" Ports [1, 1] Position [155, 26, 210, 44] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge1" Location [435, 153, 872, 268] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "4811" Position [40, 38, 70, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Delay12" SID "4812" Ports [1, 1] Position [130, 29, 160, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "4813" Ports [1, 1] Position [175, 37, 215, 53] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4814" Ports [2, 1] Position [250, 35, 285, 75] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,40,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 40 40 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4815" Position [310, 48, 340, 62] IconDisplay "Port number" } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [15, 0] Branch { Points [0, 20] DstBlock "Logical2" DstPort 2 } Branch { DstBlock "Delay12" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Delay12" SrcPort 1 DstBlock "Inverter1" DstPort 1 } } } Block { BlockType Outport Name "Use HAA" SID "4816" Position [705, 133, 735, 147] IconDisplay "Port number" } Block { BlockType Outport Name "Use HBA" SID "4817" Position [705, 243, 735, 257] Port "2" IconDisplay "Port number" } Line { SrcBlock "Logical9" SrcPort 1 Points [10, 0] Branch { DstBlock "Logical4" DstPort 2 } Branch { Points [0, 210] DstBlock "S-R Latch2" DstPort 2 } } Line { SrcBlock "HAA_Vin" SrcPort 1 Points [140, 0] Branch { Points [0, 25] DstBlock "Logical5" DstPort 1 } Branch { DstBlock "Logical9" DstPort 2 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "Logical4" DstPort 3 } Line { SrcBlock "HAA > Thresh" SrcPort 1 DstBlock "Logical9" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "S-R Latch1" DstPort 2 } Line { SrcBlock "HBA_Vin" SrcPort 1 DstBlock "Logical1" DstPort 3 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "HBA > Thresh" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Train" SrcPort 1 Points [75, 0] Branch { DstBlock "posedge1" DstPort 1 } Branch { Points [0, 30] DstBlock "negedge" DstPort 1 } } Line { SrcBlock "posedge1" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "negedge" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "S-R Latch1" SrcPort 1 Points [5, 0] Branch { DstBlock "Use HBA" DstPort 1 } Branch { Points [0, -185] DstBlock "Inverter1" DstPort 1 } Branch { Points [0, 45] DstBlock "Convert4" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 Points [-75, 0; 0, 30] DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Use HAA" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 Points [50, 0] Branch { DstBlock "Inverter3" DstPort 1 } Branch { Points [0, 40] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "Convert1" SrcPort 1 Points [230, 0; 0, 95] Branch { DstBlock "S-R Latch" DstPort 1 } Branch { Points [0, 110] Branch { DstBlock "S-R Latch1" DstPort 1 } Branch { Points [0, 100] DstBlock "S-R Latch2" DstPort 1 } } } Line { SrcBlock "Convert3" SrcPort 1 Points [35, 0; 0, 50] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "S-R Latch2" SrcPort 1 DstBlock "Goto" DstPort 1 } Line { SrcBlock "Convert4" SrcPort 1 DstBlock "Goto1" DstPort 1 } Annotation { Name "In SISO/MIMO mode, always use the HAA pilots.\n\nIn Alamouti mode, there are four states:\nGood HAA a" "nd Good HBA: Use both\nGood HAA and Bad HBA: Use just HAA\nBad HAA and Good HBA: Use just HBA\nBad HAA and Bad H" "BA: Use just HAA\n(since the only time we're sure just one stream\nis on the air, it's stream A from the src nod" "e)" Position [114, 393] HorizontalAlignment "left" } Annotation { Name "GOTOs for register access of channel magnitude status." Position [804, 322] } } } Block { BlockType Reference Name "Constant" SID "4818" Ports [0, 1] Position [880, 525, 905, 545] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "4" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,20,0,1,white,blue,0,85f36853,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12" ".22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12." "22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('out" "put',1,'4');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "4819" Ports [0, 1] Position [280, 258, 300, 282] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "20,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('o" "utput',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "4820" Ports [0, 1] Position [280, 163, 300, 187] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "63" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "20,24,0,1,white,blue,0,346a66ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('o" "utput',1,'63');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "4821" Ports [1, 1] Position [250, 743, 275, 757] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "4822" Ports [1, 1] Position [250, 768, 275, 782] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "4823" Ports [1, 1] Position [395, 668, 420, 682] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "4824" Ports [1, 1] Position [395, 693, 420, 707] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter" SID "4825" Ports [2, 1] Position [805, 467, 840, 563] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "3" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,96,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 96 96 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 96 96 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[53.55 53." "55 58.55 53.55 58.55 58.55 58.55 53.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[48.55 48.55 53.55 5" "3.55 48.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[43.55 43.55 48.55 48.55 43.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[38.55 38.55 43.55 38.55 43.55 43.55 38.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "4826" Ports [2, 1] Position [805, 562, 840, 658] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "3" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,96,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 96 96 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 96 96 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[53.55 53." "55 58.55 53.55 58.55 58.55 58.55 53.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[48.55 48.55 53.55 5" "3.55 48.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[43.55 43.55 48.55 48.55 43.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[38.55 38.55 43.55 38.55 43.55 43.55 38.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "4827" Ports [1, 1] Position [810, 766, 850, 784] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "4828" Ports [1, 1] Position [300, 741, 340, 759] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "4829" Ports [1, 1] Position [810, 741, 850, 759] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "4830" Ports [1, 1] Position [300, 766, 340, 784] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "4831" Ports [1, 1] Position [505, 181, 545, 199] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "4832" Ports [1, 1] Position [505, 351, 545, 369] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "4833" Ports [1, 1] Position [505, 381, 545, 399] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "4834" Position [280, 301, 430, 319] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_chanEst_minMagA" TagVisibility "global" } Block { BlockType From Name "From2" SID "4835" Position [270, 556, 435, 574] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_MinimumPilotChanMag" TagVisibility "global" } Block { BlockType From Name "From3" SID "4836" Position [280, 326, 430, 344] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_chanEst_minMagB" TagVisibility "global" } Block { BlockType From Name "From4" SID "4837" Position [815, 146, 965, 164] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_UseChanMag_Masking" TagVisibility "global" } Block { BlockType Goto Name "Goto" SID "4838" Position [1145, 262, 1305, 278] ShowName off GotoTag "ChanEstMagCheck_MaskAA" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "4839" Position [1145, 327, 1305, 343] ShowName off GotoTag "ChanEstMagCheck_MaskBA" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "4840" Ports [1, 1] Position [800, 290, 825, 300] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,10,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 10 10 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 10 10 0 ]);\npatch([9.775 11.22 12.22 13.22 14.22 12.22 10.775 9.775 ],[6.11" " 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([10.775 12.22 11.22 9.775 10.775 ],[5.11 5.11 6.11 6.11 " "5.11 ],[0.931 0.946 0.973 ]);\npatch([9.775 11.22 12.22 10.775 9.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\np" "atch([10.775 14.22 13.22 12.22 11.22 9.775 10.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('n" "ot');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "4841" Ports [2, 1] Position [745, 575, 775, 595] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('blac" "k');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4842" Ports [2, 1] Position [615, 596, 645, 669] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,73,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 73 73 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 73 73 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[40.44 40.4" "4 44.44 40.44 44.44 44.44 44.44 40.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[36.44 36.44 40.44 40.44 " "36.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[32.44 32.44 36.44 36.44 32.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[28.44 28.44 32.44 28.44 32.44 32.44 28.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "4843" Ports [2, 1] Position [745, 480, 775, 500] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('blac" "k');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "4844" Ports [2, 1] Position [1080, 251, 1115, 284] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 33 33 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "4845" Ports [3, 1] Position [875, 281, 905, 309] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical6" SID "4846" Ports [2, 1] Position [1080, 316, 1115, 349] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 33 33 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "4847" Ports [3, 1] Position [875, 346, 905, 374] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical8" SID "4848" Ports [2, 1] Position [615, 501, 645, 574] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,73,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 73 73 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 73 73 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[40.44 40.4" "4 44.44 40.44 44.44 44.44 44.44 40.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[36.44 36.44 40.44 40.44 " "36.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[32.44 32.44 36.44 36.44 32.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[28.44 28.44 32.44 28.44 32.44 32.44 28.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult1" SID "4849" Ports [2, 1] Position [240, 470, 280, 505] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,35,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 35 35 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa " "\\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult2" SID "4850" Ports [2, 1] Position [240, 505, 280, 540] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "16" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,35,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 35 35 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa " "\\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "4851" Ports [3, 1] Position [950, 243, 1000, 307] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,64,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 64 64 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 64 64 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[39.7" "7 39.77 46.77 39.77 46.77 46.77 46.77 39.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[32.77 32.77 " "39.77 39.77 32.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[25.77 25.77 32.77 32.77 25." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[18.77 18.77 25.77 18.77 25.77 25.77 18.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label" "('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "4852" Ports [3, 1] Position [950, 308, 1000, 372] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,64,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 64 64 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 64 64 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[39.7" "7 39.77 46.77 39.77 46.77 46.77 46.77 39.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[32.77 32.77 " "39.77 39.77 32.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[25.77 25.77 32.77 32.77 25." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[18.77 18.77 25.77 18.77 25.77 25.77 18.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label" "('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "4853" Ports [2, 1] Position [510, 502, 550, 533] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "40,31,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 31 31 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b'," "'texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "4854" Ports [2, 1] Position [940, 506, 980, 544] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "40,38,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 38 38 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[24.55 24." "55 29.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[19.55 19.55 24.55 2" "4.55 19.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa " "\\geq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "4855" Ports [2, 1] Position [940, 601, 980, 639] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "40,38,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 38 38 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[24.55 24." "55 29.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[19.55 19.55 24.55 2" "4.55 19.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa " "\\geq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "4856" Ports [2, 1] Position [375, 227, 430, 283] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "55,56,2,1,white,blue,0,3618233f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 56 56 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[35" ".77 35.77 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[28.77 28." "77 35.77 35.77 28.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[21.77 21.77 28.77 28.7" "7 21.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[14.77 14.77 21.77 14.77 21.77 21.77" " 14.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_l" "abel('output',1,'\\bfa = b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('bl" "ack');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "4857" Ports [2, 1] Position [640, 227, 695, 283] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "4861" Ports [1, 1] Position [1020, 105, 1055, 115] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done3" SID "4862" Ports [1, 1] Position [1020, 30, 1055, 40] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "4863" Ports [1, 1] Position [1020, 45, 1055, 55] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "4864" Ports [1, 1] Position [1020, 75, 1055, 85] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done6" SID "4865" Ports [1, 1] Position [1020, 60, 1055, 70] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done7" SID "4866" Ports [1, 1] Position [1020, 120, 1055, 130] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done8" SID "4867" Ports [1, 1] Position [1020, 135, 1055, 145] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType SubSystem Name "negedge" SID "4868" Ports [1, 1] Position [305, 691, 360, 709] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "negedge" Location [435, 153, 872, 268] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "4869" Position [40, 38, 70, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Delay12" SID "4870" Ports [1, 1] Position [130, 29, 160, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "4871" Ports [1, 1] Position [175, 57, 215, 73] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4872" Ports [2, 1] Position [250, 35, 285, 75] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,40,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 40 40 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4873" Position [310, 48, 340, 62] IconDisplay "Port number" } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [15, 0] Branch { DstBlock "Delay12" DstPort 1 } Branch { Points [0, 20] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Delay12" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical2" DstPort 2 } } } Block { BlockType SubSystem Name "posedge1" SID "4874" Ports [1, 1] Position [245, 421, 300, 439] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge1" Location [435, 153, 872, 268] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "4875" Position [40, 38, 70, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Delay12" SID "4876" Ports [1, 1] Position [130, 29, 160, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "4877" Ports [1, 1] Position [175, 37, 215, 53] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4878" Ports [2, 1] Position [250, 35, 285, 75] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,40,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 40 40 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4879" Position [310, 48, 340, 62] IconDisplay "Port number" } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [15, 0] Branch { Points [0, 20] DstBlock "Logical2" DstPort 2 } Branch { DstBlock "Delay12" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Delay12" SrcPort 1 DstBlock "Inverter1" DstPort 1 } } } Block { BlockType SubSystem Name "posedge2" SID "4880" Ports [1, 1] Position [305, 666, 360, 684] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge2" Location [435, 153, 872, 268] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "4881" Position [40, 38, 70, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Delay12" SID "4882" Ports [1, 1] Position [130, 29, 160, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "4883" Ports [1, 1] Position [175, 37, 215, 53] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4884" Ports [2, 1] Position [250, 35, 285, 75] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,40,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 40 40 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4885" Position [310, 48, 340, 62] IconDisplay "Port number" } Line { SrcBlock "Delay12" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [15, 0] Branch { DstBlock "Delay12" DstPort 1 } Branch { Points [0, 20] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType Outport Name "Use H_BA" SID "4886" Position [1285, 568, 1315, 582] IconDisplay "Port number" } Block { BlockType Outport Name "Use H_AA" SID "4887" Position [1285, 513, 1315, 527] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Line { SrcBlock "Mult1" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "Mult2" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "I" SrcPort 1 Points [45, 0] Branch { DstBlock "Mult1" DstPort 1 } Branch { Points [0, 15] DstBlock "Mult1" DstPort 2 } } Line { SrcBlock "Q" SrcPort 1 Points [45, 0] Branch { DstBlock "Mult2" DstPort 2 } Branch { Points [0, -15] DstBlock "Mult2" DstPort 1 } } Line { SrcBlock "AddSub2" SrcPort 1 Points [75, 0] Branch { Points [0, -285] Branch { DstBlock "Accumulator" DstPort 1 } Branch { Points [0, -175] DstBlock "done4" DstPort 1 } } Branch { DstBlock "Relational" DstPort 1 } } Line { SrcBlock "From2" SrcPort 1 Points [30, 0; 0, -40] DstBlock "Relational" DstPort 2 } Line { SrcBlock "Train" SrcPort 1 Points [40, 0] Branch { DstBlock "posedge1" DstPort 1 } Branch { Points [0, -40] DstBlock "Delay7" DstPort 1 } } Line { SrcBlock "Channel Choice Logic" SrcPort 1 DstBlock "Use H_AA" DstPort 1 } Line { SrcBlock "H_AA Vin" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "H_BA Vin" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Delay2" SrcPort 1 Points [180, 0] Branch { DstBlock "Delay3" DstPort 1 } Branch { Points [0, -100] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "Delay4" SrcPort 1 Points [175, 0] Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, -220] DstBlock "Logical8" DstPort 2 } } Line { SrcBlock "Counter" SrcPort 1 DstBlock "Relational1" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [5, 0] Branch { DstBlock "Relational1" DstPort 2 } Branch { Points [0, 95] DstBlock "Relational2" DstPort 2 } } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Counter" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Delay4" DstPort 1 } Line { SrcBlock "posedge1" SrcPort 1 Points [400, 0] Branch { Points [0, 55] Branch { DstBlock "Logical3" DstPort 1 } Branch { Points [0, 95] DstBlock "Logical1" DstPort 1 } } Branch { Points [210, 0; 0, -90] Branch { DstBlock "Register1" DstPort 2 } Branch { Points [0, -65] DstBlock "Register" DstPort 2 } } } Line { SrcBlock "Odd Sym" SrcPort 1 Points [100, 0] Branch { DstBlock "posedge2" DstPort 1 } Branch { Points [0, 25] DstBlock "negedge" DstPort 1 } Branch { Points [0, -70; -155, 0; 0, -245] DstBlock "Delay6" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Counter1" DstPort 1 } Line { SrcBlock "posedge2" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "negedge" SrcPort 1 DstBlock "Convert4" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [35, 0] Branch { DstBlock "Logical8" DstPort 1 } Branch { Points [0, 95] DstBlock "Logical2" DstPort 1 } } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "Counter" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Counter1" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Relational2" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Channel Choice Logic" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 Points [20, 0; 0, -75] DstBlock "Channel Choice Logic" DstPort 3 } Line { SrcBlock "Channel Choice Logic" SrcPort 2 DstBlock "Use H_BA" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 Points [155, 0; 0, -185] DstBlock "Channel Choice Logic" DstPort 4 } Line { SrcBlock "Delay1" SrcPort 1 Points [160, 0; 0, -190] DstBlock "Channel Choice Logic" DstPort 5 } Line { SrcBlock "Convert3" SrcPort 1 Points [285, 0; 0, -180] DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Convert4" SrcPort 1 Points [290, 0; 0, -110] DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Accumulator" DstPort 2 } Line { SrcBlock "Accumulator" SrcPort 1 Points [25, 0] Branch { DstBlock "Relational4" DstPort 1 } Branch { Points [0, 65] DstBlock "Relational5" DstPort 1 } Branch { Points [0, -175] DstBlock "done6" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 Points [140, 0; 0, -40] DstBlock "Relational4" DstPort 2 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Relational5" DstPort 2 } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Relational5" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "Subcar Ind" SrcPort 1 Points [165, 0] Branch { DstBlock "Relational3" DstPort 1 } Branch { Points [0, -35] Branch { DstBlock "Relational6" DstPort 2 } Branch { Points [0, -170] DstBlock "done3" DstPort 1 } } } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational6" DstPort 1 } Line { SrcBlock "Relational6" SrcPort 1 DstBlock "Delay5" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 Points [10, 0] Branch { DstBlock "Register" DstPort 3 } Branch { Points [0, -185] DstBlock "done2" DstPort 1 } } Line { SrcBlock "Logical7" SrcPort 1 Points [15, 0] Branch { DstBlock "Register1" DstPort 3 } Branch { Points [0, -235] DstBlock "done7" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 Points [80, 0; 0, 105] Branch { DstBlock "Logical4" DstPort 1 } Branch { Points [0, 65] DstBlock "Logical6" DstPort 1 } } Line { SrcBlock "Delay5" SrcPort 1 Points [305, 0; 0, 95] Branch { Points [0, 65] DstBlock "Logical7" DstPort 1 } Branch { DstBlock "Logical5" DstPort 1 } } Line { SrcBlock "Logical4" SrcPort 1 Points [5, 0] Branch { DstBlock "Goto" DstPort 1 } Branch { Points [0, -55; -150, 0; 0, -135] DstBlock "done5" DstPort 1 } } Line { SrcBlock "Logical6" SrcPort 1 Points [10, 0] Branch { DstBlock "Goto1" DstPort 1 } Branch { Points [0, -140; -140, 0; 0, -100] DstBlock "done1" DstPort 1 } } Line { SrcBlock "done4" SrcPort 1 DstBlock "Chan Mag" DstPort 2 } Line { SrcBlock "done5" SrcPort 1 DstBlock "Chan Mag" DstPort 4 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Chan Mag" DstPort 5 } Line { SrcBlock "done2" SrcPort 1 DstBlock "Chan Mag" DstPort 6 } Line { SrcBlock "done3" SrcPort 1 DstBlock "Chan Mag" DstPort 1 } Line { SrcBlock "done6" SrcPort 1 DstBlock "Chan Mag" DstPort 3 } Line { SrcBlock "done7" SrcPort 1 DstBlock "Chan Mag" DstPort 7 } Line { SrcBlock "Delay6" SrcPort 1 Points [230, 0] Branch { DstBlock "Logical7" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "Inverter1" DstPort 1 } Branch { Points [0, -155] DstBlock "done8" DstPort 1 } } } Line { SrcBlock "done8" SrcPort 1 DstBlock "Chan Mag" DstPort 8 } Line { SrcBlock "Delay7" SrcPort 1 Points [295, 0] Branch { Points [0, 115] DstBlock "Channel Choice Logic" DstPort 1 } Branch { Points [0, -20] Branch { Points [0, -65] DstBlock "Logical5" DstPort 3 } Branch { DstBlock "Logical7" DstPort 3 } } } } } Block { BlockType Reference Name "Inverter1" SID "4888" Ports [1, 1] Position [545, 574, 575, 586] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,12,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "4889" Ports [1, 1] Position [235, 156, 270, 174] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "4890" Ports [2, 1] Position [325, 125, 355, 180] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 55 55 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[31.44 31.4" "4 35.44 31.44 35.44 35.44 35.44 31.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[27.44 27.44 31.44 31.44 " "27.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[23.44 23.44 27.44 27.44 23.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 19.44 23.44 23.44 19.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4891" Ports [2, 1] Position [640, 467, 670, 498] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,31,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "4892" Ports [2, 1] Position [640, 502, 670, 533] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,31,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "4893" Ports [2, 1] Position [640, 557, 670, 588] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,31,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "4894" Ports [2, 1] Position [640, 592, 670, 623] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,31,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "4895" Ports [3, 1] Position [325, 63, 355, 117] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,54,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 54 54 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 54 54 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[31.44 31.4" "4 35.44 31.44 35.44 35.44 35.44 31.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[27.44 27.44 31.44 31.44 " "27.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[23.44 23.44 27.44 27.44 23.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 19.44 23.44 23.44 19.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical7" SID "4896" Ports [2, 1] Position [320, 459, 350, 486] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "4897" Ports [2, 1] Position [835, 467, 855, 538] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,71,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 71 71 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 71 71 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[37.22 37." "22 39.22 37.22 39.22 39.22 39.22 37.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[35.22 35.22 37.22 37.22" " 35.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[33.22 33.22 35.22 35.22 33.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[31.22 31.22 33.22 31.22 33.22 33.22 31.22 ],[0.931 0.946 0.973 ]" ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');dis" "p('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult" SID "4898" Ports [2, 1] Position [1070, 152, 1125, 208] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'P" "ipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "16" quantization "Round (unbiased: +/- Inf)" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "55,56,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 56 56 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[35" ".77 35.77 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[28.77 28." "77 35.77 35.77 28.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[21.77 21.77 28.77 28.7" "7 21.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[14.77 14.77 21.77 14.77 21.77 21.77" " 14.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_l" "abel('output',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncol" "or('black');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "4899" Ports [4, 1] Position [610, 113, 630, 212] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "10.1.3" sg_icon_stat "20,99,4,1,white,blue,3,58b3489d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 14.1429 84.8571 99 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 20 20 0 0 ],[0 14.1429 84.8571 99 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 " "7.55 5.55 ],[51.22 51.22 53.22 51.22 53.22 53.22 53.22 51.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[4" "9.22 49.22 51.22 51.22 49.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[47.22 47.22 49.22 49." "22 47.22 ],[1 1 1 ]);\npatch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[45.22 45.22 47.22 45.22 47.22 47.22 45.22" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_labe" "l('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\n\ncolor('black');disp('\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux1" SID "4900" Ports [4, 1] Position [610, 223, 630, 322] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "10.1.3" sg_icon_stat "20,99,4,1,white,blue,3,58b3489d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 14.1429 84.8571 99 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 20 20 0 0 ],[0 14.1429 84.8571 99 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 " "7.55 5.55 ],[51.22 51.22 53.22 51.22 53.22 53.22 53.22 51.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[4" "9.22 49.22 51.22 51.22 49.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[47.22 47.22 49.22 49." "22 47.22 ],[1 1 1 ]);\npatch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[45.22 45.22 47.22 45.22 47.22 47.22 45.22" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_labe" "l('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\n\ncolor('black');disp('\\bf{}','texmode','on');\n" "fprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "inv 2pi" SID "4901" Ports [0, 1] Position [895, 187, 1025, 203] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1/(2*pi)" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "18" bin_pt "18" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "130,16,0,1,white,blue,0,dcf3c25e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 130 130 0 0 ],[0 0 16 16 0 ],[0.77 0." "82 0.91 ]);\nplot([0 130 130 0 0 ],[0 0 16 16 0 ]);\npatch([60.55 63.44 65.44 67.44 69.44 65.44 62.55 60.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([62.55 65.44 63.44 60.55 62.55 ],[8.22 8.22 1" "0.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([60.55 63.44 65.44 62.55 60.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 " "1 1 ]);\npatch([62.55 69.44 67.44 65.44 63.44 60.55 62.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('output',1,'0.15915679931640625');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name " Train" SID "4902" Position [965, 18, 995, 32] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "Phase" SID "4903" Position [1180, 173, 1210, 187] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "H_xA Vout" SID "4904" Position [895, 498, 925, 512] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "A_Pilot Vout" SID "4905" Position [890, 568, 920, 582] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "B_Pilot Vout" SID "4906" Position [890, 603, 920, 617] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Use A Pilots" SID "4907" Position [920, 388, 950, 402] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Use B Pilots" SID "4908" Position [920, 353, 950, 367] NamePlacement "alternate" Port "7" IconDisplay "Port number" } Block { BlockType Outport Name " Sym Index" SID "4909" Position [965, 38, 995, 52] Port "8" IconDisplay "Port number" } Line { SrcBlock "H_BA Q" SrcPort 1 DstBlock "Mux1" DstPort 4 } Line { SrcBlock "H_AA Q" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "H_AA I" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "H_BA I" SrcPort 1 DstBlock "Mux" DstPort 4 } Line { SrcBlock "Pilot I" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 Points [30, 0] Branch { Points [0, 180] DstBlock "H Magnitude Check" DstPort 1 } Branch { DstBlock "Cordic Arctan" DstPort 1 } } Line { SrcBlock "Pilot Q" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Mux1" SrcPort 1 Points [25, 0] Branch { Points [0, 80] DstBlock "H Magnitude Check" DstPort 2 } Branch { Points [0, -60] DstBlock "Cordic Arctan" DstPort 2 } } Line { SrcBlock "Concat1" SrcPort 1 Points [150, 0] Branch { DstBlock "Mux" DstPort 1 } Branch { Points [0, 110] DstBlock "Mux1" DstPort 1 } } Line { SrcBlock "Logical6" SrcPort 1 Points [20, 0] Branch { DstBlock "Concat1" DstPort 1 } Branch { Points [0, 0; 0, 95] Branch { Points [-160, 0] DstBlock "Inverter3" DstPort 1 } Branch { Points [0, 305] DstBlock "Logical2" DstPort 2 } } } Line { SrcBlock "1LSB" SrcPort 1 Points [80, 0] Branch { DstBlock "Logical6" DstPort 3 } Branch { Points [0, 265] DstBlock "H Magnitude Check" DstPort 4 } } Line { SrcBlock "Sym Index" SrcPort 1 Points [35, 0] Branch { DstBlock "1LSB" DstPort 1 } Branch { Points [0, -65] DstBlock "Delay6" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "Train" SrcPort 1 Points [30, 0] Branch { Points [0, -45] DstBlock " Train" DstPort 1 } Branch { Points [150, 0] Branch { DstBlock "Logical6" DstPort 1 } Branch { Points [0, 70] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, 225] Branch { DstBlock "H Magnitude Check" DstPort 3 } Branch { Points [0, 215] DstBlock "Inverter1" DstPort 1 } } } } } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Concat1" DstPort 2 } Branch { Points [0, 370] DstBlock "Logical3" DstPort 2 } } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Delay5" SrcPort 1 DstBlock "Logical9" DstPort 1 } Line { SrcBlock "Cordic Arctan" SrcPort 1 DstBlock "Mult" DstPort 1 } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 Points [5, 0] Branch { DstBlock "Delay5" DstPort 1 } Branch { Points [0, -100] DstBlock "H Magnitude Check" DstPort 5 } } Line { SrcBlock "Logical3" SrcPort 1 Points [10, 0] Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, -125] DstBlock "H Magnitude Check" DstPort 6 } } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Logical9" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Delay4" DstPort 1 } Line { SrcBlock "Delay4" SrcPort 1 DstBlock "A_Pilot Vout" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 Points [90, 0] Branch { DstBlock "Logical2" DstPort 1 } Branch { Points [0, 35] DstBlock "Logical3" DstPort 1 } } Line { SrcBlock "H Magnitude Check" SrcPort 1 DstBlock "Use B Pilots" DstPort 1 } Line { SrcBlock "H Magnitude Check" SrcPort 2 DstBlock "Use A Pilots" DstPort 1 } Line { SrcBlock "inv 2pi" SrcPort 1 DstBlock "Mult" DstPort 2 } Line { SrcBlock "Mult" SrcPort 1 DstBlock "Phase" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 Points [35, 0] Branch { DstBlock "Logical4" DstPort 2 } Branch { Points [0, 35] DstBlock "Logical5" DstPort 2 } } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "B_Pilot Vout" DstPort 1 } Line { SrcBlock "A_Pilot " SrcPort 1 Points [90, 0] Branch { DstBlock "Logical7" DstPort 1 } Branch { Points [0, 100] DstBlock "Logical4" DstPort 1 } } Line { SrcBlock "B_Pilot " SrcPort 1 Points [85, 0] Branch { DstBlock "Logical7" DstPort 2 } Branch { Points [0, 120] DstBlock "Logical5" DstPort 1 } } Line { SrcBlock "Logical9" SrcPort 1 DstBlock "H_xA Vout" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 DstBlock " Sym Index" DstPort 1 } Line { SrcBlock "Subcar Ind" SrcPort 1 DstBlock "H Magnitude Check" DstPort 7 } Annotation { Name "Selection options:\na: 1=Training, 0=Payload\nb: 1=Alamouti, 0=SISO/MIMO\nc: LSB of symbol index\n[a " "b c] => muxSel\n[0 x x] => 0 (Rx Pilots)\n[1 x 0] => 1 (H_AA)\n[1 0 1] => 1 (H_AA)\n[1 1 1] => 2 (H_BA)" Position [60, 208] HorizontalAlignment "left" } Annotation { Name "Normalize phases to [-0.5,0.5] for\neasier processing downstream" Position [1052, 240] } Annotation { Name "Flag valid channel phase estimate outputs" Position [997, 460] } Annotation { Name "Flag valid pilot phase estimate outputs" Position [927, 590] } } } Block { BlockType SubSystem Name "Pilot_Descrambler" SID "4910" Ports [5, 4] Position [325, 393, 400, 487] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Pilot_Descrambler" Location [2, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "131" Block { BlockType Inport Name "Sym Index" SID "4911" Position [75, 138, 105, 152] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "FFT Index" SID "4912" Position [15, 163, 45, 177] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "rst" SID "4913" Position [75, 233, 105, 247] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "I " SID "4914" Position [655, 293, 685, 307] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Q " SID "4915" Position [655, 398, 685, 412] Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "Logical" SID "4916" Ports [2, 1] Position [640, 258, 670, 282] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,24,2,1,white,blue,0,dc21e094,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.3" "3 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "4917" Ports [2, 1] Position [640, 363, 670, 387] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,24,2,1,white,blue,0,dc21e094,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.3" "3 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "4918" Ports [3, 1] Position [850, 255, 870, 345] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[16 0 0 32 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,90,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 12.8571 77.1429 90 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 20 20 0 0 ],[0 12.8571 77.1429 90 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 " "7.55 5.55 ],[47.22 47.22 49.22 47.22 49.22 49.22 49.22 47.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[4" "5.22 45.22 47.22 47.22 45.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[43.22 43.22 45.22 45." "22 43.22 ],[1 1 1 ]);\npatch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[41.22 41.22 43.22 41.22 43.22 43.22 41.22" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_labe" "l('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "4919" Ports [3, 1] Position [850, 360, 870, 450] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[16 0 0 32 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,90,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 12.8571 77.1429 90 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 20 20 0 0 ],[0 12.8571 77.1429 90 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 " "7.55 5.55 ],[47.22 47.22 49.22 47.22 49.22 49.22 49.22 47.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[4" "5.22 45.22 47.22 47.22 45.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[43.22 43.22 45.22 45." "22 43.22 ],[1 1 1 ]);\npatch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[41.22 41.22 43.22 41.22 43.22 43.22 41.22" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_labe" "l('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate" SID "4920" Ports [1, 1] Position [755, 315, 785, 345] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "17" bin_pt "15" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,30,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\bf" "{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate1" SID "4921" Ports [1, 1] Position [760, 420, 790, 450] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "17" bin_pt "15" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,30,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\bf" "{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Pilot Scrambling\nSequence Gen" SID "4922" Ports [2, 1] Position [520, 154, 585, 181] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Pilot Scrambling\nSequence Gen" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "en" SID "4923" Position [75, 543, 105, 557] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "rst" SID "4924" Position [85, 473, 115, 487] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Assert" SID "4925" Ports [1, 1] Position [470, 232, 515, 248] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type on type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "1" output_port on has_advanced_control "0" sggui_pos "20,20,356,436" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,16,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert1" SID "4926" Ports [1, 1] Position [470, 252, 515, 268] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type on type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "1" output_port on has_advanced_control "0" sggui_pos "20,20,356,436" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,16,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "4927" Position [15, 557, 140, 573] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_PilotScrambling" TagVisibility "global" } Block { BlockType Reference Name "Logical" SID "4928" Ports [2, 1] Position [380, 228, 425, 272] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,dc21e094,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "4929" Ports [2, 1] Position [175, 544, 220, 571] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 27 27 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "4930" Ports [3, 1] Position [205, 301, 250, 349] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "4931" Ports [3, 1] Position [290, 301, 335, 349] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "4932" Ports [3, 1] Position [380, 301, 425, 349] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register3" SID "4933" Ports [3, 1] Position [470, 301, 515, 349] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register4" SID "4934" Ports [3, 1] Position [630, 301, 675, 349] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register5" SID "4935" Ports [3, 1] Position [720, 301, 765, 349] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register6" SID "4936" Ports [3, 1] Position [805, 301, 850, 349] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4937" Position [580, 118, 610, 132] IconDisplay "Port number" } Line { SrcBlock "rst" SrcPort 1 Points [0, 0; 50, 0] Branch { Points [0, -155] DstBlock "Register" DstPort 2 } Branch { Points [95, 0] Branch { Points [0, -155] DstBlock "Register1" DstPort 2 } Branch { Points [80, 0] Branch { Points [0, -155] DstBlock "Register2" DstPort 2 } Branch { Points [100, 0] Branch { Points [0, -155] DstBlock "Register3" DstPort 2 } Branch { Points [150, 0] Branch { Points [0, -155] DstBlock "Register4" DstPort 2 } Branch { Points [100, 0] Branch { Points [0, -155] DstBlock "Register5" DstPort 2 } Branch { Points [80, 0; 0, -155] DstBlock "Register6" DstPort 2 } } } } } } } Line { SrcBlock "Register6" SrcPort 1 Points [20, 0; 0, -85] DstBlock "Assert" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 Points [-170, 0] Branch { Points [-55, 0; 0, 60] DstBlock "Register" DstPort 1 } Branch { Points [0, -125] DstBlock "Q" DstPort 1 } } Line { SrcBlock "Register5" SrcPort 1 Points [0, -15] DstBlock "Register6" DstPort 1 } Line { SrcBlock "Register4" SrcPort 1 Points [10, 0; 0, -15] DstBlock "Register5" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 Points [45, 0; 0, -15] Branch { DstBlock "Register4" DstPort 1 } Branch { Points [0, -50] DstBlock "Assert1" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 Points [10, 0; 0, -15] DstBlock "Register3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [0, -15] DstBlock "Register2" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 Points [5, 0; 0, -15] DstBlock "Register1" DstPort 1 } Line { SrcBlock "Assert" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Assert1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "en" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [0, -45; -105, 0; 0, -25; 60, 0] Branch { Points [0, -150] DstBlock "Register" DstPort 3 } Branch { Points [95, 0] Branch { DstBlock "Register1" DstPort 3 } Branch { Points [80, 0] Branch { Points [0, -150] DstBlock "Register2" DstPort 3 } Branch { Points [100, 0] Branch { DstBlock "Register3" DstPort 3 } Branch { Points [150, 0] Branch { Points [0, -150] DstBlock "Register4" DstPort 3 } Branch { Points [100, 0] Branch { DstBlock "Register5" DstPort 3 } Branch { Points [75, 0; 0, -150] DstBlock "Register6" DstPort 3 } } } } } } } Annotation { Name "Normally, all the registers reset to value 1. But\nthe timing of this Rx model requires the LFSR\nto " "reset to the state two cycles after all-ones." Position [509, 599] } Annotation { Name "Was 0!" Position [315, 365] } } } Block { BlockType SubSystem Name "Pilot Selection" SID "4938" Ports [2, 3] Position [315, 371, 430, 409] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Pilot Selection" Location [202, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Sym Index" SID "4939" Position [200, 643, 225, 657] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "SubCar Index" SID "4940" Position [365, 213, 390, 227] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "6LSB" SID "4941" Ports [1, 1] Position [390, 262, 430, 278] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "ceil(log2(numSubcarriers))" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "245,91,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "6LSB+16" SID "4942" Ports [1, 1] Position [390, 337, 430, 353] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "ceil(log2(numSubcarriers))" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "6LSB+24" SID "4943" Ports [1, 1] Position [390, 362, 430, 378] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "ceil(log2(numSubcarriers))" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "6LSB+8" SID "4944" Ports [1, 1] Position [390, 287, 430, 303] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "ceil(log2(numSubcarriers))" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType From Name "From1" SID "4945" Position [630, 513, 750, 527] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType From Name "From2" SID "4946" Position [165, 673, 285, 687] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType From Name "From5" SID "4947" Position [15, 600, 190, 620] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_numTrainingSymbols" TagVisibility "global" } Block { BlockType From Name "From6" SID "4948" Position [145, 287, 315, 303] ShowName off CloseFcn "tagdialog Close" GotoTag "regTxRx_PilotToneIndex" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "4949" Ports [1, 1] Position [890, 354, 920, 366] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,12,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "4950" Ports [1, 1] Position [540, 674, 570, 686] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,251" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,12,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "4951" Ports [1, 1] Position [1140, 294, 1170, 306] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,251" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,12,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter4" SID "4952" Ports [1, 1] Position [905, 424, 935, 436] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,12,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter5" SID "4953" Ports [1, 1] Position [890, 369, 920, 381] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,12,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "LSB1" SID "4954" Ports [1, 1] Position [340, 642, 380, 658] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "157,178,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "4955" Ports [4, 1] Position [720, 293, 755, 392] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,99,4,1,white,blue,0,4f3eee2e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 99 99 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 99 99 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[54.55 54." "55 59.55 54.55 59.55 59.55 59.55 54.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[49.55 49.55 54.55 5" "4.55 49.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[44.55 44.55 49.55 49.55 44.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[39.55 39.55 44.55 39.55 44.55 44.55 39.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\ncolo" "r('black');disp('or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical10" SID "4956" Ports [2, 1] Position [720, 441, 755, 474] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,33,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 33 33 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical11" SID "4957" Ports [3, 1] Position [960, 439, 990, 481] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,42,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 42 42 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[25.44 25.4" "4 29.44 25.44 29.44 29.44 29.44 25.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[21.44 21.44 25.44 25.44 " "21.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[17.44 17.44 21.44 21.44 17.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[13.44 13.44 17.44 13.44 17.44 17.44 13.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical12" SID "4958" Ports [3, 1] Position [1200, 263, 1235, 307] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,44,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 44 44 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4959" Ports [2, 1] Position [725, 629, 760, 691] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,62,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 62 62 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[36.55 36." "55 41.55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 3" "6.55 31.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "4960" Ports [3, 1] Position [960, 339, 990, 381] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,42,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 42 42 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[25.44 25.4" "4 29.44 25.44 29.44 29.44 29.44 25.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[21.44 21.44 25.44 25.44 " "21.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[17.44 17.44 21.44 21.44 17.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[13.44 13.44 17.44 13.44 17.44 17.44 13.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "4961" Ports [3, 1] Position [440, 602, 480, 698] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,96,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 96 96 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 96 96 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[53.55 53." "55 58.55 53.55 58.55 58.55 58.55 53.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[48.55 48.55 53.55 5" "3.55 48.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[43.55 43.55 48.55 48.55 43.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[38.55 38.55 43.55 38.55 43.55 43.55 38.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "4962" Ports [2, 1] Position [660, 664, 690, 686] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "4963" Ports [3, 1] Position [1065, 348, 1100, 412] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,64,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 64 64 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 64 64 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[37.55 37." "55 42.55 37.55 42.55 42.55 42.55 37.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[32.55 32.55 37.55 3" "7.55 32.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[27.55 27.55 32.55 32.55 27.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[22.55 22.55 27.55 22.55 27.55 27.55 22.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "4964" Ports [3, 1] Position [960, 394, 990, 436] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,42,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 42 42 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[25.44 25.4" "4 29.44 25.44 29.44 29.44 29.44 25.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[21.44 21.44 25.44 25.44 " "21.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[17.44 17.44 21.44 21.44 17.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[13.44 13.44 17.44 13.44 17.44 17.44 13.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "4965" Ports [2, 1] Position [660, 634, 690, 656] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "4966" Ports [2, 1] Position [720, 396, 755, 429] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,33,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 33 33 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "4967" Ports [2, 1] Position [290, 601, 335, 634] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a<=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,33,2,1,white,blue,0,52e4b236,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 33 33 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\leq" " b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "4968" Ports [2, 1] Position [510, 264, 550, 291] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 3 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,27,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 27 27 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label(" "'output',1,'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational5" SID "4969" Ports [2, 1] Position [510, 289, 550, 316] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 3 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,27,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 27 27 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label(" "'output',1,'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational6" SID "4970" Ports [2, 1] Position [510, 339, 550, 366] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 3 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,27,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 27 27 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label(" "'output',1,'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational7" SID "4971" Ports [2, 1] Position [510, 364, 550, 391] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 3 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,27,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 27 27 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label(" "'output',1,'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Negate" SID "4972" Position [855, 653, 885, 667] IconDisplay "Port number" } Block { BlockType Outport Name "A_Pilot" SID "4973" Position [1325, 373, 1355, 387] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "B_Pilot" SID "4974" Position [1330, 278, 1360, 292] Port "3" IconDisplay "Port number" } Line { SrcBlock "Logical1" SrcPort 1 Points [180, 0] Branch { DstBlock "Logical3" DstPort 1 } Branch { Points [0, -60] DstBlock "Logical12" DstPort 2 } } Line { SrcBlock "6LSB+16" SrcPort 1 DstBlock "Relational6" DstPort 1 } Line { SrcBlock "6LSB+24" SrcPort 1 DstBlock "Relational7" DstPort 1 } Line { SrcBlock "6LSB+8" SrcPort 1 DstBlock "Relational5" DstPort 1 } Line { SrcBlock "6LSB" SrcPort 1 DstBlock "Relational4" DstPort 1 } Line { SrcBlock "Relational4" SrcPort 1 Points [120, 0; 0, 25] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, 100] DstBlock "Logical9" DstPort 1 } } Line { SrcBlock "Relational5" SrcPort 1 Points [115, 0; 0, 25] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, 90] DstBlock "Logical9" DstPort 2 } } Line { SrcBlock "Relational6" SrcPort 1 Points [50, 0] Branch { DstBlock "Logical1" DstPort 3 } Branch { Points [0, 95] Branch { DstBlock "Logical10" DstPort 1 } Branch { Points [0, 190] DstBlock "Logical8" DstPort 1 } } } Line { SrcBlock "Relational7" SrcPort 1 Points [45, 0] Branch { DstBlock "Logical1" DstPort 4 } Branch { Points [0, 85] Branch { DstBlock "Logical10" DstPort 2 } Branch { Points [0, 205] DstBlock "Logical5" DstPort 1 } } } Line { SrcBlock "SubCar Index" SrcPort 1 Points [90, 0; 0, 65] Branch { Points [0, 25] Branch { DstBlock "Relational5" DstPort 2 } Branch { Points [0, 50] Branch { Points [0, 25] DstBlock "Relational7" DstPort 2 } Branch { DstBlock "Relational6" DstPort 2 } } } Branch { DstBlock "Relational4" DstPort 2 } } Line { SrcBlock "From6" SrcPort 1 Points [20, 0] Branch { Points [0, 0] Branch { DstBlock "6LSB+8" DstPort 1 } Branch { Points [0, -25] DstBlock "6LSB" DstPort 1 } } Branch { Points [0, 50] Branch { DstBlock "6LSB+16" DstPort 1 } Branch { Points [0, 25] DstBlock "6LSB+24" DstPort 1 } } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Negate" DstPort 1 } Line { SrcBlock "Sym Index" SrcPort 1 Points [45, 0] Branch { DstBlock "LSB1" DstPort 1 } Branch { DstBlock "Relational1" DstPort 2 } } Line { SrcBlock "LSB1" SrcPort 1 Points [20, 0] Branch { DstBlock "Logical4" DstPort 2 } Branch { Points [0, -175; 455, 0] Branch { DstBlock "Logical11" DstPort 3 } Branch { Points [0, -45] Branch { DstBlock "Inverter4" DstPort 1 } Branch { Points [0, -55] DstBlock "Inverter5" DstPort 1 } } } } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical4" DstPort 3 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Relational1" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 Points [35, 0] Branch { Points [0, 30] DstBlock "Inverter2" DstPort 1 } Branch { DstBlock "Logical8" DstPort 2 } } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter3" DstPort 1 } Branch { DstBlock "A_Pilot" DstPort 1 } } Line { SrcBlock "Inverter4" SrcPort 1 DstBlock "Logical7" DstPort 3 } Line { SrcBlock "Logical9" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Logical10" SrcPort 1 DstBlock "Logical11" DstPort 2 } Line { SrcBlock "Logical11" SrcPort 1 Points [40, 0; 0, -60] DstBlock "Logical6" DstPort 3 } Line { SrcBlock "Logical7" SrcPort 1 Points [20, 0; 0, -35] DstBlock "Logical6" DstPort 2 } Line { SrcBlock "Logical12" SrcPort 1 DstBlock "B_Pilot" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 Points [100, 0; 0, -75] Branch { DstBlock "Logical11" DstPort 1 } Branch { Points [0, 0; 0, -45] Branch { DstBlock "Logical7" DstPort 1 } Branch { Points [0, -40] Branch { DstBlock "Inverter1" DstPort 1 } Branch { Points [0, -90] DstBlock "Logical12" DstPort 1 } } } } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical12" DstPort 3 } Line { SrcBlock "Inverter5" SrcPort 1 DstBlock "Logical3" DstPort 3 } Annotation { Name "Alamouti pilots:\nEven symbols: negate pilot 3\nOdd symbols: negate pilot 2\n\nSym: 0 | " " 1\nSC: +7 +21 -21 -7 | +7 +21 -21 -7\nA: + + | + -\nB: - + | + +\nRx: " "+ - + + | + + + -" Position [269, 775] HorizontalAlignment "left" FontName "Courier New" FontSize 14 } Annotation { Name "SISO/Multiplexing modes: All pilots are received via H_AA\nAlamouti mode:\n Even symbols:\n Pilot" "s 0, 1 via H_AA\n Pilots 2, 3 via H_BA\n Odd symbols:\n Pilots 0, 1 via H_BA\n Pilots 2, 3 via H_AA\n\n" "In SISO mode, the FFT outputs alternate between valid symbols\nand garbage symbols (same timing as multiplexing " "mode). For both\nSISO/multiplexing mode, ignore pilot subcarriers from antennaB \n(indicated by \"odd\" symbols " "here)." Position [1122, 557] HorizontalAlignment "left" } } } Block { BlockType SubSystem Name "Scrambling En" SID "4975" Ports [2, 1] Position [220, 130, 300, 185] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Scrambling En" Location [207, 347, 1287, 671] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "123" Block { BlockType Inport Name "SymIndex" SID "4976" Position [105, 233, 135, 247] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "FFT Index" SID "4977" Position [105, 178, 135, 192] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant5" SID "4978" Ports [0, 1] Position [105, 149, 130, 171] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "numSubcarriers-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(numSubcarriers))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,346a66ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'63');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay3" SID "4979" Ports [1, 1] Position [790, 241, 830, 259] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From2" SID "4980" Position [140, 268, 260, 282] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType From Name "From5" SID "4981" Position [50, 355, 225, 375] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_numTrainingSymbols" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "4982" Ports [1, 1] Position [450, 331, 480, 349] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "4983" Ports [1, 1] Position [460, 211, 495, 229] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "LSB1" SID "4984" Ports [1, 1] Position [370, 197, 410, 213] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "304,93,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "4985" Ports [2, 1] Position [955, 222, 990, 273] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,51,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 51 51 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[30.55 30." "55 35.55 30.55 35.55 35.55 35.55 30.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[25.55 25.55 30.55 3" "0.55 25.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[20.55 20.55 25.55 25.55 20.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[15.55 15.55 20.55 15.55 20.55 20.55 15.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "4986" Ports [2, 1] Position [860, 244, 890, 271] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "4987" Ports [3, 1] Position [625, 160, 665, 250] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,90,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 90 90 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 90 90 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[50.55 50." "55 55.55 50.55 55.55 55.55 55.55 50.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[45.55 45.55 50.55 5" "0.55 45.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[40.55 40.55 45.55 45.55 40.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[35.55 35.55 40.55 35.55 40.55 40.55 35.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical4" SID "4988" Ports [2, 1] Position [500, 289, 530, 316] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "4989" Ports [2, 1] Position [500, 334, 530, 361] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "4990" Ports [2, 1] Position [565, 299, 595, 326] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "4991" Ports [2, 1] Position [375, 289, 415, 331] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,42,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\geq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "4992" Ports [2, 1] Position [195, 147, 235, 198] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,51,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 51 51 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[30.55 30." "55 35.55 30.55 35.55 35.55 35.55 30.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[25.55 25.55 30.55 3" "0.55 25.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[20.55 20.55 25.55 25.55 20.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[15.55 15.55 20.55 15.55 20.55 20.55 15.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "4993" Ports [2, 1] Position [375, 334, 415, 376] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,42,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\geq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "4994" Ports [1, 1] Position [290, 355, 325, 375] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "1" en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "1+ceil(log2(max_num_trainingSymbols))" bin_pt "0" quantization "Truncate" overflow "Flag as error" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "259,424,356,370" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,6c6aa2df,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('\\bf{X << 1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "posedge1" SID "4995" Ports [1, 1] Position [705, 196, 760, 214] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge1" Location [427, 425, 682, 542] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "4996" Position [25, 25, 55, 40] BlockRotation 270 BlockMirror on IconDisplay "Port number" } Block { BlockType Reference Name "Inverter" SID "4997" Ports [1, 1] Position [65, 70, 100, 90] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,201" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,e69ac283,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\nnot');\nfprintf('','COMMENT: end icon text'" ");" } Block { BlockType Reference Name "Logical1" SID "4998" Ports [2, 1] Position [130, 48, 175, 92] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "4999" Position [200, 63, 230, 77] IconDisplay "Port number" } Line { SrcBlock "Logical1" SrcPort 1 Points [0, 0] DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 0, 15] Branch { Points [0, 20] DstBlock "Inverter" DstPort 1 } Branch { DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 2 } } } Block { BlockType Outport Name "En" SID "5000" Position [1020, 243, 1050, 257] IconDisplay "Port number" } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Constant5" SrcPort 1 DstBlock "Relational2" DstPort 1 } Line { SrcBlock "FFT Index" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "posedge1" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 Points [20, 0] Branch { DstBlock "Shift" DstPort 1 } Branch { Points [0, -45] DstBlock "Relational1" DstPort 2 } } Line { SrcBlock "From2" SrcPort 1 Points [165, 0] Branch { Points [0, 20] Branch { Points [0, 45] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical4" DstPort 1 } } Branch { Points [0, -10] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 Points [10, 0; 0, -30] DstBlock "Logical6" DstPort 2 } Line { SrcBlock "SymIndex" SrcPort 1 Points [190, 0] Branch { Points [0, 60] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 45] DstBlock "Relational3" DstPort 1 } } Branch { Points [0, -35] DstBlock "LSB1" DstPort 1 } } Line { SrcBlock "LSB1" SrcPort 1 Points [25, 0] Branch { DstBlock "Logical3" DstPort 2 } Branch { Points [0, 15] DstBlock "Inverter2" DstPort 1 } } Line { SrcBlock "posedge1" SrcPort 1 Points [10, 0] Branch { Points [95, 0] } Branch { Points [0, 30] Branch { DstBlock "Delay3" DstPort 1 } Branch { DstBlock "Logical1" DstPort 1 } } } Line { SrcBlock "Logical6" SrcPort 1 Points [5, 0; 0, -80] DstBlock "Logical3" DstPort 3 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "En" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Logical1" DstPort 2 } Annotation { Name "FIXME: In SISO mode, assert on even syms when sc=63; in Alamouti, odd syms?" Position [373, 101] } } } Block { BlockType Reference Name "done1" SID "5001" Ports [1, 1] Position [925, 150, 960, 160] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "5002" Ports [1, 1] Position [925, 195, 960, 205] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done3" SID "5003" Ports [1, 1] Position [925, 120, 960, 130] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "5004" Ports [1, 1] Position [925, 90, 960, 100] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "5005" Ports [1, 1] Position [925, 105, 960, 115] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done6" SID "5006" Ports [1, 1] Position [925, 135, 960, 145] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done7" SID "5007" Ports [1, 1] Position [925, 165, 960, 175] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done8" SID "5008" Ports [1, 1] Position [925, 180, 960, 190] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done9" SID "5009" Ports [1, 1] Position [925, 75, 960, 85] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Outport Name "I" SID "5010" Position [1055, 293, 1085, 307] IconDisplay "Port number" } Block { BlockType Outport Name "Q" SID "5011" Position [1055, 398, 1085, 412] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "A_Pilot" SID "5012" Position [585, 448, 615, 462] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "B_Pilot" SID "5013" Position [585, 468, 615, 482] Port "4" IconDisplay "Port number" } Line { SrcBlock "rst" SrcPort 1 Points [365, 0; 0, -65] DstBlock "Pilot Scrambling\nSequence Gen" DstPort 2 } Line { SrcBlock "I " SrcPort 1 Points [30, 0] Branch { Points [0, 30] DstBlock "Negate" DstPort 1 } Branch { DstBlock "Mux" DstPort 2 } Branch { Points [0, -145] DstBlock "done1" DstPort 1 } } Line { SrcBlock "Q " SrcPort 1 Points [40, 0] Branch { Points [0, 30] DstBlock "Negate1" DstPort 1 } Branch { DstBlock "Mux1" DstPort 2 } Branch { Points [0, -235] DstBlock "done7" DstPort 1 } } Line { SrcBlock "Pilot Scrambling\nSequence Gen" SrcPort 1 Points [20, 0] Branch { Points [0, 95] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 105] DstBlock "Logical1" DstPort 1 } } Branch { Points [0, -60] DstBlock "done5" DstPort 1 } } Line { SrcBlock "FFT Index" SrcPort 1 Points [120, 0] Branch { DstBlock "Scrambling En" DstPort 2 } Branch { Points [0, -75] DstBlock "done4" DstPort 1 } Branch { Points [0, 230] DstBlock "Pilot Selection" DstPort 2 } } Line { SrcBlock "Mux" SrcPort 1 Points [15, 0] Branch { Points [0, -115] DstBlock "done8" DstPort 1 } Branch { DstBlock "I" DstPort 1 } } Line { SrcBlock "Mux1" SrcPort 1 Points [20, 0] Branch { Points [0, -205] DstBlock "done2" DstPort 1 } Branch { DstBlock "Q" DstPort 1 } } Line { SrcBlock "Scrambling En" SrcPort 1 DstBlock "Pilot Scrambling\nSequence Gen" DstPort 1 } Line { SrcBlock "Negate" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Negate1" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Pilot Selection" SrcPort 1 Points [150, 0] Branch { Points [0, -105] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Pilot Selection" SrcPort 2 Points [55, 0; 0, 65] DstBlock "A_Pilot" DstPort 1 } Line { Labels [0, 0] SrcBlock "Sym Index" SrcPort 1 Points [70, 0] Branch { Points [0, -65] DstBlock "done9" DstPort 1 } Branch { Points [0, 235] DstBlock "Pilot Selection" DstPort 1 } Branch { DstBlock "Scrambling En" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [85, 0] Branch { DstBlock "Mux" DstPort 1 } Branch { Points [0, -145] DstBlock "done3" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 Points [90, 0] Branch { DstBlock "Mux1" DstPort 1 } Branch { Points [0, -235] DstBlock "done6" DstPort 1 } } Line { SrcBlock "done9" SrcPort 1 Points [45, 0] } Line { SrcBlock "done2" SrcPort 1 Points [45, 0] } Line { SrcBlock "done8" SrcPort 1 Points [45, 0] } Line { SrcBlock "done7" SrcPort 1 Points [45, 0] } Line { SrcBlock "done6" SrcPort 1 Points [45, 0] } Line { SrcBlock "done3" SrcPort 1 Points [45, 0] } Line { SrcBlock "done5" SrcPort 1 Points [45, 0] } Line { SrcBlock "done4" SrcPort 1 Points [45, 0] } Line { SrcBlock "done1" SrcPort 1 Points [45, 0] } Line { SrcBlock "Pilot Selection" SrcPort 3 Points [35, 0; 0, 75] DstBlock "B_Pilot" DstPort 1 } } } Block { BlockType SubSystem Name "S-R Latch" SID "5014" Ports [2, 1] Position [865, 100, 915, 140] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch" Location [542, 167, 762, 256] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "5015" Position [115, 123, 145, 137] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "5016" Position [115, 148, 145, 162] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant2" SID "5017" Ports [0, 1] Position [160, 97, 175, 113] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 " "12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "5018" Ports [1, 1] Position [185, 122, 205, 138] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1" ",'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "5019" Ports [1, 1] Position [185, 147, 205, 163] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1" ",'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "5020" Ports [3, 1] Position [235, 88, 280, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,84,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 84 84 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 84 84 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[48.66 4" "8.66 54.66 48.66 54.66 54.66 54.66 48.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[42.66 42.66 48.66 " "48.66 42.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[36.66 36.66 42.66 42.66 36.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 30.66 36.66 36.66 30.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "D" SID "5021" Position [320, 123, 350, 137] IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "D" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register" DstPort 2 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Register" DstPort 3 } } } Block { BlockType SubSystem Name "negedge" SID "5022" Ports [1, 1] Position [110, 101, 165, 119] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "negedge" Location [2, 74, 1902, 1156] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "5023" Position [275, 208, 305, 222] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Delay6" SID "5024" Ports [1, 1] Position [375, 206, 415, 224] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "5025" Ports [1, 1] Position [375, 225, 410, 245] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,251" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "5026" Ports [2, 1] Position [440, 203, 485, 247] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "5027" Position [510, 218, 540, 232] IconDisplay "Port number" } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [40, 0] Branch { DstBlock "Delay6" DstPort 1 } Branch { Points [0, 20] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 2 } } } Block { BlockType SubSystem Name "posedge1" SID "5028" Ports [1, 1] Position [110, 121, 165, 139] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge1" Location [435, 153, 872, 268] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "5029" Position [40, 38, 70, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Delay12" SID "5030" Ports [1, 1] Position [130, 29, 160, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "5031" Ports [1, 1] Position [175, 37, 215, 53] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "5032" Ports [2, 1] Position [250, 35, 285, 75] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,40,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 40 40 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "5033" Position [310, 48, 340, 62] IconDisplay "Port number" } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [15, 0] Branch { Points [0, 20] DstBlock "Logical2" DstPort 2 } Branch { DstBlock "Delay12" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Delay12" SrcPort 1 DstBlock "Inverter1" DstPort 1 } } } Block { BlockType Outport Name "Phase Err" SID "5034" Position [1005, 213, 1035, 227] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "Rst" SID "5035" Position [980, 113, 1010, 127] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Vout" SID "5036" Position [1005, 238, 1035, 252] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name " Sym Index" SID "5037" Position [1010, 273, 1040, 287] Port "4" IconDisplay "Port number" } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Rst" DstPort 1 } Line { SrcBlock "Xk_index" SrcPort 1 Points [210, 0] Branch { DstBlock "Pilot_Descrambler" DstPort 2 } Branch { Points [0, -40] DstBlock "Phase Calculation" DstPort 7 } } Line { SrcBlock "Raw I" SrcPort 1 DstBlock "Pilot_Descrambler" DstPort 4 } Line { SrcBlock "Raw Q" SrcPort 1 DstBlock "Pilot_Descrambler" DstPort 5 } Line { SrcBlock "Sym Index" SrcPort 1 Points [195, 0] Branch { Points [0, 15] DstBlock "Pilot_Descrambler" DstPort 1 } Branch { Points [0, -30] DstBlock "Phase Calculation" DstPort 6 } } Line { SrcBlock "Pilot_Descrambler" SrcPort 1 DstBlock "Phase Calculation" DstPort 8 } Line { SrcBlock "Pilot_Descrambler" SrcPort 2 DstBlock "Phase Calculation" DstPort 9 } Line { SrcBlock "H_AA I" SrcPort 1 DstBlock "Phase Calculation" DstPort 2 } Line { SrcBlock "H_AA Q" SrcPort 1 DstBlock "Phase Calculation" DstPort 3 } Line { SrcBlock "H_BA I" SrcPort 1 DstBlock "Phase Calculation" DstPort 4 } Line { SrcBlock "H_BA Q" SrcPort 1 DstBlock "Phase Calculation" DstPort 5 } Line { SrcBlock "Phase Calculation" SrcPort 2 Points [40, 0] Branch { DstBlock "Chan Phase RAM" DstPort 3 } Branch { Points [0, 265] DstBlock "Gateway Out7" DstPort 1 } } Line { SrcBlock "Chan Phase RAM" SrcPort 1 DstBlock "Averager" DstPort 2 } Line { SrcBlock "Train" SrcPort 1 Points [25, 0] Branch { DstBlock "Phase Calculation" DstPort 1 } Branch { Points [0, -100] Branch { DstBlock "posedge1" DstPort 1 } Branch { Points [0, -20] DstBlock "negedge" DstPort 1 } } } Line { SrcBlock "negedge" SrcPort 1 DstBlock "S-R Latch" DstPort 1 } Line { SrcBlock "Averager" SrcPort 1 DstBlock "Phase Err" DstPort 1 } Line { SrcBlock "Averager" SrcPort 2 DstBlock "Vout" DstPort 1 } Line { SrcBlock "Phase Calculation" SrcPort 1 Points [50, 0] Branch { DstBlock "Chan Phase RAM" DstPort 2 } Branch { Points [0, 285] DstBlock "Gateway Out8" DstPort 1 } } Line { SrcBlock "Pilot_Descrambler" SrcPort 3 DstBlock "Phase Calculation" DstPort 10 } Line { SrcBlock "Pilot_Descrambler" SrcPort 4 DstBlock "Phase Calculation" DstPort 11 } Line { SrcBlock "Phase Calculation" SrcPort 3 Points [30, 0] Branch { Points [0, 245] DstBlock "Gateway Out9" DstPort 1 } Branch { DstBlock "Chan Phase RAM" DstPort 4 } } Line { SrcBlock "Phase Calculation" SrcPort 4 Points [25, 0] Branch { Points [0, 225] DstBlock "Gateway Out10" DstPort 1 } Branch { DstBlock "Chan Phase RAM" DstPort 5 } } Line { SrcBlock "Phase Calculation" SrcPort 5 Points [20, 0] Branch { Points [0, 205] DstBlock "Gateway Out1" DstPort 1 } Branch { DstBlock "Chan Phase RAM" DstPort 6 } } Line { SrcBlock "Phase Calculation" SrcPort 6 Points [10, 0] Branch { DstBlock "Chan Phase RAM" DstPort 7 } Branch { Points [0, 185] DstBlock "Gateway Out2" DstPort 1 } } Line { SrcBlock "Phase Calculation" SrcPort 7 Points [5, 0] Branch { DstBlock "Chan Phase RAM" DstPort 8 } Branch { Points [0, 165] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "Chan Phase RAM" SrcPort 2 Points [40, 0; 0, -60] DstBlock "Averager" DstPort 3 } Line { SrcBlock "Chan Phase RAM" SrcPort 3 Points [45, 0; 0, -120] DstBlock "Averager" DstPort 4 } Line { SrcBlock "Gateway Out8" SrcPort 1 Points [30, 0] } Line { SrcBlock "Gateway Out7" SrcPort 1 Points [30, 0] } Line { SrcBlock "Gateway Out9" SrcPort 1 Points [30, 0] } Line { SrcBlock "Gateway Out10" SrcPort 1 Points [30, 0] } Line { SrcBlock "Gateway Out1" SrcPort 1 Points [30, 0] } Line { SrcBlock "Gateway Out2" SrcPort 1 Points [30, 0] } Line { SrcBlock "Gateway Out3" SrcPort 1 Points [30, 0] } Line { SrcBlock "Phase Calculation" SrcPort 8 DstBlock "Chan Phase RAM" DstPort 9 } Line { SrcBlock "Chan Phase RAM" SrcPort 4 Points [75, 0] DstBlock "Averager" DstPort 5 } Line { SrcBlock "Averager" SrcPort 3 Points [15, 0; 0, 10] DstBlock " Sym Index" DstPort 1 } Line { SrcBlock "Rst " SrcPort 1 Points [110, 0] Branch { Points [0, 155] DstBlock "Pilot_Descrambler" DstPort 3 } Branch { Points [0, -85; 455, 0] Branch { DstBlock "Chan Phase RAM" DstPort 1 } Branch { Points [0, -40; 205, 0] Branch { Points [0, 55] DstBlock "Averager" DstPort 1 } Branch { Points [0, -30] DstBlock "S-R Latch" DstPort 2 } } } } } } Block { BlockType Reference Name "Register2" SID "5038" Ports [3, 1] Position [685, 228, 720, 262] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "8.2.02" sg_icon_stat "35,34,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 34 34 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[21.44 21.4" "4 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[17.44 17.44 21.44 21.44 " "17.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('bl" "ack');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" } Block { BlockType Reference Name "Reinterpret" SID "5039" Ports [1, 1] Position [895, 452, 930, 468] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal betw" "een signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothin" "g.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to " "unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of " "56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "35,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_debug_PhaseError" SID "5040" Ports [1, 1] Position [950, 240, 985, 250] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.985 0.979 0.895 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.985 0.979 0.8" "95 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprint" "f('','COMMENT: end icon text');" } Block { BlockType Outport Name "Phase I" SID "5041" Position [955, 318, 985, 332] IconDisplay "Port number" } Block { BlockType Outport Name "Phase Q" SID "5042" Position [955, 368, 985, 382] Port "2" IconDisplay "Port number" } Line { SrcBlock "Pilot Phase Error Calc" SrcPort 2 Points [35, 0; 0, -25] Branch { Points [0, -90] DstBlock "Register2" DstPort 2 } Branch { Points [85, 0] Branch { Points [0, 150] DstBlock "CFO Calculation" DstPort 3 } Branch { DstBlock "Phase Noise Tracker" DstPort 2 } } } Line { SrcBlock "Delay12" SrcPort 1 DstBlock "Pilot Phase Error Calc" DstPort 1 } Line { SrcBlock "Delay13" SrcPort 1 DstBlock "Pilot Phase Error Calc" DstPort 2 } Line { SrcBlock "Delay14" SrcPort 1 DstBlock "Pilot Phase Error Calc" DstPort 4 } Line { SrcBlock "I" SrcPort 1 DstBlock "Delay12" DstPort 1 } Line { SrcBlock "Q" SrcPort 1 DstBlock "Delay13" DstPort 1 } Line { SrcBlock "Xk_Index" SrcPort 1 DstBlock "Pilot Phase Error Calc" DstPort 3 } Line { SrcBlock "Sym_Index" SrcPort 1 DstBlock "Delay14" DstPort 1 } Line { SrcBlock "Train" SrcPort 1 Points [200, 0; 0, -55] DstBlock "Pilot Phase Error Calc" DstPort 9 } Line { SrcBlock "Register2" SrcPort 1 Points [55, 0] Branch { Points [0, -35] DstBlock "Goto5" DstPort 1 } Branch { DstBlock "Convert3" DstPort 1 } } Line { SrcBlock "HAA_I" SrcPort 1 Points [160, 0; 0, -25] DstBlock "Pilot Phase Error Calc" DstPort 5 } Line { SrcBlock "HAA_Q" SrcPort 1 Points [165, 0; 0, -25] DstBlock "Pilot Phase Error Calc" DstPort 6 } Line { SrcBlock "HBA_I" SrcPort 1 Points [135, 0; 0, -40] DstBlock "Pilot Phase Error Calc" DstPort 7 } Line { SrcBlock "HBA_Q" SrcPort 1 Points [140, 0; 0, -40] DstBlock "Pilot Phase Error Calc" DstPort 8 } Line { SrcBlock "Pilot Phase Error Calc" SrcPort 3 Points [50, 0; 0, -35] Branch { Points [0, -105] DstBlock "Register2" DstPort 3 } Branch { Points [80, 0] Branch { Points [0, 110] DstBlock "CFO Calculation" DstPort 2 } Branch { DstBlock "Phase Noise Tracker" DstPort 3 } } } Line { SrcBlock "Pilot Phase Error Calc" SrcPort 1 Points [10, 0; 0, -15] Branch { Points [0, -75] DstBlock "Register2" DstPort 1 } Branch { Points [130, 0] Branch { Points [0, 145] DstBlock "CFO Calculation" DstPort 1 } Branch { DstBlock "Phase Noise Tracker" DstPort 1 } } } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Rx_debug_PhaseError" DstPort 1 } Line { SrcBlock "Phase Noise Tracker" SrcPort 1 DstBlock "Phase I" DstPort 1 } Line { SrcBlock "Phase Noise Tracker" SrcPort 2 DstBlock "Phase Q" DstPort 1 } Line { SrcBlock "Pilot Phase Error Calc" SrcPort 4 Points [95, 0; 0, -45] DstBlock "Phase Noise Tracker" DstPort 4 } Line { SrcBlock "CFO Calculation" SrcPort 1 Points [60, 0] Branch { Points [0, 90] DstBlock "Goto3" DstPort 1 } Branch { DstBlock "Reinterpret" DstPort 1 } } Line { SrcBlock "CFO Calculation" SrcPort 2 Points [55, 0] Branch { DstBlock "Goto2" DstPort 1 } Branch { Points [0, 90] DstBlock "Goto4" DstPort 1 } } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 Points [325, 0; 0, -70] DstBlock "Pilot Phase Error Calc" DstPort 10 } } } Block { BlockType Reference Name "Training Symbol" SID "5044" Ports [1, 1] Position [370, 544, 440, 576] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(train)/2" initVector "sign(train)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "2" bin_pt "1" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "70,32,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 70 70 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 70 70 0 0 ],[0 0 32 32 0 ]);\npatch([26.1 31.88 35.88 39.88 43.88 35.88 30.1 26.1 ],[20.44 20.44 24" ".44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([30.1 35.88 31.88 26.1 30.1 ],[16.44 16.44 20.44 20.44 16.44" " ],[0.931 0.946 0.973 ]);\npatch([26.1 31.88 35.88 30.1 26.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch(" "[30.1 43.88 39.88 35.88 31.88 26.1 30.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Training?" SID "5045" Ports [1, 2] Position [210, 448, 320, 477] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Training?" Location [150, 318, 645, 426] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "153" Block { BlockType Inport Name "SynIndex" SID "5046" Position [405, 278, 435, 292] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Clear2" SID "5047" Ports [0, 1] Position [385, 184, 415, 206] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "73,268,403,311" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('output',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "5048" Ports [2, 1] Position [465, 172, 500, 203] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.01" sg_icon_stat "35,31,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 31 31 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','" "on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "5049" Position [105, 341, 255, 359] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType From Name "From2" SID "5050" Position [35, 181, 185, 199] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_SISOmode" TagVisibility "global" } Block { BlockType From Name "From3" SID "5051" Position [35, 161, 185, 179] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType From Name "From5" SID "5052" Position [100, 301, 250, 319] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_numTrainingSymbols" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "5053" Ports [1, 1] Position [230, 182, 270, 198] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "5054" Ports [1, 1] Position [230, 162, 270, 178] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "5055" Ports [2, 1] Position [330, 160, 365, 200] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,40,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 40 40 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "5056" Ports [3, 1] Position [395, 341, 420, 399] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "25,58,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 8.28571 49.7143 58 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 8.28571 49.7143 58 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[32.33 32.33 35.33 32.33 35.33 35.33 35.33 32.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[29.33 29.33 32.33 32.33 29.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[26.33 26.33 " "29.33 29.33 26.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[23.33 23.33 26.33 23.33 26.33" " 26.33 23.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');" } Block { BlockType Reference Name "Relational" SID "5057" Ports [2, 1] Position [540, 159, 575, 201] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a<=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,42,2,1,white,blue,0,52e4b236,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\leq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "5058" Ports [2, 1] Position [540, 273, 580, 322] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "60,30,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([25.1 38.88 34.88 30.88 26.88 21.1 25.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "1LSB+1" SID "5067" Ports [1, 1] Position [455, 240, 515, 270] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "60,30,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\npatch([21.1 26.88 30.88 34.88 38.88 30.88 25.1 21.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([25.1 30.88 26.88 21.1 25.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([21.1 26.88 30.88 25.1 21.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([25.1 38.88 34.88 30.88 26.88 21.1 25.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "5068" Ports [1, 1] Position [1040, 274, 1070, 306] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming on xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "5069" Ports [1, 1] Position [1040, 339, 1070, 371] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming on xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "5070" Ports [1, 1] Position [1040, 209, 1070, 241] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming on xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "5071" Ports [1, 1] Position [1040, 404, 1070, 436] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming on xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "5072" Position [1110, 241, 1260, 259] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType From Name "From5" SID "5073" Position [285, 211, 435, 229] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_SISOmode" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "5074" Ports [1, 1] Position [480, 212, 520, 228] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "5075" Ports [1, 1] Position [1290, 282, 1330, 298] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "5076" Ports [1, 1] Position [820, 225, 850, 235] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "30,10,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "5077" Ports [1, 1] Position [820, 240, 850, 250] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "30,10,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter4" SID "5078" Ports [1, 1] Position [820, 290, 850, 300] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "30,10,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter7" SID "5079" Ports [1, 1] Position [820, 370, 850, 380] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "30,10,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 10 10 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "5080" Ports [4, 1] Position [900, 191, 985, 254] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "85,63,4,1,white,blue,0,50b60d37,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 63 63 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 63 63 0 ]);\npatch([21.975 34.98 43.98 52.98 61.98 43.98 30.975 21.975 ],[40" ".99 40.99 49.99 40.99 49.99 49.99 49.99 40.99 ],[1 1 1 ]);\npatch([30.975 43.98 34.98 21.975 30.975 ],[31.99 31." "99 40.99 40.99 31.99 ],[0.931 0.946 0.973 ]);\npatch([21.975 34.98 43.98 30.975 21.975 ],[22.99 22.99 31.99 31.9" "9 22.99 ],[1 1 1 ]);\npatch([30.975 61.98 52.98 43.98 34.98 21.975 30.975 ],[13.99 13.99 22.99 13.99 22.99 22.99" " 13.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\n\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical1" SID "5081" Ports [2, 1] Position [1350, 242, 1395, 278] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,36,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 36 36 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[23.55 2" "3.55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[18.55 18.55 23.5" "5 23.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[13.55 13.55 18.55 18.55 13.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "5082" Ports [2, 1] Position [630, 227, 675, 263] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,36,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 36 36 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[23.55 2" "3.55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[18.55 18.55 23.5" "5 23.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[13.55 13.55 18.55 18.55 13.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "5083" Ports [2, 1] Position [1430, 252, 1475, 288] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,36,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 36 36 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[23.55 2" "3.55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[18.55 18.55 23.5" "5 23.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[13.55 13.55 18.55 18.55 13.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor(" "'black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "5084" Ports [2, 1] Position [1350, 282, 1395, 318] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,36,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 36 36 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[23.55 2" "3.55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[18.55 18.55 23.5" "5 23.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[13.55 13.55 18.55 18.55 13.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor(" "'black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "5085" Ports [4, 1] Position [900, 256, 985, 319] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "85,63,4,1,white,blue,0,50b60d37,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 63 63 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 63 63 0 ]);\npatch([21.975 34.98 43.98 52.98 61.98 43.98 30.975 21.975 ],[40" ".99 40.99 49.99 40.99 49.99 49.99 49.99 40.99 ],[1 1 1 ]);\npatch([30.975 43.98 34.98 21.975 30.975 ],[31.99 31." "99 40.99 40.99 31.99 ],[0.931 0.946 0.973 ]);\npatch([21.975 34.98 43.98 30.975 21.975 ],[22.99 22.99 31.99 31.9" "9 22.99 ],[1 1 1 ]);\npatch([30.975 61.98 52.98 43.98 34.98 21.975 30.975 ],[13.99 13.99 22.99 13.99 22.99 22.99" " 13.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\n\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical6" SID "5086" Ports [4, 1] Position [900, 321, 985, 384] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "85,63,4,1,white,blue,0,50b60d37,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 63 63 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 63 63 0 ]);\npatch([21.975 34.98 43.98 52.98 61.98 43.98 30.975 21.975 ],[40" ".99 40.99 49.99 40.99 49.99 49.99 49.99 40.99 ],[1 1 1 ]);\npatch([30.975 43.98 34.98 21.975 30.975 ],[31.99 31." "99 40.99 40.99 31.99 ],[0.931 0.946 0.973 ]);\npatch([21.975 34.98 43.98 30.975 21.975 ],[22.99 22.99 31.99 31.9" "9 22.99 ],[1 1 1 ]);\npatch([30.975 61.98 52.98 43.98 34.98 21.975 30.975 ],[13.99 13.99 22.99 13.99 22.99 22.99" " 13.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\n\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical7" SID "5087" Ports [4, 1] Position [900, 386, 985, 449] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "85,63,4,1,white,blue,0,50b60d37,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 63 63 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 63 63 0 ]);\npatch([21.975 34.98 43.98 52.98 61.98 43.98 30.975 21.975 ],[40" ".99 40.99 49.99 40.99 49.99 49.99 49.99 40.99 ],[1 1 1 ]);\npatch([30.975 43.98 34.98 21.975 30.975 ],[31.99 31." "99 40.99 40.99 31.99 ],[0.931 0.946 0.973 ]);\npatch([21.975 34.98 43.98 30.975 21.975 ],[22.99 22.99 31.99 31.9" "9 22.99 ],[1 1 1 ]);\npatch([30.975 61.98 52.98 43.98 34.98 21.975 30.975 ],[13.99 13.99 22.99 13.99 22.99 22.99" " 13.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\n\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Seq0" SID "5088" Position [1110, 218, 1140, 232] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "Seq1" SID "5089" Position [1550, 293, 1580, 307] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Seq2" SID "5090" Position [1550, 263, 1580, 277] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Seq3" SID "5091" Position [1110, 413, 1140, 427] Port "4" IconDisplay "Port number" } Line { SrcBlock "Inverter" SrcPort 1 Points [35, 0; 0, 15] DstBlock "Logical2" DstPort 1 } Line { SrcBlock "1LSB+1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Delay4" SrcPort 1 DstBlock "Seq3" DstPort 1 } Line { SrcBlock "Delay2" SrcPort 1 Points [340, 0] DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Delay1" SrcPort 1 Points [10, 0] Branch { Points [0, -20] DstBlock "Logical1" DstPort 2 } Branch { Points [20, 0; 0, 20] DstBlock "Logical4" DstPort 2 } } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Seq0" DstPort 1 } Line { SrcBlock "1LSB" SrcPort 1 Points [215, 0] Branch { Points [0, 65] Branch { DstBlock "Inverter7" DstPort 1 } Branch { Points [0, 65] DstBlock "Logical7" DstPort 4 } } Branch { Points [0, -65] DstBlock "Inverter3" DstPort 1 } Branch { DstBlock "Logical5" DstPort 4 } } Line { SrcBlock "Vin" SrcPort 1 Points [115, 0] Branch { Points [0, 65] Branch { Points [0, 65] Branch { DstBlock "Logical6" DstPort 1 } Branch { Points [0, 65] DstBlock "Logical7" DstPort 1 } } Branch { DstBlock "Logical5" DstPort 1 } } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "Delay4" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 Points [50, 0] Branch { Points [0, 50] Branch { Points [0, 65] Branch { DstBlock "Logical6" DstPort 3 } Branch { Points [0, 65] DstBlock "Logical7" DstPort 3 } } Branch { DstBlock "Inverter4" DstPort 1 } } Branch { Points [0, -15] DstBlock "Inverter2" DstPort 1 } } Line { SrcBlock "Sym Index" SrcPort 1 Points [60, 0] Branch { DstBlock "1LSB" DstPort 1 } Branch { DstBlock "1LSB+1" DstPort 1 } } Line { SrcBlock "Train" SrcPort 1 Points [110, 0] Branch { Points [0, 65] Branch { Points [0, 65] Branch { DstBlock "Logical6" DstPort 2 } Branch { Points [0, 65] DstBlock "Logical7" DstPort 2 } } Branch { DstBlock "Logical5" DstPort 2 } } Branch { DstBlock "Logical" DstPort 2 } } Line { SrcBlock "From1" SrcPort 1 Points [5, 0] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, 40] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Seq2" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Seq1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical" DstPort 3 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical" DstPort 4 } Line { SrcBlock "Inverter4" SrcPort 1 DstBlock "Logical5" DstPort 3 } Line { SrcBlock "Inverter7" SrcPort 1 DstBlock "Logical6" DstPort 4 } Annotation { Name "SISOMode=1 writes estimates for antenna A for every\ntraining symbol. SISOMode=0 (i.e. MIMO mode) alt" "ernates\nbetween antenna A and B training symbols." Position [267, 121] HorizontalAlignment "left" } Annotation { Name "\"Swap\" the AB and BA channel estimate\nwrite enables in Alamouti mode.\nMakes the math and control " "way \neasier in the equalizer." Position [1391, 202] } } } Block { BlockType Reference Name "done1" SID "5092" Ports [1, 1] Position [1330, 645, 1365, 655] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done10" SID "5093" Ports [1, 1] Position [765, 45, 800, 55] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done11" SID "5094" Ports [1, 1] Position [765, 55, 800, 65] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done12" SID "5095" Ports [1, 1] Position [765, 65, 800, 75] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done13" SID "5096" Ports [1, 1] Position [765, 75, 800, 85] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done14" SID "5097" Ports [1, 1] Position [765, 85, 800, 95] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done2" SID "5098" Ports [1, 1] Position [1330, 690, 1365, 700] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done23" SID "5099" Ports [1, 1] Position [1330, 705, 1365, 715] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done3" SID "5100" Ports [1, 1] Position [1330, 615, 1365, 625] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done4" SID "5101" Ports [1, 1] Position [1330, 585, 1365, 595] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done5" SID "5102" Ports [1, 1] Position [1330, 600, 1365, 610] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done6" SID "5103" Ports [1, 1] Position [1330, 630, 1365, 640] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done7" SID "5104" Ports [1, 1] Position [1330, 660, 1365, 670] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done8" SID "5105" Ports [1, 1] Position [1330, 675, 1365, 685] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done9" SID "5106" Ports [1, 1] Position [1330, 570, 1365, 580] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Outport Name "H-I" SID "5107" Position [1435, 298, 1465, 312] IconDisplay "Port number" } Block { BlockType Outport Name "H-Q" SID "5108" Position [1435, 358, 1465, 372] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Phase I" SID "5109" Position [1245, 143, 1275, 157] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Phase Q" SID "5110" Position [1245, 203, 1275, 217] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Est Vout" SID "5111" Position [1160, 728, 1190, 742] Port "5" IconDisplay "Port number" } Line { SrcBlock "Delay5" SrcPort 1 Points [265, 0] Branch { Points [0, 90] Branch { DstBlock "H_A-B Estimate Buffer" DstPort 4 } Branch { Points [0, 120] Branch { Points [0, 95] DstBlock "H_B-B Estimate Buffer" DstPort 4 } Branch { DstBlock "Logical1" DstPort 2 } } } Branch { DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "Delay2" SrcPort 1 Points [10, 0] Branch { DstBlock "Mux3" DstPort 3 } Branch { Points [0, -130] Branch { Points [0, -210; 70, 0] Branch { Points [155, 0] DstBlock "H_A-A Estimate Buffer" DstPort 5 } Branch { Labels [0, 0] Points [0, -160] DstBlock "Pilot Processing" DstPort 4 } } Branch { DstBlock "H_B-A Estimate Buffer" DstPort 5 } } } Line { SrcBlock "Est Index" SrcPort 1 Points [415, 0] Branch { Points [0, -60] DstBlock "Mux3" DstPort 2 } Branch { Points [285, 0] Branch { DstBlock "Delay7" DstPort 1 } Branch { Points [0, -25; 345, 0; 0, -165] DstBlock "Chan Est Buffer\n& Mag Calc" DstPort 10 } } } Line { SrcBlock "Delay10" SrcPort 1 DstBlock "Delay11" DstPort 1 } Line { SrcBlock "done23" SrcPort 1 Points [45, 0] } Line { SrcBlock "done9" SrcPort 1 Points [45, 0] } Line { SrcBlock "done2" SrcPort 1 Points [45, 0] } Line { SrcBlock "done8" SrcPort 1 Points [45, 0] } Line { SrcBlock "done7" SrcPort 1 Points [45, 0] } Line { SrcBlock "done6" SrcPort 1 Points [45, 0] } Line { SrcBlock "done3" SrcPort 1 Points [45, 0] } Line { SrcBlock "done5" SrcPort 1 Points [45, 0] } Line { SrcBlock "done4" SrcPort 1 Points [45, 0] } Line { SrcBlock "done1" SrcPort 1 Points [45, 0] } Line { SrcBlock "H_B-B Estimate Buffer" SrcPort 2 Points [155, 0; 0, -245] DstBlock "Downsamplng" DstPort 8 } Line { SrcBlock "H_B-B Estimate Buffer" SrcPort 1 Points [150, 0; 0, -215] DstBlock "Downsamplng" DstPort 7 } Line { Labels [2, 0] SrcBlock "H_B-A Estimate Buffer" SrcPort 4 Points [120, 0; 0, -190] DstBlock "Downsamplng" DstPort 6 } Line { SrcBlock "H_B-A Estimate Buffer" SrcPort 3 Points [115, 0; 0, -185] DstBlock "Downsamplng" DstPort 5 } Line { SrcBlock "H_A-B Estimate Buffer" SrcPort 2 Points [80, 0; 0, -90] DstBlock "Downsamplng" DstPort 4 } Line { SrcBlock "H_A-B Estimate Buffer" SrcPort 1 Points [75, 0; 0, -60] DstBlock "Downsamplng" DstPort 3 } Line { SrcBlock "H_A-A Estimate Buffer" SrcPort 4 Points [55, 0; 0, -50] DstBlock "Downsamplng" DstPort 2 } Line { SrcBlock "H_A-A Estimate Buffer" SrcPort 3 Points [50, 0; 0, -45] DstBlock "Downsamplng" DstPort 1 } Line { SrcBlock "Delay11" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Delay10" DstPort 1 } Line { SrcBlock "Delay7" SrcPort 1 DstBlock "done2" DstPort 1 } Line { SrcBlock "Delay9" SrcPort 1 Points [25, 0; 0, 30] DstBlock "WE Gen" DstPort 1 } Line { SrcBlock "Vin" SrcPort 1 Points [75, 0] Branch { DstBlock "Delay9" DstPort 1 } Branch { Labels [0, 0] Points [0, -225] Branch { DstBlock "Actual Trainig\nWindow" DstPort 1 } Branch { Points [0, -125] DstBlock "done10" DstPort 1 } } } Line { SrcBlock "Delay8" SrcPort 1 DstBlock "Mult by training" DstPort 2 } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "Mult by training" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 Points [80, 0] Branch { Points [0, 135] DstBlock "Mux3" DstPort 1 } Branch { DstBlock "WE Gen" DstPort 3 } Branch { Labels [0, 0] Points [0, -225; -180, 0; 0, -50] Branch { DstBlock "Actual Trainig\nWindow" DstPort 2 } Branch { Points [0, -135] DstBlock "done11" DstPort 1 } } } Line { SrcBlock "Delay1" SrcPort 1 Points [0, 15; 75, 0] Branch { DstBlock "WE Gen" DstPort 2 } Branch { Labels [0, 0] Points [0, -275] DstBlock "Pilot Processing" DstPort 5 } } Line { SrcBlock "Mult by training" SrcPort 2 Points [70, 0] Branch { DstBlock "H_A-B Estimate Buffer" DstPort 2 } Branch { Points [0, -85] DstBlock "H_A-A Estimate Buffer" DstPort 2 } Branch { Points [0, 115] Branch { Points [0, 100] DstBlock "H_B-B Estimate Buffer" DstPort 2 } Branch { DstBlock "H_B-A Estimate Buffer" DstPort 2 } } } Line { SrcBlock "Training?" SrcPort 2 Points [40, 0] Branch { DstBlock "Delay3" DstPort 1 } Branch { Points [0, 265] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "WE Gen" SrcPort 2 Points [40, 0; 0, -50] DstBlock "H_A-B Estimate Buffer" DstPort 3 } Line { SrcBlock "WE Gen" SrcPort 4 Points [40, 0; 0, 135] DstBlock "H_B-B Estimate Buffer" DstPort 3 } Line { SrcBlock "WE Gen" SrcPort 3 Points [45, 0; 0, 50] DstBlock "H_B-A Estimate Buffer" DstPort 3 } Line { SrcBlock "WE Gen" SrcPort 1 Points [30, 0; 0, -120] DstBlock "H_A-A Estimate Buffer" DstPort 3 } Line { SrcBlock "Mux3" SrcPort 1 Points [90, 0] Branch { DstBlock "H_B-B Estimate Buffer" DstPort 5 } Branch { Points [0, -85] Branch { Points [0, -130] Branch { DstBlock "H_A-B Estimate Buffer" DstPort 5 } Branch { Points [0, -70] DstBlock "H_A-A Estimate Buffer" DstPort 6 } } Branch { DstBlock "H_B-A Estimate Buffer" DstPort 6 } } } Line { SrcBlock "Mult by training" SrcPort 1 Points [65, 0] Branch { Points [0, 0] Branch { DstBlock "H_A-B Estimate Buffer" DstPort 1 } Branch { Points [0, -85] DstBlock "H_A-A Estimate Buffer" DstPort 1 } } Branch { Points [0, 115] Branch { DstBlock "H_B-A Estimate Buffer" DstPort 1 } Branch { Points [0, 100] DstBlock "H_B-B Estimate Buffer" DstPort 1 } } } Line { SrcBlock "Xk Index" SrcPort 1 Points [50, 0] Branch { Points [115, 0] Branch { DstBlock "Training Symbol" DstPort 1 } Branch { Points [0, 105] DstBlock "Delay4" DstPort 1 } } Branch { Points [0, -470] DstBlock "done14" DstPort 1 } } Line { SrcBlock "Sym Index" SrcPort 1 Points [140, 0] Branch { Labels [0, 0] DstBlock "Training?" DstPort 1 } Branch { Points [0, -30] Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, -355] DstBlock "done13" DstPort 1 } } } Line { SrcBlock "Q" SrcPort 1 Points [50, 0] Branch { DstBlock "Delay8" DstPort 1 } Branch { Labels [0, 0] Points [0, -210] DstBlock "Pilot Processing" DstPort 3 } } Line { SrcBlock "I" SrcPort 1 Points [55, 0] Branch { DstBlock "Delay6" DstPort 1 } Branch { Labels [0, 0] Points [0, -210] DstBlock "Pilot Processing" DstPort 2 } } Line { SrcBlock "Delay4" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "Training Symbol" SrcPort 1 Points [25, 0; 0, -185] DstBlock "Mult by training" DstPort 3 } Line { SrcBlock "Down Sample" SrcPort 1 Points [40, 0] Branch { DstBlock "Est Vout" DstPort 1 } Branch { Points [0, -25] Branch { Points [0, -215] DstBlock "Chan Est Buffer\n& Mag Calc" DstPort 9 } Branch { DstBlock "done23" DstPort 1 } } } Line { SrcBlock "Bus Creator" SrcPort 1 DstBlock "H-I" DstPort 1 } Line { SrcBlock "Bus Creator" SrcPort 2 DstBlock "H-Q" DstPort 1 } Line { SrcBlock "Downsamplng" SrcPort 1 Points [65, 0] Branch { DstBlock "Bus Creator" DstPort 1 } Branch { Points [0, 135] Branch { DstBlock "Chan Est Buffer\n& Mag Calc" DstPort 1 } Branch { Points [0, 160] DstBlock "done9" DstPort 1 } } } Line { SrcBlock "Downsamplng" SrcPort 2 Points [60, 0] Branch { DstBlock "Bus Creator" DstPort 2 } Branch { Points [0, 130] Branch { DstBlock "Chan Est Buffer\n& Mag Calc" DstPort 2 } Branch { Points [0, 165] DstBlock "done4" DstPort 1 } } } Line { SrcBlock "Downsamplng" SrcPort 3 Points [55, 0] Branch { DstBlock "Bus Creator" DstPort 3 } Branch { Points [0, 125] Branch { DstBlock "Chan Est Buffer\n& Mag Calc" DstPort 3 } Branch { Points [0, 170] DstBlock "done5" DstPort 1 } } } Line { SrcBlock "Downsamplng" SrcPort 4 Points [50, 0] Branch { DstBlock "Bus Creator" DstPort 4 } Branch { Points [0, 120] Branch { DstBlock "Chan Est Buffer\n& Mag Calc" DstPort 4 } Branch { Points [0, 175] DstBlock "done3" DstPort 1 } } } Line { SrcBlock "Downsamplng" SrcPort 5 Points [45, 0] Branch { DstBlock "Bus Creator" DstPort 5 } Branch { Points [0, 115] Branch { DstBlock "Chan Est Buffer\n& Mag Calc" DstPort 5 } Branch { Points [0, 180] DstBlock "done6" DstPort 1 } } } Line { SrcBlock "Downsamplng" SrcPort 6 Points [40, 0] Branch { DstBlock "Bus Creator" DstPort 6 } Branch { Points [0, 110] Branch { DstBlock "Chan Est Buffer\n& Mag Calc" DstPort 6 } Branch { Points [0, 185] DstBlock "done1" DstPort 1 } } } Line { SrcBlock "Downsamplng" SrcPort 7 Points [35, 0] Branch { DstBlock "Bus Creator" DstPort 7 } Branch { Points [0, 105] Branch { DstBlock "Chan Est Buffer\n& Mag Calc" DstPort 7 } Branch { Points [0, 190] DstBlock "done7" DstPort 1 } } } Line { SrcBlock "Downsamplng" SrcPort 8 Points [30, 0] Branch { DstBlock "Bus Creator" DstPort 8 } Branch { Points [0, 100] Branch { DstBlock "Chan Est Buffer\n& Mag Calc" DstPort 8 } Branch { Points [0, 195] DstBlock "done8" DstPort 1 } } } Line { SrcBlock "Training?" SrcPort 1 Points [25, 0; 0, -140] DstBlock "Delay5" DstPort 1 } Line { SrcBlock "Pilot Processing" SrcPort 1 DstBlock "Phase I" DstPort 1 } Line { Labels [0, 0] SrcBlock "H_A-A Estimate Buffer" SrcPort 1 Points [25, 0; 0, -90] DstBlock "Pilot Processing" DstPort 7 } Line { Labels [0, 0] SrcBlock "H_A-A Estimate Buffer" SrcPort 2 Points [30, 0; 0, -100] DstBlock "Pilot Processing" DstPort 8 } Line { SrcBlock "H_B-A Estimate Buffer" SrcPort 2 Points [100, 0; 0, -280] DstBlock "Pilot Processing" DstPort 10 } Line { SrcBlock "H_B-A Estimate Buffer" SrcPort 1 Points [95, 0; 0, -270] DstBlock "Pilot Processing" DstPort 9 } Line { SrcBlock "Actual Trainig\nWindow" SrcPort 1 Points [45, 0] Branch { DstBlock "Pilot Processing" DstPort 6 } Branch { Points [0, -115] DstBlock "done12" DstPort 1 } } Line { Labels [0, 0] SrcBlock "Pilot Processing" SrcPort 2 DstBlock "Phase Q" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 Points [35, 0] DstBlock "H_A-A Estimate Buffer" DstPort 4 } Line { SrcBlock "From5" SrcPort 1 Points [140, 0; 0, 200] DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "H_B-A Estimate Buffer" DstPort 4 } Line { SrcBlock "From1" SrcPort 1 Points [255, 0; 0, 430] DstBlock "Logical1" DstPort 1 } Line { SrcBlock "done10" SrcPort 1 Points [80, 0] } Line { SrcBlock "done11" SrcPort 1 Points [80, 0] } Line { SrcBlock "done12" SrcPort 1 Points [80, 0] } Line { SrcBlock "done13" SrcPort 1 Points [80, 0] } Line { SrcBlock "done14" SrcPort 1 Points [80, 0] } Line { SrcBlock "Rst" SrcPort 1 Points [45, 0; 0, -105] DstBlock "Pilot Processing" DstPort 1 } Annotation { Name "Naming conventions:\nAntennas are labaled A and B\nH_A-A is channel between TxA and RxA\nH_A-B is channe" "l between TxA and RxB\nH_B-A is channel between TxB and RxA\nH_B-B is channel between TxB and RxB" Position [727, 959] HorizontalAlignment "left" } } } Block { BlockType Reference Name "Delay1" SID "5112" Ports [1, 1] Position [200, 328, 225, 352] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo" "p. If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bl" "ack');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "5113" Ports [1, 1] Position [1010, 733, 1035, 757] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo" "p. If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bl" "ack');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "5114" Ports [1, 1] Position [1010, 668, 1035, 692] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo" "p. If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bl" "ack');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "5115" Ports [1, 1] Position [1010, 703, 1035, 727] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo" "p. If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bl" "ack');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "5116" Ports [1, 1] Position [745, 637, 775, 663] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,26,1,1,white,blue,0,e5fb4045,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[" "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 1" "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13." "33 10.33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7" ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\n\n\ncolor('black');disp('{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf('','COMMENT: end icon" " text');" } Block { BlockType SubSystem Name "FFT" SID "5117" Ports [3, 6] Position [520, 301, 615, 464] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "FFT" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn_I" SID "5118" Position [85, 213, 115, 227] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "xn_Q" SID "5119" Position [85, 248, 115, 262] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Start" SID "5120" Position [240, 283, 270, 297] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Constant3" SID "5121" Ports [0, 1] Position [320, 314, 345, 336] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 14.33 " "17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33 14.33 1" "1.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'," "1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant4" SID "5122" Ports [0, 1] Position [320, 349, 345, 371] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 14.33 " "17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33 14.33 1" "1.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'," "1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant6" SID "5123" Ports [0, 1] Position [325, 419, 350, 441] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 14.33 " "17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33 14.33 1" "1.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'," "1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "5124" Ports [1, 1] Position [175, 213, 215, 227] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.5" "5 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "5125" Ports [1, 1] Position [175, 248, 215, 262] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.5" "5 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Fast Fourier Transform 7.1 " SID "9239" Ports [8, 10] Position [480, 203, 590, 482] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Fast Fourier Transform 7.1 " SourceType "Xilinx Fast Fourier Transform 7.1 Block" transform_length "64" implementation_options "pipelined_streaming_io" target_clock_frequency "40" target_data_throughput "50" run_time_configurable_transform_length off phase_factor_width "24" scaling_options "scaled" rounding_modes "convergent_rounding" output_ordering "natural_order" cyclic_prefix_insertion off ce off sclr on ovflo on input_data_offset "three_cycle_offset" memory_options_data "block_ram" memory_options_phase_factors "block_ram" number_of_stages_using_block_ram_for_data_and_phase_factors "1" memory_options_reorder "block_ram" memory_options_hybrid off complex_mult_type "use_mults_resources" butterfly_type "use_luts" xl_use_area off xl_area "[0,0,0,0,0,0,0]" channels "1" input_ordering "natural_order" input_width "16" simulation_type "external_xfix" simulation_model "fftv71_CModel:fftv71_cmodel" ip_name "Fast Fourier Transform" ip_version "7.1" dsptool_ready "true" wrapper_available "true" port_translation_map "{ 'ce' => 'en', 'sclr' => 'rst' }" ipcore_fpga_part "xlipgetpartsetting(gcb, {'virtex4', 'xc4vsx35', '-10', 'ff668'})" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "xfft_v7_1" sg_icon_stat "110,279,8,10,white,blue,0,a033fd5a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 110 110 0 0 ],[0 0 279 279 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 110 110 0 0 ],[0 0 279 279 0 ]);\npatch([21.625 43.3 58.3 73.3 88.3 58.3 36.625 21.625 ],[155.6" "5 155.65 170.65 155.65 170.65 170.65 170.65 155.65 ],[1 1 1 ]);\npatch([36.625 58.3 43.3 21.625 36.625 ],[140.65 1" "40.65 155.65 155.65 140.65 ],[0.931 0.946 0.973 ]);\npatch([21.625 43.3 58.3 36.625 21.625 ],[125.65 125.65 140.65" " 140.65 125.65 ],[1 1 1 ]);\npatch([36.625 88.3 73.3 58.3 43.3 21.625 36.625 ],[110.65 110.65 125.65 110.65 125.65" " 125.65 110.65 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'xn_re');\ncolor('black');port_label('input',2,'xn_im');\ncolor('bl" "ack');port_label('input',3,'start');\ncolor('black');port_label('input',4,'fwd_inv');\ncolor('black');port_label('" "input',5,'fwd_inv_we');\ncolor('black');port_label('input',6,'scale_sch');\ncolor('black');port_label('input',7,'s" "cale_sch_we');\ncolor('black');port_label('input',8,'rst');\ncolor('black');port_label('output',1,'xk_re');\ncolor" "('black');port_label('output',2,'xk_im');\ncolor('black');port_label('output',3,'xn_index');\ncolor('black');port_" "label('output',4,'xk_index');\ncolor('black');port_label('output',5,'rfd');\ncolor('black');port_label('output',6," "'busy');\ncolor('black');port_label('output',7,'dv');\ncolor('black');port_label('output',8,'edone');\ncolor('blac" "k');port_label('output',9,'done');\ncolor('black');port_label('output',10,'ovflo');\nfprintf('','COMMENT: end icon" " text');" } Block { BlockType SubSystem Name "FreqSelective\n\"Fading\"" SID "5127" Ports [3, 2] Position [920, 214, 965, 296] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "FreqSelective\n\"Fading\"" Location [1092, 203, 1437, 409] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "5128" Position [250, 218, 280, 232] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "5129" Position [250, 238, 280, 252] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Ind" SID "5130" Position [250, 268, 280, 282] Port "3" IconDisplay "Port number" } Block { BlockType SubSystem Name "FreqSelective\n\"Fading\"" SID "5131" Ports [3, 2] Position [340, 214, 420, 276] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "FreqSelective\n\"Fading\"" Location [942, 148, 1527, 326] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "5132" Position [155, 118, 185, 132] IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "5133" Position [155, 153, 185, 167] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Ind" SID "5134" Position [125, 83, 155, 97] Port "3" IconDisplay "Port number" } Block { BlockType Constant Name "Constant" SID "5135" Position [210, 64, 235, 86] ShowName off Value "10" } Block { BlockType Reference Name "Disregard Subsystem" SID "5136" Tag "discardX" Ports [] Position [338, 236, 396, 294] ShowName off AttributesFormatString "Disregard Subsystem\\nFor Generation" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Disregard Subsystem" SourceType "Xilinx Disregard Subsystem For Generation Block" infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code gener" "ation. This block can be used in combination with the Simulation Multiplexer block to provide an alternative sim" "ulation model for another subsystem (e.g., to provide a simulation model for a black box)." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "disregard" block_version "10.1.3" sg_icon_stat "58,58,-1,-1,darkgray,black,0,0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 ],[0 0 58 58 ],[0.1 0.1 0.1])" ";\npatch([14 4 18 4 14 29 33 37 53 40 28 19 33 19 28 40 53 37 33 29 14 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 " "16 7 19 6 6 10 6 6 ],[0.33 0.33 0.33]);\nplot([0 58 58 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon gra" "phics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Gain Name "Gain1" SID "5137" Position [365, 148, 415, 172] ShowName off ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain2" SID "5138" Position [365, 113, 415, 137] ShowName off ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Reference Name "Gateway In" SID "5139" Ports [1, 1] Position [550, 125, 615, 145] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fi" "xed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,348,406" block_type "gatewayin" block_version "10.1.3" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 " "0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway In1" SID "5140" Ports [1, 1] Position [550, 160, 615, 180] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fi" "xed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,348,406" block_type "gatewayin" block_version "10.1.3" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 " "0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out" SID "5141" Ports [1, 1] Position [210, 115, 270, 135] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type" " Simulink integer, single, double, or fixed point.

Hardware notes: In hardware these blocks become top l" "evel output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.964 0.964 0.964 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.964 0.964 " "0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out1" SID "5142" Ports [1, 1] Position [210, 150, 270, 170] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type" " Simulink integer, single, double, or fixed point.

Hardware notes: In hardware these blocks become top l" "evel output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.964 0.964 0.964 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.964 0.964 " "0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType RelationalOperator Name "Relational\nOperator" SID "5143" Ports [2, 1] Position [360, 67, 390, 98] ShowName off Operator "==" InputSameDT off OutDataTypeStr "boolean" } Block { BlockType Switch Name "Switch" SID "5144" Position [475, 120, 505, 150] ShowName off InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch1" SID "5145" Position [475, 155, 505, 185] ShowName off Criteria "u2 ~= 0" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Reference Name "done7" SID "9386" Ports [1, 1] Position [285, 85, 320, 95] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Outport Name " I" SID "5146" Position [660, 128, 690, 142] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name " Q" SID "5147" Position [660, 163, 690, 177] Port "2" IconDisplay "Port number" } Line { SrcBlock "Gain1" SrcPort 1 DstBlock "Switch1" DstPort 1 } Line { SrcBlock "Switch" SrcPort 1 DstBlock "Gateway In" DstPort 1 } Line { SrcBlock "Switch1" SrcPort 1 DstBlock "Gateway In1" DstPort 1 } Line { SrcBlock "Gateway In" SrcPort 1 DstBlock " I" DstPort 1 } Line { SrcBlock "Gateway In1" SrcPort 1 DstBlock " Q" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "Switch" DstPort 1 } Line { SrcBlock "Gateway Out" SrcPort 1 Points [55, 0] Branch { DstBlock "Gain2" DstPort 1 } Branch { Points [0, 20] DstBlock "Switch" DstPort 3 } } Line { SrcBlock "Relational\nOperator" SrcPort 1 Points [50, 0; 0, 50] Branch { Points [0, 35] DstBlock "Switch1" DstPort 2 } Branch { DstBlock "Switch" DstPort 2 } } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Relational\nOperator" DstPort 1 } Line { SrcBlock "Ind" SrcPort 1 DstBlock "done7" DstPort 1 } Line { SrcBlock "I" SrcPort 1 DstBlock "Gateway Out" DstPort 1 } Line { SrcBlock "Q" SrcPort 1 DstBlock "Gateway Out1" DstPort 1 } Line { SrcBlock "Gateway Out1" SrcPort 1 Points [55, 0] Branch { DstBlock "Gain1" DstPort 1 } Branch { Points [0, 20] DstBlock "Switch1" DstPort 3 } } Line { SrcBlock "done7" SrcPort 1 DstBlock "Relational\nOperator" DstPort 2 } Annotation { Name "Scales one subcarrier value by a constant, simulating\na deep frequency selective fade. Used to gauge" " impact\nof fixed point precision issues in equalizer. Ignored\nwhen generating model for hardware." Position [385, 396] } } } Block { BlockType Reference Name "Simulation Multiplexer" SID "5148" Ports [2, 1] Position [490, 222, 545, 253] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "20,20,336,197" block_type "simmux" block_version "10.1.3" sg_icon_stat "55,31,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 31 31 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\nfprintf('','COMME" "NT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX,hwSwLineY);\n" } Block { BlockType Reference Name "Simulation Multiplexer1" SID "5149" Ports [2, 1] Position [490, 252, 545, 283] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "20,20,336,197" block_type "simmux" block_version "10.1.3" sg_icon_stat "55,31,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 31 31 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\nfprintf('','COMME" "NT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX,hwSwLineY);\n" } Block { BlockType Outport Name " I" SID "5150" Position [585, 233, 615, 247] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name " Q" SID "5151" Position [585, 263, 615, 277] Port "2" IconDisplay "Port number" } Line { SrcBlock "FreqSelective\n\"Fading\"" SrcPort 1 DstBlock "Simulation Multiplexer" DstPort 1 } Line { SrcBlock "FreqSelective\n\"Fading\"" SrcPort 2 DstBlock "Simulation Multiplexer1" DstPort 1 } Line { SrcBlock "I" SrcPort 1 Points [30, 0] Branch { Points [0, -50; 140, 0; 0, 70] DstBlock "Simulation Multiplexer" DstPort 2 } Branch { DstBlock "FreqSelective\n\"Fading\"" DstPort 1 } } Line { SrcBlock "Q" SrcPort 1 Points [35, 0] Branch { DstBlock "FreqSelective\n\"Fading\"" DstPort 2 } Branch { Points [0, -65; 130, 0; 0, 95] DstBlock "Simulation Multiplexer1" DstPort 2 } } Line { SrcBlock "Ind" SrcPort 1 Points [20, 0; 0, -10] DstBlock "FreqSelective\n\"Fading\"" DstPort 3 } Line { SrcBlock "Simulation Multiplexer" SrcPort 1 DstBlock " I" DstPort 1 } Line { SrcBlock "Simulation Multiplexer1" SrcPort 1 DstBlock " Q" DstPort 1 } } } Block { BlockType From Name "From1" SID "5152" Position [130, 386, 245, 404] ShowName off CloseFcn "tagdialog Close" GotoTag "Rx_FFTScaling" TagVisibility "global" } Block { BlockType From Name "From2" SID "5153" Position [140, 446, 255, 464] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType Goto Name "Goto4" SID "5154" Position [800, 447, 895, 463] ShowName off GotoTag "FFT_Overflow" TagVisibility "global" } Block { BlockType SubSystem Name "Ind Chk1" SID "9737" Ports [2, 1] Position [1015, 268, 1060, 297] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Ind Chk1" Location [237, 105, 1845, 1279] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "9738" Position [25, 68, 55, 82] IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "9739" Position [25, 123, 55, 137] Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "Indeterminate Check" SID "9740" Ports [2, 1] Position [200, 31, 280, 69] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Indeterminate Check" Location [237, 105, 1845, 1279] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "237" Block { BlockType Inport Name "In1" SID "9741" Position [25, 85, 55, 100] BlockRotation 270 IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "9742" Position [30, 30, 60, 45] BlockRotation 270 Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant" SID "9743" Ports [0, 1] Position [75, 54, 100, 76] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disregard Subsystem" SID "9744" Tag "discardX" Ports [] Position [56, 130, 114, 188] ShowName off AttributesFormatString "Disregard Subsystem\\nFor Generation" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Disregard Subsystem" SourceType "Xilinx Disregard Subsystem For Generation Block" infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code gener" "ation. This block can be used in combination with the Simulation Multiplexer block to provide an alternative sim" "ulation model for another subsystem (e.g., to provide a simulation model for a black box)." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "disregard" block_version "10.1.3" sg_icon_stat "58,58,-1,-1,darkgray,black,0,0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 ],[0 0 58 58 ],[0.1 0.1 0.1])" ";\npatch([14 4 18 4 14 29 33 37 53 40 28 19 33 19 28 40 53 37 33 29 14 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 " "16 7 19 6 6 10 6 6 ],[0.33 0.33 0.33]);\nplot([0 58 58 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon gra" "phics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux1" SID "9745" Ports [3, 1] Position [210, 27, 240, 103] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "30,76,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 10.8571 65.1429 76 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 10.8571 65.1429 76 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 46.44 42.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[38" ".44 38.44 42.44 42.44 38.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[34.44 34.44 38.44 38.44" " 34.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[30.44 30.44 34.44 30.44 34.44 34.44 30.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out1" SID "9746" Position [265, 58, 295, 72] IconDisplay "Port number" } Line { SrcBlock "In1" SrcPort 1 Points [155, 0] DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Vin" SrcPort 1 Points [150, 0] DstBlock "Mux1" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Out1" DstPort 1 } } } Block { BlockType Reference Name "Simulation Multiplexer" SID "9747" Ports [2, 1] Position [380, 37, 430, 88] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "20,20,336,197" block_type "simmux" block_version "10.1.3" sg_icon_stat "50,51,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n" "\n\nfprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX" ",hwSwLineY);\n" } Block { BlockType Outport Name "Q" SID "9748" Position [510, 58, 540, 72] IconDisplay "Port number" } Line { SrcBlock "Simulation Multiplexer" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [50, 0] Branch { Points [0, -35] DstBlock "Indeterminate Check" DstPort 1 } Branch { DstBlock "Simulation Multiplexer" DstPort 2 } } Line { SrcBlock "Indeterminate Check" SrcPort 1 DstBlock "Simulation Multiplexer" DstPort 1 } Line { SrcBlock "Vin" SrcPort 1 Points [110, 0; 0, -70] DstBlock "Indeterminate Check" DstPort 2 } } } Block { BlockType SubSystem Name "Ind Chk2" SID "9725" Ports [2, 1] Position [1015, 228, 1060, 257] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Ind Chk2" Location [2, 82, 1677, 987] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "9726" Position [25, 68, 55, 82] IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "9727" Position [25, 123, 55, 137] Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "Indeterminate Check" SID "9728" Ports [2, 1] Position [200, 31, 280, 69] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Indeterminate Check" Location [2, 82, 1677, 987] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "237" Block { BlockType Inport Name "In1" SID "9729" Position [25, 85, 55, 100] BlockRotation 270 IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "9730" Position [30, 30, 60, 45] BlockRotation 270 Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant" SID "9731" Ports [0, 1] Position [75, 54, 100, 76] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disregard Subsystem" SID "9732" Tag "discardX" Ports [] Position [56, 130, 114, 188] ShowName off AttributesFormatString "Disregard Subsystem\\nFor Generation" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Disregard Subsystem" SourceType "Xilinx Disregard Subsystem For Generation Block" infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code gener" "ation. This block can be used in combination with the Simulation Multiplexer block to provide an alternative sim" "ulation model for another subsystem (e.g., to provide a simulation model for a black box)." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "disregard" block_version "10.1.3" sg_icon_stat "58,58,-1,-1,darkgray,black,0,0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 ],[0 0 58 58 ],[0.1 0.1 0.1])" ";\npatch([14 4 18 4 14 29 33 37 53 40 28 19 33 19 28 40 53 37 33 29 14 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 " "16 7 19 6 6 10 6 6 ],[0.33 0.33 0.33]);\nplot([0 58 58 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon gra" "phics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux1" SID "9733" Ports [3, 1] Position [210, 27, 240, 103] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "30,76,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 10.8571 65.1429 76 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 10.8571 65.1429 76 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 46.44 42.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[38" ".44 38.44 42.44 42.44 38.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[34.44 34.44 38.44 38.44" " 34.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[30.44 30.44 34.44 30.44 34.44 34.44 30.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out1" SID "9734" Position [265, 58, 295, 72] IconDisplay "Port number" } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Vin" SrcPort 1 Points [150, 0] DstBlock "Mux1" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 Points [155, 0] DstBlock "Mux1" DstPort 3 } } } Block { BlockType Reference Name "Simulation Multiplexer" SID "9735" Ports [2, 1] Position [380, 37, 430, 88] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "20,20,336,197" block_type "simmux" block_version "10.1.3" sg_icon_stat "50,51,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n" "\n\nfprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX" ",hwSwLineY);\n" } Block { BlockType Outport Name "Q" SID "9736" Position [510, 58, 540, 72] IconDisplay "Port number" } Line { SrcBlock "Vin" SrcPort 1 Points [110, 0; 0, -70] DstBlock "Indeterminate Check" DstPort 2 } Line { SrcBlock "Indeterminate Check" SrcPort 1 DstBlock "Simulation Multiplexer" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [50, 0] Branch { DstBlock "Simulation Multiplexer" DstPort 2 } Branch { Points [0, -35] DstBlock "Indeterminate Check" DstPort 1 } } Line { SrcBlock "Simulation Multiplexer" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType Reference Name "Up Sample1" SID "5155" Ports [1, 1] Position [300, 442, 325, 468] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fo" "ntsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "5156" Ports [1, 1] Position [300, 382, 325, 408] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fo" "ntsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "xk_I" SID "5157" Position [1150, 238, 1180, 252] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "xk_Q" SID "5158" Position [1150, 278, 1180, 292] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "xk_Index" SID "5159" Position [750, 298, 780, 312] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Vout" SID "5160" Position [830, 373, 860, 387] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Done" SID "5161" Position [830, 398, 860, 412] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "xn_Index" SID "5162" Position [750, 273, 780, 287] NamePlacement "alternate" Port "6" IconDisplay "Port number" } Line { SrcBlock "From1" SrcPort 1 DstBlock "Up Sample2" DstPort 1 } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "Fast Fourier Transform 7.1 " DstPort 7 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Fast Fourier Transform 7.1 " DstPort 2 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Fast Fourier Transform 7.1 " DstPort 1 } Line { SrcBlock "Fast Fourier Transform 7.1 " SrcPort 7 Points [205, 0] Branch { DstBlock "Vout" DstPort 1 } Branch { Points [0, -55; 180, 0; 0, -35] Branch { Points [0, -40] DstBlock "Ind Chk2" DstPort 2 } Branch { DstBlock "Ind Chk1" DstPort 2 } } } Line { SrcBlock "Fast Fourier Transform 7.1 " SrcPort 4 Points [120, 0] Branch { DstBlock "xk_Index" DstPort 1 } Branch { Points [0, -10; 190, 0] DstBlock "FreqSelective\n\"Fading\"" DstPort 3 } } Line { SrcBlock "Start" SrcPort 1 DstBlock "Fast Fourier Transform 7.1 " DstPort 3 } Line { SrcBlock "Fast Fourier Transform 7.1 " SrcPort 3 DstBlock "xn_Index" DstPort 1 } Line { SrcBlock "xn_Q" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Fast Fourier Transform 7.1 " SrcPort 2 DstBlock "FreqSelective\n\"Fading\"" DstPort 2 } Line { SrcBlock "Fast Fourier Transform 7.1 " SrcPort 1 DstBlock "FreqSelective\n\"Fading\"" DstPort 1 } Line { SrcBlock "xn_I" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Fast Fourier Transform 7.1 " DstPort 5 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Fast Fourier Transform 7.1 " DstPort 4 } Line { SrcBlock "Up Sample1" SrcPort 1 Points [100, 0; 0, 10] DstBlock "Fast Fourier Transform 7.1 " DstPort 8 } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Fast Fourier Transform 7.1 " DstPort 6 } Line { SrcBlock "Fast Fourier Transform 7.1 " SrcPort 8 DstBlock "Done" DstPort 1 } Line { SrcBlock "Fast Fourier Transform 7.1 " SrcPort 10 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "Ind Chk2" SrcPort 1 DstBlock "xk_I" DstPort 1 } Line { SrcBlock "FreqSelective\n\"Fading\"" SrcPort 1 DstBlock "Ind Chk2" DstPort 1 } Line { SrcBlock "FreqSelective\n\"Fading\"" SrcPort 2 DstBlock "Ind Chk1" DstPort 1 } Line { SrcBlock "Ind Chk1" SrcPort 1 DstBlock "xk_Q" DstPort 1 } } } Block { BlockType Goto Name "Goto4" SID "5163" Position [1085, 312, 1180, 328] ShowName off GotoTag "FFT_I" TagVisibility "global" } Block { BlockType SubSystem Name "Input Buffers" SID "5164" Ports [9, 2] Position [380, 252, 470, 428] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Input Buffers" Location [707, 625, 1112, 955] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "107" Block { BlockType Inport Name "AntA I" SID "5165" Position [230, 188, 260, 202] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "AntA Q" SID "5166" Position [230, 213, 260, 227] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "AntB I" SID "5167" Position [210, 328, 240, 342] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "AntB Q" SID "5168" Position [210, 403, 240, 417] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "We" SID "5169" Position [40, 238, 70, 252] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Wr Addr" SID "5170" Position [420, 263, 450, 277] NamePlacement "alternate" Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Rd Addr" SID "5171" Position [420, 288, 450, 302] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "Ant Sel" SID "5172" Position [675, 163, 705, 177] NamePlacement "alternate" Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "Wr Slot" SID "5173" Position [40, 263, 70, 277] Port "9" IconDisplay "Port number" } Block { BlockType SubSystem Name "Antenna A RAM" SID "5174" Ports [5, 2] Position [595, 177, 660, 313] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Antenna A RAM" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "5175" Position [270, 233, 300, 247] IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "5176" Position [270, 363, 300, 377] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "We" SID "5177" Position [345, 408, 375, 422] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Wr Addr" SID "5178" Position [310, 318, 340, 332] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Rd Addr" SID "5179" Position [310, 453, 340, 467] Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "Constant8" SID "5180" Ports [0, 1] Position [430, 274, 455, 296] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Dual Port RAM" SID "5181" Ports [6, 2] Position [500, 40, 615, 305] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "2*numSubcarriers" initVector "[0.01:0.01:0.80 ones(1,48)]" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b off en_a off en_b off latency "1" write_mode_A "Read After Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,384,398" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "115,265,6,2,white,blue,0,28af736d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 115 115 0 0 ],[0 0 265 265 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 115 115 0 0 ],[0 0 265 265 0 ]);\npatch([21.4 44.52 60.52 76.52 92.52 60.52 37.4 21.4 ],[" "149.76 149.76 165.76 149.76 165.76 165.76 165.76 149.76 ],[1 1 1 ]);\npatch([37.4 60.52 44.52 21.4 37.4 ],[133.7" "6 133.76 149.76 149.76 133.76 ],[0.931 0.946 0.973 ]);\npatch([21.4 44.52 60.52 37.4 21.4 ],[117.76 117.76 133.7" "6 133.76 117.76 ],[1 1 1 ]);\npatch([37.4 92.52 76.52 60.52 44.52 21.4 37.4 ],[101.76 101.76 117.76 101.76 117.7" "6 117.76 101.76 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'addra');\ncolor('black');port_label('input',2,'dina');\ncolor" "('black');port_label('input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('black');port_label" "('input',5,'dinb');\ncolor('black');port_label('input',6,'web');\ncolor('black');port_label('output',1,'A');\nco" "lor('black');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Dual Port RAM1" SID "5182" Ports [6, 2] Position [500, 305, 615, 570] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "2*numSubcarriers" initVector "[0.80:-0.01:0.01 ones(1,48)]" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b off en_a off en_b off latency "1" write_mode_A "Read After Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,384,398" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "115,265,6,2,white,blue,0,28af736d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 115 115 0 0 ],[0 0 265 265 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 115 115 0 0 ],[0 0 265 265 0 ]);\npatch([21.4 44.52 60.52 76.52 92.52 60.52 37.4 21.4 ],[" "149.76 149.76 165.76 149.76 165.76 165.76 165.76 149.76 ],[1 1 1 ]);\npatch([37.4 60.52 44.52 21.4 37.4 ],[133.7" "6 133.76 149.76 149.76 133.76 ],[0.931 0.946 0.973 ]);\npatch([21.4 44.52 60.52 37.4 21.4 ],[117.76 117.76 133.7" "6 133.76 117.76 ],[1 1 1 ]);\npatch([37.4 92.52 76.52 60.52 44.52 21.4 37.4 ],[101.76 101.76 117.76 101.76 117.7" "6 117.76 101.76 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'addra');\ncolor('black');port_label('input',2,'dina');\ncolor" "('black');port_label('input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('black');port_label" "('input',5,'dinb');\ncolor('black');port_label('input',6,'web');\ncolor('black');port_label('output',1,'A');\nco" "lor('black');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name " I" SID "5183" Position [740, 233, 770, 247] IconDisplay "Port number" } Block { BlockType Outport Name " Q" SID "5184" Position [750, 498, 780, 512] Port "2" IconDisplay "Port number" } Line { SrcBlock "Wr Addr" SrcPort 1 Points [35, 0] Branch { DstBlock "Dual Port RAM1" DstPort 1 } Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 1 } } Line { SrcBlock "Constant8" SrcPort 1 Points [15, 0] Branch { DstBlock "Dual Port RAM" DstPort 6 } Branch { Points [0, 265] DstBlock "Dual Port RAM1" DstPort 6 } } Line { SrcBlock "Rd Addr" SrcPort 1 Points [75, 0] Branch { DstBlock "Dual Port RAM1" DstPort 4 } Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 4 } } Line { SrcBlock "Dual Port RAM1" SrcPort 2 DstBlock " Q" DstPort 1 } Line { SrcBlock "Dual Port RAM" SrcPort 2 DstBlock " I" DstPort 1 } Line { SrcBlock "I" SrcPort 1 Points [90, 0; 0, -135; 85, 0] Branch { DstBlock "Dual Port RAM" DstPort 2 } Branch { Points [0, 135] Branch { DstBlock "Dual Port RAM" DstPort 5 } Branch { Points [0, 265] DstBlock "Dual Port RAM1" DstPort 5 } } } Line { SrcBlock "Q" SrcPort 1 DstBlock "Dual Port RAM1" DstPort 2 } Line { SrcBlock "We" SrcPort 1 Points [25, 0] Branch { DstBlock "Dual Port RAM1" DstPort 3 } Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 3 } } } } Block { BlockType SubSystem Name "Antenna B RAM" SID "5185" Ports [5, 2] Position [595, 317, 660, 453] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Antenna B RAM" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "5186" Position [270, 233, 300, 247] IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "5187" Position [270, 363, 300, 377] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "We" SID "5188" Position [345, 408, 375, 422] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Wr Addr" SID "5189" Position [310, 318, 340, 332] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Rd Addr" SID "5190" Position [310, 453, 340, 467] Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "Constant8" SID "5191" Ports [0, 1] Position [430, 274, 455, 296] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Dual Port RAM" SID "5192" Ports [6, 2] Position [500, 40, 615, 305] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "2*numSubcarriers" initVector "[0.01:0.01:0.80 ones(1,48)]" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b off en_a off en_b off latency "1" write_mode_A "Read After Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "115,265,6,2,white,blue,0,28af736d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 115 115 0 0 ],[0 0 265 265 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 115 115 0 0 ],[0 0 265 265 0 ]);\npatch([21.4 44.52 60.52 76.52 92.52 60.52 37.4 21.4 ],[" "149.76 149.76 165.76 149.76 165.76 165.76 165.76 149.76 ],[1 1 1 ]);\npatch([37.4 60.52 44.52 21.4 37.4 ],[133.7" "6 133.76 149.76 149.76 133.76 ],[0.931 0.946 0.973 ]);\npatch([21.4 44.52 60.52 37.4 21.4 ],[117.76 117.76 133.7" "6 133.76 117.76 ],[1 1 1 ]);\npatch([37.4 92.52 76.52 60.52 44.52 21.4 37.4 ],[101.76 101.76 117.76 101.76 117.7" "6 117.76 101.76 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'addra');\ncolor('black');port_label('input',2,'dina');\ncolor" "('black');port_label('input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('black');port_label" "('input',5,'dinb');\ncolor('black');port_label('input',6,'web');\ncolor('black');port_label('output',1,'A');\nco" "lor('black');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Dual Port RAM1" SID "5193" Ports [6, 2] Position [500, 305, 615, 570] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "2*numSubcarriers" initVector "[0.80:-0.01:0.01 ones(1,48)]" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b off en_a off en_b off latency "1" write_mode_A "Read After Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "115,265,6,2,white,blue,0,28af736d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 115 115 0 0 ],[0 0 265 265 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 115 115 0 0 ],[0 0 265 265 0 ]);\npatch([21.4 44.52 60.52 76.52 92.52 60.52 37.4 21.4 ],[" "149.76 149.76 165.76 149.76 165.76 165.76 165.76 149.76 ],[1 1 1 ]);\npatch([37.4 60.52 44.52 21.4 37.4 ],[133.7" "6 133.76 149.76 149.76 133.76 ],[0.931 0.946 0.973 ]);\npatch([21.4 44.52 60.52 37.4 21.4 ],[117.76 117.76 133.7" "6 133.76 117.76 ],[1 1 1 ]);\npatch([37.4 92.52 76.52 60.52 44.52 21.4 37.4 ],[101.76 101.76 117.76 101.76 117.7" "6 117.76 101.76 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'addra');\ncolor('black');port_label('input',2,'dina');\ncolor" "('black');port_label('input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('black');port_label" "('input',5,'dinb');\ncolor('black');port_label('input',6,'web');\ncolor('black');port_label('output',1,'A');\nco" "lor('black');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name " I" SID "5194" Position [740, 233, 770, 247] IconDisplay "Port number" } Block { BlockType Outport Name " Q" SID "5195" Position [750, 498, 780, 512] Port "2" IconDisplay "Port number" } Line { SrcBlock "We" SrcPort 1 Points [25, 0] Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 3 } Branch { DstBlock "Dual Port RAM1" DstPort 3 } } Line { SrcBlock "Q" SrcPort 1 DstBlock "Dual Port RAM1" DstPort 2 } Line { SrcBlock "I" SrcPort 1 Points [90, 0; 0, -135; 85, 0] Branch { DstBlock "Dual Port RAM" DstPort 2 } Branch { Points [0, 135] Branch { DstBlock "Dual Port RAM" DstPort 5 } Branch { Points [0, 265] DstBlock "Dual Port RAM1" DstPort 5 } } } Line { SrcBlock "Dual Port RAM" SrcPort 2 DstBlock " I" DstPort 1 } Line { SrcBlock "Dual Port RAM1" SrcPort 2 DstBlock " Q" DstPort 1 } Line { SrcBlock "Rd Addr" SrcPort 1 Points [75, 0] Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 4 } Branch { DstBlock "Dual Port RAM1" DstPort 4 } } Line { SrcBlock "Constant8" SrcPort 1 Points [15, 0] Branch { Points [0, 265] DstBlock "Dual Port RAM1" DstPort 6 } Branch { DstBlock "Dual Port RAM" DstPort 6 } } Line { SrcBlock "Wr Addr" SrcPort 1 Points [35, 0] Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 1 } Branch { DstBlock "Dual Port RAM1" DstPort 1 } } } } Block { BlockType Reference Name "Down Sample" SID "5196" Ports [1, 1] Position [185, 372, 215, 398] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.33 16.3" "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 16.33 16" ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 " "1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From5" SID "5197" Position [45, 376, 160, 394] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType Reference Name "Mux" SID "5198" Ports [3, 1] Position [810, 150, 850, 270] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,120,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 17.1429 102.857 120 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 40 40 0 0 ],[0 17.1429 102.857 120 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 " "8.875 ],[65.55 65.55 70.55 65.55 70.55 70.55 70.55 65.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[60." "55 60.55 65.55 65.55 60.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[55.55 55.55 60.55 60.5" "5 55.55 ],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[50.55 50.55 55.55 50.55 55.55 55.55 50.55 " "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('in" "put',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "5199" Ports [3, 1] Position [810, 320, 850, 440] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,120,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 17.1429 102.857 120 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 40 40 0 0 ],[0 17.1429 102.857 120 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 " "8.875 ],[65.55 65.55 70.55 65.55 70.55 70.55 70.55 65.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[60." "55 60.55 65.55 65.55 60.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[55.55 55.55 60.55 60.5" "5 55.55 ],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[50.55 50.55 55.55 50.55 55.55 55.55 50.55 " "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('in" "put',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "5200" Ports [3, 1] Position [350, 299, 380, 371] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,72,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 10.2857 61.7143 72 0 ],[0." "77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 10.2857 61.7143 72 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6" ".1 ],[40.44 40.44 44.44 40.44 44.44 44.44 44.44 40.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[36.44 36.4" "4 40.44 40.44 36.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[32.44 32.44 36.44 36.44 32.44 ],[" "1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[28.44 28.44 32.44 28.44 32.44 32.44 28.44 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');" "\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux3" SID "5201" Ports [3, 1] Position [350, 374, 380, 446] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,72,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 10.2857 61.7143 72 0 ],[0." "77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 10.2857 61.7143 72 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6" ".1 ],[40.44 40.44 44.44 40.44 44.44 44.44 44.44 40.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[36.44 36.4" "4 40.44 40.44 36.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[32.44 32.44 36.44 36.44 32.44 ],[" "1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[28.44 28.44 32.44 28.44 32.44 32.44 28.44 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');" "\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "5202" Ports [1, 1] Position [905, 186, 950, 234] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 30.66 3" "6.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 30.66 24" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "5203" Ports [1, 1] Position [910, 356, 955, 404] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 30.66 3" "6.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 30.66 24" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "We Control" SID "5204" Ports [2, 2] Position [125, 231, 195, 284] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "We Control" Location [134, 281, 438, 419] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "We" SID "5205" Position [140, 218, 170, 232] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "WrSlot" SID "5206" Position [140, 233, 170, 247] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample" SID "5207" Ports [1, 1] Position [210, 362, 240, 388] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\do" "wnarrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From5" SID "5208" Position [30, 366, 160, 384] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_AlamoutiMode" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "5209" Ports [1, 1] Position [425, 352, 455, 368] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "5210" Ports [1, 1] Position [425, 192, 455, 208] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "5211" Ports [1, 1] Position [425, 312, 455, 328] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "5212" Ports [3, 1] Position [515, 334, 545, 386] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2.02" sg_icon_stat "30,52,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 52 52 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[30.44 30.4" "4 34.44 30.44 34.44 34.44 34.44 30.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[26.44 26.44 30.44 30.44 " "26.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[22.44 22.44 26.44 26.44 22.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[18.44 18.44 22.44 18.44 22.44 22.44 18.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical3" SID "5213" Ports [3, 1] Position [515, 214, 545, 266] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2.02" sg_icon_stat "30,52,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 52 52 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[30.44 30.4" "4 34.44 30.44 34.44 34.44 34.44 30.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[26.44 26.44 30.44 30.44 " "26.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[22.44 22.44 26.44 26.44 22.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[18.44 18.44 22.44 18.44 22.44 22.44 18.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical4" SID "5214" Ports [2, 1] Position [595, 163, 630, 267] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2.02" sg_icon_stat "35,104,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 104 104 0 ],[0.77 0." "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 104 104 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[57.55" " 57.55 62.55 57.55 62.55 62.55 62.55 57.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[52.55 52.55 57." "55 57.55 52.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[47.55 47.55 52.55 52.55 47.55 ]," "[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[42.55 42.55 47.55 42.55 47.55 47.55 42.55 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolo" "r('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "5215" Ports [2, 1] Position [515, 161, 545, 214] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2.02" sg_icon_stat "30,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 53 53 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[30.44 30.4" "4 34.44 30.44 34.44 34.44 34.44 30.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[26.44 26.44 30.44 30.44 " "26.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[22.44 22.44 26.44 26.44 22.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[18.44 18.44 22.44 18.44 22.44 22.44 18.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "5216" Ports [2, 1] Position [515, 281, 545, 334] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2.02" sg_icon_stat "30,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 53 53 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[30.44 30.4" "4 34.44 30.44 34.44 34.44 34.44 30.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[26.44 26.44 30.44 30.44 " "26.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[22.44 22.44 26.44 26.44 22.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[18.44 18.44 22.44 18.44 22.44 22.44 18.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "5217" Ports [2, 1] Position [595, 283, 630, 387] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2.02" sg_icon_stat "35,104,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 104 104 0 ],[0.77 0." "82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 104 104 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[57.55" " 57.55 62.55 57.55 62.55 62.55 62.55 57.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[52.55 52.55 57." "55 57.55 52.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[47.55 47.55 52.55 52.55 47.55 ]," "[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[42.55 42.55 47.55 42.55 47.55 47.55 42.55 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolo" "r('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "A_We" SID "5218" Position [720, 328, 750, 342] IconDisplay "Port number" } Block { BlockType Outport Name "B_We" SID "5219" Position [715, 208, 745, 222] Port "2" IconDisplay "Port number" } Line { SrcBlock "We" SrcPort 1 Points [200, 0] Branch { DstBlock "Logical3" DstPort 1 } Branch { Points [0, 70] Branch { Points [0, 50] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Logical6" DstPort 1 } } Branch { Points [0, -50] DstBlock "Logical5" DstPort 1 } } Line { SrcBlock "WrSlot" SrcPort 1 Points [160, 0] Branch { Points [0, 120] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical3" DstPort 2 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "B_We" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "A_We" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 Points [45, 0] Branch { Points [100, 0] Branch { DstBlock "Logical1" DstPort 3 } Branch { Points [0, -55] DstBlock "Inverter3" DstPort 1 } } Branch { Points [0, -120; 100, 0] Branch { DstBlock "Logical3" DstPort 3 } Branch { Points [0, -55] DstBlock "Inverter2" DstPort 1 } } } Annotation { Name "In Alamouti mode, alternate symbols\nare written to alternate memory buffers.\nIn MIMO mode, symbols " "are written to buffers\nsimultaneously (from each antenna)." Position [286, 441] } } } Block { BlockType Outport Name " I" SID "5220" Position [1000, 203, 1030, 217] IconDisplay "Port number" } Block { BlockType Outport Name " Q" SID "5221" Position [1000, 373, 1030, 387] Port "2" IconDisplay "Port number" } Line { SrcBlock "Register1" SrcPort 1 DstBlock " Q" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock " I" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Ant Sel" SrcPort 1 Points [65, 0] Branch { DstBlock "Mux" DstPort 1 } Branch { Points [0, 170] DstBlock "Mux1" DstPort 1 } } Line { SrcBlock "Antenna B RAM" SrcPort 1 Points [65, 0; 0, -100] DstBlock "Mux" DstPort 3 } Line { SrcBlock "Antenna B RAM" SrcPort 2 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Antenna A RAM" SrcPort 2 Points [55, 0; 0, 100] DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Antenna A RAM" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Rd Addr" SrcPort 1 Points [75, 0] Branch { Points [0, 140] DstBlock "Antenna B RAM" DstPort 5 } Branch { DstBlock "Antenna A RAM" DstPort 5 } } Line { SrcBlock "Wr Addr" SrcPort 1 Points [80, 0] Branch { Points [0, 140] DstBlock "Antenna B RAM" DstPort 4 } Branch { DstBlock "Antenna A RAM" DstPort 4 } } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "Antenna B RAM" DstPort 1 } Line { SrcBlock "AntB I" SrcPort 1 DstBlock "Mux2" DstPort 2 } Line { SrcBlock "AntA I" SrcPort 1 Points [65, 0] Branch { DstBlock "Antenna A RAM" DstPort 1 } Branch { Points [0, 165] DstBlock "Mux2" DstPort 3 } } Line { SrcBlock "AntA Q" SrcPort 1 Points [60, 0] Branch { DstBlock "Antenna A RAM" DstPort 2 } Branch { Points [0, 215] DstBlock "Mux3" DstPort 3 } } Line { SrcBlock "We Control" SrcPort 1 DstBlock "Antenna A RAM" DstPort 3 } Line { SrcBlock "We Control" SrcPort 2 Points [210, 0; 0, 115] DstBlock "Antenna B RAM" DstPort 3 } Line { SrcBlock "AntB Q" SrcPort 1 DstBlock "Mux3" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Mux3" SrcPort 1 Points [55, 0; 0, -50] DstBlock "Antenna B RAM" DstPort 2 } Line { Labels [0, 0] SrcBlock "We" SrcPort 1 DstBlock "We Control" DstPort 1 } Line { Labels [0, 0] SrcBlock "Wr Slot" SrcPort 1 DstBlock "We Control" DstPort 2 } Line { SrcBlock "Down Sample" SrcPort 1 Points [100, 0] Branch { DstBlock "Mux3" DstPort 1 } Branch { Points [0, -75] DstBlock "Mux2" DstPort 1 } } } } Block { BlockType Reference Name "Inverter2" SID "5222" Ports [1, 1] Position [400, 546, 440, 564] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Output Buffers" SID "5223" Ports [6, 2] Position [995, 460, 1090, 520] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Output Buffers" Location [677, 495, 1097, 731] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "177" Block { BlockType Inport Name "I" SID "5224" Position [220, 103, 250, 117] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "5225" Position [220, 118, 250, 132] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Wr Addr" SID "5226" Position [110, 398, 140, 412] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "FFT Vout" SID "5227" Position [20, 313, 50, 327] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "SymIndex" SID "5228" Position [15, 208, 45, 222] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Rd Addr" SID "5229" Position [180, 333, 210, 347] Port "6" IconDisplay "Port number" } Block { BlockType SubSystem Name "AntA Buffer" SID "5230" Ports [5, 2] Position [365, 271, 430, 349] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AntA Buffer" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "5231" Position [270, 233, 300, 247] IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "5232" Position [270, 363, 300, 377] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "We" SID "5233" Position [345, 408, 375, 422] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Wr Addr" SID "5234" Position [310, 318, 340, 332] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Rd Addr" SID "5235" Position [310, 453, 340, 467] Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "Constant" SID "5236" Ports [0, 1] Position [430, 229, 455, 251] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.2" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant8" SID "5237" Ports [0, 1] Position [430, 274, 455, 296] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Dual Port RAM" SID "5238" Ports [6, 2] Position [500, 40, 615, 305] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "numSubcarriers" initVector "[0.01:0.01:0.80 ones(1,48)]" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b off en_a off en_b off latency "1" write_mode_A "Read After Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "115,265,6,2,white,blue,0,28af736d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 115 115 0 0 ],[0 0 265 265 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 115 115 0 0 ],[0 0 265 265 0 ]);\npatch([21.4 44.52 60.52 76.52 92.52 60.52 37.4 21.4 ],[" "149.76 149.76 165.76 149.76 165.76 165.76 165.76 149.76 ],[1 1 1 ]);\npatch([37.4 60.52 44.52 21.4 37.4 ],[133.7" "6 133.76 149.76 149.76 133.76 ],[0.931 0.946 0.973 ]);\npatch([21.4 44.52 60.52 37.4 21.4 ],[117.76 117.76 133.7" "6 133.76 117.76 ],[1 1 1 ]);\npatch([37.4 92.52 76.52 60.52 44.52 21.4 37.4 ],[101.76 101.76 117.76 101.76 117.7" "6 117.76 101.76 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'addra');\ncolor('black');port_label('input',2,'dina');\ncolor" "('black');port_label('input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('black');port_label" "('input',5,'dinb');\ncolor('black');port_label('input',6,'web');\ncolor('black');port_label('output',1,'A');\nco" "lor('black');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Dual Port RAM1" SID "5239" Ports [6, 2] Position [500, 305, 615, 570] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "numSubcarriers" initVector "[0.80:-0.01:0.01 ones(1,48)]" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b off en_a off en_b off latency "1" write_mode_A "Read After Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "115,265,6,2,white,blue,0,28af736d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 115 115 0 0 ],[0 0 265 265 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 115 115 0 0 ],[0 0 265 265 0 ]);\npatch([21.4 44.52 60.52 76.52 92.52 60.52 37.4 21.4 ],[" "149.76 149.76 165.76 149.76 165.76 165.76 165.76 149.76 ],[1 1 1 ]);\npatch([37.4 60.52 44.52 21.4 37.4 ],[133.7" "6 133.76 149.76 149.76 133.76 ],[0.931 0.946 0.973 ]);\npatch([21.4 44.52 60.52 37.4 21.4 ],[117.76 117.76 133.7" "6 133.76 117.76 ],[1 1 1 ]);\npatch([37.4 92.52 76.52 60.52 44.52 21.4 37.4 ],[101.76 101.76 117.76 101.76 117.7" "6 117.76 101.76 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'addra');\ncolor('black');port_label('input',2,'dina');\ncolor" "('black');port_label('input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('black');port_label" "('input',5,'dinb');\ncolor('black');port_label('input',6,'web');\ncolor('black');port_label('output',1,'A');\nco" "lor('black');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name " I" SID "5240" Position [740, 233, 770, 247] IconDisplay "Port number" } Block { BlockType Outport Name " Q" SID "5241" Position [750, 498, 780, 512] Port "2" IconDisplay "Port number" } Line { SrcBlock "We" SrcPort 1 Points [25, 0] Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 3 } Branch { DstBlock "Dual Port RAM1" DstPort 3 } } Line { SrcBlock "Q" SrcPort 1 DstBlock "Dual Port RAM1" DstPort 2 } Line { SrcBlock "I" SrcPort 1 Points [90, 0; 0, -135] DstBlock "Dual Port RAM" DstPort 2 } Line { SrcBlock "Dual Port RAM" SrcPort 2 DstBlock " I" DstPort 1 } Line { SrcBlock "Dual Port RAM1" SrcPort 2 DstBlock " Q" DstPort 1 } Line { SrcBlock "Rd Addr" SrcPort 1 Points [75, 0] Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 4 } Branch { DstBlock "Dual Port RAM1" DstPort 4 } } Line { SrcBlock "Constant8" SrcPort 1 Points [15, 0] Branch { Points [0, 265] DstBlock "Dual Port RAM1" DstPort 6 } Branch { DstBlock "Dual Port RAM" DstPort 6 } } Line { SrcBlock "Wr Addr" SrcPort 1 Points [35, 0] Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 1 } Branch { DstBlock "Dual Port RAM1" DstPort 1 } } Line { SrcBlock "Constant" SrcPort 1 Points [10, 0] Branch { DstBlock "Dual Port RAM" DstPort 5 } Branch { Points [0, 265] DstBlock "Dual Port RAM1" DstPort 5 } } } } Block { BlockType SubSystem Name "AntB Buffer" SID "5242" Ports [5, 2] Position [365, 191, 430, 269] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AntB Buffer" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "5243" Position [270, 233, 300, 247] IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "5244" Position [270, 363, 300, 377] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "We" SID "5245" Position [345, 408, 375, 422] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Wr Addr" SID "5246" Position [310, 318, 340, 332] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Rd Addr" SID "5247" Position [310, 453, 340, 467] Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "Constant" SID "5248" Ports [0, 1] Position [430, 229, 455, 251] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.2" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant8" SID "5249" Ports [0, 1] Position [430, 274, 455, 296] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Dual Port RAM" SID "5250" Ports [6, 2] Position [500, 40, 615, 305] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "numSubcarriers" initVector "[0.01:0.01:0.80 ones(1,48)]" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b off en_a off en_b off latency "1" write_mode_A "Read After Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "115,265,6,2,white,blue,0,28af736d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 115 115 0 0 ],[0 0 265 265 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 115 115 0 0 ],[0 0 265 265 0 ]);\npatch([21.4 44.52 60.52 76.52 92.52 60.52 37.4 21.4 ],[" "149.76 149.76 165.76 149.76 165.76 165.76 165.76 149.76 ],[1 1 1 ]);\npatch([37.4 60.52 44.52 21.4 37.4 ],[133.7" "6 133.76 149.76 149.76 133.76 ],[0.931 0.946 0.973 ]);\npatch([21.4 44.52 60.52 37.4 21.4 ],[117.76 117.76 133.7" "6 133.76 117.76 ],[1 1 1 ]);\npatch([37.4 92.52 76.52 60.52 44.52 21.4 37.4 ],[101.76 101.76 117.76 101.76 117.7" "6 117.76 101.76 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'addra');\ncolor('black');port_label('input',2,'dina');\ncolor" "('black');port_label('input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('black');port_label" "('input',5,'dinb');\ncolor('black');port_label('input',6,'web');\ncolor('black');port_label('output',1,'A');\nco" "lor('black');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Dual Port RAM1" SID "5251" Ports [6, 2] Position [500, 305, 615, 570] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "numSubcarriers" initVector "[0.80:-0.01:0.01 ones(1,48)]" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b off en_a off en_b off latency "1" write_mode_A "Read After Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "115,265,6,2,white,blue,0,28af736d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 115 115 0 0 ],[0 0 265 265 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 115 115 0 0 ],[0 0 265 265 0 ]);\npatch([21.4 44.52 60.52 76.52 92.52 60.52 37.4 21.4 ],[" "149.76 149.76 165.76 149.76 165.76 165.76 165.76 149.76 ],[1 1 1 ]);\npatch([37.4 60.52 44.52 21.4 37.4 ],[133.7" "6 133.76 149.76 149.76 133.76 ],[0.931 0.946 0.973 ]);\npatch([21.4 44.52 60.52 37.4 21.4 ],[117.76 117.76 133.7" "6 133.76 117.76 ],[1 1 1 ]);\npatch([37.4 92.52 76.52 60.52 44.52 21.4 37.4 ],[101.76 101.76 117.76 101.76 117.7" "6 117.76 101.76 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'addra');\ncolor('black');port_label('input',2,'dina');\ncolor" "('black');port_label('input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('black');port_label" "('input',5,'dinb');\ncolor('black');port_label('input',6,'web');\ncolor('black');port_label('output',1,'A');\nco" "lor('black');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name " I" SID "5252" Position [740, 233, 770, 247] IconDisplay "Port number" } Block { BlockType Outport Name " Q" SID "5253" Position [750, 498, 780, 512] Port "2" IconDisplay "Port number" } Line { SrcBlock "Wr Addr" SrcPort 1 Points [35, 0] Branch { DstBlock "Dual Port RAM1" DstPort 1 } Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 1 } } Line { SrcBlock "Constant8" SrcPort 1 Points [15, 0] Branch { DstBlock "Dual Port RAM" DstPort 6 } Branch { Points [0, 265] DstBlock "Dual Port RAM1" DstPort 6 } } Line { SrcBlock "Rd Addr" SrcPort 1 Points [75, 0] Branch { DstBlock "Dual Port RAM1" DstPort 4 } Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 4 } } Line { SrcBlock "Dual Port RAM1" SrcPort 2 DstBlock " Q" DstPort 1 } Line { SrcBlock "Dual Port RAM" SrcPort 2 DstBlock " I" DstPort 1 } Line { SrcBlock "I" SrcPort 1 Points [90, 0; 0, -135] DstBlock "Dual Port RAM" DstPort 2 } Line { SrcBlock "Q" SrcPort 1 DstBlock "Dual Port RAM1" DstPort 2 } Line { SrcBlock "We" SrcPort 1 Points [25, 0] Branch { DstBlock "Dual Port RAM1" DstPort 3 } Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 3 } } Line { SrcBlock "Constant" SrcPort 1 Points [10, 0] Branch { DstBlock "Dual Port RAM" DstPort 5 } Branch { Points [0, 265] DstBlock "Dual Port RAM1" DstPort 5 } } } } Block { BlockType BusCreator Name "Bus\nCreator1" SID "5254" Ports [2, 1] Position [660, 195, 665, 250] ShowName off Inputs "2" DisplayOption "bar" } Block { BlockType BusCreator Name "Bus\nCreator2" SID "5255" Ports [2, 1] Position [660, 290, 665, 345] ShowName off Inputs "2" DisplayOption "bar" } Block { BlockType Reference Name "Inverter" SID "5256" Ports [1, 1] Position [195, 287, 225, 303] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "LSB" SID "5257" Ports [1, 1] Position [115, 208, 150, 222] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "LSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "5258" Ports [2, 1] Position [250, 201, 280, 254] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 53 53 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 53 53 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[30.44 30.44 34.4" "4 30.44 34.44 34.44 34.44 30.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[26.44 26.44 30.44 30.44 26.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[22.44 22.44 26.44 26.44 22.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[18.44 18.44 22.44 18.44 22.44 22.44 18.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "5259" Ports [2, 1] Position [250, 281, 280, 334] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 53 53 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 53 53 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[30.44 30.44 34.4" "4 30.44 34.44 34.44 34.44 30.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[26.44 26.44 30.44 30.44 26.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[22.44 22.44 26.44 26.44 22.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[18.44 18.44 22.44 18.44 22.44 22.44 18.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name " I" SID "5260" Position [755, 218, 785, 232] IconDisplay "Port number" } Block { BlockType Outport Name " Q" SID "5261" Position [755, 313, 785, 327] Port "2" IconDisplay "Port number" } Line { SrcBlock "Bus\nCreator2" SrcPort 1 DstBlock " Q" DstPort 1 } Line { SrcBlock "Bus\nCreator1" SrcPort 1 DstBlock " I" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Q" SrcPort 1 Points [65, 0] Branch { Points [0, 90] Branch { Points [0, 80] DstBlock "AntA Buffer" DstPort 2 } Branch { DstBlock "AntB Buffer" DstPort 2 } } Branch { Points [0, -30; 230, 0] } } Line { SrcBlock "I" SrcPort 1 Points [80, 0] Branch { Points [0, 90] Branch { Points [0, 80] DstBlock "AntA Buffer" DstPort 1 } Branch { DstBlock "AntB Buffer" DstPort 1 } } Branch { Points [0, -30; 215, 0] } } Line { SrcBlock "Wr Addr" SrcPort 1 Points [155, 0; 0, -80] Branch { DstBlock "AntA Buffer" DstPort 4 } Branch { Points [0, -80; 40, 0] Branch { DstBlock "AntB Buffer" DstPort 4 } Branch { Points [0, -85; 160, 0; 0, -20; 50, 0] } } } Line { SrcBlock "FFT Vout" SrcPort 1 Points [115, 0] Branch { Points [0, -80] DstBlock "Logical1" DstPort 2 } Branch { DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "AntA Buffer" SrcPort 2 DstBlock "Bus\nCreator2" DstPort 2 } Line { SrcBlock "AntA Buffer" SrcPort 1 Points [210, 0] DstBlock "Bus\nCreator1" DstPort 2 } Line { SrcBlock "AntB Buffer" SrcPort 2 Points [85, 0; 0, 55] DstBlock "Bus\nCreator2" DstPort 1 } Line { SrcBlock "AntB Buffer" SrcPort 1 Points [85, 0] Branch { DstBlock "Bus\nCreator1" DstPort 1 } Branch { Points [0, -40; 30, 0] } } Line { SrcBlock "LSB" SrcPort 1 Points [20, 0] Branch { Points [0, 80] DstBlock "Inverter" DstPort 1 } Branch { DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "AntB Buffer" DstPort 3 } Branch { Points [0, -90; 180, 0; 0, -30; 70, 0] } } Line { SrcBlock "Logical2" SrcPort 1 Points [20, 0] Branch { DstBlock "AntA Buffer" DstPort 3 } Branch { Points [0, -160; 180, 0; 0, -25; 65, 0] } } Line { SrcBlock "SymIndex" SrcPort 1 DstBlock "LSB" DstPort 1 } Line { SrcBlock "Rd Addr" SrcPort 1 Points [95, 0] Branch { DstBlock "AntA Buffer" DstPort 5 } Branch { Points [0, -80; 35, 0] Branch { DstBlock "AntB Buffer" DstPort 5 } Branch { Points [0, -85; 170, 0; 0, -20; 35, 0] } } } } } Block { BlockType SubSystem Name "Symbol Counter" SID "5262" Ports [2, 1] Position [695, 412, 795, 448] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Symbol Counter" Location [-873, 559, -108, 704] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "FFT Done" SID "5263" Position [175, 78, 205, 92] IconDisplay "Port number" } Block { BlockType Inport Name "Payload" SID "5264" Position [75, 128, 105, 142] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Counter" SID "5265" Ports [2, 1] Position [815, 69, 845, 151] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter i" "s implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(max_OFDM_symbols+1))" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[6 12 0 12 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,82,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 82 82 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 82 82 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[45.44 45.44 49.4" "4 45.44 49.44 49.44 49.44 45.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[41.44 41.44 45.44 45.44 41.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[37.44 37.44 41.44 41.44 37.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[33.44 33.44 37.44 33.44 37.44 37.44 33.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'rs" "t');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\n" "fprintf('','COMMENT: end icon text');\n" } Block { BlockType From Name "From2" SID "5266" Position [70, 186, 185, 204] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "5267" Ports [1, 1] Position [285, 123, 310, 147] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "5268" Ports [2, 1] Position [745, 101, 775, 154] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 53 53 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 53 53 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[30.44 30.44 34.4" "4 30.44 34.44 34.44 34.44 30.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[26.44 26.44 30.44 30.44 26.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[22.44 22.44 26.44 26.44 22.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[18.44 18.44 22.44 18.44 22.44 22.44 18.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "5269" Ports [2, 1] Position [390, 123, 420, 172] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[4 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,49,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 49 49 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 49 49 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[28.44 28.44 32.4" "4 28.44 32.44 32.44 32.44 28.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[24.44 24.44 28.44 28.44 24.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[20.44 20.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 16.44 20.44 20.44 16.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "5270" Ports [2, 1] Position [545, 120, 595, 160] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch" Location [542, 167, 762, 256] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "5271" Position [115, 108, 145, 122] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "5272" Position [115, 98, 145, 112] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant2" SID "5273" Ports [0, 1] Position [155, 62, 170, 78] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 " "12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "5274" Ports [3, 1] Position [215, 87, 260, 123] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,36,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 36 36 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[23.55 2" "3.55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[18.55 18.55 23.5" "5 23.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[13.55 13.55 18.55 18.55 13.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3," "'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Outport Name "D" SID "5275" Position [320, 98, 350, 112] IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 DstBlock "D" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register" DstPort 3 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 Points [0, 25] DstBlock "Register" DstPort 1 } } } Block { BlockType Reference Name "Up Sample" SID "5276" Ports [1, 1] Position [155, 120, 185, 150] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.2" sg_icon_stat "30,30,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}\\" "bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "5277" Ports [1, 1] Position [245, 145, 275, 175] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.2" sg_icon_stat "30,30,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}\\" "bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Sym Index" SID "5278" Position [910, 103, 940, 117] IconDisplay "Port number" } Line { SrcBlock "Payload" SrcPort 1 DstBlock "Up Sample" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 Points [20, 0; 0, -35] DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 Points [30, 0] Branch { DstBlock "S-R Latch" DstPort 2 } Branch { Points [0, -60] DstBlock "Counter" DstPort 1 } } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Counter" DstPort 2 } Line { SrcBlock "Counter" SrcPort 1 Points [0, 0] DstBlock "Sym Index" DstPort 1 } Line { SrcBlock "FFT Done" SrcPort 1 Points [295, 0; 0, 30] Branch { Points [0, 15] DstBlock "S-R Latch" DstPort 1 } Branch { DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "Up Sample" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Annotation { Name "SR Latch enables counter after the first symbol. This keeps\nthe symbol index at zero after the first FF" "T finishes so that\nthe symbol index, like xn and xk_index, is zero-indexed." Position [705, 214] } } } Block { BlockType Outport Name "Y_I" SID "5279" Position [1145, 468, 1175, 482] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "Y_Q" SID "5280" Position [1145, 498, 1175, 512] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "H-I" SID "5281" Position [1200, 543, 1230, 557] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "H-Q" SID "5282" Position [1200, 558, 1230, 572] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "SubCar Index" SID "5283" Position [1105, 708, 1135, 722] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Sym Index" SID "5284" Position [1105, 673, 1135, 687] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Vout" SID "5285" Position [1105, 738, 1135, 752] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Phase I" SID "5286" Position [1155, 573, 1185, 587] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Phase Q" SID "5287" Position [1155, 603, 1185, 617] Port "9" IconDisplay "Port number" } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Input Buffers" DstPort 5 } Line { SrcBlock "FFT" SrcPort 5 Points [40, 0] Branch { DstBlock "Symbol Counter" DstPort 1 } Branch { Points [0, 80] DstBlock "Addr Gen1" DstPort 1 } } Line { SrcBlock "Addr_Generator" SrcPort 3 DstBlock "Input Buffers" DstPort 8 } Line { SrcBlock "Assert" SrcPort 1 Points [-165, 0; 0, -65] DstBlock "Addr_Generator" DstPort 2 } Line { SrcBlock "AntB Q" SrcPort 1 DstBlock "Input Buffers" DstPort 4 } Line { SrcBlock "AntB I" SrcPort 1 DstBlock "Input Buffers" DstPort 3 } Line { SrcBlock "AntA Q" SrcPort 1 Points [90, 0; 0, 35] DstBlock "Input Buffers" DstPort 2 } Line { SrcBlock "AntA I" SrcPort 1 Points [100, 0; 0, 30] DstBlock "Input Buffers" DstPort 1 } Line { SrcBlock "Payload" SrcPort 1 Points [50, 0] Branch { Points [25, 0] Branch { Points [0, -35] DstBlock "Delay1" DstPort 1 } Branch { DstBlock "Addr_Generator" DstPort 1 } } Branch { Points [0, 140; 255, 0] Branch { Points [270, 0] Branch { Points [0, -75] DstBlock "Symbol Counter" DstPort 2 } Branch { Points [10, 0] DstBlock "Addr Gen1" DstPort 2 } } Branch { Points [0, 40] DstBlock "Inverter2" DstPort 1 } } } Line { SrcBlock "Addr_Generator" SrcPort 2 DstBlock "Input Buffers" DstPort 7 } Line { SrcBlock "Addr_Generator" SrcPort 5 DstBlock "FFT" DstPort 3 } Line { SrcBlock "Input Buffers" SrcPort 2 DstBlock "FFT" DstPort 2 } Line { SrcBlock "Input Buffers" SrcPort 1 Points [20, 0; 0, 35] DstBlock "FFT" DstPort 1 } Line { SrcBlock "Addr_Generator" SrcPort 1 DstBlock "Input Buffers" DstPort 6 } Line { SrcBlock "Delay4" SrcPort 1 DstBlock "SubCar Index" DstPort 1 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "Vout" DstPort 1 } Line { SrcBlock "Output Buffers" SrcPort 2 DstBlock "Y_Q" DstPort 1 } Line { SrcBlock "Channel Estimation\n& Pilot Processing" SrcPort 2 Points [0, 5] DstBlock "H-Q" DstPort 1 } Line { SrcBlock "Channel Estimation\n& Pilot Processing" SrcPort 1 Points [0, 10] DstBlock "H-I" DstPort 1 } Line { SrcBlock "Output Buffers" SrcPort 1 DstBlock "Y_I" DstPort 1 } Line { SrcBlock "Channel Estimation\n& Pilot Processing" SrcPort 5 Points [30, 0; 0, 30] DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Symbol Counter" SrcPort 1 Points [145, 0; 0, 75] Branch { Points [0, 85] DstBlock "Channel Estimation\n& Pilot Processing" DstPort 5 } Branch { DstBlock "Output Buffers" DstPort 5 } } Line { SrcBlock "FFT" SrcPort 4 Points [330, 0; 0, 100] Branch { Points [0, 85] DstBlock "Channel Estimation\n& Pilot Processing" DstPort 4 } Branch { DstBlock "Output Buffers" DstPort 4 } } Line { SrcBlock "FFT" SrcPort 3 Points [335, 0; 0, 115] Branch { Points [0, 85] DstBlock "Channel Estimation\n& Pilot Processing" DstPort 3 } Branch { DstBlock "Output Buffers" DstPort 3 } } Line { SrcBlock "FFT" SrcPort 2 Points [340, 0; 0, 130] Branch { DstBlock "Output Buffers" DstPort 2 } Branch { Points [0, 85] DstBlock "Channel Estimation\n& Pilot Processing" DstPort 2 } } Line { SrcBlock "FFT" SrcPort 1 Points [345, 0] Branch { Points [0, 145] Branch { Points [0, 85] DstBlock "Channel Estimation\n& Pilot Processing" DstPort 1 } Branch { DstBlock "Output Buffers" DstPort 1 } } Branch { DstBlock "Goto4" DstPort 1 } } Line { SrcBlock "FFT" SrcPort 6 Points [0, 45] DstBlock "Assert" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 Points [-90, 0; 0, -120] DstBlock "Addr Gen1" DstPort 3 } Line { SrcBlock "Addr Gen1" SrcPort 2 Points [105, 0] Branch { DstBlock "Output Buffers" DstPort 6 } Branch { Points [0, 85] Branch { DstBlock "Channel Estimation\n& Pilot Processing" DstPort 6 } Branch { Points [0, 115] DstBlock "Delay4" DstPort 1 } } } Line { SrcBlock "Addr Gen1" SrcPort 3 Points [95, 0; 0, 215] DstBlock "Delay2" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Sym Index" DstPort 1 } Line { SrcBlock "Addr Gen1" SrcPort 1 Points [125, 0; 0, 180] DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Addr_Generator" SrcPort 4 DstBlock "Input Buffers" DstPort 9 } Line { SrcBlock "Channel Estimation\n& Pilot Processing" SrcPort 3 DstBlock "Phase I" DstPort 1 } Line { SrcBlock "Channel Estimation\n& Pilot Processing" SrcPort 4 Points [45, 0] DstBlock "Phase Q" DstPort 1 } Line { SrcBlock "Inverter2" SrcPort 1 Points [45, 0; 0, 55] DstBlock "Channel Estimation\n& Pilot Processing" DstPort 7 } Annotation { Name "Payload->WE latency was 1 - why?" Position [221, 555] } } } Block { BlockType From Name "From26" SID "9688" Position [340, 545, 455, 565] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_BER_Errors" TagVisibility "global" } Block { BlockType From Name "From27" SID "9689" Position [340, 560, 455, 580] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_BER_TotalBits" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "5290" Position [935, 232, 1030, 248] ShowName off GotoTag "PktDetected" TagVisibility "global" } Block { BlockType Goto Name "Goto5" SID "5291" Position [935, 172, 1030, 188] ShowName off GotoTag "Payload" TagVisibility "global" } Block { BlockType SubSystem Name "Long Corr HP" SID "5292" Ports [2, 1] Position [520, 184, 580, 231] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Long Corr HP" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I In" SID "5293" Position [140, 53, 170, 67] IconDisplay "Port number" } Block { BlockType Inport Name "Q In" SID "5294" Position [140, 153, 170, 167] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5295" Ports [2, 1] Position [715, 88, 760, 132] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[5 0 0 8 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28." "66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 2" "8.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('out" "put',1,'\\bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "5296" Ports [2, 1] Position [715, 273, 760, 317] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[5 0 0 8 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28." "66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 2" "8.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('out" "put',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub2" SID "5297" Ports [2, 1] Position [985, 108, 1030, 152] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[10 0 0 18 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28." "66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 2" "8.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('out" "put',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "C1" SID "5298" Ports [1, 1] Position [540, 28, 625, 92] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Num sub-correlator|Coefficients/correlator|Coefficients|Input sample period" MaskStyleString "edit,edit,edit,edit" MaskVariables "ns=@1;N=@2;h=@3;Ts_In=@4;" MaskTunableValueString "on,on,on,on" MaskCallbackString "|||" MaskEnableString "on,on,on,on" MaskVisibilityString "on,on,on,on" MaskToolTipString "on,on,on,on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "0|4|longCorr_coef_i|4" System { Name "C1" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "76" Block { BlockType Inport Name "x" SID "5299" Position [35, 183, 65, 197] IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5300" Ports [2, 1] Position [394, 325, 441, 365] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e139daf6,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "5301" Ports [2, 1] Position [989, 320, 1036, 360] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub10" SID "5302" Ports [2, 1] Position [969, 895, 1016, 935] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub11" SID "5303" Ports [2, 1] Position [1284, 890, 1331, 930] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub12" SID "5304" Ports [2, 1] Position [699, 325, 746, 365] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub13" SID "5305" Ports [2, 1] Position [555, 425, 595, 465] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 6 0 5 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub14" SID "5306" Ports [2, 1] Position [1140, 1010, 1180, 1050] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 6 0 5 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub2" SID "5307" Ports [2, 1] Position [1160, 420, 1200, 460] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 6 0 5 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub3" SID "5308" Ports [2, 1] Position [1299, 315, 1346, 355] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub4" SID "5309" Ports [2, 1] Position [869, 500, 916, 540] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[4 7 0 6 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub5" SID "5310" Ports [2, 1] Position [384, 900, 431, 940] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub6" SID "5311" Ports [2, 1] Position [530, 1010, 570, 1050] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 6 0 5 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub7" SID "5312" Ports [2, 1] Position [669, 895, 716, 935] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub8" SID "5313" Ports [2, 1] Position [1385, 830, 1425, 870] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[4 8 0 7 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub9" SID "5314" Ports [2, 1] Position [830, 1070, 870, 1110] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[4 7 0 6 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "C1" SID "5315" Ports [4, 2] Position [180, 178, 265, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(1:N)" System { Name "C1" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5316" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5317" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5318" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5319" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample2" SID "5320" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5321" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5322" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5323" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5324" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5325" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5326" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5327" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5328" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5329" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5330" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "5331" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,401" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5332" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5333" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5334" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "xn" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C10" SID "5335" Ports [4, 2] Position [325, 753, 410, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(9*N+1:10*N)" System { Name "C10" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5336" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5337" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5338" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5339" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5340" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5341" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5342" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5343" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5344" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5345" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5346" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5347" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5348" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5349" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5350" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5351" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "5352" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5353" Ports [1, 1] Position [245, 143, 295, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5354" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5355" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 Points [120, 0] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C11" SID "5356" Ports [4, 2] Position [470, 753, 555, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(10*N+1:11*N)" System { Name "C11" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5357" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5358" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5359" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5360" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5361" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5362" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5363" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5364" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5365" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5366" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5367" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5368" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5369" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5370" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5371" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5372" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "5373" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5374" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5375" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5376" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C12" SID "5377" Ports [4, 2] Position [610, 753, 695, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(11*N+1:12*N)" System { Name "C12" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5378" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5379" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5380" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5381" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5382" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5383" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5384" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5385" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5386" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5387" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5388" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5389" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5390" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5391" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5392" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5393" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "5394" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5395" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5396" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5397" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C13" SID "5398" Ports [4, 2] Position [760, 753, 845, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(12*N+1:13*N)" System { Name "C13" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5399" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5400" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5401" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5402" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5403" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5404" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5405" Ports [3, 1] Position [375, 82, 460, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5406" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5407" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5408" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5409" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5410" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5411" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5412" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5413" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5414" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "5415" Ports [2, 1] Position [250, 70, 295, 130] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5416" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5417" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5418" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C14" SID "5419" Ports [4, 2] Position [905, 753, 990, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(13*N+1:14*N)" System { Name "C14" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5420" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5421" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5422" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5423" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5424" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5425" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5426" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5427" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5428" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5429" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5430" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5431" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5432" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5433" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5434" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5435" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "5436" Ports [2, 1] Position [250, 70, 295, 130] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5437" Ports [1, 1] Position [245, 143, 295, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5438" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5439" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 Points [120, 0] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C15" SID "5440" Ports [4, 2] Position [1040, 753, 1125, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(14*N+1:15*N)" System { Name "C15" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5441" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5442" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5443" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5444" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5445" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5446" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5447" Ports [3, 1] Position [385, 82, 470, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5448" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5449" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5450" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5451" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5452" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5453" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5454" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5455" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5456" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "5457" Ports [2, 1] Position [250, 70, 295, 130] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5458" Ports [1, 1] Position [250, 133, 300, 177] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5459" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5460" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 Points [125, 0] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C16" SID "5461" Ports [4, 2] Position [1190, 753, 1275, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(15*N+1:16*N)" System { Name "C16" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5462" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5463" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5464" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5465" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5466" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5467" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5468" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5469" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5470" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5471" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5472" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5473" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5474" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5475" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5476" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5477" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "5478" Ports [2, 1] Position [250, 70, 295, 130] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5479" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5480" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5481" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C2" SID "5482" Ports [4, 2] Position [340, 178, 425, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(N+1:2*N)" System { Name "C2" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5483" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5484" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5485" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5486" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5487" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5488" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5489" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5490" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5491" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5492" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5493" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5494" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5495" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5496" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5497" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5498" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "5499" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,401" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5500" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5501" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5502" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C3" SID "5503" Ports [4, 2] Position [495, 178, 580, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(2*N+1:3*N)" System { Name "C3" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5504" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5505" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5506" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5507" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5508" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5509" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5510" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5511" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5512" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5513" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5514" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5515" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5516" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5517" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5518" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5519" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "5520" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5521" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5522" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5523" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C4" SID "5524" Ports [4, 2] Position [645, 178, 730, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(3*N+1:4*N)" System { Name "C4" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5525" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5526" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5527" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5528" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5529" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5530" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5531" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5532" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5533" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5534" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5535" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5536" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5537" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5538" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5539" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5540" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "5541" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5542" Ports [1, 1] Position [245, 143, 295, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5543" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5544" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 Points [120, 0] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C5" SID "5545" Ports [4, 2] Position [790, 178, 875, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(4*N+1:5*N)" System { Name "C5" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5546" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5547" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5548" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5549" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5550" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5551" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5552" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5553" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5554" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5555" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5556" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5557" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5558" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5559" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5560" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5561" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "5562" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5563" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5564" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5565" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C6" SID "5566" Ports [4, 2] Position [930, 178, 1015, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(5*N+1:6*N)" System { Name "C6" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5567" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5568" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5569" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5570" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5571" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5572" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5573" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5574" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5575" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5576" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5577" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5578" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5579" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5580" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5581" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5582" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "5583" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5584" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5585" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5586" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C7" SID "5587" Ports [4, 2] Position [1080, 178, 1165, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(6*N+1:7*N)" System { Name "C7" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5588" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5589" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5590" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5591" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5592" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5593" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5594" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5595" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5596" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5597" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5598" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5599" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5600" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5601" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5602" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5603" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "5604" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5605" Ports [1, 1] Position [250, 143, 300, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5606" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5607" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 Points [120, 0; 0, 5] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C8" SID "5608" Ports [4, 2] Position [1225, 178, 1310, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(7*N+1:8*N)" System { Name "C8" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5609" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5610" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5611" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5612" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5613" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5614" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5615" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5616" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5617" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5618" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5619" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5620" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5621" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5622" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5623" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5624" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "5625" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5626" Ports [1, 1] Position [240, 138, 290, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5627" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5628" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [10, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C9" SID "5629" Ports [4, 2] Position [175, 753, 260, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(8*N+1:9*N)" System { Name "C9" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5630" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5631" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5632" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5633" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5634" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5635" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5636" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5637" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5638" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5639" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5640" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5641" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5642" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5643" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5644" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5645" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "5646" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5647" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5648" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5649" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType Reference Name "Delay1" SID "5650" Ports [1, 1] Position [1012, 280, 1038, 305] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay10" SID "5651" Ports [1, 1] Position [982, 950, 1008, 975] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*12)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 15 0 15 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,05283a76,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-35" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay11" SID "5652" Ports [1, 1] Position [1297, 950, 1323, 975] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*14)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 15 0 15 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,885a193d,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-41" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay12" SID "5653" Ports [1, 1] Position [992, 850, 1018, 875] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay13" SID "5654" Ports [1, 1] Position [722, 285, 748, 310] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay14" SID "5655" Ports [1, 1] Position [712, 380, 738, 405] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*2)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[3 5 0 5 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,ec356abf,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-5}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay15" SID "5656" Ports [1, 1] Position [1307, 845, 1333, 870] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "5657" Ports [1, 1] Position [1002, 375, 1028, 400] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*4)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[3 5 0 5 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,1a71059f,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-11" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "5658" Ports [1, 1] Position [417, 275, 443, 300] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "5659" Ports [1, 1] Position [1322, 275, 1348, 300] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "5660" Ports [1, 1] Position [1312, 370, 1338, 395] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*6)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[6 10 0 10 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,1003b046,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-17" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "5661" Ports [1, 1] Position [407, 850, 433, 875] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "5662" Ports [1, 1] Position [397, 955, 423, 980] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*8)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[6 10 0 10 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,b88b7ef0,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-23" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay8" SID "5663" Ports [1, 1] Position [692, 845, 718, 870] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay9" SID "5664" Ports [1, 1] Position [682, 960, 708, 985] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*10)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 15 0 15 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,e3412ff7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-29" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "FSM" SID "5665" Ports [0, 3] Position [15, 14, 120, 126] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "FSM" Location [2, 74, 1184, 1000] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Coef Addr Gen" SID "5666" Ports [1, 1] Position [230, 103, 280, 147] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(length(h(1:N))))" bin_pt "0" load_pin off rst on en off explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[2 3 0 3 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,803eba70,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'rst');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('" "','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant2" SID "5667" Ports [0, 1] Position [25, 122, 60, 148] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(length(h(1:N))/2))+1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2/N" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant3" SID "5668" Ports [0, 1] Position [330, 182, 365, 208] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "length(h(1:N))-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(length(h(1:N))))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2/N" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,26,0,1,white,blue,0,279a71c8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'3');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Data Addr Gen" SID "5669" Ports [0, 1] Position [235, 33, 285, 77] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Count Limited" cnt_to "length(h(1:N))-1" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(length(h(1:N))))" bin_pt "0" load_pin off rst off en off explicit_period "on" period "Ts_In/N" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,0,1,white,blue,0,4b061529,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor" "('black');disp('{\\fontsize{14}\\bf\\lceil++\\rceil}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" SID "5670" Ports [1, 1] Position [325, 113, 350, 137] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 3 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out" SID "5671" Ports [1, 1] Position [670, 295, 705, 305] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out1" SID "5672" Ports [1, 1] Position [670, 310, 705, 320] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out3" SID "5673" Ports [1, 1] Position [670, 325, 705, 335] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Scope Name "Long Corr\nScope" SID "5674" Ports [3] Position [760, 290, 795, 340] Floating off Location [-1208, 112, 72, 1092] Open off NumInputPorts "3" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" } YMin "-1~-1~-35" YMax "1~1~25" SaveName "ScopeData4" DataFormat "StructureWithTime" SampleTime "0" } Block { BlockType Reference Name "Relational2" SID "5675" Ports [2, 1] Position [120, 103, 165, 147] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[1 1 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,3618233f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "5676" Ports [2, 1] Position [455, 163, 500, 207] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[1 1 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,3618233f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5677" Ports [1, 1] Position [540, 171, 560, 199] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,28,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 28 28 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[16.22 16." "22 18.22 16.22 18.22 18.22 18.22 16.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[14.22 14.22 16.22 16.22" " 14.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[12.22 12.22 14.22 14.22 12.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 10.22 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]" ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_la" "bel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Data Addr" SID "5678" Position [455, 48, 485, 62] IconDisplay "Port number" } Block { BlockType Outport Name "Coef Addr" SID "5679" Position [455, 118, 485, 132] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "load" SID "5680" Position [615, 178, 645, 192] Port "3" IconDisplay "Port number" } Line { SrcBlock "bc3" SrcPort 1 DstBlock "load" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 Points [15, 0] Branch { DstBlock "bc3" DstPort 1 } Branch { Points [0, 145] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Delay1" SrcPort 1 Points [0, 0; 25, 0] Branch { DstBlock "Coef Addr" DstPort 1 } Branch { Points [0, 50] DstBlock "Relational3" DstPort 1 } } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Coef Addr Gen" DstPort 1 } Line { SrcBlock "Coef Addr Gen" SrcPort 1 Points [20, 0] Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, 190] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "Data Addr Gen" SrcPort 1 Points [60, 0] Branch { Points [0, -40; -285, 0; 0, 100] DstBlock "Relational2" DstPort 1 } Branch { DstBlock "Data Addr" DstPort 1 } Branch { Points [0, 245] DstBlock "Gateway Out" DstPort 1 } } Line { SrcBlock "Gateway Out" SrcPort 1 Points [0, 0] DstBlock "Long Corr\nScope" DstPort 1 } Line { SrcBlock "Gateway Out1" SrcPort 1 Points [0, 0] DstBlock "Long Corr\nScope" DstPort 2 } Line { SrcBlock "Gateway Out3" SrcPort 1 Points [0, 0] DstBlock "Long Corr\nScope" DstPort 3 } } } Block { BlockType From Name "From" SID "5681" Position [85, 751, 125, 779] CloseFcn "tagdialog Close" GotoTag "xnz" } Block { BlockType Reference Name "Gateway Out6" SID "5682" Ports [1, 1] Position [1015, 1140, 1050, 1150] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Gateway Out7" SID "5683" Ports [1, 1] Position [1015, 1155, 1050, 1165] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Gateway Out8" SID "5684" Ports [1, 1] Position [1015, 1170, 1050, 1180] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Goto Name "Goto" SID "5685" Position [1355, 225, 1395, 255] GotoTag "xnz" TagVisibility "local" } Block { BlockType Scope Name "Long Corr\nScope2" SID "5686" Ports [3] Position [1110, 1137, 1140, 1183] Floating off Location [21, 181, 952, 967] Open off NumInputPorts "3" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" } YMin "-0.35~-0.175~0" YMax "0.35~0.225~1300" SaveName "ScopeData8" DataFormat "StructureWithTime" SampleTime "0" } Block { BlockType Outport Name "y" SID "5687" Position [1465, 843, 1495, 857] IconDisplay "Port number" } Line { SrcBlock "AddSub9" SrcPort 1 Points [90, 0] Branch { Points [0, 60] DstBlock "Gateway Out8" DstPort 1 } Branch { Points [430, 0] DstBlock "AddSub8" DstPort 2 } } Line { SrcBlock "AddSub6" SrcPort 1 Points [260, 0] Branch { DstBlock "AddSub9" DstPort 1 } Branch { Points [0, 105] DstBlock "Gateway Out7" DstPort 1 } } Line { SrcBlock "C13" SrcPort 1 Points [10, 0; 0, 105] DstBlock "AddSub10" DstPort 1 } Line { SrcBlock "AddSub8" SrcPort 1 DstBlock "y" DstPort 1 } Line { SrcBlock "Delay9" SrcPort 1 Points [-135, 0] DstBlock "AddSub6" DstPort 2 } Line { SrcBlock "Delay7" SrcPort 1 Points [0, 5; 130, 0] DstBlock "AddSub6" DstPort 1 } Line { SrcBlock "C12" SrcPort 1 Points [5, 0] DstBlock "Delay8" DstPort 1 } Line { SrcBlock "AddSub7" SrcPort 1 DstBlock "Delay9" DstPort 1 } Line { SrcBlock "Delay8" SrcPort 1 DstBlock "AddSub7" DstPort 2 } Line { SrcBlock "C11" SrcPort 1 Points [0, 105] DstBlock "AddSub7" DstPort 1 } Line { SrcBlock "AddSub4" SrcPort 1 Points [0, 15; 475, 0] DstBlock "AddSub8" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 Points [0, 10; -275, 0] DstBlock "AddSub4" DstPort 2 } Line { SrcBlock "AddSub13" SrcPort 1 Points [0, 5; 305, 0] DstBlock "AddSub4" DstPort 1 } Line { SrcBlock "Delay5" SrcPort 1 Points [0, 5] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 40] DstBlock "AddSub13" DstPort 1 } Line { SrcBlock "Delay14" SrcPort 1 DstBlock "AddSub13" DstPort 2 } Line { SrcBlock "C8" SrcPort 2 DstBlock "Goto" DstPort 1 } Line { SrcBlock "C10" SrcPort 1 Points [5, 0] DstBlock "Delay6" DstPort 1 } Line { SrcBlock "AddSub5" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "C9" SrcPort 1 Points [0, 105; 130, 0] DstBlock "AddSub5" DstPort 1 } Line { SrcBlock "C8" SrcPort 1 Points [20, 0] DstBlock "Delay4" DstPort 1 } Line { SrcBlock "C7" SrcPort 1 Points [0, 85; 140, 0] DstBlock "AddSub3" DstPort 1 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "Delay5" DstPort 1 } Line { SrcBlock "Delay4" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "C7" SrcPort 2 Points [20, 0; 0, -50] DstBlock "C8" DstPort 1 } Line { SrcBlock "C6" SrcPort 1 Points [5, 0] DstBlock "Delay1" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "C5" SrcPort 1 Points [0, 100; 120, 0] DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "C1" SrcPort 1 Points [0, 110] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub12" SrcPort 1 DstBlock "Delay14" DstPort 1 } Line { SrcBlock "Delay13" SrcPort 1 DstBlock "AddSub12" DstPort 2 } Line { SrcBlock "C12" SrcPort 2 Points [10, 0; 0, -50] DstBlock "C13" DstPort 1 } Line { SrcBlock "C11" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C12" DstPort 1 } Line { SrcBlock "C10" SrcPort 2 Points [20, 0; 0, -50] DstBlock "C11" DstPort 1 } Line { SrcBlock "C9" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C10" DstPort 1 } Line { SrcBlock "From" SrcPort 1 DstBlock "C9" DstPort 1 } Line { SrcBlock "C6" SrcPort 2 Points [10, 0; 0, -50] DstBlock "C7" DstPort 1 } Line { SrcBlock "C5" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C6" DstPort 1 } Line { SrcBlock "C4" SrcPort 1 DstBlock "Delay13" DstPort 1 } Line { SrcBlock "C4" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C5" DstPort 1 } Line { SrcBlock "C3" SrcPort 1 Points [0, 100; 125, 0] DstBlock "AddSub12" DstPort 1 } Line { SrcBlock "C3" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C4" DstPort 1 } Line { SrcBlock "C2" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C3" DstPort 1 } Line { SrcBlock "FSM" SrcPort 3 Points [15, 0] Branch { Points [0, 145] Branch { Points [0, 430] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { Points [0, 145] DstBlock "C12" DstPort 4 } Branch { Points [140, 0] Branch { Points [5, 0; 0, 145] DstBlock "C13" DstPort 4 } Branch { Points [155, 0] Branch { Points [0, 145] DstBlock "C14" DstPort 4 } Branch { Points [135, 0] Branch { Points [150, 0; 0, 145] DstBlock "C16" DstPort 4 } Branch { Points [0, 145] DstBlock "C15" DstPort 4 } } } } } Branch { Points [0, 145] DstBlock "C11" DstPort 4 } } Branch { Points [0, 145] DstBlock "C10" DstPort 4 } } Branch { Points [0, 145] DstBlock "C9" DstPort 4 } } Branch { DstBlock "C1" DstPort 4 } } Branch { Points [35, 0; 135, 0] Branch { Points [150, 0] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { Points [145, 0] Branch { Points [150, 0; 0, 145] DstBlock "C8" DstPort 4 } Branch { Points [0, 145] DstBlock "C7" DstPort 4 } } Branch { Points [0, 145] DstBlock "C6" DstPort 4 } } Branch { Points [0, 145] DstBlock "C5" DstPort 4 } } Branch { Points [0, 145] DstBlock "C4" DstPort 4 } } Branch { Points [0, 145] DstBlock "C3" DstPort 4 } } Branch { Points [0, 145] DstBlock "C2" DstPort 4 } } } Line { SrcBlock "FSM" SrcPort 2 Points [20, 0] Branch { Points [0, 160] Branch { Points [0, 415] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { Points [0, 160] DstBlock "C12" DstPort 3 } Branch { Points [145, 0] Branch { Points [0, 160] DstBlock "C13" DstPort 3 } Branch { Points [150, 0] Branch { Points [0, 160] DstBlock "C14" DstPort 3 } Branch { Points [135, 0] Branch { Points [150, 0; 0, 160] DstBlock "C16" DstPort 3 } Branch { Points [0, 160] DstBlock "C15" DstPort 3 } } } } } Branch { Points [0, 160] DstBlock "C11" DstPort 3 } } Branch { Points [0, 160] DstBlock "C10" DstPort 3 } } Branch { Points [0, 160] DstBlock "C9" DstPort 3 } } Branch { Labels [1, 0] DstBlock "C1" DstPort 3 } } Branch { Points [30, 0; 140, 0] Branch { Points [150, 0] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { Points [145, 0] Branch { Points [150, 0; 0, 160] DstBlock "C8" DstPort 3 } Branch { Points [0, 160] DstBlock "C7" DstPort 3 } } Branch { Points [0, 160] DstBlock "C6" DstPort 3 } } Branch { Points [0, 160] DstBlock "C5" DstPort 3 } } Branch { Points [0, 160] DstBlock "C4" DstPort 3 } } Branch { Points [0, 160] DstBlock "C3" DstPort 3 } } Branch { Points [0, 160] DstBlock "C2" DstPort 3 } } } Line { SrcBlock "FSM" SrcPort 1 Points [25, 0] Branch { Points [0, 175] Branch { Points [0, 400] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { DstBlock "C12" DstPort 2 } Branch { Points [145, 0] Branch { Points [0, 175] DstBlock "C13" DstPort 2 } Branch { Points [150, 0] Branch { Points [0, 0] DstBlock "C14" DstPort 2 } Branch { Points [135, 0] Branch { Points [150, 0] DstBlock "C16" DstPort 2 } Branch { DstBlock "C15" DstPort 2 } } } } } Branch { DstBlock "C11" DstPort 2 } } Branch { DstBlock "C10" DstPort 2 } } Branch { Points [0, 175] DstBlock "C9" DstPort 2 } } Branch { DstBlock "C1" DstPort 2 } } Branch { Points [0, 0; 170, 0] Branch { Points [150, 0] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { Points [145, 0] Branch { Points [150, 0] DstBlock "C8" DstPort 2 } Branch { Points [0, 175] DstBlock "C7" DstPort 2 } } Branch { DstBlock "C6" DstPort 2 } } Branch { DstBlock "C5" DstPort 2 } } Branch { DstBlock "C4" DstPort 2 } } Branch { Points [0, 175] DstBlock "C3" DstPort 2 } } Branch { Points [0, 175] DstBlock "C2" DstPort 2 } } } Line { SrcBlock "C1" SrcPort 2 Points [25, 0; 0, -50] DstBlock "C2" DstPort 1 } Line { SrcBlock "C2" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "x" SrcPort 1 DstBlock "C1" DstPort 1 } Line { SrcBlock "C13" SrcPort 2 Points [25, 0; 0, -50] DstBlock "C14" DstPort 1 } Line { SrcBlock "C14" SrcPort 2 Points [15, 0; 0, -50] DstBlock "C15" DstPort 1 } Line { SrcBlock "C15" SrcPort 2 Points [30, 0; 0, -50] DstBlock "C16" DstPort 1 } Line { SrcBlock "C15" SrcPort 1 Points [15, 0; 0, 100] DstBlock "AddSub11" DstPort 1 } Line { SrcBlock "C14" SrcPort 1 Points [10, 0] DstBlock "Delay12" DstPort 1 } Line { SrcBlock "C16" SrcPort 1 Points [40, 0] DstBlock "Delay15" DstPort 1 } Line { SrcBlock "Delay12" SrcPort 1 DstBlock "AddSub10" DstPort 2 } Line { SrcBlock "Delay15" SrcPort 1 DstBlock "AddSub11" DstPort 2 } Line { SrcBlock "AddSub10" SrcPort 1 DstBlock "Delay10" DstPort 1 } Line { SrcBlock "AddSub11" SrcPort 1 DstBlock "Delay11" DstPort 1 } Line { SrcBlock "Delay10" SrcPort 1 Points [0, 5; 155, 0] DstBlock "AddSub14" DstPort 1 } Line { SrcBlock "Delay11" SrcPort 1 Points [0, 5; -140, 0] DstBlock "AddSub14" DstPort 2 } Line { SrcBlock "AddSub14" SrcPort 1 Points [-245, 0] Branch { DstBlock "AddSub9" DstPort 2 } Branch { Points [0, 90] DstBlock "Gateway Out6" DstPort 1 } } Line { SrcBlock "Gateway Out6" SrcPort 1 DstBlock "Long Corr\nScope2" DstPort 1 } Line { SrcBlock "Gateway Out7" SrcPort 1 DstBlock "Long Corr\nScope2" DstPort 2 } Line { SrcBlock "Gateway Out8" SrcPort 1 DstBlock "Long Corr\nScope2" DstPort 3 } } } Block { BlockType SubSystem Name "C2" SID "5688" Ports [1, 1] Position [540, 128, 625, 192] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Num sub-correlator|Coefficients/correlator|Coefficients|Input sample period" MaskStyleString "edit,edit,edit,edit" MaskVariables "ns=@1;N=@2;h=@3;Ts_In=@4;" MaskTunableValueString "on,on,on,on" MaskCallbackString "|||" MaskEnableString "on,on,on,on" MaskVisibilityString "on,on,on,on" MaskToolTipString "on,on,on,on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "0|4|longCorr_coef_q|4" System { Name "C2" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "76" Block { BlockType Inport Name "x" SID "5689" Position [35, 183, 65, 197] IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5690" Ports [2, 1] Position [394, 325, 441, 365] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e139daf6,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "5691" Ports [2, 1] Position [989, 320, 1036, 360] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub10" SID "5692" Ports [2, 1] Position [969, 895, 1016, 935] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub11" SID "5693" Ports [2, 1] Position [1284, 890, 1331, 930] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub12" SID "5694" Ports [2, 1] Position [699, 325, 746, 365] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub13" SID "5695" Ports [2, 1] Position [555, 425, 595, 465] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 6 0 5 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub14" SID "5696" Ports [2, 1] Position [1140, 1010, 1180, 1050] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 6 0 5 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub2" SID "5697" Ports [2, 1] Position [1160, 420, 1200, 460] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 6 0 5 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub3" SID "5698" Ports [2, 1] Position [1299, 315, 1346, 355] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub4" SID "5699" Ports [2, 1] Position [869, 500, 916, 540] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[4 7 0 6 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub5" SID "5700" Ports [2, 1] Position [384, 900, 431, 940] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub6" SID "5701" Ports [2, 1] Position [530, 1010, 570, 1050] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 6 0 5 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub7" SID "5702" Ports [2, 1] Position [669, 895, 716, 935] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub8" SID "5703" Ports [2, 1] Position [1385, 830, 1425, 870] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[4 8 0 7 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub9" SID "5704" Ports [2, 1] Position [830, 1070, 870, 1110] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[4 7 0 6 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "C1" SID "5705" Ports [4, 2] Position [180, 178, 265, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(1:N)" System { Name "C1" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5706" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5707" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5708" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5709" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample2" SID "5710" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5711" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5712" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5713" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5714" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5715" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5716" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5717" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5718" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5719" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5720" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register2" DstPort 2 } } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } } } Block { BlockType Reference Name "R" SID "5721" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,401" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5722" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5723" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5724" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "MAC" DstPort 1 } Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C10" SID "5725" Ports [4, 2] Position [325, 753, 410, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(9*N+1:10*N)" System { Name "C10" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5726" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5727" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5728" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5729" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5730" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5731" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5732" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5733" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5734" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5735" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5736" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5737" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5738" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5739" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5740" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5741" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register2" DstPort 2 } } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } } } Block { BlockType Reference Name "R" SID "5742" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5743" Ports [1, 1] Position [245, 143, 295, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5744" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5745" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 Points [120, 0] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C11" SID "5746" Ports [4, 2] Position [470, 753, 555, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(10*N+1:11*N)" System { Name "C11" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5747" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5748" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5749" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5750" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5751" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5752" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5753" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5754" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5755" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5756" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5757" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5758" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5759" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5760" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5761" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5762" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register2" DstPort 2 } } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } } } Block { BlockType Reference Name "R" SID "5763" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5764" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5765" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5766" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C12" SID "5767" Ports [4, 2] Position [610, 753, 695, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(11*N+1:12*N)" System { Name "C12" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5768" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5769" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5770" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5771" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5772" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5773" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5774" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5775" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5776" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5777" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5778" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5779" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5780" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5781" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5782" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5783" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register2" DstPort 2 } } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } } } Block { BlockType Reference Name "R" SID "5784" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5785" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5786" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5787" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C13" SID "5788" Ports [4, 2] Position [760, 753, 845, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(12*N+1:13*N)" System { Name "C13" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5789" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5790" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5791" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5792" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5793" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5794" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5795" Ports [3, 1] Position [375, 82, 460, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5796" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5797" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5798" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5799" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5800" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5801" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5802" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5803" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5804" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register2" DstPort 2 } } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } } } Block { BlockType Reference Name "R" SID "5805" Ports [2, 1] Position [250, 70, 295, 130] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5806" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5807" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5808" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "MAC" DstPort 1 } Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C14" SID "5809" Ports [4, 2] Position [905, 753, 990, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(13*N+1:14*N)" System { Name "C14" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5810" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5811" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5812" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5813" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5814" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5815" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5816" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5817" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5818" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5819" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5820" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5821" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5822" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5823" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5824" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5825" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register2" DstPort 2 } } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } } } Block { BlockType Reference Name "R" SID "5826" Ports [2, 1] Position [250, 70, 295, 130] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5827" Ports [1, 1] Position [245, 143, 295, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5828" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5829" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 Points [120, 0] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C15" SID "5830" Ports [4, 2] Position [1040, 753, 1125, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(14*N+1:15*N)" System { Name "C15" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5831" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5832" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5833" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5834" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5835" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5836" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5837" Ports [3, 1] Position [385, 82, 470, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5838" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5839" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5840" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5841" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5842" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5843" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5844" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5845" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5846" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register2" DstPort 2 } } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } } } Block { BlockType Reference Name "R" SID "5847" Ports [2, 1] Position [250, 70, 295, 130] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5848" Ports [1, 1] Position [250, 133, 300, 177] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5849" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5850" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "MAC" DstPort 1 } Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 Points [125, 0] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C16" SID "5851" Ports [4, 2] Position [1190, 753, 1275, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(15*N+1:16*N)" System { Name "C16" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5852" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5853" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5854" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5855" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5856" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5857" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5858" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5859" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5860" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5861" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5862" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5863" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5864" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5865" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5866" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5867" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register2" DstPort 2 } } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } } } Block { BlockType Reference Name "R" SID "5868" Ports [2, 1] Position [250, 70, 295, 130] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5869" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5870" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5871" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C2" SID "5872" Ports [4, 2] Position [340, 178, 425, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(N+1:2*N)" System { Name "C2" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5873" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5874" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5875" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5876" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5877" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5878" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5879" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5880" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5881" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5882" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5883" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5884" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5885" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5886" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5887" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5888" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register2" DstPort 2 } } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } } } Block { BlockType Reference Name "R" SID "5889" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,401" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5890" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5891" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5892" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "MAC" DstPort 1 } Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C3" SID "5893" Ports [4, 2] Position [495, 178, 580, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(2*N+1:3*N)" System { Name "C3" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5894" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5895" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5896" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5897" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5898" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5899" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5900" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5901" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5902" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5903" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5904" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5905" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5906" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5907" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5908" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5909" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register2" DstPort 2 } } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } } } Block { BlockType Reference Name "R" SID "5910" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5911" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5912" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5913" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "MAC" DstPort 1 } Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C4" SID "5914" Ports [4, 2] Position [645, 178, 730, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(3*N+1:4*N)" System { Name "C4" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5915" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5916" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5917" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5918" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5919" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5920" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5921" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5922" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5923" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5924" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5925" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5926" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5927" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5928" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5929" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5930" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register2" DstPort 2 } } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } } } Block { BlockType Reference Name "R" SID "5931" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5932" Ports [1, 1] Position [245, 143, 295, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5933" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5934" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 Points [120, 0] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C5" SID "5935" Ports [4, 2] Position [790, 178, 875, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(4*N+1:5*N)" System { Name "C5" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5936" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5937" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5938" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5939" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5940" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5941" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5942" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5943" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5944" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5945" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5946" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5947" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5948" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5949" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5950" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5951" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register2" DstPort 2 } } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } } } Block { BlockType Reference Name "R" SID "5952" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5953" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5954" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5955" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "MAC" DstPort 1 } Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C6" SID "5956" Ports [4, 2] Position [930, 178, 1015, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(5*N+1:6*N)" System { Name "C6" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5957" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5958" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5959" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5960" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5961" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5962" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5963" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5964" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5965" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5966" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5967" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5968" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5969" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5970" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5971" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5972" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register2" DstPort 2 } } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } } } Block { BlockType Reference Name "R" SID "5973" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5974" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5975" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5976" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "MAC" DstPort 1 } Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C7" SID "5977" Ports [4, 2] Position [1080, 178, 1165, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(6*N+1:7*N)" System { Name "C7" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5978" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "5979" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "5980" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "5981" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "5982" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "5983" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "5984" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "5985" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "5986" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "5987" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "5988" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "5989" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "5990" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "5991" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "5992" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "5993" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register2" DstPort 2 } } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } } } Block { BlockType Reference Name "R" SID "5994" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "5995" Ports [1, 1] Position [250, 143, 300, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "5996" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "5997" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 Points [120, 0; 0, 5] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C8" SID "5998" Ports [4, 2] Position [1225, 178, 1310, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(7*N+1:8*N)" System { Name "C8" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "5999" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6000" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6001" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6002" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6003" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6004" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6005" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6006" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6007" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6008" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6009" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6010" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6011" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6012" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6013" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6014" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register2" DstPort 2 } } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } } } Block { BlockType Reference Name "R" SID "6015" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6016" Ports [1, 1] Position [240, 138, 290, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6017" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6018" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [10, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "MAC" DstPort 1 } Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C9" SID "6019" Ports [4, 2] Position [175, 753, 260, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(8*N+1:9*N)" System { Name "C9" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6020" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6021" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6022" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6023" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6024" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6025" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6026" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6027" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6028" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6029" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6030" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6031" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6032" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6033" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6034" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6035" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register2" DstPort 2 } } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } } } Block { BlockType Reference Name "R" SID "6036" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6037" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6038" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6039" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType Reference Name "Delay1" SID "6040" Ports [1, 1] Position [1012, 280, 1038, 305] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay10" SID "6041" Ports [1, 1] Position [982, 950, 1008, 975] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*12)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 15 0 15 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,05283a76,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-35" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay11" SID "6042" Ports [1, 1] Position [1297, 950, 1323, 975] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*14)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 15 0 15 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,885a193d,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-41" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay12" SID "6043" Ports [1, 1] Position [992, 850, 1018, 875] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay13" SID "6044" Ports [1, 1] Position [722, 285, 748, 310] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay14" SID "6045" Ports [1, 1] Position [712, 380, 738, 405] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*2)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[3 5 0 5 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,ec356abf,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-5}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay15" SID "6046" Ports [1, 1] Position [1307, 845, 1333, 870] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "6047" Ports [1, 1] Position [1002, 375, 1028, 400] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*4)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[3 5 0 5 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,1a71059f,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-11" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "6048" Ports [1, 1] Position [417, 275, 443, 300] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "6049" Ports [1, 1] Position [1322, 275, 1348, 300] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "6050" Ports [1, 1] Position [1312, 370, 1338, 395] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*6)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[6 10 0 10 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,1003b046,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-17" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "6051" Ports [1, 1] Position [407, 850, 433, 875] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "6052" Ports [1, 1] Position [397, 955, 423, 980] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*8)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[6 10 0 10 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,b88b7ef0,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-23" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay8" SID "6053" Ports [1, 1] Position [692, 845, 718, 870] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay9" SID "6054" Ports [1, 1] Position [682, 960, 708, 985] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*10)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 15 0 15 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,e3412ff7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-29" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "FSM" SID "6055" Ports [0, 3] Position [15, 14, 120, 126] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "FSM" Location [2, 74, 1184, 1000] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Coef Addr Gen" SID "6056" Ports [1, 1] Position [230, 103, 280, 147] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(length(h(1:N))))" bin_pt "0" load_pin off rst on en off explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[2 3 0 3 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,803eba70,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'rst');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('" "','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant2" SID "6057" Ports [0, 1] Position [25, 122, 60, 148] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(length(h(1:N))/2))+1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2/N" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant3" SID "6058" Ports [0, 1] Position [330, 182, 365, 208] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "length(h(1:N))-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(length(h(1:N))))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2/N" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,26,0,1,white,blue,0,279a71c8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'3');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Data Addr Gen" SID "6059" Ports [0, 1] Position [235, 33, 285, 77] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Count Limited" cnt_to "length(h(1:N))-1" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(length(h(1:N))))" bin_pt "0" load_pin off rst off en off explicit_period "on" period "Ts_In/N" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,0,1,white,blue,0,4b061529,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor" "('black');disp('{\\fontsize{14}\\bf\\lceil++\\rceil}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" SID "6060" Ports [1, 1] Position [325, 113, 350, 137] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 3 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out" SID "6061" Ports [1, 1] Position [670, 295, 705, 305] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out1" SID "6062" Ports [1, 1] Position [670, 310, 705, 320] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out3" SID "6063" Ports [1, 1] Position [670, 325, 705, 335] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Scope Name "Long Corr\nScope" SID "6064" Ports [3] Position [760, 290, 795, 340] Floating off Location [-1208, 112, 72, 1092] Open off NumInputPorts "3" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" } YMin "-1~-1~-35" YMax "1~1~25" SaveName "ScopeData4" DataFormat "StructureWithTime" SampleTime "0" } Block { BlockType Reference Name "Relational2" SID "6065" Ports [2, 1] Position [120, 103, 165, 147] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[1 1 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,3618233f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "6066" Ports [2, 1] Position [455, 163, 500, 207] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[1 1 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,3618233f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6067" Ports [1, 1] Position [540, 171, 560, 199] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,28,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 28 28 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[16.22 16." "22 18.22 16.22 18.22 18.22 18.22 16.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[14.22 14.22 16.22 16.22" " 14.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[12.22 12.22 14.22 14.22 12.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 10.22 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]" ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_la" "bel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Data Addr" SID "6068" Position [455, 48, 485, 62] IconDisplay "Port number" } Block { BlockType Outport Name "Coef Addr" SID "6069" Position [455, 118, 485, 132] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "load" SID "6070" Position [615, 178, 645, 192] Port "3" IconDisplay "Port number" } Line { SrcBlock "Gateway Out3" SrcPort 1 Points [0, 0] DstBlock "Long Corr\nScope" DstPort 3 } Line { SrcBlock "Gateway Out1" SrcPort 1 Points [0, 0] DstBlock "Long Corr\nScope" DstPort 2 } Line { SrcBlock "Gateway Out" SrcPort 1 Points [0, 0] DstBlock "Long Corr\nScope" DstPort 1 } Line { SrcBlock "Data Addr Gen" SrcPort 1 Points [60, 0] Branch { Points [0, 245] DstBlock "Gateway Out" DstPort 1 } Branch { DstBlock "Data Addr" DstPort 1 } Branch { Points [0, -40; -285, 0; 0, 100] DstBlock "Relational2" DstPort 1 } } Line { SrcBlock "Coef Addr Gen" SrcPort 1 Points [20, 0] Branch { Points [0, 190] DstBlock "Gateway Out1" DstPort 1 } Branch { DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Coef Addr Gen" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Delay1" SrcPort 1 Points [0, 0; 25, 0] Branch { Points [0, 50] DstBlock "Relational3" DstPort 1 } Branch { DstBlock "Coef Addr" DstPort 1 } } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Relational3" SrcPort 1 Points [15, 0] Branch { Points [0, 145] DstBlock "Gateway Out3" DstPort 1 } Branch { DstBlock "bc3" DstPort 1 } } Line { SrcBlock "bc3" SrcPort 1 DstBlock "load" DstPort 1 } } } Block { BlockType From Name "From" SID "6071" Position [85, 751, 125, 779] CloseFcn "tagdialog Close" GotoTag "xnz" } Block { BlockType Reference Name "Gateway Out6" SID "6072" Ports [1, 1] Position [1015, 1140, 1050, 1150] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Gateway Out7" SID "6073" Ports [1, 1] Position [1015, 1155, 1050, 1165] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Gateway Out8" SID "6074" Ports [1, 1] Position [1015, 1170, 1050, 1180] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Goto Name "Goto" SID "6075" Position [1355, 225, 1395, 255] GotoTag "xnz" TagVisibility "local" } Block { BlockType Scope Name "Long Corr\nScope2" SID "6076" Ports [3] Position [1110, 1137, 1140, 1183] Floating off Location [21, 181, 952, 967] Open off NumInputPorts "3" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" } YMin "-0.35~-0.175~0" YMax "0.35~0.225~1300" SaveName "ScopeData8" DataFormat "StructureWithTime" SampleTime "0" } Block { BlockType Outport Name "y" SID "6077" Position [1465, 843, 1495, 857] IconDisplay "Port number" } Line { SrcBlock "Gateway Out8" SrcPort 1 DstBlock "Long Corr\nScope2" DstPort 3 } Line { SrcBlock "Gateway Out7" SrcPort 1 DstBlock "Long Corr\nScope2" DstPort 2 } Line { SrcBlock "Gateway Out6" SrcPort 1 DstBlock "Long Corr\nScope2" DstPort 1 } Line { SrcBlock "AddSub14" SrcPort 1 Points [-245, 0] Branch { Points [0, 90] DstBlock "Gateway Out6" DstPort 1 } Branch { DstBlock "AddSub9" DstPort 2 } } Line { SrcBlock "Delay11" SrcPort 1 Points [0, 5; -140, 0] DstBlock "AddSub14" DstPort 2 } Line { SrcBlock "Delay10" SrcPort 1 Points [0, 5; 155, 0] DstBlock "AddSub14" DstPort 1 } Line { SrcBlock "AddSub11" SrcPort 1 DstBlock "Delay11" DstPort 1 } Line { SrcBlock "AddSub10" SrcPort 1 DstBlock "Delay10" DstPort 1 } Line { SrcBlock "Delay15" SrcPort 1 DstBlock "AddSub11" DstPort 2 } Line { SrcBlock "Delay12" SrcPort 1 DstBlock "AddSub10" DstPort 2 } Line { SrcBlock "C16" SrcPort 1 Points [40, 0] DstBlock "Delay15" DstPort 1 } Line { SrcBlock "C14" SrcPort 1 Points [10, 0] DstBlock "Delay12" DstPort 1 } Line { SrcBlock "C15" SrcPort 1 Points [15, 0; 0, 100] DstBlock "AddSub11" DstPort 1 } Line { SrcBlock "C15" SrcPort 2 Points [30, 0; 0, -50] DstBlock "C16" DstPort 1 } Line { SrcBlock "C14" SrcPort 2 Points [15, 0; 0, -50] DstBlock "C15" DstPort 1 } Line { SrcBlock "C13" SrcPort 2 Points [25, 0; 0, -50] DstBlock "C14" DstPort 1 } Line { SrcBlock "x" SrcPort 1 DstBlock "C1" DstPort 1 } Line { SrcBlock "C2" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "C1" SrcPort 2 Points [25, 0; 0, -50] DstBlock "C2" DstPort 1 } Line { SrcBlock "FSM" SrcPort 1 Points [25, 0] Branch { Points [0, 0; 170, 0] Branch { Points [0, 175] DstBlock "C2" DstPort 2 } Branch { Points [150, 0] Branch { Points [0, 175] DstBlock "C3" DstPort 2 } Branch { Points [160, 0] Branch { DstBlock "C4" DstPort 2 } Branch { Points [145, 0] Branch { DstBlock "C5" DstPort 2 } Branch { Points [140, 0] Branch { DstBlock "C6" DstPort 2 } Branch { Points [145, 0] Branch { Points [0, 175] DstBlock "C7" DstPort 2 } Branch { Points [150, 0] DstBlock "C8" DstPort 2 } } } } } } } Branch { Points [0, 175] Branch { DstBlock "C1" DstPort 2 } Branch { Points [0, 400] Branch { Points [0, 175] DstBlock "C9" DstPort 2 } Branch { Points [160, 0] Branch { DstBlock "C10" DstPort 2 } Branch { Points [145, 0] Branch { DstBlock "C11" DstPort 2 } Branch { Points [140, 0] Branch { Points [145, 0] Branch { Points [150, 0] Branch { Points [135, 0] Branch { DstBlock "C15" DstPort 2 } Branch { Points [150, 0] DstBlock "C16" DstPort 2 } } Branch { Points [0, 0] DstBlock "C14" DstPort 2 } } Branch { Points [0, 175] DstBlock "C13" DstPort 2 } } Branch { DstBlock "C12" DstPort 2 } } } } } } } Line { SrcBlock "FSM" SrcPort 2 Points [20, 0] Branch { Points [30, 0; 140, 0] Branch { Points [0, 160] DstBlock "C2" DstPort 3 } Branch { Points [150, 0] Branch { Points [0, 160] DstBlock "C3" DstPort 3 } Branch { Points [160, 0] Branch { Points [0, 160] DstBlock "C4" DstPort 3 } Branch { Points [145, 0] Branch { Points [0, 160] DstBlock "C5" DstPort 3 } Branch { Points [140, 0] Branch { Points [0, 160] DstBlock "C6" DstPort 3 } Branch { Points [145, 0] Branch { Points [0, 160] DstBlock "C7" DstPort 3 } Branch { Points [150, 0; 0, 160] DstBlock "C8" DstPort 3 } } } } } } } Branch { Points [0, 160] Branch { DstBlock "C1" DstPort 3 } Branch { Points [0, 415] Branch { Points [0, 160] DstBlock "C9" DstPort 3 } Branch { Points [160, 0] Branch { Points [0, 160] DstBlock "C10" DstPort 3 } Branch { Points [145, 0] Branch { Points [0, 160] DstBlock "C11" DstPort 3 } Branch { Points [140, 0] Branch { Points [145, 0] Branch { Points [150, 0] Branch { Points [135, 0] Branch { Points [0, 160] DstBlock "C15" DstPort 3 } Branch { Points [150, 0; 0, 160] DstBlock "C16" DstPort 3 } } Branch { Points [0, 160] DstBlock "C14" DstPort 3 } } Branch { Points [0, 160] DstBlock "C13" DstPort 3 } } Branch { Points [0, 160] DstBlock "C12" DstPort 3 } } } } } } } Line { SrcBlock "FSM" SrcPort 3 Points [15, 0] Branch { Points [35, 0; 135, 0] Branch { Points [0, 145] DstBlock "C2" DstPort 4 } Branch { Points [150, 0] Branch { Points [0, 145] DstBlock "C3" DstPort 4 } Branch { Points [160, 0] Branch { Points [0, 145] DstBlock "C4" DstPort 4 } Branch { Points [145, 0] Branch { Points [0, 145] DstBlock "C5" DstPort 4 } Branch { Points [140, 0] Branch { Points [0, 145] DstBlock "C6" DstPort 4 } Branch { Points [145, 0] Branch { Points [0, 145] DstBlock "C7" DstPort 4 } Branch { Points [150, 0; 0, 145] DstBlock "C8" DstPort 4 } } } } } } } Branch { Points [0, 145] Branch { DstBlock "C1" DstPort 4 } Branch { Points [0, 430] Branch { Points [0, 145] DstBlock "C9" DstPort 4 } Branch { Points [160, 0] Branch { Points [0, 145] DstBlock "C10" DstPort 4 } Branch { Points [145, 0] Branch { Points [0, 145] DstBlock "C11" DstPort 4 } Branch { Points [140, 0] Branch { Points [140, 0] Branch { Points [155, 0] Branch { Points [135, 0] Branch { Points [0, 145] DstBlock "C15" DstPort 4 } Branch { Points [150, 0; 0, 145] DstBlock "C16" DstPort 4 } } Branch { Points [0, 145] DstBlock "C14" DstPort 4 } } Branch { Points [5, 0; 0, 145] DstBlock "C13" DstPort 4 } } Branch { Points [0, 145] DstBlock "C12" DstPort 4 } } } } } } } Line { SrcBlock "C2" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C3" DstPort 1 } Line { SrcBlock "C3" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C4" DstPort 1 } Line { SrcBlock "C3" SrcPort 1 Points [0, 100; 125, 0] DstBlock "AddSub12" DstPort 1 } Line { SrcBlock "C4" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C5" DstPort 1 } Line { SrcBlock "C4" SrcPort 1 DstBlock "Delay13" DstPort 1 } Line { SrcBlock "C5" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C6" DstPort 1 } Line { SrcBlock "C6" SrcPort 2 Points [10, 0; 0, -50] DstBlock "C7" DstPort 1 } Line { SrcBlock "From" SrcPort 1 DstBlock "C9" DstPort 1 } Line { SrcBlock "C9" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C10" DstPort 1 } Line { SrcBlock "C10" SrcPort 2 Points [20, 0; 0, -50] DstBlock "C11" DstPort 1 } Line { SrcBlock "C11" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C12" DstPort 1 } Line { SrcBlock "C12" SrcPort 2 Points [10, 0; 0, -50] DstBlock "C13" DstPort 1 } Line { SrcBlock "Delay13" SrcPort 1 DstBlock "AddSub12" DstPort 2 } Line { SrcBlock "AddSub12" SrcPort 1 DstBlock "Delay14" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "C1" SrcPort 1 Points [0, 110] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "C5" SrcPort 1 Points [0, 100; 120, 0] DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "C6" SrcPort 1 Points [5, 0] DstBlock "Delay1" DstPort 1 } Line { SrcBlock "C7" SrcPort 2 Points [20, 0; 0, -50] DstBlock "C8" DstPort 1 } Line { SrcBlock "Delay4" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "Delay5" DstPort 1 } Line { SrcBlock "C7" SrcPort 1 Points [0, 85; 140, 0] DstBlock "AddSub3" DstPort 1 } Line { SrcBlock "C8" SrcPort 1 Points [20, 0] DstBlock "Delay4" DstPort 1 } Line { SrcBlock "C9" SrcPort 1 Points [0, 105; 130, 0] DstBlock "AddSub5" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "AddSub5" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "C10" SrcPort 1 Points [5, 0] DstBlock "Delay6" DstPort 1 } Line { SrcBlock "C8" SrcPort 2 DstBlock "Goto" DstPort 1 } Line { SrcBlock "Delay14" SrcPort 1 DstBlock "AddSub13" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 40] DstBlock "AddSub13" DstPort 1 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "Delay5" SrcPort 1 Points [0, 5] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub13" SrcPort 1 Points [0, 5; 305, 0] DstBlock "AddSub4" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 Points [0, 10; -275, 0] DstBlock "AddSub4" DstPort 2 } Line { SrcBlock "AddSub4" SrcPort 1 Points [0, 15; 475, 0] DstBlock "AddSub8" DstPort 1 } Line { SrcBlock "C11" SrcPort 1 Points [0, 105] DstBlock "AddSub7" DstPort 1 } Line { SrcBlock "Delay8" SrcPort 1 DstBlock "AddSub7" DstPort 2 } Line { SrcBlock "AddSub7" SrcPort 1 DstBlock "Delay9" DstPort 1 } Line { SrcBlock "C12" SrcPort 1 Points [5, 0] DstBlock "Delay8" DstPort 1 } Line { SrcBlock "Delay7" SrcPort 1 Points [0, 5; 130, 0] DstBlock "AddSub6" DstPort 1 } Line { SrcBlock "Delay9" SrcPort 1 Points [-135, 0] DstBlock "AddSub6" DstPort 2 } Line { SrcBlock "AddSub8" SrcPort 1 DstBlock "y" DstPort 1 } Line { SrcBlock "C13" SrcPort 1 Points [10, 0; 0, 105] DstBlock "AddSub10" DstPort 1 } Line { SrcBlock "AddSub6" SrcPort 1 Points [260, 0] Branch { Points [0, 105] DstBlock "Gateway Out7" DstPort 1 } Branch { DstBlock "AddSub9" DstPort 1 } } Line { SrcBlock "AddSub9" SrcPort 1 Points [90, 0] Branch { Points [430, 0] DstBlock "AddSub8" DstPort 2 } Branch { Points [0, 60] DstBlock "Gateway Out8" DstPort 1 } } } } Block { BlockType SubSystem Name "C3" SID "6078" Ports [1, 1] Position [540, 308, 625, 372] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Num sub-correlator|Coefficients/correlator|Coefficients|Input sample period" MaskStyleString "edit,edit,edit,edit" MaskVariables "ns=@1;N=@2;h=@3;Ts_In=@4;" MaskTunableValueString "on,on,on,on" MaskCallbackString "|||" MaskEnableString "on,on,on,on" MaskVisibilityString "on,on,on,on" MaskToolTipString "on,on,on,on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "0|4|longCorr_coef_i|4" System { Name "C3" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "76" Block { BlockType Inport Name "x" SID "6079" Position [35, 183, 65, 197] IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6080" Ports [2, 1] Position [394, 325, 441, 365] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e139daf6,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "6081" Ports [2, 1] Position [989, 320, 1036, 360] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub10" SID "6082" Ports [2, 1] Position [969, 895, 1016, 935] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub11" SID "6083" Ports [2, 1] Position [1284, 890, 1331, 930] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub12" SID "6084" Ports [2, 1] Position [699, 325, 746, 365] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub13" SID "6085" Ports [2, 1] Position [555, 425, 595, 465] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 6 0 5 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub14" SID "6086" Ports [2, 1] Position [1140, 1010, 1180, 1050] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 6 0 5 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub2" SID "6087" Ports [2, 1] Position [1160, 420, 1200, 460] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 6 0 5 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub3" SID "6088" Ports [2, 1] Position [1299, 315, 1346, 355] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub4" SID "6089" Ports [2, 1] Position [869, 500, 916, 540] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[4 7 0 6 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub5" SID "6090" Ports [2, 1] Position [384, 900, 431, 940] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub6" SID "6091" Ports [2, 1] Position [530, 1010, 570, 1050] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 6 0 5 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub7" SID "6092" Ports [2, 1] Position [669, 895, 716, 935] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub8" SID "6093" Ports [2, 1] Position [1385, 830, 1425, 870] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[4 8 0 7 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub9" SID "6094" Ports [2, 1] Position [830, 1070, 870, 1110] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[4 7 0 6 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "C1" SID "6095" Ports [4, 2] Position [180, 178, 265, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(1:N)" System { Name "C1" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6096" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6097" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6098" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6099" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample2" SID "6100" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6101" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6102" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6103" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6104" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6105" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6106" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6107" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6108" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6109" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6110" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6111" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,401" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6112" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6113" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6114" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "xn" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C10" SID "6115" Ports [4, 2] Position [325, 753, 410, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(9*N+1:10*N)" System { Name "C10" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6116" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6117" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6118" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6119" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6120" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6121" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6122" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6123" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6124" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6125" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6126" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6127" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6128" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6129" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6130" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6131" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6132" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6133" Ports [1, 1] Position [245, 143, 295, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6134" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6135" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 Points [120, 0] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C11" SID "6136" Ports [4, 2] Position [470, 753, 555, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(10*N+1:11*N)" System { Name "C11" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6137" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6138" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6139" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6140" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6141" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6142" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6143" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6144" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6145" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6146" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6147" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6148" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6149" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6150" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6151" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6152" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6153" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6154" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6155" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6156" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C12" SID "6157" Ports [4, 2] Position [610, 753, 695, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(11*N+1:12*N)" System { Name "C12" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6158" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6159" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6160" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6161" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6162" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6163" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6164" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6165" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6166" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6167" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6168" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6169" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6170" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6171" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6172" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6173" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6174" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6175" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6176" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6177" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C13" SID "6178" Ports [4, 2] Position [760, 753, 845, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(12*N+1:13*N)" System { Name "C13" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6179" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6180" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6181" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6182" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6183" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6184" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6185" Ports [3, 1] Position [375, 82, 460, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6186" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6187" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6188" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6189" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6190" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6191" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6192" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6193" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6194" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6195" Ports [2, 1] Position [250, 70, 295, 130] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6196" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6197" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6198" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C14" SID "6199" Ports [4, 2] Position [905, 753, 990, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(13*N+1:14*N)" System { Name "C14" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6200" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6201" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6202" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6203" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6204" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6205" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6206" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6207" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6208" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6209" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6210" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6211" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6212" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6213" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6214" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6215" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6216" Ports [2, 1] Position [250, 70, 295, 130] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6217" Ports [1, 1] Position [245, 143, 295, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6218" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6219" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 Points [120, 0] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C15" SID "6220" Ports [4, 2] Position [1040, 753, 1125, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(14*N+1:15*N)" System { Name "C15" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6221" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6222" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6223" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6224" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6225" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6226" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6227" Ports [3, 1] Position [385, 82, 470, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6228" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6229" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6230" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6231" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6232" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6233" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6234" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6235" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6236" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6237" Ports [2, 1] Position [250, 70, 295, 130] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6238" Ports [1, 1] Position [250, 133, 300, 177] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6239" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6240" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 Points [125, 0] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C16" SID "6241" Ports [4, 2] Position [1190, 753, 1275, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(15*N+1:16*N)" System { Name "C16" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6242" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6243" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6244" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6245" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6246" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6247" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6248" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6249" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6250" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6251" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6252" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6253" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6254" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6255" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6256" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6257" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6258" Ports [2, 1] Position [250, 70, 295, 130] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6259" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6260" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6261" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C2" SID "6262" Ports [4, 2] Position [340, 178, 425, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(N+1:2*N)" System { Name "C2" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6263" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6264" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6265" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6266" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6267" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6268" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6269" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6270" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6271" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6272" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6273" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6274" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6275" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6276" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6277" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6278" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6279" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,401" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6280" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6281" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6282" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C3" SID "6283" Ports [4, 2] Position [495, 178, 580, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(2*N+1:3*N)" System { Name "C3" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6284" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6285" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6286" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6287" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6288" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6289" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6290" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6291" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6292" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6293" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6294" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6295" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6296" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6297" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6298" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6299" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6300" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6301" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6302" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6303" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C4" SID "6304" Ports [4, 2] Position [645, 178, 730, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(3*N+1:4*N)" System { Name "C4" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6305" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6306" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6307" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6308" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6309" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6310" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6311" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6312" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6313" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6314" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6315" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6316" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6317" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6318" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6319" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6320" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6321" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6322" Ports [1, 1] Position [245, 143, 295, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6323" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6324" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 Points [120, 0] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C5" SID "6325" Ports [4, 2] Position [790, 178, 875, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(4*N+1:5*N)" System { Name "C5" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6326" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6327" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6328" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6329" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6330" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6331" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6332" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6333" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6334" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6335" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6336" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6337" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6338" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6339" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6340" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6341" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6342" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6343" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6344" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6345" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C6" SID "6346" Ports [4, 2] Position [930, 178, 1015, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(5*N+1:6*N)" System { Name "C6" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6347" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6348" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6349" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6350" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6351" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6352" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6353" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6354" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6355" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6356" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6357" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6358" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6359" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6360" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6361" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6362" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6363" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6364" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6365" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6366" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C7" SID "6367" Ports [4, 2] Position [1080, 178, 1165, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(6*N+1:7*N)" System { Name "C7" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6368" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6369" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6370" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6371" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6372" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6373" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6374" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6375" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6376" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6377" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6378" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6379" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6380" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6381" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6382" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6383" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6384" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6385" Ports [1, 1] Position [250, 143, 300, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6386" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6387" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 Points [120, 0; 0, 5] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C8" SID "6388" Ports [4, 2] Position [1225, 178, 1310, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(7*N+1:8*N)" System { Name "C8" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6389" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6390" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6391" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6392" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6393" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6394" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6395" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6396" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6397" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6398" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6399" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6400" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6401" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6402" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6403" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6404" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6405" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6406" Ports [1, 1] Position [240, 138, 290, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6407" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6408" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [10, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C9" SID "6409" Ports [4, 2] Position [175, 753, 260, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(8*N+1:9*N)" System { Name "C9" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6410" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6411" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6412" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6413" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6414" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6415" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6416" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6417" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6418" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6419" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6420" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6421" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6422" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6423" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6424" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6425" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6426" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6427" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6428" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6429" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType Reference Name "Delay1" SID "6430" Ports [1, 1] Position [1012, 280, 1038, 305] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay10" SID "6431" Ports [1, 1] Position [982, 950, 1008, 975] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*12)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 15 0 15 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,05283a76,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-35" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay11" SID "6432" Ports [1, 1] Position [1297, 950, 1323, 975] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*14)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 15 0 15 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,885a193d,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-41" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay12" SID "6433" Ports [1, 1] Position [992, 850, 1018, 875] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay13" SID "6434" Ports [1, 1] Position [722, 285, 748, 310] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay14" SID "6435" Ports [1, 1] Position [712, 380, 738, 405] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*2)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[3 5 0 5 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,ec356abf,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-5}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay15" SID "6436" Ports [1, 1] Position [1307, 845, 1333, 870] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "6437" Ports [1, 1] Position [1002, 375, 1028, 400] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*4)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[3 5 0 5 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,1a71059f,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-11" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "6438" Ports [1, 1] Position [417, 275, 443, 300] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "6439" Ports [1, 1] Position [1322, 275, 1348, 300] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "6440" Ports [1, 1] Position [1312, 370, 1338, 395] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*6)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[6 10 0 10 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,1003b046,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-17" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "6441" Ports [1, 1] Position [407, 850, 433, 875] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "6442" Ports [1, 1] Position [397, 955, 423, 980] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*8)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[6 10 0 10 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,b88b7ef0,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-23" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay8" SID "6443" Ports [1, 1] Position [692, 845, 718, 870] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay9" SID "6444" Ports [1, 1] Position [682, 960, 708, 985] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*10)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 15 0 15 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,e3412ff7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-29" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "FSM" SID "6445" Ports [0, 3] Position [15, 14, 120, 126] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "FSM" Location [2, 74, 1184, 1000] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Coef Addr Gen" SID "6446" Ports [1, 1] Position [230, 103, 280, 147] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(length(h(1:N))))" bin_pt "0" load_pin off rst on en off explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[2 3 0 3 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,803eba70,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'rst');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('" "','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant2" SID "6447" Ports [0, 1] Position [25, 122, 60, 148] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(length(h(1:N))/2))+1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2/N" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant3" SID "6448" Ports [0, 1] Position [330, 182, 365, 208] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "length(h(1:N))-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(length(h(1:N))))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2/N" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,26,0,1,white,blue,0,279a71c8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'3');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Data Addr Gen" SID "6449" Ports [0, 1] Position [235, 33, 285, 77] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Count Limited" cnt_to "length(h(1:N))-1" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(length(h(1:N))))" bin_pt "0" load_pin off rst off en off explicit_period "on" period "Ts_In/N" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,0,1,white,blue,0,4b061529,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor" "('black');disp('{\\fontsize{14}\\bf\\lceil++\\rceil}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" SID "6450" Ports [1, 1] Position [325, 113, 350, 137] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 3 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out" SID "6451" Ports [1, 1] Position [670, 295, 705, 305] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out1" SID "6452" Ports [1, 1] Position [670, 310, 705, 320] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out3" SID "6453" Ports [1, 1] Position [670, 325, 705, 335] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Scope Name "Long Corr\nScope" SID "6454" Ports [3] Position [760, 290, 795, 340] Floating off Location [-1208, 112, 72, 1092] Open off NumInputPorts "3" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" } YMin "-1~-1~-35" YMax "1~1~25" SaveName "ScopeData4" DataFormat "StructureWithTime" SampleTime "0" } Block { BlockType Reference Name "Relational2" SID "6455" Ports [2, 1] Position [120, 103, 165, 147] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[1 1 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,3618233f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "6456" Ports [2, 1] Position [455, 163, 500, 207] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[1 1 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,3618233f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6457" Ports [1, 1] Position [540, 171, 560, 199] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,28,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 28 28 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[16.22 16." "22 18.22 16.22 18.22 18.22 18.22 16.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[14.22 14.22 16.22 16.22" " 14.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[12.22 12.22 14.22 14.22 12.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 10.22 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]" ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_la" "bel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Data Addr" SID "6458" Position [455, 48, 485, 62] IconDisplay "Port number" } Block { BlockType Outport Name "Coef Addr" SID "6459" Position [455, 118, 485, 132] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "load" SID "6460" Position [615, 178, 645, 192] Port "3" IconDisplay "Port number" } Line { SrcBlock "bc3" SrcPort 1 DstBlock "load" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 Points [15, 0] Branch { DstBlock "bc3" DstPort 1 } Branch { Points [0, 145] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Delay1" SrcPort 1 Points [0, 0; 25, 0] Branch { DstBlock "Coef Addr" DstPort 1 } Branch { Points [0, 50] DstBlock "Relational3" DstPort 1 } } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Coef Addr Gen" DstPort 1 } Line { SrcBlock "Coef Addr Gen" SrcPort 1 Points [20, 0] Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, 190] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "Data Addr Gen" SrcPort 1 Points [60, 0] Branch { Points [0, -40; -285, 0; 0, 100] DstBlock "Relational2" DstPort 1 } Branch { DstBlock "Data Addr" DstPort 1 } Branch { Points [0, 245] DstBlock "Gateway Out" DstPort 1 } } Line { SrcBlock "Gateway Out" SrcPort 1 Points [0, 0] DstBlock "Long Corr\nScope" DstPort 1 } Line { SrcBlock "Gateway Out1" SrcPort 1 Points [0, 0] DstBlock "Long Corr\nScope" DstPort 2 } Line { SrcBlock "Gateway Out3" SrcPort 1 Points [0, 0] DstBlock "Long Corr\nScope" DstPort 3 } } } Block { BlockType From Name "From" SID "6461" Position [85, 751, 125, 779] CloseFcn "tagdialog Close" GotoTag "xnz" } Block { BlockType Reference Name "Gateway Out6" SID "6462" Ports [1, 1] Position [1015, 1140, 1050, 1150] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Gateway Out7" SID "6463" Ports [1, 1] Position [1015, 1155, 1050, 1165] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Gateway Out8" SID "6464" Ports [1, 1] Position [1015, 1170, 1050, 1180] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Goto Name "Goto" SID "6465" Position [1355, 225, 1395, 255] GotoTag "xnz" TagVisibility "local" } Block { BlockType Scope Name "Long Corr\nScope2" SID "6466" Ports [3] Position [1110, 1137, 1140, 1183] Floating off Location [21, 181, 952, 967] Open off NumInputPorts "3" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" } YMin "-0.35~-0.175~0" YMax "0.35~0.225~1300" SaveName "ScopeData8" DataFormat "StructureWithTime" SampleTime "0" } Block { BlockType Outport Name "y" SID "6467" Position [1465, 843, 1495, 857] IconDisplay "Port number" } Line { SrcBlock "AddSub9" SrcPort 1 Points [90, 0] Branch { Points [0, 60] DstBlock "Gateway Out8" DstPort 1 } Branch { Points [430, 0] DstBlock "AddSub8" DstPort 2 } } Line { SrcBlock "AddSub6" SrcPort 1 Points [260, 0] Branch { DstBlock "AddSub9" DstPort 1 } Branch { Points [0, 105] DstBlock "Gateway Out7" DstPort 1 } } Line { SrcBlock "C13" SrcPort 1 Points [10, 0; 0, 105] DstBlock "AddSub10" DstPort 1 } Line { SrcBlock "AddSub8" SrcPort 1 DstBlock "y" DstPort 1 } Line { SrcBlock "Delay9" SrcPort 1 Points [-135, 0] DstBlock "AddSub6" DstPort 2 } Line { SrcBlock "Delay7" SrcPort 1 Points [0, 5; 130, 0] DstBlock "AddSub6" DstPort 1 } Line { SrcBlock "C12" SrcPort 1 Points [5, 0] DstBlock "Delay8" DstPort 1 } Line { SrcBlock "AddSub7" SrcPort 1 DstBlock "Delay9" DstPort 1 } Line { SrcBlock "Delay8" SrcPort 1 DstBlock "AddSub7" DstPort 2 } Line { SrcBlock "C11" SrcPort 1 Points [0, 105] DstBlock "AddSub7" DstPort 1 } Line { SrcBlock "AddSub4" SrcPort 1 Points [0, 15; 475, 0] DstBlock "AddSub8" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 Points [0, 10; -275, 0] DstBlock "AddSub4" DstPort 2 } Line { SrcBlock "AddSub13" SrcPort 1 Points [0, 5; 305, 0] DstBlock "AddSub4" DstPort 1 } Line { SrcBlock "Delay5" SrcPort 1 Points [0, 5] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 40] DstBlock "AddSub13" DstPort 1 } Line { SrcBlock "Delay14" SrcPort 1 DstBlock "AddSub13" DstPort 2 } Line { SrcBlock "C8" SrcPort 2 DstBlock "Goto" DstPort 1 } Line { SrcBlock "C10" SrcPort 1 Points [5, 0] DstBlock "Delay6" DstPort 1 } Line { SrcBlock "AddSub5" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "C9" SrcPort 1 Points [0, 105; 130, 0] DstBlock "AddSub5" DstPort 1 } Line { SrcBlock "C8" SrcPort 1 Points [20, 0] DstBlock "Delay4" DstPort 1 } Line { SrcBlock "C7" SrcPort 1 Points [0, 85; 140, 0] DstBlock "AddSub3" DstPort 1 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "Delay5" DstPort 1 } Line { SrcBlock "Delay4" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "C7" SrcPort 2 Points [20, 0; 0, -50] DstBlock "C8" DstPort 1 } Line { SrcBlock "C6" SrcPort 1 Points [5, 0] DstBlock "Delay1" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "C5" SrcPort 1 Points [0, 100; 120, 0] DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "C1" SrcPort 1 Points [0, 110] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub12" SrcPort 1 DstBlock "Delay14" DstPort 1 } Line { SrcBlock "Delay13" SrcPort 1 DstBlock "AddSub12" DstPort 2 } Line { SrcBlock "C12" SrcPort 2 Points [10, 0; 0, -50] DstBlock "C13" DstPort 1 } Line { SrcBlock "C11" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C12" DstPort 1 } Line { SrcBlock "C10" SrcPort 2 Points [20, 0; 0, -50] DstBlock "C11" DstPort 1 } Line { SrcBlock "C9" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C10" DstPort 1 } Line { SrcBlock "From" SrcPort 1 DstBlock "C9" DstPort 1 } Line { SrcBlock "C6" SrcPort 2 Points [10, 0; 0, -50] DstBlock "C7" DstPort 1 } Line { SrcBlock "C5" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C6" DstPort 1 } Line { SrcBlock "C4" SrcPort 1 DstBlock "Delay13" DstPort 1 } Line { SrcBlock "C4" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C5" DstPort 1 } Line { SrcBlock "C3" SrcPort 1 Points [0, 100; 125, 0] DstBlock "AddSub12" DstPort 1 } Line { SrcBlock "C3" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C4" DstPort 1 } Line { SrcBlock "C2" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C3" DstPort 1 } Line { SrcBlock "FSM" SrcPort 3 Points [15, 0] Branch { Points [0, 145] Branch { Points [0, 430] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { Points [0, 145] DstBlock "C12" DstPort 4 } Branch { Points [140, 0] Branch { Points [5, 0; 0, 145] DstBlock "C13" DstPort 4 } Branch { Points [155, 0] Branch { Points [0, 145] DstBlock "C14" DstPort 4 } Branch { Points [135, 0] Branch { Points [150, 0; 0, 145] DstBlock "C16" DstPort 4 } Branch { Points [0, 145] DstBlock "C15" DstPort 4 } } } } } Branch { Points [0, 145] DstBlock "C11" DstPort 4 } } Branch { Points [0, 145] DstBlock "C10" DstPort 4 } } Branch { Points [0, 145] DstBlock "C9" DstPort 4 } } Branch { DstBlock "C1" DstPort 4 } } Branch { Points [35, 0; 135, 0] Branch { Points [150, 0] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { Points [145, 0] Branch { Points [150, 0; 0, 145] DstBlock "C8" DstPort 4 } Branch { Points [0, 145] DstBlock "C7" DstPort 4 } } Branch { Points [0, 145] DstBlock "C6" DstPort 4 } } Branch { Points [0, 145] DstBlock "C5" DstPort 4 } } Branch { Points [0, 145] DstBlock "C4" DstPort 4 } } Branch { Points [0, 145] DstBlock "C3" DstPort 4 } } Branch { Points [0, 145] DstBlock "C2" DstPort 4 } } } Line { SrcBlock "FSM" SrcPort 2 Points [20, 0] Branch { Points [0, 160] Branch { Points [0, 415] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { Points [0, 160] DstBlock "C12" DstPort 3 } Branch { Points [145, 0] Branch { Points [0, 160] DstBlock "C13" DstPort 3 } Branch { Points [150, 0] Branch { Points [0, 160] DstBlock "C14" DstPort 3 } Branch { Points [135, 0] Branch { Points [150, 0; 0, 160] DstBlock "C16" DstPort 3 } Branch { Points [0, 160] DstBlock "C15" DstPort 3 } } } } } Branch { Points [0, 160] DstBlock "C11" DstPort 3 } } Branch { Points [0, 160] DstBlock "C10" DstPort 3 } } Branch { Points [0, 160] DstBlock "C9" DstPort 3 } } Branch { DstBlock "C1" DstPort 3 } } Branch { Points [30, 0; 140, 0] Branch { Points [150, 0] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { Points [145, 0] Branch { Points [150, 0; 0, 160] DstBlock "C8" DstPort 3 } Branch { Points [0, 160] DstBlock "C7" DstPort 3 } } Branch { Points [0, 160] DstBlock "C6" DstPort 3 } } Branch { Points [0, 160] DstBlock "C5" DstPort 3 } } Branch { Points [0, 160] DstBlock "C4" DstPort 3 } } Branch { Points [0, 160] DstBlock "C3" DstPort 3 } } Branch { Points [0, 160] DstBlock "C2" DstPort 3 } } } Line { SrcBlock "FSM" SrcPort 1 Points [25, 0] Branch { Points [0, 175] Branch { Points [0, 400] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { DstBlock "C12" DstPort 2 } Branch { Points [145, 0] Branch { Points [0, 175] DstBlock "C13" DstPort 2 } Branch { Points [150, 0] Branch { Points [0, 0] DstBlock "C14" DstPort 2 } Branch { Points [135, 0] Branch { Points [150, 0] DstBlock "C16" DstPort 2 } Branch { DstBlock "C15" DstPort 2 } } } } } Branch { DstBlock "C11" DstPort 2 } } Branch { DstBlock "C10" DstPort 2 } } Branch { Points [0, 175] DstBlock "C9" DstPort 2 } } Branch { DstBlock "C1" DstPort 2 } } Branch { Points [0, 0; 170, 0] Branch { Points [150, 0] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { Points [145, 0] Branch { Points [150, 0] DstBlock "C8" DstPort 2 } Branch { Points [0, 175] DstBlock "C7" DstPort 2 } } Branch { DstBlock "C6" DstPort 2 } } Branch { DstBlock "C5" DstPort 2 } } Branch { DstBlock "C4" DstPort 2 } } Branch { Points [0, 175] DstBlock "C3" DstPort 2 } } Branch { Points [0, 175] DstBlock "C2" DstPort 2 } } } Line { SrcBlock "C1" SrcPort 2 Points [25, 0; 0, -50] DstBlock "C2" DstPort 1 } Line { SrcBlock "C2" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "x" SrcPort 1 DstBlock "C1" DstPort 1 } Line { SrcBlock "C13" SrcPort 2 Points [25, 0; 0, -50] DstBlock "C14" DstPort 1 } Line { SrcBlock "C14" SrcPort 2 Points [15, 0; 0, -50] DstBlock "C15" DstPort 1 } Line { SrcBlock "C15" SrcPort 2 Points [30, 0; 0, -50] DstBlock "C16" DstPort 1 } Line { SrcBlock "C15" SrcPort 1 Points [15, 0; 0, 100] DstBlock "AddSub11" DstPort 1 } Line { SrcBlock "C14" SrcPort 1 Points [10, 0] DstBlock "Delay12" DstPort 1 } Line { SrcBlock "C16" SrcPort 1 Points [40, 0] DstBlock "Delay15" DstPort 1 } Line { SrcBlock "Delay12" SrcPort 1 DstBlock "AddSub10" DstPort 2 } Line { SrcBlock "Delay15" SrcPort 1 DstBlock "AddSub11" DstPort 2 } Line { SrcBlock "AddSub10" SrcPort 1 DstBlock "Delay10" DstPort 1 } Line { SrcBlock "AddSub11" SrcPort 1 DstBlock "Delay11" DstPort 1 } Line { SrcBlock "Delay10" SrcPort 1 Points [0, 5; 155, 0] DstBlock "AddSub14" DstPort 1 } Line { SrcBlock "Delay11" SrcPort 1 Points [0, 5; -140, 0] DstBlock "AddSub14" DstPort 2 } Line { SrcBlock "AddSub14" SrcPort 1 Points [-245, 0] Branch { DstBlock "AddSub9" DstPort 2 } Branch { Points [0, 90] DstBlock "Gateway Out6" DstPort 1 } } Line { SrcBlock "Gateway Out6" SrcPort 1 DstBlock "Long Corr\nScope2" DstPort 1 } Line { SrcBlock "Gateway Out7" SrcPort 1 DstBlock "Long Corr\nScope2" DstPort 2 } Line { SrcBlock "Gateway Out8" SrcPort 1 DstBlock "Long Corr\nScope2" DstPort 3 } } } Block { BlockType SubSystem Name "C4" SID "6468" Ports [1, 1] Position [540, 228, 625, 292] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Num sub-correlator|Coefficients/correlator|Coefficients|Input sample period" MaskStyleString "edit,edit,edit,edit" MaskVariables "ns=@1;N=@2;h=@3;Ts_In=@4;" MaskTunableValueString "on,on,on,on" MaskCallbackString "|||" MaskEnableString "on,on,on,on" MaskVisibilityString "on,on,on,on" MaskToolTipString "on,on,on,on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "0|4|longCorr_coef_q|4" System { Name "C4" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "76" Block { BlockType Inport Name "x" SID "6469" Position [35, 183, 65, 197] IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6470" Ports [2, 1] Position [394, 325, 441, 365] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e139daf6,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "6471" Ports [2, 1] Position [989, 320, 1036, 360] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub10" SID "6472" Ports [2, 1] Position [969, 895, 1016, 935] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub11" SID "6473" Ports [2, 1] Position [1284, 890, 1331, 930] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub12" SID "6474" Ports [2, 1] Position [699, 325, 746, 365] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub13" SID "6475" Ports [2, 1] Position [555, 425, 595, 465] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 6 0 5 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub14" SID "6476" Ports [2, 1] Position [1140, 1010, 1180, 1050] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 6 0 5 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub2" SID "6477" Ports [2, 1] Position [1160, 420, 1200, 460] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 6 0 5 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub3" SID "6478" Ports [2, 1] Position [1299, 315, 1346, 355] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub4" SID "6479" Ports [2, 1] Position [869, 500, 916, 540] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[4 7 0 6 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub5" SID "6480" Ports [2, 1] Position [384, 900, 431, 940] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub6" SID "6481" Ports [2, 1] Position [530, 1010, 570, 1050] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 6 0 5 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub7" SID "6482" Ports [2, 1] Position [669, 895, 716, 935] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[3 5 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "47,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 47 47 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 47 47 0 0 ],[0 0 40 40 0 ]);\npatch([11.875 19.1 24.1 29.1 34.1 24.1 16.875 11.875 ],[25.55 25.55 3" "0.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([16.875 24.1 19.1 11.875 16.875 ],[20.55 20.55 25.55 25.55 " "20.55 ],[0.931 0.946 0.973 ]);\npatch([11.875 19.1 24.1 16.875 11.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ])" ";\npatch([16.875 34.1 29.1 24.1 19.1 11.875 16.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub8" SID "6483" Ports [2, 1] Position [1385, 830, 1425, 870] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[4 8 0 7 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub9" SID "6484" Ports [2, 1] Position [830, 1070, 870, 1110] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[4 7 0 6 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,e85d8a90,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline\\bf{}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "C1" SID "6485" Ports [4, 2] Position [180, 178, 265, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(1:N)" System { Name "C1" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6486" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6487" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6488" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6489" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample2" SID "6490" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6491" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6492" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6493" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6494" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6495" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6496" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6497" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6498" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6499" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6500" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6501" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,401" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6502" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6503" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6504" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "xn" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C10" SID "6505" Ports [4, 2] Position [325, 753, 410, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(9*N+1:10*N)" System { Name "C10" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6506" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6507" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6508" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6509" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6510" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6511" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6512" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6513" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6514" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6515" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6516" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6517" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6518" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6519" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6520" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6521" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6522" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6523" Ports [1, 1] Position [245, 143, 295, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6524" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6525" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 Points [120, 0] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C11" SID "6526" Ports [4, 2] Position [470, 753, 555, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(10*N+1:11*N)" System { Name "C11" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6527" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6528" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6529" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6530" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6531" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6532" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6533" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6534" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6535" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6536" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6537" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6538" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6539" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6540" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6541" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6542" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6543" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6544" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6545" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6546" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C12" SID "6547" Ports [4, 2] Position [610, 753, 695, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(11*N+1:12*N)" System { Name "C12" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6548" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6549" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6550" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6551" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6552" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6553" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6554" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6555" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6556" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6557" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6558" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6559" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6560" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6561" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6562" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6563" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6564" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6565" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6566" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6567" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C13" SID "6568" Ports [4, 2] Position [760, 753, 845, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(12*N+1:13*N)" System { Name "C13" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6569" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6570" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6571" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6572" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6573" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6574" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6575" Ports [3, 1] Position [375, 82, 460, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6576" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6577" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6578" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6579" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6580" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6581" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6582" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6583" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6584" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6585" Ports [2, 1] Position [250, 70, 295, 130] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6586" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6587" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6588" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C14" SID "6589" Ports [4, 2] Position [905, 753, 990, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(13*N+1:14*N)" System { Name "C14" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6590" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6591" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6592" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6593" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6594" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6595" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6596" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6597" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6598" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6599" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6600" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6601" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6602" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6603" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6604" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6605" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6606" Ports [2, 1] Position [250, 70, 295, 130] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6607" Ports [1, 1] Position [245, 143, 295, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6608" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6609" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 Points [120, 0] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C15" SID "6610" Ports [4, 2] Position [1040, 753, 1125, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(14*N+1:15*N)" System { Name "C15" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6611" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6612" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6613" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6614" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6615" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6616" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6617" Ports [3, 1] Position [385, 82, 470, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6618" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6619" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6620" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6621" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6622" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6623" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6624" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6625" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6626" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6627" Ports [2, 1] Position [250, 70, 295, 130] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6628" Ports [1, 1] Position [250, 133, 300, 177] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6629" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6630" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 Points [125, 0] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C16" SID "6631" Ports [4, 2] Position [1190, 753, 1275, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(15*N+1:16*N)" System { Name "C16" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6632" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6633" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6634" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6635" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6636" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6637" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6638" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6639" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6640" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6641" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6642" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6643" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6644" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6645" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6646" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6647" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6648" Ports [2, 1] Position [250, 70, 295, 130] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6649" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6650" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6651" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } } } Block { BlockType SubSystem Name "C2" SID "6652" Ports [4, 2] Position [340, 178, 425, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(N+1:2*N)" System { Name "C2" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6653" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6654" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6655" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6656" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6657" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6658" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6659" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6660" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6661" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6662" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6663" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6664" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6665" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6666" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6667" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6668" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6669" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,401" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6670" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6671" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6672" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C3" SID "6673" Ports [4, 2] Position [495, 178, 580, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(2*N+1:3*N)" System { Name "C3" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6674" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6675" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6676" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6677" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6678" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6679" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6680" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6681" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6682" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6683" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6684" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6685" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6686" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6687" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6688" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6689" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6690" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6691" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6692" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6693" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C4" SID "6694" Ports [4, 2] Position [645, 178, 730, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(3*N+1:4*N)" System { Name "C4" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6695" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6696" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6697" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6698" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6699" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6700" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6701" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6702" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6703" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6704" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6705" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6706" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6707" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6708" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6709" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6710" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6711" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6712" Ports [1, 1] Position [245, 143, 295, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6713" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6714" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 Points [120, 0] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C5" SID "6715" Ports [4, 2] Position [790, 178, 875, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(4*N+1:5*N)" System { Name "C5" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6716" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6717" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6718" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6719" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6720" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6721" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6722" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6723" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6724" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6725" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6726" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6727" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6728" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6729" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6730" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6731" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6732" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6733" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6734" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6735" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C6" SID "6736" Ports [4, 2] Position [930, 178, 1015, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(5*N+1:6*N)" System { Name "C6" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6737" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6738" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6739" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6740" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6741" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6742" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6743" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6744" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6745" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6746" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6747" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6748" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6749" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6750" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6751" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6752" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6753" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6754" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6755" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6756" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C7" SID "6757" Ports [4, 2] Position [1080, 178, 1165, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(6*N+1:7*N)" System { Name "C7" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6758" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6759" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6760" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6761" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6762" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6763" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6764" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6765" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6766" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6767" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6768" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6769" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6770" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6771" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6772" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6773" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6774" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6775" Ports [1, 1] Position [250, 143, 300, 187] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6776" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6777" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 Points [120, 0; 0, 5] DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C8" SID "6778" Ports [4, 2] Position [1225, 178, 1310, 262] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(7*N+1:8*N)" System { Name "C8" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6779" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6780" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6781" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6782" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6783" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6784" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6785" Ports [3, 1] Position [380, 82, 465, 178] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6786" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6787" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6788" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6789" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6790" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6791" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6792" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6793" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6794" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6795" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6796" Ports [1, 1] Position [240, 138, 290, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6797" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6798" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [10, 0; 0, -30] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -40] DstBlock "MAC" DstPort 3 } } } Block { BlockType SubSystem Name "C9" SID "6799" Ports [4, 2] Position [175, 753, 260, 837] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Coefficients" MaskStyleString "edit" MaskVariables "coef2=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "h(8*N+1:9*N)" System { Name "C9" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "xn" SID "6800" Position [75, 78, 105, 92] IconDisplay "Port number" } Block { BlockType Inport Name "DAddr" SID "6801" Position [75, 108, 105, 122] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CAddr" SID "6802" Position [75, 153, 105, 167] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "LD" SID "6803" Position [75, 193, 105, 207] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Down Sample1" SID "6804" Ports [1, 1] Position [160, 71, 190, 99] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 3 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "6805" Ports [1, 1] Position [520, 116, 550, 144] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "length(coef2)" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[5 5 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,ab0018e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MAC" SID "6806" Ports [3, 1] Position [380, 87, 465, 183] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MAC" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "a" SID "6807" Position [35, 143, 65, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "coeff" SID "6808" Position [35, 108, 65, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ld" SID "6809" Position [35, 178, 65, 192] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "6810" Ports [3, 1] Position [340, 113, 385, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition or Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "long_cor_acc_n_bits" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,02f64c57,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('input',3,'su" "b');\ncolor('black');port_label('output',1,'\\bf{a \\pm b}','texmode','on');\nfprintf('','COMMENT: end icon text" "');\n" } Block { BlockType Reference Name "Register1" SID "6811" Ports [2, 1] Position [345, 30, 385, 70] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,2,1,white,blue,0,140cc11c,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "6812" Ports [2, 1] Position [465, 110, 495, 210] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,100,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 100 100 0 ],[0.77 0." "82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 100 100 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[54.44 " "54.44 58.44 54.44 58.44 58.44 58.44 54.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[50.44 50.44 54.44 54" ".44 50.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[46.44 46.44 50.44 50.44 46.44 ],[1 1 1 ])" ";\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[42.44 42.44 46.44 42.44 46.44 46.44 42.44 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\nco" "lor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc2" SID "6813" Ports [1, 1] Position [265, 143, 290, 157] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6814" Ports [1, 1] Position [135, 178, 160, 192] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "yn" SID "6815" Position [545, 153, 575, 167] IconDisplay "Port number" } Line { SrcBlock "a" SrcPort 1 DstBlock "bc2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -95] DstBlock "Register1" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [-15, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "ld" SrcPort 1 DstBlock "bc3" DstPort 1 } Line { SrcBlock "bc3" SrcPort 1 Points [0, 0; 240, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, -125] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "bc2" SrcPort 1 DstBlock "AddSub" DstPort 3 } Line { SrcBlock "coeff" SrcPort 1 Points [95, 0; 0, 20] DstBlock "AddSub" DstPort 2 } } } Block { BlockType Reference Name "R" SID "6816" Ports [2, 1] Position [250, 70, 295, 130] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency off depth "length(coef2)" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[1 0 0 2 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,60,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 60 60 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[36.66 3" "6.66 42.66 36.66 42.66 42.66 42.66 36.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 " "36.66 30.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[24.66 24.66 30.66 30.66 24.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[18.66 18.66 24.66 18.66 24.66 24.66 18.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1" ",'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM1" SID "6817" Ports [1, 1] Position [245, 138, 295, 182] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(coef2)" initVector "coef2" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "longCorr_coef_nbits" bin_pt "longCorr_coef_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name "yn" SID "6818" Position [595, 123, 625, 137] IconDisplay "Port number" } Block { BlockType Outport Name "xnz" SID "6819" Position [595, 28, 625, 42] Port "2" IconDisplay "Port number" } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "R" DstPort 1 } Line { SrcBlock "xn" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "DAddr" SrcPort 1 DstBlock "R" DstPort 2 } Line { SrcBlock "CAddr" SrcPort 1 DstBlock "ROM1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0; 45, 0] Branch { Points [0, -65] DstBlock "xnz" DstPort 1 } Branch { Points [20, 0] DstBlock "MAC" DstPort 1 } } Line { SrcBlock "MAC" SrcPort 1 Points [0, -5] DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "yn" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 Points [5, 0; 0, -25] DstBlock "MAC" DstPort 2 } Line { SrcBlock "LD" SrcPort 1 Points [235, 0; 0, -35] DstBlock "MAC" DstPort 3 } } } Block { BlockType Reference Name "Delay1" SID "6820" Ports [1, 1] Position [1012, 280, 1038, 305] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay10" SID "6821" Ports [1, 1] Position [982, 950, 1008, 975] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*12)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 15 0 15 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,05283a76,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-35" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay11" SID "6822" Ports [1, 1] Position [1297, 950, 1323, 975] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*14)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 15 0 15 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,885a193d,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-41" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay12" SID "6823" Ports [1, 1] Position [992, 850, 1018, 875] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay13" SID "6824" Ports [1, 1] Position [722, 285, 748, 310] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay14" SID "6825" Ports [1, 1] Position [712, 380, 738, 405] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*2)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[3 5 0 5 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,ec356abf,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-5}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay15" SID "6826" Ports [1, 1] Position [1307, 845, 1333, 870] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "6827" Ports [1, 1] Position [1002, 375, 1028, 400] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*4)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[3 5 0 5 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,1a71059f,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-11" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "6828" Ports [1, 1] Position [417, 275, 443, 300] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "6829" Ports [1, 1] Position [1322, 275, 1348, 300] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "6830" Ports [1, 1] Position [1312, 370, 1338, 395] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*6)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[6 10 0 10 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,1003b046,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-17" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "6831" Ports [1, 1] Position [407, 850, 433, 875] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay7" SID "6832" Ports [1, 1] Position [397, 955, 423, 980] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*8)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[6 10 0 10 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,b88b7ef0,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-23" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay8" SID "6833" Ports [1, 1] Position [692, 845, 718, 870] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "N-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,83e6bb61,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}" "','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay9" SID "6834" Ports [1, 1] Position [682, 960, 708, 985] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "((N-1)*10)-1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 15 0 15 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "26,25,1,1,white,blue,0,e3412ff7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 26 26 0 0 ],[0 0 25 25 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[15.33 15.33" " 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[12.33 12.33 15.33 15.33" " 12.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\n" "patch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-29" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "FSM" SID "6835" Ports [0, 3] Position [15, 14, 120, 126] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "FSM" Location [2, 74, 1184, 1000] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Coef Addr Gen" SID "6836" Ports [1, 1] Position [230, 103, 280, 147] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(length(h(1:N))))" bin_pt "0" load_pin off rst on en off explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[2 3 0 3 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,1,1,white,blue,0,803eba70,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'rst');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('" "','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant2" SID "6837" Ports [0, 1] Position [25, 122, 60, 148] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(length(h(1:N))/2))+1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2/N" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant3" SID "6838" Ports [0, 1] Position [330, 182, 365, 208] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "length(h(1:N))-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(length(h(1:N))))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2/N" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,26,0,1,white,blue,0,279a71c8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'3');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Data Addr Gen" SID "6839" Ports [0, 1] Position [235, 33, 285, 77] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Count Limited" cnt_to "length(h(1:N))-1" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(length(h(1:N))))" bin_pt "0" load_pin off rst off en off explicit_period "on" period "Ts_In/N" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,44,0,1,white,blue,0,4b061529,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 44 44 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor" "('black');disp('{\\fontsize{14}\\bf\\lceil++\\rceil}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" SID "6840" Ports [1, 1] Position [325, 113, 350, 137] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 3 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out" SID "6841" Ports [1, 1] Position [670, 295, 705, 305] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out1" SID "6842" Ports [1, 1] Position [670, 310, 705, 320] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out3" SID "6843" Ports [1, 1] Position [670, 325, 705, 335] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Scope Name "Long Corr\nScope" SID "6844" Ports [3] Position [760, 290, 795, 340] Floating off Location [-1208, 112, 72, 1092] Open off NumInputPorts "3" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" } YMin "-1~-1~-35" YMax "1~1~25" SaveName "ScopeData4" DataFormat "StructureWithTime" SampleTime "0" } Block { BlockType Reference Name "Relational2" SID "6845" Ports [2, 1] Position [120, 103, 165, 147] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[1 1 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,3618233f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "6846" Ports [2, 1] Position [455, 163, 500, 207] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[1 1 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,3618233f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "bc3" SID "6847" Ports [1, 1] Position [540, 171, 560, 199] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,28,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 28 28 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[16.22 16." "22 18.22 16.22 18.22 18.22 18.22 16.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[14.22 14.22 16.22 16.22" " 14.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[12.22 12.22 14.22 14.22 12.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 10.22 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]" ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_la" "bel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Data Addr" SID "6848" Position [455, 48, 485, 62] IconDisplay "Port number" } Block { BlockType Outport Name "Coef Addr" SID "6849" Position [455, 118, 485, 132] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "load" SID "6850" Position [615, 178, 645, 192] Port "3" IconDisplay "Port number" } Line { SrcBlock "bc3" SrcPort 1 DstBlock "load" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 Points [15, 0] Branch { DstBlock "bc3" DstPort 1 } Branch { Points [0, 145] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Delay1" SrcPort 1 Points [0, 0; 25, 0] Branch { DstBlock "Coef Addr" DstPort 1 } Branch { Points [0, 50] DstBlock "Relational3" DstPort 1 } } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Coef Addr Gen" DstPort 1 } Line { SrcBlock "Coef Addr Gen" SrcPort 1 Points [20, 0] Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, 190] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "Data Addr Gen" SrcPort 1 Points [60, 0] Branch { Points [0, -40; -285, 0; 0, 100] DstBlock "Relational2" DstPort 1 } Branch { DstBlock "Data Addr" DstPort 1 } Branch { Points [0, 245] DstBlock "Gateway Out" DstPort 1 } } Line { SrcBlock "Gateway Out" SrcPort 1 Points [0, 0] DstBlock "Long Corr\nScope" DstPort 1 } Line { SrcBlock "Gateway Out1" SrcPort 1 Points [0, 0] DstBlock "Long Corr\nScope" DstPort 2 } Line { SrcBlock "Gateway Out3" SrcPort 1 Points [0, 0] DstBlock "Long Corr\nScope" DstPort 3 } } } Block { BlockType From Name "From" SID "6851" Position [85, 751, 125, 779] CloseFcn "tagdialog Close" GotoTag "xnz" } Block { BlockType Reference Name "Gateway Out6" SID "6852" Ports [1, 1] Position [1015, 1140, 1050, 1150] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Gateway Out7" SID "6853" Ports [1, 1] Position [1015, 1155, 1050, 1165] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Gateway Out8" SID "6854" Ports [1, 1] Position [1015, 1170, 1050, 1180] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Goto Name "Goto" SID "6855" Position [1355, 225, 1395, 255] GotoTag "xnz" TagVisibility "local" } Block { BlockType Scope Name "Long Corr\nScope2" SID "6856" Ports [3] Position [1110, 1137, 1140, 1183] Floating off Location [21, 181, 952, 967] Open off NumInputPorts "3" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" } YMin "-0.35~-0.175~0" YMax "0.35~0.225~1300" SaveName "ScopeData8" DataFormat "StructureWithTime" SampleTime "0" } Block { BlockType Outport Name "y" SID "6857" Position [1465, 843, 1495, 857] IconDisplay "Port number" } Line { SrcBlock "AddSub9" SrcPort 1 Points [90, 0] Branch { Points [0, 60] DstBlock "Gateway Out8" DstPort 1 } Branch { Points [430, 0] DstBlock "AddSub8" DstPort 2 } } Line { SrcBlock "AddSub6" SrcPort 1 Points [260, 0] Branch { DstBlock "AddSub9" DstPort 1 } Branch { Points [0, 105] DstBlock "Gateway Out7" DstPort 1 } } Line { SrcBlock "C13" SrcPort 1 Points [10, 0; 0, 105] DstBlock "AddSub10" DstPort 1 } Line { SrcBlock "AddSub8" SrcPort 1 DstBlock "y" DstPort 1 } Line { SrcBlock "Delay9" SrcPort 1 Points [-135, 0] DstBlock "AddSub6" DstPort 2 } Line { SrcBlock "Delay7" SrcPort 1 Points [0, 5; 130, 0] DstBlock "AddSub6" DstPort 1 } Line { SrcBlock "C12" SrcPort 1 Points [5, 0] DstBlock "Delay8" DstPort 1 } Line { SrcBlock "AddSub7" SrcPort 1 DstBlock "Delay9" DstPort 1 } Line { SrcBlock "Delay8" SrcPort 1 DstBlock "AddSub7" DstPort 2 } Line { SrcBlock "C11" SrcPort 1 Points [0, 105] DstBlock "AddSub7" DstPort 1 } Line { SrcBlock "AddSub4" SrcPort 1 Points [0, 15; 475, 0] DstBlock "AddSub8" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 Points [0, 10; -275, 0] DstBlock "AddSub4" DstPort 2 } Line { SrcBlock "AddSub13" SrcPort 1 Points [0, 5; 305, 0] DstBlock "AddSub4" DstPort 1 } Line { SrcBlock "Delay5" SrcPort 1 Points [0, 5] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 40] DstBlock "AddSub13" DstPort 1 } Line { SrcBlock "Delay14" SrcPort 1 DstBlock "AddSub13" DstPort 2 } Line { SrcBlock "C8" SrcPort 2 DstBlock "Goto" DstPort 1 } Line { SrcBlock "C10" SrcPort 1 Points [5, 0] DstBlock "Delay6" DstPort 1 } Line { SrcBlock "AddSub5" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "C9" SrcPort 1 Points [0, 105; 130, 0] DstBlock "AddSub5" DstPort 1 } Line { SrcBlock "C8" SrcPort 1 Points [20, 0] DstBlock "Delay4" DstPort 1 } Line { SrcBlock "C7" SrcPort 1 Points [0, 85; 140, 0] DstBlock "AddSub3" DstPort 1 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "Delay5" DstPort 1 } Line { SrcBlock "Delay4" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "C7" SrcPort 2 Points [20, 0; 0, -50] DstBlock "C8" DstPort 1 } Line { SrcBlock "C6" SrcPort 1 Points [5, 0] DstBlock "Delay1" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "C5" SrcPort 1 Points [0, 100; 120, 0] DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "C1" SrcPort 1 Points [0, 110] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub12" SrcPort 1 DstBlock "Delay14" DstPort 1 } Line { SrcBlock "Delay13" SrcPort 1 DstBlock "AddSub12" DstPort 2 } Line { SrcBlock "C12" SrcPort 2 Points [10, 0; 0, -50] DstBlock "C13" DstPort 1 } Line { SrcBlock "C11" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C12" DstPort 1 } Line { SrcBlock "C10" SrcPort 2 Points [20, 0; 0, -50] DstBlock "C11" DstPort 1 } Line { SrcBlock "C9" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C10" DstPort 1 } Line { SrcBlock "From" SrcPort 1 DstBlock "C9" DstPort 1 } Line { SrcBlock "C6" SrcPort 2 Points [10, 0; 0, -50] DstBlock "C7" DstPort 1 } Line { SrcBlock "C5" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C6" DstPort 1 } Line { SrcBlock "C4" SrcPort 1 DstBlock "Delay13" DstPort 1 } Line { SrcBlock "C4" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C5" DstPort 1 } Line { SrcBlock "C3" SrcPort 1 Points [0, 100; 125, 0] DstBlock "AddSub12" DstPort 1 } Line { SrcBlock "C3" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C4" DstPort 1 } Line { SrcBlock "C2" SrcPort 2 Points [5, 0; 0, -50] DstBlock "C3" DstPort 1 } Line { SrcBlock "FSM" SrcPort 3 Points [15, 0] Branch { Points [0, 145] Branch { Points [0, 430] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { Points [0, 145] DstBlock "C12" DstPort 4 } Branch { Points [140, 0] Branch { Points [5, 0; 0, 145] DstBlock "C13" DstPort 4 } Branch { Points [155, 0] Branch { Points [0, 145] DstBlock "C14" DstPort 4 } Branch { Points [135, 0] Branch { Points [150, 0; 0, 145] DstBlock "C16" DstPort 4 } Branch { Points [0, 145] DstBlock "C15" DstPort 4 } } } } } Branch { Points [0, 145] DstBlock "C11" DstPort 4 } } Branch { Points [0, 145] DstBlock "C10" DstPort 4 } } Branch { Points [0, 145] DstBlock "C9" DstPort 4 } } Branch { DstBlock "C1" DstPort 4 } } Branch { Points [35, 0; 135, 0] Branch { Points [150, 0] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { Points [145, 0] Branch { Points [150, 0; 0, 145] DstBlock "C8" DstPort 4 } Branch { Points [0, 145] DstBlock "C7" DstPort 4 } } Branch { Points [0, 145] DstBlock "C6" DstPort 4 } } Branch { Points [0, 145] DstBlock "C5" DstPort 4 } } Branch { Points [0, 145] DstBlock "C4" DstPort 4 } } Branch { Points [0, 145] DstBlock "C3" DstPort 4 } } Branch { Points [0, 145] DstBlock "C2" DstPort 4 } } } Line { SrcBlock "FSM" SrcPort 2 Points [20, 0] Branch { Points [0, 160] Branch { Points [0, 415] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { Points [0, 160] DstBlock "C12" DstPort 3 } Branch { Points [145, 0] Branch { Points [0, 160] DstBlock "C13" DstPort 3 } Branch { Points [150, 0] Branch { Points [0, 160] DstBlock "C14" DstPort 3 } Branch { Points [135, 0] Branch { Points [150, 0; 0, 160] DstBlock "C16" DstPort 3 } Branch { Points [0, 160] DstBlock "C15" DstPort 3 } } } } } Branch { Points [0, 160] DstBlock "C11" DstPort 3 } } Branch { Points [0, 160] DstBlock "C10" DstPort 3 } } Branch { Points [0, 160] DstBlock "C9" DstPort 3 } } Branch { DstBlock "C1" DstPort 3 } } Branch { Points [30, 0; 140, 0] Branch { Points [150, 0] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { Points [145, 0] Branch { Points [150, 0; 0, 160] DstBlock "C8" DstPort 3 } Branch { Points [0, 160] DstBlock "C7" DstPort 3 } } Branch { Points [0, 160] DstBlock "C6" DstPort 3 } } Branch { Points [0, 160] DstBlock "C5" DstPort 3 } } Branch { Points [0, 160] DstBlock "C4" DstPort 3 } } Branch { Points [0, 160] DstBlock "C3" DstPort 3 } } Branch { Points [0, 160] DstBlock "C2" DstPort 3 } } } Line { SrcBlock "FSM" SrcPort 1 Points [25, 0] Branch { Points [0, 175] Branch { Points [0, 400] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { DstBlock "C12" DstPort 2 } Branch { Points [145, 0] Branch { Points [0, 175] DstBlock "C13" DstPort 2 } Branch { Points [150, 0] Branch { Points [0, 0] DstBlock "C14" DstPort 2 } Branch { Points [135, 0] Branch { Points [150, 0] DstBlock "C16" DstPort 2 } Branch { DstBlock "C15" DstPort 2 } } } } } Branch { DstBlock "C11" DstPort 2 } } Branch { DstBlock "C10" DstPort 2 } } Branch { Points [0, 175] DstBlock "C9" DstPort 2 } } Branch { DstBlock "C1" DstPort 2 } } Branch { Points [0, 0; 170, 0] Branch { Points [150, 0] Branch { Points [160, 0] Branch { Points [145, 0] Branch { Points [140, 0] Branch { Points [145, 0] Branch { Points [150, 0] DstBlock "C8" DstPort 2 } Branch { Points [0, 175] DstBlock "C7" DstPort 2 } } Branch { DstBlock "C6" DstPort 2 } } Branch { DstBlock "C5" DstPort 2 } } Branch { DstBlock "C4" DstPort 2 } } Branch { Points [0, 175] DstBlock "C3" DstPort 2 } } Branch { Points [0, 175] DstBlock "C2" DstPort 2 } } } Line { SrcBlock "C1" SrcPort 2 Points [25, 0; 0, -50] DstBlock "C2" DstPort 1 } Line { SrcBlock "C2" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "x" SrcPort 1 DstBlock "C1" DstPort 1 } Line { SrcBlock "C13" SrcPort 2 Points [25, 0; 0, -50] DstBlock "C14" DstPort 1 } Line { SrcBlock "C14" SrcPort 2 Points [15, 0; 0, -50] DstBlock "C15" DstPort 1 } Line { SrcBlock "C15" SrcPort 2 Points [30, 0; 0, -50] DstBlock "C16" DstPort 1 } Line { SrcBlock "C15" SrcPort 1 Points [15, 0; 0, 100] DstBlock "AddSub11" DstPort 1 } Line { SrcBlock "C14" SrcPort 1 Points [10, 0] DstBlock "Delay12" DstPort 1 } Line { SrcBlock "C16" SrcPort 1 Points [40, 0] DstBlock "Delay15" DstPort 1 } Line { SrcBlock "Delay12" SrcPort 1 DstBlock "AddSub10" DstPort 2 } Line { SrcBlock "Delay15" SrcPort 1 DstBlock "AddSub11" DstPort 2 } Line { SrcBlock "AddSub10" SrcPort 1 DstBlock "Delay10" DstPort 1 } Line { SrcBlock "AddSub11" SrcPort 1 DstBlock "Delay11" DstPort 1 } Line { SrcBlock "Delay10" SrcPort 1 Points [0, 5; 155, 0] DstBlock "AddSub14" DstPort 1 } Line { SrcBlock "Delay11" SrcPort 1 Points [0, 5; -140, 0] DstBlock "AddSub14" DstPort 2 } Line { SrcBlock "AddSub14" SrcPort 1 Points [-245, 0] Branch { DstBlock "AddSub9" DstPort 2 } Branch { Points [0, 90] DstBlock "Gateway Out6" DstPort 1 } } Line { SrcBlock "Gateway Out6" SrcPort 1 DstBlock "Long Corr\nScope2" DstPort 1 } Line { SrcBlock "Gateway Out7" SrcPort 1 DstBlock "Long Corr\nScope2" DstPort 2 } Line { SrcBlock "Gateway Out8" SrcPort 1 DstBlock "Long Corr\nScope2" DstPort 3 } } } Block { BlockType Goto Name "Goto1" SID "6858" Position [1135, 187, 1230, 203] ShowName off GotoTag "Long_Corr" TagVisibility "global" } Block { BlockType Reference Name "Mult" SID "6859" Ports [2, 1] Position [875, 98, 920, 142] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select" " 'Pipeline for maximum performance'." precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[60 18 0 106 0 0 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28." "66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 2" "8.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('out" "put',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('blac" "k');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult1" SID "6860" Ports [2, 1] Position [875, 283, 920, 327] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select" " 'Pipeline for maximum performance'." precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[60 18 0 106 0 0 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28." "66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 2" "8.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('out" "put',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('blac" "k');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "6861" Ports [1, 1] Position [235, 53, 265, 67] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice1" SID "6862" Ports [1, 1] Position [230, 153, 260, 167] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "30,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "y" SID "6863" Position [1110, 123, 1140, 137] IconDisplay "Port number" } Line { SrcBlock "Slice1" SrcPort 1 Points [205, 0] Branch { DstBlock "C2" DstPort 1 } Branch { Points [0, 180] DstBlock "C3" DstPort 1 } } Line { SrcBlock "Slice" SrcPort 1 Points [155, 0] Branch { DstBlock "C1" DstPort 1 } Branch { Points [0, 200] DstBlock "C4" DstPort 1 } } Line { SrcBlock "C1" SrcPort 1 Points [50, 0; 0, 40] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "AddSub2" SrcPort 1 Points [40, 0] Branch { DstBlock "y" DstPort 1 } Branch { Points [0, 65] DstBlock "Goto1" DstPort 1 } } Line { SrcBlock "Mult1" SrcPort 1 Points [25, 0; 0, -165] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "Mult" SrcPort 1 DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 Points [0, 0; 85, 0] Branch { Points [0, 20] DstBlock "Mult1" DstPort 2 } Branch { DstBlock "Mult1" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 0; 70, 0] Branch { Points [0, 20] DstBlock "Mult" DstPort 2 } Branch { DstBlock "Mult" DstPort 1 } } Line { SrcBlock "C3" SrcPort 1 Points [40, 0; 0, -35] DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "C4" SrcPort 1 Points [55, 0; 0, 25] DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "C2" SrcPort 1 Points [45, 0; 0, -40] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Q In" SrcPort 1 DstBlock "Slice1" DstPort 1 } Line { SrcBlock "I In" SrcPort 1 DstBlock "Slice" DstPort 1 } Annotation { Name "This block was originally designed by Dr. Chris Dick (Cheif DSP Scientist at Xilinx)\nIt's been mo" "dified since to run at 4x (instead of 5x, as in the original OFDM designs)\n\nThis block runs a 64-point 1-bit " "by 1-bit correlation per clock cycle. Using 1-bit per\noperand allows just add/sub operations instead of actual" " multiplicaitons,\nwhich would be hugely expensive. This degrades performance a little,\nbut the LTS have good " "enough autocorrelation properties that there is still\nplenth of margin using this scheme." Position [441, 805] } } } Block { BlockType SubSystem Name "Packet_Detection" SID "6864" Ports [3, 1] Position [360, 148, 450, 212] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Packet_Detection" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Pkt Active" SID "6865" Position [160, 403, 190, 417] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Reset" SID "6866" Position [225, 458, 255, 472] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Payload" SID "6867" Position [225, 378, 255, 392] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType SubSystem Name "Auto-Correlation\nPkt Det Embedded MULT\n(for V2P/V6 export)" SID "9972" Ports [3, 1] Position [475, 92, 570, 208] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Auto-Correlation\nPkt Det Embedded MULT\n(for V2P/V6 export)" Location [941, 261, 2147, 1026] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "112" Block { BlockType Inport Name "AntA I" SID "9973" Position [115, 223, 145, 237] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "AntA Q" SID "9974" Position [115, 253, 145, 267] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "PktDet Reset" SID "9975" Position [910, 543, 940, 557] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType SubSystem Name "A*conj(B) 4xCLK" SID "9976" Ports [4, 2] Position [415, 223, 490, 282] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "A*conj(B) 4xCLK" Location [55, 222, 1351, 1402] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[A]" SID "9977" Position [55, 143, 85, 157] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Re[B]" SID "9978" Position [55, 303, 85, 317] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Im[A]" SID "9979" Position [55, 168, 85, 182] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Im[B]" SID "9980" Position [55, 328, 85, 342] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Add1" SID "9981" Ports [2, 1] Position [565, 173, 610, 217] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "13" bin_pt "11" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter" SID "9982" Ports [0, 1] Position [104, 40, 156, 90] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "4" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "2" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "52,50,0,1,white,blue,0,7ac47ef5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 52 52 0 0 ],[0 0 50 50 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 52 52 0 0 ],[0 0 50 50 0 ]);\npatch([10.425 20.54 27.54 34.54 41.54 27.54 17.425 10.425 ],[32" ".77 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([17.425 27.54 20.54 10.425 17.425 ],[25.77 25." "77 32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([10.425 20.54 27.54 17.425 10.425 ],[18.77 18.77 25.77 25.7" "7 18.77 ],[1 1 1 ]);\npatch([17.425 41.54 34.54 27.54 20.54 10.425 17.425 ],[11.77 11.77 18.77 11.77 18.77 18.77" " 11.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "9983" Ports [1, 1] Position [470, 194, 500, 216] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "9984" Ports [1, 1] Position [680, 184, 710, 206] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 17 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "9985" Ports [1, 1] Position [685, 239, 715, 261] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "0" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 17 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,24450e6f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "9986" Ports [1, 1] Position [770, 177, 805, 213] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "9987" Ports [1, 1] Position [825, 232, 860, 268] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult4" SID "9988" Ports [2, 1] Position [395, 163, 440, 207] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To check for the optimum internal pipeline stages of the dedicated multiplier you" " must select 'Test for optimum pipelining'.

Optimization Goal: For implementation into device fabric (LUT" "s), the Speed or Area optimization will take effect only if it's supported by IP for the particular device famil" "y. Otherwise, the results will be identical regardless of the selection." precision "User Defined" arith_type "Signed (2's comp)" n_bits "12" bin_pt "11" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "9989" Ports [5, 1] Position [305, 267, 340, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,136,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 19.4286 116.571 136 0 " "],[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 1" "0.875 5.875 ],[73.55 73.55 78.55 73.55 78.55 78.55 78.55 73.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.87" "5 ],[68.55 68.55 73.55 73.55 68.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[63.55 63.55 " "68.55 68.55 63.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[58.55 58.55 63.55 58.55 63.55 " "63.55 58.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon" " text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black'" ");port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'" "d3');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "9990" Ports [5, 1] Position [305, 107, 340, 243] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,136,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 19.4286 116.571 136 0 " "],[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 1" "0.875 5.875 ],[73.55 73.55 78.55 73.55 78.55 78.55 78.55 73.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.87" "5 ],[68.55 68.55 73.55 73.55 68.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[63.55 63.55 " "68.55 68.55 63.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[58.55 58.55 63.55 58.55 63.55 " "63.55 58.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon" " text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black'" ");port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'" "d3');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate" SID "9991" Ports [1, 1] Position [205, 155, 245, 195] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "12" bin_pt "11" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate1" SID "9992" Ports [1, 1] Position [215, 315, 255, 355] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "12" bin_pt "11" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "9993" Ports [1, 1] Position [200, 116, 235, 134] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "9994" Ports [1, 1] Position [135, 164, 170, 186] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "9995" Ports [1, 1] Position [140, 299, 175, 321] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample3" SID "9996" Ports [1, 1] Position [135, 139, 170, 161] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample4" SID "9997" Ports [1, 1] Position [140, 324, 175, 346] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Re" SID "9998" Position [915, 188, 945, 202] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Im1" SID "9999" Position [915, 243, 945, 257] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Negate" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Negate1" SrcPort 1 Points [25, 0] Branch { DstBlock "Mux" DstPort 3 } Branch { Points [0, 25] DstBlock "Mux" DstPort 4 } } Line { SrcBlock "Add1" SrcPort 1 Points [30, 0] Branch { Points [0, 55] DstBlock "Delay3" DstPort 1 } Branch { DstBlock "Delay2" DstPort 1 } } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Re" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock "Im1" DstPort 1 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 Points [35, 0] DstBlock "Mult4" DstPort 2 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Mult4" DstPort 1 } Line { SrcBlock "Im[B]" SrcPort 1 DstBlock "Up Sample4" DstPort 1 } Line { SrcBlock "Im[A]" SrcPort 1 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "Re[B]" SrcPort 1 DstBlock "Up Sample2" DstPort 1 } Line { SrcBlock "Re[A]" SrcPort 1 DstBlock "Up Sample3" DstPort 1 } Line { SrcBlock "Up Sample3" SrcPort 1 Points [0, 0; 110, 0] Branch { DstBlock "Mux1" DstPort 2 } Branch { Points [0, 50] DstBlock "Mux1" DstPort 4 } } Line { SrcBlock "Up Sample2" SrcPort 1 Points [90, 0] Branch { Points [0, 75] DstBlock "Mux" DstPort 5 } Branch { DstBlock "Mux" DstPort 2 } } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "Negate1" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 Points [5, 0] Branch { DstBlock "Negate" DstPort 1 } Branch { Points [0, 50] DstBlock "Mux1" DstPort 5 } } Line { SrcBlock "Mult4" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Add1" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Counter" SrcPort 1 Points [0, 30] DstBlock "Slice" DstPort 1 } Line { SrcBlock "Slice" SrcPort 1 Points [30, 0] Branch { DstBlock "Mux1" DstPort 1 } Branch { Points [0, 160] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Down Sample4" DstPort 1 } } } Block { BlockType Scope Name "Coarse Pkt Det" SID "10000" Ports [7] Position [1030, 655, 1075, 765] Floating off Location [1347, 497, 2536, 1400] Open off NumInputPorts "7" ZoomMode "yonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "2500" YMin "-1~-1~0.4~-0.09~12.75~-0.55~4" YMax "1~1~1.3~0.05~13.1~-0.05~4.275" SaveName "ScopeData28" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Scope Name "Coarse Pkt Det2" SID "10001" Ports [7] Position [1030, 790, 1075, 900] Floating off Location [1222, 99, 2411, 1002] Open off NumInputPorts "7" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "2500" YMin "0~0~0~0~0~-1~0.95" YMax "0.3~0.08~0.8~0.7~0.45~1~1.05" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Convert1" SID "10002" Ports [1, 1] Position [210, 252, 235, 268] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "12" bin_pt "11" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "10003" Ports [1, 1] Position [210, 222, 235, 238] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "12" bin_pt "11" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "10004" Ports [1, 1] Position [315, 235, 360, 255] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "16" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,20,1,1,white,blue,0,f89f7887,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-16" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "10005" Ports [1, 1] Position [315, 265, 360, 285] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "16" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,20,1,1,white,blue,0,f89f7887,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-16" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Detection Decision" SID "10006" Ports [2, 1] Position [990, 429, 1075, 476] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Detection Decision" Location [55, 222, 1351, 1402] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Det" SID "10007" Position [370, 233, 400, 247] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Reset" SID "10008" Position [455, 193, 485, 207] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Convert1" SID "10009" Ports [1, 1] Position [965, 216, 995, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "10010" Ports [1, 1] Position [455, 231, 485, 249] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "10011" Ports [2, 1] Position [695, 194, 730, 256] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "11" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,62,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 62 62 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[36.55 36." "55 41.55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 3" "6.55 31.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From4" SID "10012" Position [220, 271, 375, 289] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_pktDetMinDuration_autoCorr" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Inverter1" SID "10013" Ports [1, 1] Position [530, 208, 555, 222] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "10014" Ports [2, 1] Position [615, 194, 645, 221] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "10015" Ports [2, 1] Position [770, 213, 815, 257] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "10016" Ports [2, 1] Position [855, 197, 885, 248] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "10017" Position [140, 88, 170, 102] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "S" SID "10018" Position [140, 103, 170, 117] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "10019" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "10020" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "10021" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Outport Name "Pkt Det" SID "10022" Position [1075, 218, 1105, 232] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Reset" SrcPort 1 Points [15, 0] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, -20; 320, 0; 0, 30] DstBlock "S-R Latch" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Counter1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Relational3" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 Points [365, 0; 0, -35] DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Det" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Pkt Det" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 Points [15, 0] Branch { Points [0, -25] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Counter1" DstPort 2 } } Annotation { Position [987, 232] } } } Block { BlockType Display Name "Display" SID "10023" Ports [1] Position [600, 891, 685, 919] ShowName off Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Display Name "Display1" SID "10024" Ports [1] Position [600, 956, 685, 984] ShowName off Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Display Name "Display2" SID "10025" Ports [1] Position [600, 916, 685, 944] ShowName off Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Display Name "Display3" SID "10026" Ports [1] Position [600, 981, 685, 1009] ShowName off Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From1" SID "10027" Position [60, 444, 230, 466] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDetCorr_ratioThresh" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "10028" Position [60, 549, 230, 571] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDetCorr_minPower" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical" SID "10029" Ports [2, 1] Position [905, 418, 950, 462] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Magnitude\nSquared" SID "10030" Ports [2, 1] Position [655, 226, 705, 284] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Magnitude\nSquared" Location [55, 222, 1351, 1402] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "10031" Position [170, 93, 200, 107] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Q" SID "10032" Position [170, 168, 200, 182] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "AddSub1" SID "10033" Ports [2, 1] Position [415, 102, 465, 153] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "User Defined" arith_type "Unsigned" n_bits "32" bin_pt "19" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[12 22 0 22 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "301,560,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a + b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black'" ");disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult1" SID "10034" Ports [2, 1] Position [275, 162, 325, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To check for the optimum internal pipeline stages of the dedicated multiplier you" " must select 'Test for optimum pipelining'.

Optimization Goal: For implementation into device fabric (LUT" "s), the Speed or Area optimization will take effect only if it's supported by IP for the particular device famil" "y. Otherwise, the results will be identical regardless of the selection." precision "Full" arith_type "Unsigned" n_bits "14" bin_pt "12" quantization "Truncate" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[63 105 0 106 0 4 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,56,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 56 56 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[35.7" "7 35.77 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[28.77 28.77 " "35.77 35.77 28.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[21.77 21.77 28.77 28.77 21." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[14.77 14.77 21.77 14.77 21.77 21.77 14.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('bl" "ack');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult4" SID "10035" Ports [2, 1] Position [275, 87, 325, 143] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To check for the optimum internal pipeline stages of the dedicated multiplier you" " must select 'Test for optimum pipelining'.

Optimization Goal: For implementation into device fabric (LUT" "s), the Speed or Area optimization will take effect only if it's supported by IP for the particular device famil" "y. Otherwise, the results will be identical regardless of the selection." precision "Full" arith_type "Unsigned" n_bits "14" bin_pt "12" quantization "Truncate" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[63 105 0 106 0 4 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "361,969,356,577" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,56,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 56 56 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[35.7" "7 35.77 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[28.77 28.77 " "35.77 35.77 28.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[21.77 21.77 28.77 28.77 21." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[14.77 14.77 21.77 14.77 21.77 21.77 14.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('bl" "ack');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Mag" SID "10036" Position [565, 123, 595, 137] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "I" SrcPort 1 Points [15, 0] Branch { DstBlock "Mult4" DstPort 1 } Branch { Points [0, 30] DstBlock "Mult4" DstPort 2 } } Line { SrcBlock "Q" SrcPort 1 Points [15, 0] Branch { Points [0, 30] DstBlock "Mult1" DstPort 2 } Branch { DstBlock "Mult1" DstPort 1 } } Line { SrcBlock "Mult4" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 Points [30, 0; 0, -50] DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Mag" DstPort 1 } } } Block { BlockType SubSystem Name "Magnitude\nSquared1" SID "10037" Ports [2, 1] Position [315, 386, 365, 444] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Magnitude\nSquared1" Location [55, 222, 1351, 1402] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "10038" Position [205, 93, 235, 107] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Q" SID "10039" Position [205, 168, 235, 182] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "AddSub1" SID "10040" Ports [2, 1] Position [415, 102, 465, 153] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "User Defined" arith_type "Unsigned" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[12 22 0 22 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a + b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black'" ");disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult1" SID "10041" Ports [2, 1] Position [290, 162, 340, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To check for the optimum internal pipeline stages of the dedicated multiplier you" " must select 'Test for optimum pipelining'.

Optimization Goal: For implementation into device fabric (LUT" "s), the Speed or Area optimization will take effect only if it's supported by IP for the particular device famil" "y. Otherwise, the results will be identical regardless of the selection." precision "User Defined" arith_type "Unsigned" n_bits "16" bin_pt "16" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[63 105 0 106 0 4 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,56,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 56 56 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[35.7" "7 35.77 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[28.77 28.77 " "35.77 35.77 28.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[21.77 21.77 28.77 28.77 21." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[14.77 14.77 21.77 14.77 21.77 21.77 14.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('bl" "ack');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult4" SID "10042" Ports [2, 1] Position [290, 87, 340, 143] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To check for the optimum internal pipeline stages of the dedicated multiplier you" " must select 'Test for optimum pipelining'.

Optimization Goal: For implementation into device fabric (LUT" "s), the Speed or Area optimization will take effect only if it's supported by IP for the particular device famil" "y. Otherwise, the results will be identical regardless of the selection." precision "User Defined" arith_type "Unsigned" n_bits "16" bin_pt "16" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[63 105 0 106 0 4 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "491,205,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,56,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 56 56 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[35.7" "7 35.77 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[28.77 28.77 " "35.77 35.77 28.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[21.77 21.77 28.77 28.77 21." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[14.77 14.77 21.77 14.77 21.77 21.77 14.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('bl" "ack');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Mag" SID "10043" Position [565, 123, 595, 137] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Mag" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 Points [15, 0; 0, -50] DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Mult4" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "Q" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Mult1" DstPort 1 } Branch { Points [0, 30] DstBlock "Mult1" DstPort 2 } } Line { SrcBlock "I" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 30] DstBlock "Mult4" DstPort 2 } Branch { DstBlock "Mult4" DstPort 1 } } } } Block { BlockType Reference Name "Mult1" SID "10044" Ports [2, 1] Position [665, 412, 715, 468] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To check for the optimum internal pipeline stages of the dedicated multiplier you mus" "t select 'Test for optimum pipelining'.

Optimization Goal: For implementation into device fabric (LUTs), th" "e Speed or Area optimization will take effect only if it's supported by IP for the particular device family. Other" "wise, the results will be identical regardless of the selection." precision "User Defined" arith_type "Unsigned" n_bits "30" bin_pt "20" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[63 105 0 106 0 4 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "241,702,356,577" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,56,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 56 56 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[35.77 35.7" "7 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[28.77 28.77 35.77 35" ".77 28.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[21.77 21.77 28.77 28.77 21.77 ],[1 1 " "1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[14.77 14.77 21.77 14.77 21.77 21.77 14.77 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa" " \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n '" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult2" SID "10045" Ports [2, 1] Position [560, 405, 600, 440] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To check for the optimum internal pipeline stages of the dedicated multiplier you mus" "t select 'Test for optimum pipelining'.

Optimization Goal: For implementation into device fabric (LUTs), th" "e Speed or Area optimization will take effect only if it's supported by IP for the particular device family. Other" "wise, the results will be identical regardless of the selection." precision "User Defined" arith_type "Unsigned" n_bits "30" bin_pt "20" quantization "Truncate" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[63 105 0 106 0 4 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,35,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 35 35 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 35 35 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[22.55 22.55 27." "55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[17.55 17.55 22.55 22.55 17." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input" "',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\times b','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret" SID "10046" Ports [1, 1] Position [480, 923, 505, 937] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can change the signal between s" "igned and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.
Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsig" "ned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111" "000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "reinterpret" sg_icon_stat "25,14,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.22 11.2" "2 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0.931" " 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.55 16.44 14" ".44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end" " icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret1" SID "10047" Ports [1, 1] Position [480, 988, 505, 1002] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can change the signal between s" "igned and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.
Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsig" "ned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111" "000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "reinterpret" sg_icon_stat "25,14,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.22 11.2" "2 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0.931" " 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.55 16.44 14" ".44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end" " icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "10048" Ports [2, 1] Position [800, 408, 845, 452] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[11 1 0 22 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,3049caaa,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b','texmo" "de','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "10049" Ports [2, 1] Position [795, 528, 840, 572] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[11 1 0 22 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,3049caaa,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b','texmo" "de','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType SubSystem Name "Sliding Window" SID "10050" Ports [1, 1] Position [535, 228, 600, 252] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Sliding Window" Location [941, 261, 2429, 1520] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In" SID "10051" Position [195, 123, 225, 137] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Accum1" SID "10052" Ports [1, 1] Position [470, 119, 520, 171] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtracter-based accumulator. Output type and binary point position match the input.
Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to ru" "n at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "17" overflow "Flag as error" scale "1" rst off hasbypass off en off dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[12 23 0 22 0 0 0]" has_advanced_control "0" sggui_pos "20,20,367,457" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,1,1,white,blue,0,47915e64,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'b');\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "10053" Ports [2, 1] Position [360, 117, 410, 168] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "36" bin_pt "28" quantization "Truncate" overflow "Saturate" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 18 0 17 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "10054" Ports [1, 1] Position [265, 143, 300, 167] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "16" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 17 0 17 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,f89f7887,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-16}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "10055" Position [590, 138, 620, 152] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Accum1" DstPort 1 } Line { SrcBlock "In" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 25] DstBlock "Delay6" DstPort 1 } } Line { SrcBlock "Accum1" SrcPort 1 DstBlock "Out" DstPort 1 } } } Block { BlockType SubSystem Name "Sliding Window1" SID "10056" Ports [1, 1] Position [535, 258, 600, 282] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Sliding Window1" Location [941, 261, 2429, 1520] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In" SID "10057" Position [195, 123, 225, 137] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Accum1" SID "10058" Ports [1, 1] Position [480, 119, 530, 171] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtracter-based accumulator. Output type and binary point position match the input.
Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to ru" "n at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "17" overflow "Flag as error" scale "1" rst off hasbypass off en off dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[12 23 0 22 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,457" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,1,1,white,blue,0,47915e64,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'b');\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "10059" Ports [2, 1] Position [370, 117, 420, 168] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "36" bin_pt "28" quantization "Truncate" overflow "Saturate" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 18 0 17 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "10060" Ports [1, 1] Position [265, 143, 300, 167] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "16" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 17 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,f89f7887,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-16}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "10061" Position [590, 138, 620, 152] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Accum1" SrcPort 1 DstBlock "Out" DstPort 1 } Line { SrcBlock "In" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 25] DstBlock "Delay6" DstPort 1 } Branch { Points [85, 0] DstBlock "AddSub1" DstPort 1 } } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Accum1" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "AddSub1" DstPort 2 } } } Block { BlockType SubSystem Name "Sliding Window2" SID "10062" Ports [1, 1] Position [425, 403, 490, 427] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Sliding Window2" Location [55, 222, 1351, 1402] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In" SID "10063" Position [195, 123, 225, 137] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Accum1" SID "10064" Ports [1, 1] Position [480, 119, 530, 171] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtracter-based accumulator. Output type and binary point position match the input.
Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to ru" "n at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "21" overflow "Flag as error" scale "1" rst off hasbypass off en off dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[12 23 0 22 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,457" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,1,1,white,blue,0,47915e64,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'b');\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "10065" Ports [2, 1] Position [370, 117, 420, 168] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "36" bin_pt "28" quantization "Truncate" overflow "Saturate" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 18 0 17 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "10066" Ports [1, 1] Position [265, 143, 300, 167] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "16" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 17 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,f89f7887,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-16}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "10067" Position [590, 138, 620, 152] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Accum1" DstPort 1 } Line { SrcBlock "In" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [85, 0] DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 25] DstBlock "Delay6" DstPort 1 } } Line { SrcBlock "Accum1" SrcPort 1 DstBlock "Out" DstPort 1 } } } Block { BlockType Reference Name "done1" SID "10068" Ports [1, 1] Position [920, 735, 955, 745] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done10" SID "10069" Ports [1, 1] Position [920, 825, 955, 835] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done11" SID "10070" Ports [1, 1] Position [920, 840, 955, 850] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done12" SID "10071" Ports [1, 1] Position [920, 855, 955, 865] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done13" SID "10072" Ports [1, 1] Position [920, 870, 955, 880] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done14" SID "10073" Ports [1, 1] Position [475, 900, 510, 910] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done15" SID "10074" Ports [1, 1] Position [475, 965, 510, 975] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done16" SID "10075" Ports [1, 1] Position [920, 885, 955, 895] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done17" SID "10076" Ports [1, 1] Position [535, 925, 570, 935] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done18" SID "10077" Ports [1, 1] Position [535, 990, 570, 1000] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done2" SID "10078" Ports [1, 1] Position [920, 675, 955, 685] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done3" SID "10079" Ports [1, 1] Position [920, 705, 955, 715] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done4" SID "10080" Ports [1, 1] Position [920, 660, 955, 670] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done5" SID "10081" Ports [1, 1] Position [920, 690, 955, 700] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done6" SID "10082" Ports [1, 1] Position [920, 720, 955, 730] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done7" SID "10083" Ports [1, 1] Position [920, 750, 955, 760] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done8" SID "10084" Ports [1, 1] Position [920, 795, 955, 805] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done9" SID "10085" Ports [1, 1] Position [920, 810, 955, 820] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Outport Name "PktDet" SID "10086" Position [1125, 447, 1155, 463] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Detection Decision" DstPort 1 } Line { SrcBlock "Sliding Window2" SrcPort 1 Points [35, 0] Branch { Points [0, 15] Branch { Points [0, 400] DstBlock "done10" DstPort 1 } Branch { DstBlock "Mult2" DstPort 2 } } Branch { DstBlock "Mult2" DstPort 1 } } Line { SrcBlock "From5" SrcPort 1 Points [20, 0] Branch { DstBlock "Relational1" DstPort 2 } Branch { Points [0, 410; 180, 0] Branch { DstBlock "done15" DstPort 1 } Branch { Points [0, 25] DstBlock "Reinterpret1" DstPort 1 } } } Line { SrcBlock "done13" SrcPort 1 DstBlock "Coarse Pkt Det2" DstPort 6 } Line { SrcBlock "done12" SrcPort 1 DstBlock "Coarse Pkt Det2" DstPort 5 } Line { SrcBlock "Mult2" SrcPort 1 Points [5, 0] Branch { DstBlock "Mult1" DstPort 1 } Branch { Points [0, 115] Branch { Points [0, 305] DstBlock "done11" DstPort 1 } Branch { DstBlock "Relational1" DstPort 1 } } } Line { SrcBlock "From1" SrcPort 1 Points [25, 0] Branch { DstBlock "Mult1" DstPort 2 } Branch { Points [0, 450; 175, 0] Branch { DstBlock "done14" DstPort 1 } Branch { Points [0, 25] DstBlock "Reinterpret" DstPort 1 } } } Line { SrcBlock "done11" SrcPort 1 DstBlock "Coarse Pkt Det2" DstPort 4 } Line { SrcBlock "done10" SrcPort 1 DstBlock "Coarse Pkt Det2" DstPort 3 } Line { SrcBlock "done9" SrcPort 1 DstBlock "Coarse Pkt Det2" DstPort 2 } Line { SrcBlock "done8" SrcPort 1 DstBlock "Coarse Pkt Det2" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 Points [15, 0] Branch { Points [0, 420] DstBlock "done12" DstPort 1 } Branch { DstBlock "Relational" DstPort 2 } } Line { SrcBlock "Magnitude\nSquared1" SrcPort 1 Points [20, 0] Branch { Points [0, 400] DstBlock "done9" DstPort 1 } Branch { DstBlock "Sliding Window2" DstPort 1 } } Line { SrcBlock "done7" SrcPort 1 DstBlock "Coarse Pkt Det" DstPort 7 } Line { SrcBlock "done3" SrcPort 1 DstBlock "Coarse Pkt Det" DstPort 4 } Line { SrcBlock "Convert1" SrcPort 1 Points [40, 0] Branch { Points [0, 170] Branch { DstBlock "Magnitude\nSquared1" DstPort 2 } Branch { Points [0, 250] DstBlock "done2" DstPort 1 } } Branch { Points [20, 0] Branch { DstBlock "Delay1" DstPort 1 } Branch { DstBlock "A*conj(B) 4xCLK" DstPort 3 } } } Line { SrcBlock "Convert7" SrcPort 1 Points [45, 0] Branch { Points [0, 170] Branch { DstBlock "Magnitude\nSquared1" DstPort 1 } Branch { Points [0, 265] DstBlock "done4" DstPort 1 } } Branch { Points [15, 0] Branch { DstBlock "Delay" DstPort 1 } Branch { DstBlock "A*conj(B) 4xCLK" DstPort 1 } } } Line { SrcBlock "done2" SrcPort 1 DstBlock "Coarse Pkt Det" DstPort 2 } Line { SrcBlock "AntA Q" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "AntA I" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "A*conj(B) 4xCLK" DstPort 2 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "A*conj(B) 4xCLK" DstPort 4 } Line { SrcBlock "A*conj(B) 4xCLK" SrcPort 1 Points [10, 0] Branch { Points [0, 455] DstBlock "done5" DstPort 1 } Branch { DstBlock "Sliding Window" DstPort 1 } } Line { SrcBlock "A*conj(B) 4xCLK" SrcPort 2 Points [5, 0] Branch { Points [0, 440] DstBlock "done3" DstPort 1 } Branch { DstBlock "Sliding Window1" DstPort 1 } } Line { SrcBlock "Sliding Window" SrcPort 1 Points [30, 0] Branch { Points [0, 485] DstBlock "done6" DstPort 1 } Branch { DstBlock "Magnitude\nSquared" DstPort 1 } } Line { SrcBlock "Sliding Window1" SrcPort 1 Points [25, 0] Branch { Points [0, 470] DstBlock "done1" DstPort 1 } Branch { DstBlock "Magnitude\nSquared" DstPort 2 } } Line { Labels [2, 0] SrcBlock "Magnitude\nSquared" SrcPort 1 Points [50, 0; 0, 165] Branch { DstBlock "Relational" DstPort 1 } Branch { Points [0, 335] Branch { Points [0, 45] DstBlock "done8" DstPort 1 } Branch { DstBlock "done7" DstPort 1 } } } Line { SrcBlock "Relational" SrcPort 1 Points [20, 0] Branch { Points [0, 445] DstBlock "done13" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Relational1" SrcPort 1 Points [10, 0] Branch { Points [30, 0; 0, -100] DstBlock "Logical" DstPort 2 } Branch { Points [0, 340] DstBlock "done16" DstPort 1 } } Line { SrcBlock "done1" SrcPort 1 DstBlock "Coarse Pkt Det" DstPort 6 } Line { SrcBlock "done4" SrcPort 1 DstBlock "Coarse Pkt Det" DstPort 1 } Line { SrcBlock "done5" SrcPort 1 DstBlock "Coarse Pkt Det" DstPort 3 } Line { SrcBlock "done6" SrcPort 1 DstBlock "Coarse Pkt Det" DstPort 5 } Line { SrcBlock "done14" SrcPort 1 DstBlock "Display" DstPort 1 } Line { SrcBlock "done15" SrcPort 1 DstBlock "Display1" DstPort 1 } Line { SrcBlock "done16" SrcPort 1 DstBlock "Coarse Pkt Det2" DstPort 7 } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "done17" DstPort 1 } Line { SrcBlock "done17" SrcPort 1 DstBlock "Display2" DstPort 1 } Line { SrcBlock "Reinterpret1" SrcPort 1 DstBlock "done18" DstPort 1 } Line { SrcBlock "done18" SrcPort 1 DstBlock "Display3" DstPort 1 } Line { SrcBlock "PktDet Reset" SrcPort 1 Points [15, 0; 0, -85] DstBlock "Detection Decision" DstPort 2 } Line { SrcBlock "Detection Decision" SrcPort 1 DstBlock "PktDet" DstPort 1 } Annotation { Name "Latency = 1" Position [454, 193] } Annotation { Name "Latency = 1" Position [564, 193] } } } Block { BlockType SubSystem Name "Auto-Correlation\nPkt Det HDL MULT\n(for V4 export)" SID "10087" Ports [3, 1] Position [475, 252, 570, 368] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Auto-Correlation\nPkt Det HDL MULT\n(for V4 export)" Location [941, 261, 2147, 1026] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "112" Block { BlockType Inport Name "AntA I" SID "10088" Position [115, 223, 145, 237] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "AntA Q" SID "10089" Position [115, 253, 145, 267] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "PktDet Reset" SID "10090" Position [910, 543, 940, 557] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType SubSystem Name "A*conj(B) 4xCLK" SID "10091" Ports [4, 2] Position [415, 223, 490, 282] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "A*conj(B) 4xCLK" Location [55, 222, 1351, 1402] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[A]" SID "10092" Position [55, 143, 85, 157] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Re[B]" SID "10093" Position [55, 303, 85, 317] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Im[A]" SID "10094" Position [55, 168, 85, 182] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Im[B]" SID "10095" Position [55, 328, 85, 342] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Add1" SID "10096" Ports [2, 1] Position [565, 173, 610, 217] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "13" bin_pt "11" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter" SID "10097" Ports [0, 1] Position [104, 40, 156, 90] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "4" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "2" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "52,50,0,1,white,blue,0,7ac47ef5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 52 52 0 0 ],[0 0 50 50 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 52 52 0 0 ],[0 0 50 50 0 ]);\npatch([10.425 20.54 27.54 34.54 41.54 27.54 17.425 10.425 ],[32" ".77 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([17.425 27.54 20.54 10.425 17.425 ],[25.77 25." "77 32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([10.425 20.54 27.54 17.425 10.425 ],[18.77 18.77 25.77 25.7" "7 18.77 ],[1 1 1 ]);\npatch([17.425 41.54 34.54 27.54 20.54 10.425 17.425 ],[11.77 11.77 18.77 11.77 18.77 18.77" " 11.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "10098" Ports [1, 1] Position [470, 194, 500, 216] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "10099" Ports [1, 1] Position [680, 184, 710, 206] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 17 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "10100" Ports [1, 1] Position [685, 239, 715, 261] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "0" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 17 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,24450e6f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "10101" Ports [1, 1] Position [770, 177, 805, 213] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "10102" Ports [1, 1] Position [825, 232, 860, 268] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black')" ";disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult4" SID "10103" Ports [2, 1] Position [395, 163, 440, 207] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To check for the optimum internal pipeline stages of the dedicated multiplier you" " must select 'Test for optimum pipelining'.

Optimization Goal: For implementation into device fabric (LUT" "s), the Speed or Area optimization will take effect only if it's supported by IP for the particular device famil" "y. Otherwise, the results will be identical regardless of the selection." precision "User Defined" arith_type "Signed (2's comp)" n_bits "12" bin_pt "11" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded off optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' " "\\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "10104" Ports [5, 1] Position [305, 267, 340, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,136,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 19.4286 116.571 136 0 " "],[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 1" "0.875 5.875 ],[73.55 73.55 78.55 73.55 78.55 78.55 78.55 73.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.87" "5 ],[68.55 68.55 73.55 73.55 68.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[63.55 63.55 " "68.55 68.55 63.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[58.55 58.55 63.55 58.55 63.55 " "63.55 58.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon" " text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black'" ");port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'" "d3');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "10105" Ports [5, 1] Position [305, 107, 340, 243] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,136,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 19.4286 116.571 136 0 " "],[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 1" "0.875 5.875 ],[73.55 73.55 78.55 73.55 78.55 78.55 78.55 73.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.87" "5 ],[68.55 68.55 73.55 73.55 68.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[63.55 63.55 " "68.55 68.55 63.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[58.55 58.55 63.55 58.55 63.55 " "63.55 58.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon" " text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black'" ");port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'" "d3');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate" SID "10106" Ports [1, 1] Position [205, 155, 245, 195] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "12" bin_pt "11" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate1" SID "10107" Ports [1, 1] Position [215, 315, 255, 355] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "12" bin_pt "11" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25." "55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 2" "5.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "10108" Ports [1, 1] Position [200, 116, 235, 134] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "10109" Ports [1, 1] Position [135, 164, 170, 186] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "10110" Ports [1, 1] Position [140, 299, 175, 321] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample3" SID "10111" Ports [1, 1] Position [135, 139, 170, 161] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample4" SID "10112" Ports [1, 1] Position [140, 324, 175, 346] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Re" SID "10113" Position [915, 188, 945, 202] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Im1" SID "10114" Position [915, 243, 945, 257] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Down Sample4" DstPort 1 } Line { SrcBlock "Slice" SrcPort 1 Points [30, 0] Branch { Points [0, 160] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Mux1" DstPort 1 } } Line { SrcBlock "Counter" SrcPort 1 Points [0, 30] DstBlock "Slice" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Mult4" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [0, 20] DstBlock "Delay1" DstPort 1 } Branch { DstBlock "Add1" DstPort 1 } } Line { SrcBlock "Up Sample1" SrcPort 1 Points [5, 0] Branch { Points [0, 50] DstBlock "Mux1" DstPort 5 } Branch { DstBlock "Negate" DstPort 1 } } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "Negate1" DstPort 1 } Line { SrcBlock "Up Sample2" SrcPort 1 Points [90, 0] Branch { DstBlock "Mux" DstPort 2 } Branch { Points [0, 75] DstBlock "Mux" DstPort 5 } } Line { SrcBlock "Up Sample3" SrcPort 1 Points [0, 0; 110, 0] Branch { Points [0, 50] DstBlock "Mux1" DstPort 4 } Branch { DstBlock "Mux1" DstPort 2 } } Line { SrcBlock "Re[A]" SrcPort 1 DstBlock "Up Sample3" DstPort 1 } Line { SrcBlock "Re[B]" SrcPort 1 DstBlock "Up Sample2" DstPort 1 } Line { SrcBlock "Im[A]" SrcPort 1 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "Im[B]" SrcPort 1 DstBlock "Up Sample4" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Mult4" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 Points [35, 0] DstBlock "Mult4" DstPort 2 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock "Im1" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Re" DstPort 1 } Line { SrcBlock "Add1" SrcPort 1 Points [30, 0] Branch { DstBlock "Delay2" DstPort 1 } Branch { Points [0, 55] DstBlock "Delay3" DstPort 1 } } Line { SrcBlock "Negate1" SrcPort 1 Points [25, 0] Branch { Points [0, 25] DstBlock "Mux" DstPort 4 } Branch { DstBlock "Mux" DstPort 3 } } Line { SrcBlock "Negate" SrcPort 1 DstBlock "Mux1" DstPort 3 } } } Block { BlockType Scope Name "Coarse Pkt Det" SID "10115" Ports [7] Position [1030, 655, 1075, 765] Floating off Location [1347, 497, 2536, 1400] Open off NumInputPorts "7" ZoomMode "yonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "2500" YMin "-1~-1~0.4~-0.09~12.75~-0.55~4" YMax "1~1~1.3~0.05~13.1~-0.05~4.275" SaveName "ScopeData28" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Scope Name "Coarse Pkt Det2" SID "10116" Ports [7] Position [1030, 790, 1075, 900] Floating off Location [1222, 99, 2411, 1002] Open off NumInputPorts "7" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "2500" YMin "0~0~0~0~0~-1~0.95" YMax "0.3~0.08~0.8~0.7~0.45~1~1.05" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Convert1" SID "10117" Ports [1, 1] Position [210, 252, 235, 268] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "12" bin_pt "11" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "10118" Ports [1, 1] Position [210, 222, 235, 238] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "12" bin_pt "11" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "10119" Ports [1, 1] Position [315, 235, 360, 255] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "16" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,20,1,1,white,blue,0,f89f7887,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-16" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "10120" Ports [1, 1] Position [315, 265, 360, 285] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "16" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,20,1,1,white,blue,0,f89f7887,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-16" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Detection Decision" SID "10121" Ports [2, 1] Position [990, 429, 1075, 476] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Detection Decision" Location [55, 222, 1351, 1402] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Det" SID "10122" Position [370, 233, 400, 247] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Reset" SID "10123" Position [455, 193, 485, 207] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Convert1" SID "10124" Ports [1, 1] Position [965, 216, 995, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "10125" Ports [1, 1] Position [455, 231, 485, 249] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "10126" Ports [2, 1] Position [695, 194, 730, 256] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "11" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,62,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 62 62 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[36.55 36." "55 41.55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 3" "6.55 31.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From4" SID "10127" Position [220, 271, 375, 289] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_pktDetMinDuration_autoCorr" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Inverter1" SID "10128" Ports [1, 1] Position [530, 208, 555, 222] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "10129" Ports [2, 1] Position [615, 194, 645, 221] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "10130" Ports [2, 1] Position [770, 213, 815, 257] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "10131" Ports [2, 1] Position [855, 197, 885, 248] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "10132" Position [140, 88, 170, 102] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "S" SID "10133" Position [140, 103, 170, 117] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "10134" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "10135" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "10136" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType Outport Name "Pkt Det" SID "10137" Position [1075, 218, 1105, 232] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Convert2" SrcPort 1 Points [15, 0] Branch { DstBlock "Counter1" DstPort 2 } Branch { Points [0, -25] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Pkt Det" DstPort 1 } Line { SrcBlock "Det" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 Points [365, 0; 0, -35] DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Relational3" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Counter1" DstPort 1 } Line { SrcBlock "Reset" SrcPort 1 Points [15, 0] Branch { Points [0, -20; 320, 0; 0, 30] DstBlock "S-R Latch" DstPort 1 } Branch { DstBlock "Logical1" DstPort 1 } } Annotation { Position [987, 232] } } } Block { BlockType Display Name "Display" SID "10138" Ports [1] Position [600, 891, 685, 919] ShowName off Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Display Name "Display1" SID "10139" Ports [1] Position [600, 956, 685, 984] ShowName off Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Display Name "Display2" SID "10140" Ports [1] Position [600, 916, 685, 944] ShowName off Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Display Name "Display3" SID "10141" Ports [1] Position [600, 981, 685, 1009] ShowName off Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From1" SID "10142" Position [60, 444, 230, 466] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDetCorr_ratioThresh" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "10143" Position [60, 549, 230, 571] ShowName off CloseFcn "tagdialog Close" GotoTag "pktDetCorr_minPower" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical" SID "10144" Ports [2, 1] Position [905, 418, 950, 462] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Magnitude\nSquared" SID "10145" Ports [2, 1] Position [655, 226, 705, 284] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Magnitude\nSquared" Location [55, 222, 1351, 1402] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "10146" Position [170, 93, 200, 107] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Q" SID "10147" Position [170, 168, 200, 182] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "AddSub1" SID "10148" Ports [2, 1] Position [415, 102, 465, 153] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "User Defined" arith_type "Unsigned" n_bits "32" bin_pt "19" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[12 22 0 22 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "301,560,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a + b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black'" ");disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult1" SID "10149" Ports [2, 1] Position [275, 162, 325, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To check for the optimum internal pipeline stages of the dedicated multiplier you" " must select 'Test for optimum pipelining'.

Optimization Goal: For implementation into device fabric (LUT" "s), the Speed or Area optimization will take effect only if it's supported by IP for the particular device famil" "y. Otherwise, the results will be identical regardless of the selection." precision "Full" arith_type "Unsigned" n_bits "14" bin_pt "12" quantization "Truncate" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded off optimum_pipeline off xl_use_area off xl_area "[63 105 0 106 0 4 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,56,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 56 56 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[35.7" "7 35.77 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[28.77 28.77 " "35.77 35.77 28.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[21.77 21.77 28.77 28.77 21." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[14.77 14.77 21.77 14.77 21.77 21.77 14.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('bl" "ack');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult4" SID "10150" Ports [2, 1] Position [275, 87, 325, 143] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To check for the optimum internal pipeline stages of the dedicated multiplier you" " must select 'Test for optimum pipelining'.

Optimization Goal: For implementation into device fabric (LUT" "s), the Speed or Area optimization will take effect only if it's supported by IP for the particular device famil" "y. Otherwise, the results will be identical regardless of the selection." precision "Full" arith_type "Unsigned" n_bits "14" bin_pt "12" quantization "Truncate" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded off optimum_pipeline off xl_use_area off xl_area "[63 105 0 106 0 4 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "361,969,356,577" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,56,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 56 56 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[35.7" "7 35.77 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[28.77 28.77 " "35.77 35.77 28.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[21.77 21.77 28.77 28.77 21." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[14.77 14.77 21.77 14.77 21.77 21.77 14.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('bl" "ack');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Mag" SID "10151" Position [565, 123, 595, 137] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Mag" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 Points [30, 0; 0, -50] DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Mult4" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "Q" SrcPort 1 Points [15, 0] Branch { DstBlock "Mult1" DstPort 1 } Branch { Points [0, 30] DstBlock "Mult1" DstPort 2 } } Line { SrcBlock "I" SrcPort 1 Points [15, 0] Branch { Points [0, 30] DstBlock "Mult4" DstPort 2 } Branch { DstBlock "Mult4" DstPort 1 } } } } Block { BlockType SubSystem Name "Magnitude\nSquared1" SID "10152" Ports [2, 1] Position [315, 386, 365, 444] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Magnitude\nSquared1" Location [55, 222, 1351, 1402] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "10153" Position [205, 93, 235, 107] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "Q" SID "10154" Position [205, 168, 235, 182] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "AddSub1" SID "10155" Ports [2, 1] Position [415, 102, 465, 153] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "User Defined" arith_type "Unsigned" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[12 22 0 22 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a + b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black'" ");disp(' \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult1" SID "10156" Ports [2, 1] Position [290, 162, 340, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To check for the optimum internal pipeline stages of the dedicated multiplier you" " must select 'Test for optimum pipelining'.

Optimization Goal: For implementation into device fabric (LUT" "s), the Speed or Area optimization will take effect only if it's supported by IP for the particular device famil" "y. Otherwise, the results will be identical regardless of the selection." precision "User Defined" arith_type "Unsigned" n_bits "16" bin_pt "16" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded off optimum_pipeline off xl_use_area off xl_area "[63 105 0 106 0 4 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,56,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 56 56 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[35.7" "7 35.77 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[28.77 28.77 " "35.77 35.77 28.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[21.77 21.77 28.77 28.77 21." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[14.77 14.77 21.77 14.77 21.77 21.77 14.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('bl" "ack');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult4" SID "10157" Ports [2, 1] Position [290, 87, 340, 143] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To check for the optimum internal pipeline stages of the dedicated multiplier you" " must select 'Test for optimum pipelining'.

Optimization Goal: For implementation into device fabric (LUT" "s), the Speed or Area optimization will take effect only if it's supported by IP for the particular device famil" "y. Otherwise, the results will be identical regardless of the selection." precision "User Defined" arith_type "Unsigned" n_bits "16" bin_pt "16" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded off optimum_pipeline off xl_use_area off xl_area "[63 105 0 106 0 4 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "491,205,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,56,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 56 56 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[35.7" "7 35.77 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[28.77 28.77 " "35.77 35.77 28.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[21.77 21.77 28.77 28.77 21." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[14.77 14.77 21.77 14.77 21.77 21.77 14.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('bl" "ack');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Mag" SID "10158" Position [565, 123, 595, 137] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "I" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Mult4" DstPort 1 } Branch { Points [0, 30] DstBlock "Mult4" DstPort 2 } } Line { SrcBlock "Q" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 30] DstBlock "Mult1" DstPort 2 } Branch { DstBlock "Mult1" DstPort 1 } } Line { SrcBlock "Mult4" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 Points [15, 0; 0, -50] DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Mag" DstPort 1 } } } Block { BlockType Reference Name "Mult1" SID "10159" Ports [2, 1] Position [665, 412, 715, 468] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To check for the optimum internal pipeline stages of the dedicated multiplier you mus" "t select 'Test for optimum pipelining'.

Optimization Goal: For implementation into device fabric (LUTs), th" "e Speed or Area optimization will take effect only if it's supported by IP for the particular device family. Other" "wise, the results will be identical regardless of the selection." precision "User Defined" arith_type "Unsigned" n_bits "30" bin_pt "20" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded off optimum_pipeline off xl_use_area off xl_area "[63 105 0 106 0 4 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "241,702,356,577" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,56,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 56 56 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[35.77 35.7" "7 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[28.77 28.77 35.77 35" ".77 28.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[21.77 21.77 28.77 28.77 21.77 ],[1 1 " "1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[14.77 14.77 21.77 14.77 21.77 21.77 14.77 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa" " \\times b','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n '" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult2" SID "10160" Ports [2, 1] Position [560, 405, 600, 440] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To check for the optimum internal pipeline stages of the dedicated multiplier you mus" "t select 'Test for optimum pipelining'.

Optimization Goal: For implementation into device fabric (LUTs), th" "e Speed or Area optimization will take effect only if it's supported by IP for the particular device family. Other" "wise, the results will be identical regardless of the selection." precision "User Defined" arith_type "Unsigned" n_bits "30" bin_pt "20" quantization "Truncate" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded off optimum_pipeline off xl_use_area off xl_area "[63 105 0 106 0 4 0]" pipeline "on" use_rpm "off" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,35,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 35 35 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 35 35 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[22.55 22.55 27." "55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[17.55 17.55 22.55 22.55 17." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input" "',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\times b','texm" "ode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret" SID "10161" Ports [1, 1] Position [480, 923, 505, 937] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can change the signal between s" "igned and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.
Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsig" "ned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111" "000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "reinterpret" sg_icon_stat "25,14,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.22 11.2" "2 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0.931" " 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.55 16.44 14" ".44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end" " icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret1" SID "10162" Ports [1, 1] Position [480, 988, 505, 1002] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can change the signal between s" "igned and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.
Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsig" "ned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111" "000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "reinterpret" sg_icon_stat "25,14,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.22 11.2" "2 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0.931" " 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.55 16.44 14" ".44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end" " icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret');\nfprintf('','C" "OMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "10163" Ports [2, 1] Position [800, 408, 845, 452] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[11 1 0 22 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,3049caaa,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b','texmo" "de','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "10164" Ports [2, 1] Position [795, 528, 840, 572] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[11 1 0 22 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,3049caaa,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b','texmo" "de','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType SubSystem Name "Sliding Window" SID "10165" Ports [1, 1] Position [535, 228, 600, 252] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Sliding Window" Location [941, 261, 2429, 1520] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In" SID "10166" Position [195, 123, 225, 137] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Accum1" SID "10167" Ports [1, 1] Position [470, 119, 520, 171] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtracter-based accumulator. Output type and binary point position match the input.
Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to ru" "n at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "17" overflow "Flag as error" scale "1" rst off hasbypass off en off dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[12 23 0 22 0 0 0]" has_advanced_control "0" sggui_pos "20,20,367,457" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,1,1,white,blue,0,47915e64,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'b');\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "10168" Ports [2, 1] Position [360, 117, 410, 168] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "36" bin_pt "28" quantization "Truncate" overflow "Saturate" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 18 0 17 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "10169" Ports [1, 1] Position [265, 143, 300, 167] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "16" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 17 0 17 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,f89f7887,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-16}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "10170" Position [590, 138, 620, 152] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Accum1" SrcPort 1 DstBlock "Out" DstPort 1 } Line { SrcBlock "In" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 25] DstBlock "Delay6" DstPort 1 } Branch { DstBlock "AddSub1" DstPort 1 } } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Accum1" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "AddSub1" DstPort 2 } } } Block { BlockType SubSystem Name "Sliding Window1" SID "10171" Ports [1, 1] Position [535, 258, 600, 282] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Sliding Window1" Location [941, 261, 2429, 1520] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In" SID "10172" Position [195, 123, 225, 137] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Accum1" SID "10173" Ports [1, 1] Position [480, 119, 530, 171] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtracter-based accumulator. Output type and binary point position match the input.
Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to ru" "n at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "17" overflow "Flag as error" scale "1" rst off hasbypass off en off dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[12 23 0 22 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,457" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,1,1,white,blue,0,47915e64,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'b');\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "10174" Ports [2, 1] Position [370, 117, 420, 168] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "36" bin_pt "28" quantization "Truncate" overflow "Saturate" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 18 0 17 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "10175" Ports [1, 1] Position [265, 143, 300, 167] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "16" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 17 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,f89f7887,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-16}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "10176" Position [590, 138, 620, 152] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Accum1" DstPort 1 } Line { SrcBlock "In" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [85, 0] DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 25] DstBlock "Delay6" DstPort 1 } } Line { SrcBlock "Accum1" SrcPort 1 DstBlock "Out" DstPort 1 } } } Block { BlockType SubSystem Name "Sliding Window2" SID "10177" Ports [1, 1] Position [425, 403, 490, 427] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Sliding Window2" Location [55, 222, 1351, 1402] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In" SID "10178" Position [195, 123, 225, 137] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Accum1" SID "10179" Ports [1, 1] Position [480, 119, 530, 171] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtracter-based accumulator. Output type and binary point position match the input.
Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to ru" "n at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "21" overflow "Flag as error" scale "1" rst off hasbypass off en off dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[12 23 0 22 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,457" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,1,1,white,blue,0,47915e64,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'b');\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "10180" Ports [2, 1] Position [370, 117, 420, 168] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "36" bin_pt "28" quantization "Truncate" overflow "Saturate" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 18 0 17 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "10181" Ports [1, 1] Position [265, 143, 300, 167] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "16" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 17 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,f89f7887,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-16}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "10182" Position [590, 138, 620, 152] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Accum1" SrcPort 1 DstBlock "Out" DstPort 1 } Line { SrcBlock "In" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 25] DstBlock "Delay6" DstPort 1 } Branch { Points [85, 0] DstBlock "AddSub1" DstPort 1 } } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Accum1" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "AddSub1" DstPort 2 } } } Block { BlockType Reference Name "done1" SID "10183" Ports [1, 1] Position [920, 735, 955, 745] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done10" SID "10184" Ports [1, 1] Position [920, 825, 955, 835] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done11" SID "10185" Ports [1, 1] Position [920, 840, 955, 850] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done12" SID "10186" Ports [1, 1] Position [920, 855, 955, 865] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done13" SID "10187" Ports [1, 1] Position [920, 870, 955, 880] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done14" SID "10188" Ports [1, 1] Position [475, 900, 510, 910] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done15" SID "10189" Ports [1, 1] Position [475, 965, 510, 975] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done16" SID "10190" Ports [1, 1] Position [920, 885, 955, 895] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done17" SID "10191" Ports [1, 1] Position [535, 925, 570, 935] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done18" SID "10192" Ports [1, 1] Position [535, 990, 570, 1000] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done2" SID "10193" Ports [1, 1] Position [920, 675, 955, 685] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done3" SID "10194" Ports [1, 1] Position [920, 705, 955, 715] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done4" SID "10195" Ports [1, 1] Position [920, 660, 955, 670] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done5" SID "10196" Ports [1, 1] Position [920, 690, 955, 700] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done6" SID "10197" Ports [1, 1] Position [920, 720, 955, 730] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done7" SID "10198" Ports [1, 1] Position [920, 750, 955, 760] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done8" SID "10199" Ports [1, 1] Position [920, 795, 955, 805] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done9" SID "10200" Ports [1, 1] Position [920, 810, 955, 820] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Outport Name "PktDet" SID "10201" Position [1125, 447, 1155, 463] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Detection Decision" SrcPort 1 DstBlock "PktDet" DstPort 1 } Line { SrcBlock "PktDet Reset" SrcPort 1 Points [15, 0; 0, -85] DstBlock "Detection Decision" DstPort 2 } Line { SrcBlock "done18" SrcPort 1 DstBlock "Display3" DstPort 1 } Line { SrcBlock "Reinterpret1" SrcPort 1 DstBlock "done18" DstPort 1 } Line { SrcBlock "done17" SrcPort 1 DstBlock "Display2" DstPort 1 } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "done17" DstPort 1 } Line { SrcBlock "done16" SrcPort 1 DstBlock "Coarse Pkt Det2" DstPort 7 } Line { SrcBlock "done15" SrcPort 1 DstBlock "Display1" DstPort 1 } Line { SrcBlock "done14" SrcPort 1 DstBlock "Display" DstPort 1 } Line { SrcBlock "done6" SrcPort 1 DstBlock "Coarse Pkt Det" DstPort 5 } Line { SrcBlock "done5" SrcPort 1 DstBlock "Coarse Pkt Det" DstPort 3 } Line { SrcBlock "done4" SrcPort 1 DstBlock "Coarse Pkt Det" DstPort 1 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Coarse Pkt Det" DstPort 6 } Line { SrcBlock "Relational1" SrcPort 1 Points [10, 0] Branch { Points [0, 340] DstBlock "done16" DstPort 1 } Branch { Points [30, 0; 0, -100] DstBlock "Logical" DstPort 2 } } Line { SrcBlock "Relational" SrcPort 1 Points [20, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 445] DstBlock "done13" DstPort 1 } } Line { Labels [2, 0] SrcBlock "Magnitude\nSquared" SrcPort 1 Points [50, 0; 0, 165] Branch { Points [0, 335] Branch { DstBlock "done7" DstPort 1 } Branch { Points [0, 45] DstBlock "done8" DstPort 1 } } Branch { DstBlock "Relational" DstPort 1 } } Line { SrcBlock "Sliding Window1" SrcPort 1 Points [25, 0] Branch { DstBlock "Magnitude\nSquared" DstPort 2 } Branch { Points [0, 470] DstBlock "done1" DstPort 1 } } Line { SrcBlock "Sliding Window" SrcPort 1 Points [30, 0] Branch { DstBlock "Magnitude\nSquared" DstPort 1 } Branch { Points [0, 485] DstBlock "done6" DstPort 1 } } Line { SrcBlock "A*conj(B) 4xCLK" SrcPort 2 Points [5, 0] Branch { DstBlock "Sliding Window1" DstPort 1 } Branch { Points [0, 440] DstBlock "done3" DstPort 1 } } Line { SrcBlock "A*conj(B) 4xCLK" SrcPort 1 Points [10, 0] Branch { DstBlock "Sliding Window" DstPort 1 } Branch { Points [0, 455] DstBlock "done5" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "A*conj(B) 4xCLK" DstPort 4 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "A*conj(B) 4xCLK" DstPort 2 } Line { SrcBlock "AntA I" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "AntA Q" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "done2" SrcPort 1 DstBlock "Coarse Pkt Det" DstPort 2 } Line { SrcBlock "Convert7" SrcPort 1 Points [45, 0] Branch { Points [15, 0] Branch { DstBlock "A*conj(B) 4xCLK" DstPort 1 } Branch { DstBlock "Delay" DstPort 1 } } Branch { Points [0, 170] Branch { Points [0, 265] DstBlock "done4" DstPort 1 } Branch { DstBlock "Magnitude\nSquared1" DstPort 1 } } } Line { SrcBlock "Convert1" SrcPort 1 Points [40, 0] Branch { Points [20, 0] Branch { DstBlock "A*conj(B) 4xCLK" DstPort 3 } Branch { DstBlock "Delay1" DstPort 1 } } Branch { Points [0, 170] Branch { Points [0, 250] DstBlock "done2" DstPort 1 } Branch { DstBlock "Magnitude\nSquared1" DstPort 2 } } } Line { SrcBlock "done3" SrcPort 1 DstBlock "Coarse Pkt Det" DstPort 4 } Line { SrcBlock "done7" SrcPort 1 DstBlock "Coarse Pkt Det" DstPort 7 } Line { SrcBlock "Magnitude\nSquared1" SrcPort 1 Points [20, 0] Branch { DstBlock "Sliding Window2" DstPort 1 } Branch { Points [0, 400] DstBlock "done9" DstPort 1 } } Line { SrcBlock "Mult1" SrcPort 1 Points [15, 0] Branch { DstBlock "Relational" DstPort 2 } Branch { Points [0, 420] DstBlock "done12" DstPort 1 } } Line { SrcBlock "done8" SrcPort 1 DstBlock "Coarse Pkt Det2" DstPort 1 } Line { SrcBlock "done9" SrcPort 1 DstBlock "Coarse Pkt Det2" DstPort 2 } Line { SrcBlock "done10" SrcPort 1 DstBlock "Coarse Pkt Det2" DstPort 3 } Line { SrcBlock "done11" SrcPort 1 DstBlock "Coarse Pkt Det2" DstPort 4 } Line { SrcBlock "From1" SrcPort 1 Points [25, 0] Branch { Points [0, 450; 175, 0] Branch { Points [0, 25] DstBlock "Reinterpret" DstPort 1 } Branch { DstBlock "done14" DstPort 1 } } Branch { DstBlock "Mult1" DstPort 2 } } Line { SrcBlock "Mult2" SrcPort 1 Points [5, 0] Branch { Points [0, 115] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 305] DstBlock "done11" DstPort 1 } } Branch { DstBlock "Mult1" DstPort 1 } } Line { SrcBlock "done12" SrcPort 1 DstBlock "Coarse Pkt Det2" DstPort 5 } Line { SrcBlock "done13" SrcPort 1 DstBlock "Coarse Pkt Det2" DstPort 6 } Line { SrcBlock "From5" SrcPort 1 Points [20, 0] Branch { Points [0, 410; 180, 0] Branch { Points [0, 25] DstBlock "Reinterpret1" DstPort 1 } Branch { DstBlock "done15" DstPort 1 } } Branch { DstBlock "Relational1" DstPort 2 } } Line { SrcBlock "Sliding Window2" SrcPort 1 Points [35, 0] Branch { DstBlock "Mult2" DstPort 1 } Branch { Points [0, 15] Branch { DstBlock "Mult2" DstPort 2 } Branch { Points [0, 400] DstBlock "done10" DstPort 1 } } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Detection Decision" DstPort 1 } Annotation { Name "Latency = 1" Position [564, 193] } Annotation { Name "Latency = 1" Position [454, 193] } } } Block { BlockType Reference Name "Constant" SID "7040" Ports [0, 1] Position [1400, 445, 1420, 465] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "20,20,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 20 20 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 " "12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]" ");\npatch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('output',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "7041" Ports [1, 1] Position [1320, 384, 1380, 436] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited co" "unter is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "32" bin_pt "0" load_pin off rst off en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "60,52,1,1,white,blue,0,b089e9c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 52 52 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 52 52 0 ]);\npatch([14.425 24.54 31.54 38.54 45.54 31.54 21.425 14.425 ]" ",[33.77 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([21.425 31.54 24.54 14.425 21.425 ],[26.7" "7 26.77 33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([14.425 24.54 31.54 21.425 14.425 ],[19.77 19.77 26.7" "7 26.77 19.77 ],[1 1 1 ]);\npatch([21.425 45.54 38.54 31.54 24.54 14.425 21.425 ],[12.77 12.77 19.77 12.77 19.7" "7 19.77 12.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i" "con text');\ncolor('black');port_label('input',1,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmod" "e','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Ext PktDet" SID "7042" Ports [0, 1] Position [740, 212, 800, 238] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Ext PktDet" Location [627, 166, 977, 251] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Constant Name "Constant2" SID "7043" Position [150, 156, 170, 174] ShowName off Value "0" } Block { BlockType Reference Name "Convert5" SID "7044" Ports [1, 1] Position [405, 157, 430, 173] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "7045" Ports [1, 1] Position [310, 152, 335, 178] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Ext_PktDet" SID "7046" Ports [1, 1] Position [190, 159, 245, 171] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed " "point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,423" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 12 12 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 55 55 0 0 ],[0 0 12 12 0 ]);\npatch([24.775 26.22 27.22 28.22 29.22 27.22 25.775 24.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([25.775 27.22 26.22 24.775 25.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.985 0.979 0.895 ]);\npatch([24.775 26.22 27.22 25.775 24.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[25.775 29.22 28.22 27.22 26.22 24.775 25.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0.979 0.895 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType From Name "From2" SID "7047" Position [185, 186, 340, 204] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_EnableExtDet" TagVisibility "global" } Block { BlockType Reference Name "Logical2" SID "7048" Ports [2, 1] Position [505, 148, 550, 212] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2" sg_icon_stat "45,64,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 64 64 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 64 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[38.66 38.66 4" "4.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[32.66 32.66 38.66 38.66 32" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32.66 32.66 26.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 26.66 20.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Det" SID "7049" Position [595, 173, 625, 187] IconDisplay "Port number" } Line { SrcBlock "Ext_PktDet" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Ext_PktDet" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Det" DstPort 1 } Line { SrcBlock "Convert5" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Convert5" DstPort 1 } } } Block { BlockType From Name "From1" SID "7050" Position [905, 316, 1060, 334] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_IgnoreDetection" TagVisibility "global" } Block { BlockType From Name "From15" SID "7051" Position [195, 262, 305, 278] ShowName off CloseFcn "tagdialog Close" GotoTag "AntA_ADC_I_Filt" TagVisibility "global" } Block { BlockType From Name "From2" SID "7052" Position [195, 302, 305, 318] ShowName off CloseFcn "tagdialog Close" GotoTag "AntA_ADC_Q_Filt" TagVisibility "global" } Block { BlockType From Name "From3" SID "7053" Position [575, 286, 730, 304] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_enableAutoCorrDet" TagVisibility "global" } Block { BlockType From Name "From4" SID "7054" Position [575, 401, 730, 419] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_enableRSSIdet" TagVisibility "global" } Block { BlockType From Name "From7" SID "7055" Position [135, 425, 260, 445] ShowName off CloseFcn "tagdialog Close" GotoTag "Tx_Running" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "7056" Position [1260, 505, 1445, 525] ShowName off GotoTag "pktDet" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "7057" Position [1525, 400, 1710, 420] ShowName off GotoTag "regRx_pktDetEventCount" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "7058" Position [1530, 445, 1715, 465] ShowName off GotoTag "regRx_pktDetEventCount_en" TagVisibility "global" } Block { BlockType Goto Name "Goto4" SID "7059" Position [915, 710, 1100, 730] ShowName off GotoTag "pktDet_corr" TagVisibility "global" } Block { BlockType Goto Name "Goto5" SID "7060" Position [915, 685, 1100, 705] ShowName off GotoTag "pktDet_rssi" TagVisibility "global" } Block { BlockType Reference Name "Inverter4" SID "7061" Ports [1, 1] Position [1085, 320, 1120, 330] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "35,10,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.931 0.946 0.973 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('b" "lack');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter7" SID "7062" Ports [1, 1] Position [1085, 340, 1120, 350] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "35,10,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.931 0.946 0.973 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('b" "lack');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "7063" Ports [3, 1] Position [850, 261, 895, 349] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2" sg_icon_stat "45,88,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 88 88 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 88 88 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[50." "66 50.66 56.66 50.66 56.66 56.66 56.66 50.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[44.66 44.66 5" "0.66 50.66 44.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[38.66 38.66 44.66 44.66 38.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[32.66 32.66 38.66 32.66 38.66 38.66 32.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "\ncolor('black');disp('or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical3" SID "7064" Ports [2, 1] Position [760, 286, 800, 319] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.4" "4 20.44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.4" "4 20.44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "7065" Ports [3, 1] Position [1160, 297, 1215, 353] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2" sg_icon_stat "55,56,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 56 56 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 56 56 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ]" ",[35.77 35.77 42.77 35.77 42.77 42.77 42.77 35.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[28.7" "7 28.77 35.77 35.77 28.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[21.77 21.77 28.7" "7 28.77 21.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[14.77 14.77 21.77 14.77 21.7" "7 21.77 14.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i" "con text');\n\n\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "7066" Ports [2, 1] Position [325, 397, 355, 448] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2" sg_icon_stat "30,51,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 51 51 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 51 51 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[29.44 " "29.44 33.44 29.44 33.44 33.44 33.44 29.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[25.44 25.44 29.44 2" "9.44 25.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[21.44 21.44 25.44 25.44 21.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[17.44 17.44 21.44 17.44 21.44 21.44 17.44 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('blac" "k');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "7067" Ports [2, 1] Position [760, 401, 800, 434] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2" sg_icon_stat "40,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.4" "4 20.44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.4" "4 20.44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge" SID "7068" Ports [1, 1] Position [1245, 400, 1285, 420] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge" Location [267, 643, 607, 741] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "7069" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "7070" Ports [1, 1] Position [95, 46, 125, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "7071" Ports [1, 1] Position [160, 48, 185, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "7072" Ports [2, 1] Position [215, 28, 260, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7073" Position [285, 43, 315, 57] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } } } Block { BlockType SubSystem Name "RSSI-based PktDet" SID "7074" Ports [3, 1] Position [475, 368, 570, 482] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "RSSI-based PktDet" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Payload" SID "7075" Position [85, 358, 115, 372] IconDisplay "Port number" } Block { BlockType Inport Name "Force Busy" SID "7076" Position [390, 588, 420, 602] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "PktDet Reset" SID "7077" Position [85, 298, 115, 312] Port "3" IconDisplay "Port number" } Block { BlockType SubSystem Name "Ant A Carrier Sensing" SID "7078" Ports [1, 2] Position [440, 428, 540, 477] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Ant A Carrier Sensing" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Avg RSSI" SID "7079" Position [425, 248, 455, 262] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "7080" Ports [1, 1] Position [655, 258, 685, 272] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "8.2" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "7081" Ports [1, 1] Position [740, 323, 770, 337] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "8.2" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From12" SID "7082" Position [290, 266, 470, 284] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_carrierSenseThresh" TagVisibility "global" } Block { BlockType From Name "From2" SID "7083" Position [565, 321, 720, 339] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_pktDetMask_A" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "7084" Ports [1, 1] Position [755, 274, 790, 296] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "35,22,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "7085" Ports [1, 1] Position [845, 321, 865, 339] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "20,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "7086" Ports [2, 1] Position [910, 249, 950, 271] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2" sg_icon_stat "40,22,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "7087" Ports [2, 1] Position [910, 279, 950, 301] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2" sg_icon_stat "40,22,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "7088" Ports [2, 1] Position [555, 243, 600, 287] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "busy" SID "7089" Position [1025, 253, 1055, 267] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "idle" SID "7090" Position [1025, 283, 1055, 297] Port "2" IconDisplay "Port number" } Line { SrcBlock "Avg RSSI" SrcPort 1 DstBlock "Relational1" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 Points [40, 0] Branch { Points [0, 20] DstBlock "Inverter" DstPort 1 } Branch { DstBlock "Logical6" DstPort 2 } } Line { SrcBlock "From12" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 Points [20, 0; 0, -35] DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "busy" DstPort 1 } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "idle" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 Points [45, 0] Branch { DstBlock "Inverter1" DstPort 1 } Branch { Points [0, -75] DstBlock "Logical6" DstPort 1 } } } } Block { BlockType SubSystem Name "Ant B Carrier Sensing" SID "7091" Ports [1, 2] Position [440, 478, 540, 527] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Ant B Carrier Sensing" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Avg RSSI" SID "7092" Position [425, 248, 455, 262] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Convert1" SID "7093" Ports [1, 1] Position [670, 258, 700, 272] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "8.2" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "7094" Ports [1, 1] Position [745, 323, 775, 337] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "8.2" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From12" SID "7095" Position [290, 266, 470, 284] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_carrierSenseThresh" TagVisibility "global" } Block { BlockType From Name "From2" SID "7096" Position [565, 321, 720, 339] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_pktDetMask_B" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "7097" Ports [1, 1] Position [755, 274, 790, 296] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "35,22,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "7098" Ports [1, 1] Position [845, 321, 865, 339] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "20,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "7099" Ports [2, 1] Position [910, 249, 950, 271] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2" sg_icon_stat "40,22,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "7100" Ports [2, 1] Position [910, 279, 950, 301] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2" sg_icon_stat "40,22,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "7101" Ports [2, 1] Position [555, 243, 600, 287] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "busy" SID "7102" Position [1025, 253, 1055, 267] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "idle" SID "7103" Position [1025, 283, 1055, 297] Port "2" IconDisplay "Port number" } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "idle" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "busy" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 Points [20, 0; 0, -35] DstBlock "Logical7" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 Points [25, 0] Branch { DstBlock "Logical6" DstPort 2 } Branch { Points [0, 20] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Avg RSSI" SrcPort 1 DstBlock "Relational1" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 Points [40, 0] Branch { Points [0, -75] DstBlock "Logical6" DstPort 1 } Branch { DstBlock "Inverter1" DstPort 1 } } } } Block { BlockType SubSystem Name "AntA Detector" SID "7104" Ports [2, 2] Position [295, 162, 370, 218] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AntA Detector" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "RSSI" SID "7105" Position [235, 178, 265, 192] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Reset" SID "7106" Position [405, 313, 435, 327] Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "Detection Decision" SID "7107" Ports [2, 1] Position [665, 284, 750, 331] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Detection Decision" Location [572, 342, 1525, 506] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Avg RSSI" SID "7108" Position [305, 223, 335, 237] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Reset" SID "7109" Position [455, 193, 485, 207] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Convert1" SID "7110" Ports [1, 1] Position [995, 216, 1025, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "7111" Ports [2, 1] Position [695, 194, 730, 256] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "11" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,62,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 62 62 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[36.55 36." "55 41.55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 3" "6.55 31.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Display Name "Display" SID "9871" Ports [1] Position [560, 335, 650, 365] Decimation "1" Lockdown off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "7112" Position [220, 241, 375, 259] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_pktDetThresh" TagVisibility "global" } Block { BlockType From Name "From4" SID "7113" Position [220, 271, 375, 289] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_pktDetMinDuration" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "7114" Ports [1, 1] Position [530, 208, 555, 222] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "7115" Ports [2, 1] Position [615, 194, 645, 221] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "7116" Ports [2, 1] Position [430, 218, 475, 262] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "7117" Ports [2, 1] Position [795, 213, 840, 257] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "7118" Ports [2, 1] Position [880, 197, 910, 248] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "7119" Position [140, 88, 170, 102] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "7120" Position [140, 103, 170, 117] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "7121" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "7122" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7123" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Outport Name "Pkt Det" SID "7124" Position [1100, 218, 1130, 232] IconDisplay "Port number" } Line { SrcBlock "From3" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 Points [25, 0] Branch { Points [0, -25] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Counter1" DstPort 2 } } Line { SrcBlock "Reset" SrcPort 1 Points [15, 0] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, -20; 345, 0; 0, 30] DstBlock "S-R Latch" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Counter1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Relational3" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 Points [365, 0; 0, -35] DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Avg RSSI" SrcPort 1 DstBlock "Relational2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Pkt Det" DstPort 1 } Annotation { Position [1012, 232] } } } Block { BlockType From Name "From1" SID "7125" Position [305, 246, 460, 264] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_RSSIavgLength" TagVisibility "global" } Block { BlockType From Name "From12" SID "7126" Position [310, 211, 465, 229] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_MasterReset" TagVisibility "global" } Block { BlockType Reference Name "Gateway Out" SID "7127" Ports [1, 1] Position [920, 139, 950, 151] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "RAWRSSI" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out1" SID "7128" Ports [1, 1] Position [920, 174, 950, 186] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "AVGRSSI" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out2" SID "7129" Ports [1, 1] Position [920, 209, 950, 221] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "PKTDET" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Goto Name "Goto3" SID "7130" Position [855, 380, 1040, 400] ShowName off GotoTag "regPktDet_pktDetected_AntA" TagVisibility "global" } Block { BlockType Scope Name "Pkt Det Decision" SID "7131" Ports [3] Position [1080, 130, 1120, 230] Floating off Location [1385, 111, 2358, 816] Open off NumInputPorts "3" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" } YMin "-1~-1~-1" YMax "1~1~1" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "RF Gain Adj" SID "7132" Ports [1, 1] Position [350, 165, 430, 205] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "RF Gain Adj" Location [452, 496, 992, 690] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "RSSI" SID "7133" Position [830, 273, 860, 287] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "7134" Ports [2, 1] Position [930, 262, 990, 333] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "60,71,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 71 71 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 71 71 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[43.88 43" ".88 51.88 43.88 51.88 51.88 51.88 43.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[35.88 35.88 43.88 43." "88 35.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[27.88 27.88 35.88 35.88 27.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[19.88 19.88 27.88 19.88 27.88 27.88 19.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a " "+ b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "7135" Ports [2, 1] Position [480, 258, 500, 302] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1.3" sg_icon_stat "20,44,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 44 44 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[24.22 24." "22 26.22 24.22 26.22 26.22 26.22 24.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[22.22 22.22 24.22 24.22" " 22.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[20.22 20.22 22.22 22.22 20.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[18.22 18.22 20.22 18.22 20.22 20.22 18.22 ],[0.931 0.946 0.973 ]" ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_labe" "l('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "7136" Ports [0, 1] Position [635, 352, 660, 378] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "7137" Ports [0, 1] Position [615, 327, 660, 353] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "227.33" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "45,26,0,1,white,blue,0,956625d8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 26 26 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'227');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "7138" Ports [0, 1] Position [615, 301, 660, 329] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "483.11" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "9" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "45,28,0,1,white,blue,0,198ed7ed,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('output',1,'483');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "7139" Ports [1, 1] Position [285, 284, 315, 296] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "7140" Ports [1, 1] Position [665, 249, 700, 281] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "10" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "35,32,1,1,white,blue,0,8c471295,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 32 32 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "10}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "7141" Position [60, 281, 215, 299] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_CompensateRSSI_En" TagVisibility "global" } Block { BlockType From Name "From2" SID "7142" Position [265, 236, 420, 254] ShowName off CloseFcn "tagdialog Close" GotoTag "AntA_GainRF" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "7143" Ports [1, 1] Position [380, 282, 410, 298] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "7144" Ports [2, 1] Position [565, 228, 590, 297] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,69,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 69 69 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 69 69 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[37.33 " "37.33 40.33 37.33 40.33 40.33 40.33 37.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[34.33 34.33 37.33" " 37.33 34.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[31.33 31.33 34.33 34.33 31.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[28.33 28.33 31.33 28.33 31.33 31.33 28.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "7145" Ports [5, 1] Position [780, 254, 815, 376] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "10.1.3" sg_icon_stat "35,122,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 17.4286 104.571 122 0 " "],[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 17.4286 104.571 122 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 1" "0.875 5.875 ],[66.55 66.55 71.55 66.55 71.55 71.55 71.55 66.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.87" "5 ],[61.55 61.55 66.55 66.55 61.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[56.55 56.55 " "61.55 61.55 56.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[51.55 51.55 56.55 51.55 56.55 " "56.55 51.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon" " text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black'" ");port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'" "d3');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name " RSSI" SID "7146" Position [1070, 293, 1100, 307] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Mux" DstPort 5 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Mux" DstPort 4 } Line { SrcBlock "Constant2" SrcPort 1 Points [90, 0] Branch { Points [0, -25] DstBlock "Mux" DstPort 2 } Branch { DstBlock "Mux" DstPort 3 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "RSSI" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock " RSSI" DstPort 1 } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 Points [40, 0] Branch { DstBlock "Concat" DstPort 2 } Branch { Points [0, -20] DstBlock "Concat" DstPort 1 } } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Mux" DstPort 1 } Annotation { Name "Delay to compensate for:\nGain control lines ->\nMAX2829 amp settling ->\nRSSI settling ->\nAD9200 pi" "peline delay ->\nFPGA IBUF FF" Position [745, 178] } } } Block { BlockType SubSystem Name "Running Sum" SID "7147" Ports [3, 1] Position [540, 165, 605, 275] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Running Sum" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "RSSI" SID "7148" Position [500, 143, 530, 157] IconDisplay "Port number" } Block { BlockType Inport Name "reset" SID "7149" Position [240, 269, 270, 281] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "avglen" SID "7150" Position [240, 218, 270, 232] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "ASR" SID "7151" Ports [2, 1] Position [720, 165, 760, 200] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,359" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,35,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 35 35 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Accumulator" SID "7152" Ports [2, 1] Position [880, 164, 915, 206] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. Output type and binary point position match the input.

Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to run " "at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "17" overflow "Flag as error" scale "1" rst on hasbypass off en off dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,457" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,42,2,1,white,blue,0,6949434e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "\\bf+=b','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub" SID "7153" Ports [2, 1] Position [805, 146, 840, 199] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "10" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "283,438,356,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,53,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 53 53 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[31.55 31." "55 36.55 31.55 36.55 36.55 36.55 31.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 3" "1.55 26.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[21.55 21.55 26.55 26.55 21.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[16.55 16.55 21.55 16.55 21.55 21.55 16.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "7154" Ports [1, 1] Position [980, 177, 1005, 193] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "17" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "7155" Ports [2, 1] Position [510, 255, 535, 315] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,60,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 60 60 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[33.33 " "33.33 36.33 33.33 36.33 36.33 36.33 33.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[30.33 30.33 33.33" " 33.33 30.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[27.33 27.33 30.33 30.33 27.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33 24.33 27.33 27.33 24.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Long Reset Gen" SID "7156" Ports [2, 1] Position [375, 250, 470, 285] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Long Reset Gen" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "duration" SID "7157" Position [60, 258, 90, 272] IconDisplay "Port number" } Block { BlockType Inport Name "reset_in" SID "7158" Position [60, 188, 90, 202] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Counter" SID "7159" Ports [2, 1] Position [405, 172, 455, 223] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "0" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "8" bin_pt "0" load_pin off rst on en on explicit_period "on" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,619" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{" "\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Relational" SID "7160" Ports [2, 1] Position [530, 188, 575, 232] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "7161" Ports [2, 1] Position [225, 182, 255, 233] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "7162" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "7163" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "7164" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "7165" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7166" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Outport Name "reset_out" SID "7167" Position [465, 93, 495, 107] IconDisplay "Port number" } Line { SrcBlock "Relational" SrcPort 1 Points [0, -50; -210, 0] Branch { Points [0, 25] DstBlock "Counter" DstPort 1 } Branch { Points [-175, 0; 0, 60] DstBlock "S-R Latch" DstPort 2 } } Line { SrcBlock "Counter" SrcPort 1 Points [0, 0] DstBlock "Relational" DstPort 1 } Line { SrcBlock "reset_in" SrcPort 1 DstBlock "S-R Latch" DstPort 1 } Line { SrcBlock "duration" SrcPort 1 Points [420, 0] DstBlock "Relational" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 Points [55, 0] Branch { DstBlock "Counter" DstPort 2 } Branch { Points [0, -110] DstBlock "reset_out" DstPort 1 } } } } Block { BlockType Reference Name "Register" SID "7168" Ports [2, 1] Position [615, 141, 655, 179] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,38,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 38 38 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[24.55 24." "55 29.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[19.55 19.55 24.55 2" "4.55 19.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');" "\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "avg" SID "7169" Position [1060, 178, 1090, 192] IconDisplay "Port number" } Line { SrcBlock "ASR" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 Points [35, 0] Branch { Points [0, 15] DstBlock "ASR" DstPort 1 } Branch { DstBlock "AddSub" DstPort 1 } } Line { SrcBlock "avglen" SrcPort 1 Points [60, 0] Branch { Points [370, 0] DstBlock "ASR" DstPort 2 } Branch { Points [0, 35] DstBlock "Long Reset Gen" DstPort 1 } } Line { SrcBlock "RSSI" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Accumulator" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 Points [40, 0] Branch { Points [0, -115] DstBlock "Register" DstPort 2 } Branch { Points [265, 0; 0, -90] DstBlock "Accumulator" DstPort 2 } } Line { SrcBlock "reset" SrcPort 1 Points [60, 0] Branch { DstBlock "Long Reset Gen" DstPort 2 } Branch { Points [0, 25] DstBlock "Logical" DstPort 2 } } Line { SrcBlock "Long Reset Gen" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Convert7" SrcPort 1 DstBlock "avg" DstPort 1 } Annotation { Name "This block impelemnts a variable-length running sum.\nFor a sum y(n) of the previous N samples of seq" "uence x(n), it implements\ny(n) = y(n-1) + x(n) - x(n-N)\nThis requires a careful reset procedure, where the ful" "l shift register\nis zerored out. Otherwise the feedback-based sum stops working." Position [289, 149] } } } Block { BlockType Outport Name "pktdet" SID "7170" Position [810, 303, 840, 317] IconDisplay "Port number" } Block { BlockType Outport Name "avgRSSI" SID "7171" Position [810, 213, 840, 227] Port "2" IconDisplay "Port number" } Line { SrcBlock "Running Sum" SrcPort 1 Points [35, 0] Branch { DstBlock "avgRSSI" DstPort 1 } Branch { Points [0, -40] DstBlock "Gateway Out1" DstPort 1 } Branch { Labels [0, 0] Points [0, 75] DstBlock "Detection Decision" DstPort 1 } } Line { SrcBlock "From12" SrcPort 1 DstBlock "Running Sum" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Running Sum" DstPort 3 } Line { SrcBlock "RF Gain Adj" SrcPort 1 Points [55, 0] Branch { DstBlock "Running Sum" DstPort 1 } Branch { Points [0, -40] DstBlock "Gateway Out" DstPort 1 } } Line { Name "RAWRSSI" Labels [0, 0] SrcBlock "Gateway Out" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 1 } Line { Name "AVGRSSI" Labels [0, 0] SrcBlock "Gateway Out1" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 2 } Line { Name "PKTDET" Labels [0, 0] SrcBlock "Gateway Out2" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 3 } Line { Labels [0, 0] SrcBlock "Reset" SrcPort 1 DstBlock "Detection Decision" DstPort 2 } Line { SrcBlock "Detection Decision" SrcPort 1 Points [30, 0] Branch { DstBlock "pktdet" DstPort 1 } Branch { Points [0, -45; 110, 0; 0, -50] DstBlock "Gateway Out2" DstPort 1 } Branch { Points [0, 80] DstBlock "Goto3" DstPort 1 } } Line { SrcBlock "RSSI" SrcPort 1 DstBlock "RF Gain Adj" DstPort 1 } } } Block { BlockType SubSystem Name "AntB Detector" SID "7172" Ports [2, 2] Position [295, 227, 370, 283] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AntB Detector" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "RSSI" SID "7173" Position [210, 178, 240, 192] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Reset" SID "7174" Position [405, 313, 435, 327] Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "Detection Decision" SID "7175" Ports [2, 1] Position [665, 284, 750, 331] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Detection Decision" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Avg RSSI" SID "7176" Position [365, 223, 395, 237] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Reset" SID "7177" Position [455, 193, 485, 207] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Convert1" SID "7178" Ports [1, 1] Position [965, 216, 995, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "7179" Ports [2, 1] Position [695, 194, 730, 256] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "11" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,62,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 62 62 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[36.55 36." "55 41.55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 3" "6.55 31.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From3" SID "7180" Position [220, 241, 375, 259] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_pktDetThresh" TagVisibility "global" } Block { BlockType From Name "From4" SID "7181" Position [220, 271, 375, 289] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_pktDetMinDuration" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "7182" Ports [1, 1] Position [530, 208, 555, 222] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "7183" Ports [2, 1] Position [615, 194, 645, 221] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "7184" Ports [2, 1] Position [430, 218, 475, 262] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "7185" Ports [2, 1] Position [770, 213, 815, 257] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "7186" Ports [2, 1] Position [855, 197, 885, 248] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "7187" Position [140, 88, 170, 102] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "7188" Position [140, 103, 170, 117] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "7189" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "7190" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7191" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Outport Name "Pkt Det" SID "7192" Position [1075, 218, 1105, 232] IconDisplay "Port number" } Line { SrcBlock "From3" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 Points [25, 0] Branch { Points [0, -25] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Counter1" DstPort 2 } } Line { SrcBlock "Reset" SrcPort 1 Points [15, 0] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, -20; 320, 0; 0, 30] DstBlock "S-R Latch" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Counter1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Relational3" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 Points [365, 0; 0, -35] DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Avg RSSI" SrcPort 1 DstBlock "Relational2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Pkt Det" DstPort 1 } Annotation { Position [987, 232] } } } Block { BlockType From Name "From1" SID "7193" Position [305, 246, 460, 264] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_RSSIavgLength" TagVisibility "global" } Block { BlockType From Name "From12" SID "7194" Position [310, 211, 465, 229] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_MasterReset" TagVisibility "global" } Block { BlockType Reference Name "Gateway Out" SID "7195" Ports [1, 1] Position [920, 139, 950, 151] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "RAWRSSI" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out1" SID "7196" Ports [1, 1] Position [920, 174, 950, 186] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "AVGRSSI" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out2" SID "7197" Ports [1, 1] Position [920, 209, 950, 221] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "PKTDET" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Goto Name "Goto3" SID "7198" Position [815, 355, 1000, 375] ShowName off GotoTag "regPktDet_pktDetected_AntB" TagVisibility "global" } Block { BlockType Scope Name "Pkt Det Decision" SID "7199" Ports [3] Position [1080, 130, 1120, 230] Floating off Location [6, 57, 979, 762] Open off NumInputPorts "3" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" } YMin "-1~-1~-1" YMax "1~1~1" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "RF Gain Adj" SID "7200" Ports [1, 1] Position [355, 165, 435, 205] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "RF Gain Adj" Location [202, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "RSSI" SID "7201" Position [830, 273, 860, 287] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "7202" Ports [2, 1] Position [930, 262, 990, 333] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "60,71,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 71 71 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 71 71 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[43.88 43" ".88 51.88 43.88 51.88 51.88 51.88 43.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[35.88 35.88 43.88 43." "88 35.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[27.88 27.88 35.88 35.88 27.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[19.88 19.88 27.88 19.88 27.88 27.88 19.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a " "+ b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "7203" Ports [2, 1] Position [480, 258, 500, 302] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1.3" sg_icon_stat "20,44,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 44 44 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[24.22 24." "22 26.22 24.22 26.22 26.22 26.22 24.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[22.22 22.22 24.22 24.22" " 22.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[20.22 20.22 22.22 22.22 20.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[18.22 18.22 20.22 18.22 20.22 20.22 18.22 ],[0.931 0.946 0.973 ]" ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_labe" "l('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "7204" Ports [0, 1] Position [635, 352, 660, 378] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "7205" Ports [0, 1] Position [615, 327, 660, 353] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "227.33" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "45,26,0,1,white,blue,0,956625d8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 26 26 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'227');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "7206" Ports [0, 1] Position [615, 301, 660, 329] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "483.11" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "9" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "45,28,0,1,white,blue,0,198ed7ed,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('output',1,'483');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "7207" Ports [1, 1] Position [285, 284, 315, 296] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "7208" Ports [1, 1] Position [665, 249, 700, 281] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "10" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "35,32,1,1,white,blue,0,8c471295,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 32 32 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "10}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "7209" Position [60, 281, 215, 299] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_CompensateRSSI_En" TagVisibility "global" } Block { BlockType From Name "From2" SID "7210" Position [265, 236, 420, 254] ShowName off CloseFcn "tagdialog Close" GotoTag "AntB_GainRF" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "7211" Ports [1, 1] Position [380, 282, 410, 298] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "7212" Ports [2, 1] Position [565, 228, 590, 297] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,69,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 69 69 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 69 69 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[37.33 " "37.33 40.33 37.33 40.33 40.33 40.33 37.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[34.33 34.33 37.33" " 37.33 34.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[31.33 31.33 34.33 34.33 31.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[28.33 28.33 31.33 28.33 31.33 31.33 28.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "7213" Ports [5, 1] Position [780, 254, 815, 376] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "10.1.3" sg_icon_stat "35,122,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 17.4286 104.571 122 0 " "],[0.77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 17.4286 104.571 122 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 1" "0.875 5.875 ],[66.55 66.55 71.55 66.55 71.55 71.55 71.55 66.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.87" "5 ],[61.55 61.55 66.55 66.55 61.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[56.55 56.55 " "61.55 61.55 56.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[51.55 51.55 56.55 51.55 56.55 " "56.55 51.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon" " text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black'" ");port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'" "d3');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name " RSSI" SID "7214" Position [1070, 293, 1100, 307] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Mux" DstPort 5 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Mux" DstPort 4 } Line { SrcBlock "Constant2" SrcPort 1 Points [90, 0] Branch { Points [0, -25] DstBlock "Mux" DstPort 2 } Branch { DstBlock "Mux" DstPort 3 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "RSSI" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock " RSSI" DstPort 1 } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 Points [40, 0] Branch { DstBlock "Concat" DstPort 2 } Branch { Points [0, -20] DstBlock "Concat" DstPort 1 } } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Mux" DstPort 1 } Annotation { Name "Delay to compensate for:\nGain control lines ->\nMAX2829 amp settling ->\nRSSI settling ->\nAD9200 pi" "peline delay ->\nFPGA IBUF FF" Position [745, 178] } } } Block { BlockType SubSystem Name "Running Sum" SID "7215" Ports [3, 1] Position [540, 165, 605, 275] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Running Sum" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "RSSI" SID "7216" Position [500, 143, 530, 157] IconDisplay "Port number" } Block { BlockType Inport Name "reset" SID "7217" Position [240, 269, 270, 281] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "avglen" SID "7218" Position [240, 218, 270, 232] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "ASR" SID "7219" Ports [2, 1] Position [720, 165, 760, 200] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed and " " driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, Virt" "ex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,359" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,35,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 35 35 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Accumulator" SID "7220" Ports [2, 1] Position [880, 164, 915, 206] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. Output type and binary point position match the input.

Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to run " "at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "17" overflow "Flag as error" scale "1" rst on hasbypass off en off dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,457" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,42,2,1,white,blue,0,6949434e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 42 42 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'" "\\bf+=b','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub" SID "7221" Ports [2, 1] Position [805, 146, 840, 199] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "10" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "283,438,356,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,53,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 53 53 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[31.55 31." "55 36.55 31.55 36.55 36.55 36.55 31.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 3" "1.55 26.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[21.55 21.55 26.55 26.55 21.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[16.55 16.55 21.55 16.55 21.55 21.55 16.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "7222" Ports [1, 1] Position [965, 177, 990, 193] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "15" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "7223" Ports [2, 1] Position [510, 255, 535, 315] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,60,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 60 60 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[33.33 " "33.33 36.33 33.33 36.33 36.33 36.33 33.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[30.33 30.33 33.33" " 33.33 30.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[27.33 27.33 30.33 30.33 27.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[24.33 24.33 27.33 24.33 27.33 27.33 24.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Long Reset Gen" SID "7224" Ports [2, 1] Position [375, 250, 470, 285] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Long Reset Gen" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "duration" SID "7225" Position [60, 258, 90, 272] IconDisplay "Port number" } Block { BlockType Inport Name "reset_in" SID "7226" Position [60, 188, 90, 202] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Counter" SID "7227" Ports [2, 1] Position [405, 172, 455, 223] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "0" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "8" bin_pt "0" load_pin off rst on en on explicit_period "on" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,619" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{" "\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Relational" SID "7228" Ports [2, 1] Position [530, 188, 575, 232] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "7229" Ports [2, 1] Position [225, 182, 255, 233] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "7230" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "7231" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "7232" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "7233" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7234" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType Outport Name "reset_out" SID "7235" Position [465, 93, 495, 107] IconDisplay "Port number" } Line { SrcBlock "S-R Latch" SrcPort 1 Points [55, 0] Branch { Points [0, -110] DstBlock "reset_out" DstPort 1 } Branch { DstBlock "Counter" DstPort 2 } } Line { SrcBlock "duration" SrcPort 1 Points [420, 0] DstBlock "Relational" DstPort 2 } Line { SrcBlock "reset_in" SrcPort 1 DstBlock "S-R Latch" DstPort 1 } Line { SrcBlock "Counter" SrcPort 1 Points [0, 0] DstBlock "Relational" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [0, -50; -210, 0] Branch { Points [-175, 0; 0, 60] DstBlock "S-R Latch" DstPort 2 } Branch { Points [0, 25] DstBlock "Counter" DstPort 1 } } } } Block { BlockType Reference Name "Register" SID "7236" Ports [2, 1] Position [615, 141, 655, 179] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,38,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 38 38 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[24.55 24." "55 29.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[19.55 19.55 24.55 2" "4.55 19.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');" "\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "avg" SID "7237" Position [1050, 178, 1080, 192] IconDisplay "Port number" } Line { SrcBlock "Long Reset Gen" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "reset" SrcPort 1 Points [60, 0] Branch { Points [0, 25] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Long Reset Gen" DstPort 2 } } Line { SrcBlock "Logical" SrcPort 1 Points [40, 0] Branch { Points [265, 0; 0, -90] DstBlock "Accumulator" DstPort 2 } Branch { Points [0, -115] DstBlock "Register" DstPort 2 } } Line { SrcBlock "Accumulator" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "RSSI" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "avglen" SrcPort 1 Points [60, 0] Branch { Points [0, 35] DstBlock "Long Reset Gen" DstPort 1 } Branch { Points [370, 0] DstBlock "ASR" DstPort 2 } } Line { SrcBlock "Register" SrcPort 1 Points [35, 0] Branch { DstBlock "AddSub" DstPort 1 } Branch { Points [0, 15] DstBlock "ASR" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "ASR" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Convert7" SrcPort 1 DstBlock "avg" DstPort 1 } Annotation { Name "This block impelemnts a variable-length running sum.\nFor a sum y(n) of the previous N samples of seq" "uence x(n), it implements\ny(n) = y(n-1) + x(n) - x(n-N)\nThis requires a careful reset procedure, where the ful" "l shift register\nis zerored out. Otherwise the feedback-based sum stops working." Position [289, 149] } } } Block { BlockType Outport Name "pktdet" SID "7238" Position [810, 303, 840, 317] IconDisplay "Port number" } Block { BlockType Outport Name "avgRSSI" SID "7239" Position [810, 213, 840, 227] Port "2" IconDisplay "Port number" } Line { SrcBlock "Detection Decision" SrcPort 1 Points [30, 0] Branch { Points [0, -45; 110, 0; 0, -50] DstBlock "Gateway Out2" DstPort 1 } Branch { DstBlock "pktdet" DstPort 1 } Branch { Points [0, 55] DstBlock "Goto3" DstPort 1 } } Line { Labels [0, 0] SrcBlock "Reset" SrcPort 1 DstBlock "Detection Decision" DstPort 2 } Line { Name "PKTDET" Labels [0, 0] SrcBlock "Gateway Out2" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 3 } Line { Name "AVGRSSI" Labels [0, 0] SrcBlock "Gateway Out1" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 2 } Line { Name "RAWRSSI" Labels [0, 0] SrcBlock "Gateway Out" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 1 } Line { SrcBlock "RF Gain Adj" SrcPort 1 Points [50, 0] Branch { Points [0, -40] DstBlock "Gateway Out" DstPort 1 } Branch { DstBlock "Running Sum" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "Running Sum" DstPort 3 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Running Sum" DstPort 2 } Line { SrcBlock "Running Sum" SrcPort 1 Points [35, 0] Branch { Points [0, -40] DstBlock "Gateway Out1" DstPort 1 } Branch { DstBlock "avgRSSI" DstPort 1 } Branch { Labels [0, 0] Points [0, 75] DstBlock "Detection Decision" DstPort 1 } } Line { SrcBlock "RSSI" SrcPort 1 DstBlock "RF Gain Adj" DstPort 1 } } } Block { BlockType Constant Name "Constant1" SID "7240" Position [15, 166, 35, 184] ShowName off Value "100" } Block { BlockType Constant Name "Constant2" SID "7241" Position [745, 681, 765, 699] ShowName off Value "0" } Block { BlockType Constant Name "Constant3" SID "7242" Position [15, 231, 35, 249] ShowName off Value "0" } Block { BlockType Reference Name "Convert3" SID "7243" Ports [1, 1] Position [955, 637, 980, 653] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert5" SID "7244" Ports [1, 1] Position [605, 202, 630, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "7245" Ports [1, 1] Position [520, 587, 545, 603] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10.22 12" ".22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22 8.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "DIFS Counter" SID "7246" Ports [2, 1] Position [880, 550, 990, 590] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "DIFS Counter" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Busy" SID "7247" Position [305, 193, 335, 207] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Idle" SID "7248" Position [305, 233, 335, 247] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Convert1" SID "7249" Ports [1, 1] Position [975, 216, 1005, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "7250" Ports [1, 1] Position [405, 231, 435, 249] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "7251" Ports [1, 1] Position [405, 191, 435, 209] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter1" SID "7252" Ports [2, 1] Position [695, 194, 730, 256] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "10" bin_pt "0" load_pin off rst on en on explicit_period "off" period "4" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "35,62,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 62 62 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[36.55 36." "55 41.55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[31.55 31.55 36.55 3" "6.55 31.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From4" SID "7253" Position [220, 271, 375, 289] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_DIFSperiod" TagVisibility "global" } Block { BlockType Goto Name "Goto18" SID "7254" Position [830, 360, 1015, 380] ShowName off GotoTag "regPktDet_idleCounter" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "7255" Ports [1, 1] Position [530, 208, 555, 222] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "7256" Ports [2, 1] Position [615, 194, 645, 221] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "7257" Ports [2, 1] Position [795, 213, 840, 257] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "500,165,356,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "7258" Ports [2, 1] Position [895, 197, 925, 248] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "7259" Position [140, 88, 170, 102] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "7260" Position [140, 103, 170, 117] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "7261" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "7262" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7263" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType Outport Name "Idle for DIFS" SID "7264" Position [1110, 218, 1140, 232] IconDisplay "Port number" } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Idle for DIFS" DstPort 1 } Line { SrcBlock "Idle" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "S-R Latch" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 Points [365, 0; 0, -35] DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Counter1" SrcPort 1 Points [25, 0] Branch { DstBlock "Relational3" DstPort 1 } Branch { Points [0, 145] DstBlock "Goto18" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Counter1" DstPort 1 } Line { SrcBlock "Busy" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 Points [65, 0] Branch { DstBlock "Counter1" DstPort 2 } Branch { Points [0, -25] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Convert3" SrcPort 1 Points [65, 0] Branch { Points [0, -20; 345, 0; 0, 30] DstBlock "S-R Latch" DstPort 1 } Branch { DstBlock "Logical1" DstPort 1 } } Annotation { Position [1012, 232] } } } Block { BlockType Reference Name "Down Sample1" SID "7265" Ports [1, 1] Position [190, 162, 215, 188] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample2" SID "7266" Ports [1, 1] Position [190, 227, 215, 253] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "7267" Ports [1, 1] Position [920, 677, 945, 703] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From4" SID "7268" Position [755, 636, 910, 654] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_CSMAenableIdle" TagVisibility "global" } Block { BlockType Reference Name "Gateway Out" SID "7269" Ports [1, 1] Position [985, 364, 1015, 376] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Gateway Out1" SID "7270" Ports [1, 1] Position [985, 399, 1015, 411] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Gateway Out2" SID "7271" Ports [1, 1] Position [985, 434, 1015, 446] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,330" block_type "gatewayout" block_version "8.2" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Goto Name "Goto18" SID "7272" Position [1220, 640, 1405, 660] ShowName off GotoTag "regPktDet_idleForDIFS" TagVisibility "global" } Block { BlockType Reference Name "IDLEFORDIFS" SID "7273" Ports [1, 1] Position [1210, 569, 1265, 591] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,22,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.985 0.979 0.895 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.985 0.979 " "0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "IDLEFORDIFS_disable" SID "7274" Ports [1, 1] Position [805, 679, 860, 701] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed " "point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,423" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,22,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.985 0.979 0.895 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.985 0.979 " "0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "7275" Ports [1, 1] Position [975, 681, 995, 699] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,251" block_type "inv" block_version "8.2" sg_icon_stat "20,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13." "22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0" ".931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([7.55 14.44" " 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: e" "nd icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT" ": end icon text');" } Block { BlockType Reference Name "Inverter9" SID "7276" Ports [1, 1] Position [680, 586, 700, 604] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,251" block_type "inv" block_version "8.2" sg_icon_stat "20,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11.22 13." "22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0" ".931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([7.55 14.44" " 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: e" "nd icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT" ": end icon text');" } Block { BlockType Reference Name "Logical11" SID "7277" Ports [3, 1] Position [785, 559, 825, 601] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2" sg_icon_stat "40,42,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26.55 31." "55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 26.55 21." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp(" "'and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical13" SID "7278" Ports [3, 1] Position [1045, 563, 1085, 597] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2" sg_icon_stat "40,34,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.44 21.44 25" ".44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.44 21.44 17.44" " ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\npatch(" "[15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('and');\n" "fprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical5" SID "7279" Ports [3, 1] Position [785, 473, 820, 507] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2" sg_icon_stat "35,34,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 34 34 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 34 34 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[21.44 21.44 25.4" "4 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[17.44 17.44 21.44 21.44 17.44 ]," "[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\npatch([12.1" " 25.88 21.88 17.88 13.88 8.1 12.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('or');\nfprintf" "('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "MIMO Logic" SID "7280" Ports [2, 1] Position [455, 141, 510, 274] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MIMO Logic" Location [160, 74, 1910, 1156] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Det A" SID "7281" Position [480, 198, 510, 212] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Det B" SID "7282" Position [480, 278, 510, 292] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Convert1" SID "7283" Ports [1, 1] Position [560, 277, 585, 293] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "7284" Ports [1, 1] Position [560, 222, 585, 238] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "7285" Ports [1, 1] Position [560, 302, 585, 318] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "7286" Ports [1, 1] Position [560, 172, 585, 188] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "7287" Ports [1, 1] Position [560, 197, 585, 213] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "7288" Position [330, 301, 485, 319] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_pktDetMask_B" TagVisibility "global" } Block { BlockType From Name "From2" SID "7289" Position [330, 221, 485, 239] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_pktDetMask_A" TagVisibility "global" } Block { BlockType From Name "From8" SID "7290" Position [330, 171, 485, 189] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_pktDetMode" TagVisibility "global" } Block { BlockType Reference Name "Logical" SID "7291" Ports [2, 1] Position [650, 190, 675, 245] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "10.1.3" sg_icon_stat "25,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 55 55 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[30.33 " "30.33 33.33 30.33 33.33 33.33 33.33 30.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33" " 30.33 27.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[24.33 24.33 27.33 27.33 24.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[21.33 21.33 24.33 21.33 24.33 24.33 21.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "7292" Ports [2, 1] Position [650, 270, 675, 325] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "10.1.3" sg_icon_stat "25,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 55 55 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[30.33 " "30.33 33.33 30.33 33.33 33.33 33.33 30.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33" " 30.33 27.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[24.33 24.33 27.33 27.33 24.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[21.33 21.33 24.33 21.33 24.33 24.33 21.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "7293" Ports [2, 1] Position [780, 260, 805, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,55,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 55 55 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[30.33 " "30.33 33.33 30.33 33.33 33.33 33.33 30.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33" " 30.33 27.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[24.33 24.33 27.33 27.33 24.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[21.33 21.33 24.33 21.33 24.33 24.33 21.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "7294" Ports [2, 1] Position [780, 205, 805, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "25,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 55 55 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[30.33 " "30.33 33.33 30.33 33.33 33.33 33.33 30.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33" " 30.33 27.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[24.33 24.33 27.33 27.33 24.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[21.33 21.33 24.33 21.33 24.33 24.33 21.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "7295" Ports [3, 1] Position [900, 151, 925, 319] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "25,168,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 24 144 168 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 24 144 168 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[" "87.33 87.33 90.33 87.33 90.33 90.33 90.33 87.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[84.33 84.33" " 87.33 87.33 84.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[81.33 81.33 84.33 84.33 81.3" "3 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[78.33 78.33 81.33 78.33 81.33 81.33 78.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('i" "nput',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "PktDet" SID "7296" Position [1005, 228, 1035, 242] IconDisplay "Port number" } Line { SrcBlock "From8" SrcPort 1 DstBlock "Convert4" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Det A" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "Det B" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert7" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [25, 0] Branch { Points [0, 55] DstBlock "Logical2" DstPort 1 } Branch { DstBlock "Logical3" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical2" DstPort 2 } Branch { Points [0, -55] DstBlock "Logical3" DstPort 2 } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Convert4" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "PktDet" DstPort 1 } } } Block { BlockType SubSystem Name "Mid-Packet\nRSSI Register" SID "7297" Ports [3] Position [535, 315, 575, 375] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Mid-Packet\nRSSI Register" Location [615, 320, 1095, 471] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "AntB" SID "7298" Position [220, 213, 250, 227] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "AntA" SID "7299" Position [220, 243, 250, 257] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Payload" SID "7300" Position [385, 278, 415, 292] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Concat1" SID "7301" Ports [2, 1] Position [470, 205, 530, 265] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,165" block_type "concat" block_version "10.1.3" sg_icon_stat "60,60,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38" ".88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38." "88 30.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','" "texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "7302" Ports [1, 1] Position [540, 277, 565, 293] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert5" SID "7303" Ports [1, 1] Position [355, 212, 380, 228] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "16" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert6" SID "7304" Ports [1, 1] Position [355, 242, 380, 258] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "16" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Terminator Name "Terminator" SID "7305" Position [735, 240, 755, 260] ShowName off } Block { BlockType Reference Name "To Register2" SID "7306" Ports [2, 1] Position [620, 222, 680, 278] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'midPacketRSSI'" init "0" ownership "Locally owned and initialized" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,266" block_type "toreg" block_version "10.1.3" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36" ".88 44.88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36." "88 28.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "posedge1" SID "7307" Ports [1, 1] Position [475, 274, 520, 296] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge1" Location [459, 339, 854, 490] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In" SID "7308" Position [20, 33, 50, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "7309" Ports [1, 1] Position [80, 67, 140, 123] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2" sg_icon_stat "60,56,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36" ".88 44.88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36." "88 28.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "7310" Ports [1, 1] Position [170, 66, 225, 124] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "55,58,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 58 58 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[36" ".77 36.77 43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[29.77 29." "77 36.77 36.77 29.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[22.77 22.77 29.77 29.7" "7 22.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[15.77 15.77 22.77 15.77 22.77 22.77" " 15.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "7311" Ports [2, 1] Position [260, 25, 315, 85] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2" sg_icon_stat "55,60,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[37" ".77 37.77 44.77 37.77 44.77 44.77 44.77 37.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[30.77 30." "77 37.77 37.77 30.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[23.77 23.77 30.77 30.7" "7 23.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[16.77 16.77 23.77 16.77 23.77 23.77" " 16.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "7312" Position [340, 48, 370, 62] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 Points [0, 0] DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 Points [5, 0; 0, -25] DstBlock "Logical" DstPort 2 } Line { SrcBlock "In" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 55] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [0, 0] DstBlock "Out" DstPort 1 } } } Line { SrcBlock "Payload" SrcPort 1 DstBlock "posedge1" DstPort 1 } Line { SrcBlock "posedge1" SrcPort 1 DstBlock "Convert4" DstPort 1 } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "To Register2" DstPort 1 } Line { SrcBlock "To Register2" SrcPort 1 DstBlock "Terminator" DstPort 1 } Line { SrcBlock "Convert4" SrcPort 1 Points [5, 0; 0, -20] DstBlock "To Register2" DstPort 2 } Line { SrcBlock "Convert5" SrcPort 1 DstBlock "Concat1" DstPort 1 } Line { SrcBlock "Convert6" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "AntB" SrcPort 1 DstBlock "Convert5" DstPort 1 } Line { SrcBlock "AntA" SrcPort 1 DstBlock "Convert6" DstPort 1 } } } Block { BlockType Scope Name "Pkt Det Decision" SID "7313" Ports [3] Position [1145, 355, 1185, 455] Floating off Location [156, 444, 1129, 1149] Open off NumInputPorts "3" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" } YMin "-1~-1~-1" YMax "1~1~1" SaveName "ScopeData54" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "RSSI Clock\nGenerator" SID "7314" Ports [] Position [200, 395, 251, 451] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "RSSI Clock\nGenerator" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "2-bit Counter" SID "7315" Ports [0, 1] Position [180, 196, 230, 224] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "2" bin_pt "0" load_pin off rst off en off explicit_period "on" period "2" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,630" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,28,0,1,white,blue,0,7ac47ef5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 28 28 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');disp('" "{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From8" SID "7316" Position [195, 161, 350, 179] ShowName off CloseFcn "tagdialog Close" GotoTag "regPktDet_RSSIclkRatioSel" TagVisibility "global" } Block { BlockType Reference Name "LSB" SID "7317" Ports [1, 1] Position [305, 201, 340, 219] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "8.2.02" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "LSB1" SID "7318" Ports [1, 1] Position [305, 241, 340, 259] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "8.2.02" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "7319" Ports [3, 1] Position [395, 147, 420, 273] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "8.2.02" sg_icon_stat "25,126,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 18 108 126 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 18 108 126 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[" "66.33 66.33 69.33 66.33 69.33 69.33 69.33 66.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[63.33 63.33" " 66.33 66.33 63.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[60.33 60.33 63.33 63.33 60.3" "3 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[57.33 57.33 60.33 57.33 60.33 60.33 57.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('i" "nput',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "RSSI Clock" SID "7320" Ports [1] Position [575, 194, 605, 226] Floating off Location [177, 337, 990, 920] Open off NumInputPorts "1" List { ListType AxesTitles axes1 "%" } SaveName "ScopeData3" DataFormat "StructureWithTime" SampleTime "0" } Block { BlockType Reference Name "RSSI_CLK_OUT" SID "7321" Ports [1, 1] Position [470, 199, 525, 221] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,22,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.95 0.93" " 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.985 0.979 0.895 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.985 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode'" ",'on');\nfprintf('','COMMENT: end icon text');" } Line { SrcBlock "From8" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "LSB1" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "LSB" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "RSSI_CLK_OUT" DstPort 1 } Line { SrcBlock "RSSI_CLK_OUT" SrcPort 1 DstBlock "RSSI Clock" DstPort 1 } Line { SrcBlock "2-bit Counter" SrcPort 1 Points [40, 0] Branch { DstBlock "LSB" DstPort 1 } Branch { Points [0, 40] DstBlock "LSB1" DstPort 1 } } Annotation { Name "The RSSI ADC on the radio board can be clocked up to 20MHz.\nWe clock it at 10MHz (1/4 the I/Q sampin" "g rate). This\nclock is generated here by a 20MHz 2-bit counter. If the LBS is used,\nthe RSSI clock will be CLK" "/2 (10MHz). If the second LSB is used,\nit will be CLK/4 (5MHz). " Position [353, 333] } } } Block { BlockType Reference Name "RSSI_AntA" SID "7322" Ports [1, 1] Position [75, 164, 130, 186] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed " "point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "10" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,423" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,22,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.985 0.979 0.895 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.985 0.979 " "0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "RSSI_AntB" SID "7323" Ports [1, 1] Position [75, 229, 130, 251] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed " "point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "10" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,423" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,22,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.985 0.979 0.895 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.985 0.979 " "0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample7" SID "7324" Ports [1, 1] Position [1130, 566, 1165, 594] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,263" block_type "usamp" block_version "8.2" sg_icon_stat "35,28,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1" " 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}\\" "bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "PktDet" SID "7325" Position [1145, 203, 1175, 217] IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "RSSI_AntA" DstPort 1 } Line { SrcBlock "RSSI_AntA" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "RSSI_AntB" DstPort 1 } Line { SrcBlock "RSSI_AntB" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "AntA Detector" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "AntB Detector" DstPort 1 } Line { SrcBlock "AntA Detector" SrcPort 1 DstBlock "MIMO Logic" DstPort 1 } Line { SrcBlock "AntB Detector" SrcPort 1 DstBlock "MIMO Logic" DstPort 2 } Line { SrcBlock "MIMO Logic" SrcPort 1 DstBlock "Convert5" DstPort 1 } Line { SrcBlock "AntA Detector" SrcPort 2 Points [50, 0; 0, 140] Branch { DstBlock "Ant A Carrier Sensing" DstPort 1 } Branch { Labels [0, 0] DstBlock "Mid-Packet\nRSSI Register" DstPort 2 } } Line { SrcBlock "AntB Detector" SrcPort 2 Points [40, 0; 0, 55] Branch { Points [0, 180] DstBlock "Ant B Carrier Sensing" DstPort 1 } Branch { Labels [0, 0] DstBlock "Mid-Packet\nRSSI Register" DstPort 1 } } Line { SrcBlock "Ant A Carrier Sensing" SrcPort 1 Points [135, 0; 0, 40] DstBlock "Logical5" DstPort 1 } Line { SrcBlock "Ant B Carrier Sensing" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Ant A Carrier Sensing" SrcPort 2 Points [120, 0] Branch { Points [0, 100] DstBlock "Logical11" DstPort 1 } Branch { Points [0, -60] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "Ant B Carrier Sensing" SrcPort 2 Points [110, 0; 0, 65] DstBlock "Logical11" DstPort 2 } Line { SrcBlock "Inverter9" SrcPort 1 DstBlock "Logical11" DstPort 3 } Line { SrcBlock "Force Busy" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Logical13" SrcPort 1 DstBlock "Up Sample7" DstPort 1 } Line { SrcBlock "Up Sample7" SrcPort 1 Points [10, 0] Branch { DstBlock "IDLEFORDIFS" DstPort 1 } Branch { Points [0, 70] DstBlock "Goto18" DstPort 1 } } Line { SrcBlock "PktDet Reset" SrcPort 1 Points [130, 0; 0, -35] Branch { Points [0, -65] DstBlock "AntA Detector" DstPort 2 } Branch { DstBlock "AntB Detector" DstPort 2 } } Line { SrcBlock "Convert7" SrcPort 1 Points [80, 0] Branch { Points [0, -95] DstBlock "Logical5" DstPort 3 } Branch { DstBlock "Inverter9" DstPort 1 } } Line { SrcBlock "Convert3" SrcPort 1 Points [35, 0; 0, -65] DstBlock "Logical13" DstPort 2 } Line { SrcBlock "Payload" SrcPort 1 DstBlock "Mid-Packet\nRSSI Register" DstPort 3 } Line { SrcBlock "Logical11" SrcPort 1 DstBlock "DIFS Counter" DstPort 2 } Line { SrcBlock "Logical5" SrcPort 1 Points [25, 0; 0, 70] DstBlock "DIFS Counter" DstPort 1 } Line { SrcBlock "DIFS Counter" SrcPort 1 Points [20, 0] Branch { DstBlock "Logical13" DstPort 1 } Branch { Points [0, -70; -45, 0] DstBlock "Gateway Out2" DstPort 1 } } Line { SrcBlock "Gateway Out" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 1 } Line { SrcBlock "Gateway Out1" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 2 } Line { SrcBlock "Gateway Out2" SrcPort 1 DstBlock "Pkt Det Decision" DstPort 3 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "IDLEFORDIFS_disable" DstPort 1 } Line { SrcBlock "IDLEFORDIFS_disable" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 Points [30, 0] DstBlock "Logical13" DstPort 3 } Line { SrcBlock "Convert5" SrcPort 1 Points [220, 0] Branch { DstBlock "PktDet" DstPort 1 } Branch { Points [0, 160] DstBlock "Gateway Out" DstPort 1 } } } } Block { BlockType Reference Name "Register1" SID "7326" Ports [1, 1] Position [915, 570, 945, 600] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "7327" Ports [1, 1] Position [915, 635, 945, 665] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "7328" Ports [1, 1] Position [1450, 396, 1485, 424] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sampl" "e.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a m" "ux and single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,263" block_type "usamp" block_version "8.2" sg_icon_stat "35,28,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "debug_pktDetAutoCorr" SID "7329" Ports [1, 1] Position [1000, 643, 1040, 657] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.89" "5 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "debug_pktDetRSSI" SID "7330" Ports [1, 1] Position [995, 578, 1035, 592] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.89" "5 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "pktdet" SID "7331" Ports [1, 1] Position [1290, 608, 1330, 622] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.89" "5 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Pkt Det" SID "7332" Position [1300, 318, 1330, 332] IconDisplay "Port number" } Line { SrcBlock "From15" SrcPort 1 Points [60, 0] Branch { Points [0, -160] DstBlock "Auto-Correlation\nPkt Det Embedded MULT\n(for V2P/V6 export)" DstPort 1 } Branch { DstBlock "Auto-Correlation\nPkt Det HDL MULT\n(for V4 export)" DstPort 1 } } Line { SrcBlock "From2" SrcPort 1 Points [65, 0] Branch { Points [0, -160] DstBlock "Auto-Correlation\nPkt Det Embedded MULT\n(for V2P/V6 export)" DstPort 2 } Branch { DstBlock "Auto-Correlation\nPkt Det HDL MULT\n(for V4 export)" DstPort 2 } } Line { SrcBlock "Reset" SrcPort 1 Points [170, 0] Branch { DstBlock "RSSI-based PktDet" DstPort 3 } Branch { Points [0, 50; 490, 0; 0, -170] DstBlock "Inverter7" DstPort 1 } Branch { Points [0, -115] Branch { Points [0, -160] DstBlock "Auto-Correlation\nPkt Det Embedded MULT\n(for V2P/V6 export)" DstPort 3 } Branch { DstBlock "Auto-Correlation\nPkt Det HDL MULT\n(for V4 export)" DstPort 3 } } } Line { SrcBlock "Pkt Active" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Posedge" SrcPort 1 DstBlock "Counter1" DstPort 1 } Line { SrcBlock "Counter1" SrcPort 1 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "debug_pktDetRSSI" DstPort 1 } Line { SrcBlock "Inverter4" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Inverter7" SrcPort 1 DstBlock "Logical4" DstPort 3 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Inverter4" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Payload" SrcPort 1 DstBlock "RSSI-based PktDet" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "RSSI-based PktDet" DstPort 2 } Line { SrcBlock "Ext PktDet" SrcPort 1 Points [15, 0; 0, 50] DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Auto-Correlation\nPkt Det HDL MULT\n(for V4 export)" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "RSSI-based PktDet" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 Points [15, 0] Branch { Points [0, -85] DstBlock "Logical2" DstPort 3 } Branch { Points [0, 165] Branch { DstBlock "Register1" DstPort 1 } Branch { Points [0, 110] DstBlock "Goto5" DstPort 1 } } } Line { SrcBlock "Logical3" SrcPort 1 Points [10, 0] Branch { DstBlock "Logical2" DstPort 2 } Branch { Points [0, 345] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, 70] DstBlock "Goto4" DstPort 1 } } } Line { SrcBlock "Logical4" SrcPort 1 Points [10, 0] Branch { DstBlock "Pkt Det" DstPort 1 } Branch { Points [0, 85] Branch { DstBlock "Posedge" DstPort 1 } Branch { Points [0, 105] Branch { DstBlock "Goto1" DstPort 1 } Branch { Points [0, 100] DstBlock "pktdet" DstPort 1 } } } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "debug_pktDetAutoCorr" DstPort 1 } } } Block { BlockType SubSystem Name "Packet_Timing_Control" SID "7333" Ports [3, 3] Position [675, 165, 840, 255] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Packet_Timing_Control" Location [2, 82, 1678, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Pkt Det" SID "7334" Position [210, 148, 240, 162] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Long CorrA" SID "7335" Position [45, 513, 75, 527] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Done" SID "7336" Position [285, 668, 315, 682] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "ASR" SID "7337" Ports [2, 1] Position [300, 142, 350, 193] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay line can be addressed a" "nd driven onto the output port.

Hardware notes: Implemented using SRL16s. If Virtex-4, " "Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off Optimization "Resource" xl_use_area off xl_area "[13 0 0 25 0 0 0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,401" block_type "addrsr" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,a352fb33,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[" "32.77 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 2" "5.77 32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25." "77 18.77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.7" "7 11.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te" "xt');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');" "port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert" SID "7338" Ports [1, 1] Position [890, 587, 925, 603] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware t" "his block costs nothing." assert_type on type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "4" output_port on has_advanced_control "0" sggui_pos "20,20,356,423" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,16,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "7339" Ports [0, 1] Position [715, 723, 750, 747] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]" ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3" "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 " "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6" ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant11" SID "7340" Ports [0, 1] Position [860, 348, 895, 372] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "pktTiming_count_payloadStart-2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(pktTiming_count_payloadStart))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,0,1,white,blue,0,e2595f08,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]" ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3" "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 " "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6" ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\ncolor('black');port_label('output',1,'254');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant6" SID "7341" Ports [0, 1] Position [865, 235, 900, 265] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "pktTiming_count_payloadStart " gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(pktTiming_count_payloadStart))+1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,30,0,1,white,blue,0,72f1e361,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 30 30 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'256');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert1" SID "7342" Ports [1, 1] Position [1110, 178, 1155, 192] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "7343" Ports [1, 1] Position [425, 98, 470, 112] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "16" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Copy_Downsample" SID "7344" Ports [1, 1] Position [385, 666, 450, 684] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Copy_Downsample" Location [202, 82, 1478, 1016] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "7345" Position [110, 353, 140, 367] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "7346" Ports [1, 1] Position [210, 347, 235, 373] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "7347" Ports [1, 1] Position [390, 355, 415, 385] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 30 30 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[18.33 18.33 " "21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[15.33 15.33 18.33 18.33 1" "5.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "7348" Ports [2, 1] Position [280, 348, 325, 392] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7349" Position [475, 363, 505, 377] NamePlacement "alternate" IconDisplay "Port number" } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [30, 0] Branch { Points [0, 20] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical" DstPort 1 } } } Block { BlockType Reference Name "Counter" SID "7350" Ports [4, 1] Position [745, 134, 795, 206] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited co" "unter is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "pktTiming_controlCounter_bits" bin_pt "0" load_pin on rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[6 11 0 12 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,619" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,72,4,1,white,blue,0,cf0879bb,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 72 72 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 72 72 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[" "43.77 43.77 50.77 43.77 50.77 50.77 50.77 43.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[36.77 3" "6.77 43.77 43.77 36.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[29.77 29.77 36.77 36." "77 29.77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[22.77 22.77 29.77 22.77 29.77 29.7" "7 22.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te" "xt');\ncolor('black');port_label('input',1,'load');\ncolor('black');port_label('input',2,'din');\ncolor('black'" ");port_label('input',3,'rst');\ncolor('black');port_label('input',4,'en');\n\ncolor('black');disp('{\\fontsize{" "14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Disable for Interrupts" SID "7351" Ports [1, 1] Position [565, 657, 685, 693] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Disable for Interrupts" Location [202, 82, 1478, 1016] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "PktDone" SID "7352" Position [355, 153, 385, 167] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "7353" Ports [1, 1] Position [350, 203, 385, 227] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,375" block_type "convert" block_version "8.2.01" sg_icon_stat "35,24,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15.33 15" ".33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');po" "rt_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "7354" Ports [1, 1] Position [350, 298, 385, 322] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,375" block_type "convert" block_version "8.2.01" sg_icon_stat "35,24,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15.33 15" ".33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');po" "rt_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "7355" Ports [1, 1] Position [875, 245, 915, 275] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "8.2.01" sg_icon_stat "40,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newl" "ine ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "7356" Position [60, 198, 180, 212] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_BadPkt" TagVisibility "global" } Block { BlockType From Name "From2" SID "7357" Position [390, 337, 510, 353] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType From Name "From3" SID "7358" Position [60, 178, 180, 192] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodPkt" TagVisibility "global" } Block { BlockType From Name "From4" SID "7359" Position [60, 218, 180, 232] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_GoodHeader" TagVisibility "global" } Block { BlockType From Name "From5" SID "7360" Position [60, 238, 180, 252] ShowName off CloseFcn "tagdialog Close" GotoTag "intOut_BadHeader" TagVisibility "global" } Block { BlockType Reference Name "Logical1" SID "7361" Ports [4, 1] Position [265, 267, 300, 353] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "NOR" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,86,4,1,white,blue,0,9b36d06a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 86 86 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 86 86 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[48.55 48.55 53." "55 48.55 53.55 53.55 53.55 48.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[43.55 43.55 48.55 48.55 43." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[38.55 38.55 43.55 43.55 38.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 33.55 38.55 38.55 33.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\ncolor('black');dis" "p('nor');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical2" SID "7362" Ports [2, 1] Position [575, 134, 605, 241] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,107,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 107 107 0 ],[0.77 0.82 0" ".91 ]);\nplot([0 30 30 0 0 ],[0 0 107 107 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[57.44 57.44 " "61.44 57.44 61.44 61.44 61.44 57.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[53.44 53.44 57.44 57.44 53.4" "4 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[49.44 49.44 53.44 53.44 49.44 ],[1 1 1 ]);\npatch([" "10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[45.44 45.44 49.44 45.44 49.44 49.44 45.44 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "7363" Ports [2, 1] Position [570, 294, 605, 361] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,67,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 67 67 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 67 67 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[38.55 38.55 43." "55 38.55 43.55 43.55 43.55 38.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 38.55 33." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[28.55 28.55 33.55 33.55 28.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[23.55 23.55 28.55 23.55 28.55 28.55 23.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('o" "r');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "7364" Ports [4, 1] Position [265, 172, 300, 258] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,86,4,1,white,blue,0,4f3eee2e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 86 86 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 86 86 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[48.55 48.55 53." "55 48.55 53.55 53.55 53.55 48.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[43.55 43.55 48.55 48.55 43." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[38.55 38.55 43.55 43.55 38.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[33.55 33.55 38.55 33.55 38.55 38.55 33.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\ncolor('black');dis" "p('or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Scope Name "Rx PktDet Disable" SID "7365" Ports [8] Position [955, 442, 1005, 573] Floating off Location [5, 45, 1925, 1171] Open off NumInputPorts "8" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" axes8 "%" } TimeRange "10000" YMin "0~-1~0~-1~0~0~0~0" YMax "1~1~1~1~1~1~1~1" SaveName "ScopeData34" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "S-R Latch" SID "7366" Ports [2, 1] Position [730, 239, 775, 281] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "7367" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "7368" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "7369" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "7370" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7371" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Reference Name "Up Sample" SID "7372" Ports [1, 1] Position [440, 144, 480, 176] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "40,32,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 32 32 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20.44 24" ".44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20.44 16.44" " ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch(" "[15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{" "14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done1" SID "7373" Ports [1, 1] Position [805, 450, 840, 460] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done2" SID "7374" Ports [1, 1] Position [805, 465, 840, 475] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done3" SID "7375" Ports [1, 1] Position [805, 480, 840, 490] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done4" SID "7376" Ports [1, 1] Position [805, 495, 840, 505] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done5" SID "7377" Ports [1, 1] Position [805, 510, 840, 520] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done6" SID "7378" Ports [1, 1] Position [805, 525, 840, 535] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done7" SID "7379" Ports [1, 1] Position [805, 540, 840, 550] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done8" SID "7380" Ports [1, 1] Position [805, 555, 840, 565] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Outport Name "Det Disabled" SID "7381" Position [1040, 253, 1070, 267] IconDisplay "Port number" } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 Points [55, 0] Branch { DstBlock "Logical5" DstPort 1 } Branch { Points [0, 95] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, 175] DstBlock "done1" DstPort 1 } } } Line { SrcBlock "From1" SrcPort 1 Points [50, 0] Branch { DstBlock "Logical5" DstPort 2 } Branch { Points [0, 95] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, 170] DstBlock "done2" DstPort 1 } } } Line { SrcBlock "From4" SrcPort 1 Points [45, 0] Branch { DstBlock "Logical5" DstPort 3 } Branch { Points [0, 95] Branch { DstBlock "Logical1" DstPort 3 } Branch { Points [0, 165] DstBlock "done3" DstPort 1 } } } Line { SrcBlock "From5" SrcPort 1 Points [40, 0] Branch { DstBlock "Logical5" DstPort 4 } Branch { Points [0, 95] Branch { DstBlock "Logical1" DstPort 4 } Branch { Points [0, 160] DstBlock "done4" DstPort 1 } } } Line { SrcBlock "S-R Latch" SrcPort 1 Points [40, 0] Branch { Points [0, 125; -65, 0; 0, 175] DstBlock "done8" DstPort 1 } Branch { DstBlock "Down Sample1" DstPort 1 } } Line { SrcBlock "Logical2" SrcPort 1 Points [85, 0; 0, 60] Branch { Points [0, 280] DstBlock "done6" DstPort 1 } Branch { DstBlock "S-R Latch" DstPort 1 } } Line { SrcBlock "PktDone" SrcPort 1 DstBlock "Up Sample" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 Points [60, 0] Branch { Points [0, -60] DstBlock "S-R Latch" DstPort 2 } Branch { Points [0, 215] DstBlock "done7" DstPort 1 } } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "done4" SrcPort 1 DstBlock "Rx PktDet Disable" DstPort 4 } Line { SrcBlock "done3" SrcPort 1 DstBlock "Rx PktDet Disable" DstPort 3 } Line { SrcBlock "done2" SrcPort 1 DstBlock "Rx PktDet Disable" DstPort 2 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Rx PktDet Disable" DstPort 1 } Line { SrcBlock "done5" SrcPort 1 DstBlock "Rx PktDet Disable" DstPort 5 } Line { SrcBlock "done6" SrcPort 1 DstBlock "Rx PktDet Disable" DstPort 6 } Line { SrcBlock "done7" SrcPort 1 DstBlock "Rx PktDet Disable" DstPort 7 } Line { SrcBlock "done8" SrcPort 1 DstBlock "Rx PktDet Disable" DstPort 8 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Det Disabled" DstPort 1 } Line { SrcBlock "Up Sample" SrcPort 1 Points [55, 0] Branch { DstBlock "Logical2" DstPort 1 } Branch { Points [0, 355] DstBlock "done5" DstPort 1 } } } } Block { BlockType SubSystem Name "Edge Det" SID "7382" Ports [1, 1] Position [385, 158, 440, 182] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Edge Det" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "7383" Position [200, 253, 230, 267] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "7384" Ports [1, 1] Position [425, 223, 460, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15.33 15" ".33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "7385" Ports [1, 1] Position [490, 226, 515, 244] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "7386" Ports [2, 1] Position [540, 221, 585, 274] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 32.66 3" "8.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 32.66 26" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7387" Position [610, 243, 640, 257] IconDisplay "Port number" } Line { SrcBlock "D" SrcPort 1 Points [150, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Annotation { Name "Rising Edge Detection" Position [500, 182] } Annotation { Name "Debounce" Position [320, 222] } } } Block { BlockType SubSystem Name "Edge Det1" SID "7388" Ports [1, 1] Position [530, 498, 585, 522] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Edge Det1" Location [2, 74, 1278, 978] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "7389" Position [280, 183, 310, 197] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "7390" Ports [1, 1] Position [425, 153, 460, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15.33 15" ".33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "7391" Ports [1, 1] Position [490, 156, 515, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "7392" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 32.66 3" "8.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 32.66 26" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7393" Position [610, 173, 640, 187] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [70, 0] Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Block { BlockType SubSystem Name "Ext Reset" SID "7394" Ports [0, 1] Position [1150, 625, 1190, 685] BlockMirror on MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Ext Reset" Location [1222, 674, 1677, 780] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Convert2" SID "7395" Ports [1, 1] Position [380, 349, 410, 361] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,12,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "7396" Ports [1, 1] Position [465, 340, 490, 370] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,30,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 30 30 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[18.33 18.33 " "21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[15.33 15.33 18.33 18.33 1" "5.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From9" SID "7397" Position [215, 306, 425, 324] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_ExtPktDetReset_En" TagVisibility "global" } Block { BlockType Reference Name "Logical10" SID "7398" Ports [2, 1] Position [535, 296, 580, 374] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,78,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 78 78 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 78 78 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[45.66 45.66 5" "1.66 45.66 51.66 51.66 51.66 45.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[39.66 39.66 45.66 45.66 39" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[33.66 33.66 39.66 39.66 33.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 27.66 33.66 33.66 27.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Constant Name "RXreset" SID "7399" Position [200, 347, 230, 363] NamePlacement "alternate" Value "0" } Block { BlockType Reference Name "Rx_PktDetReset_In" SID "7400" Ports [1, 1] Position [285, 344, 340, 366] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed " "point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,423" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,22,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.985 0.979 0.895 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.985 0.979 " "0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType SubSystem Name "debounce" SID "7401" Ports [1, 1] Position [725, 327, 765, 343] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "debounce" Location [202, 70, 1918, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "7402" Position [45, 103, 75, 117] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "7403" Ports [1, 1] Position [147, 135, 173, 165] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2" sg_icon_stat "26,30,1,1,white,blue,0,07b98262,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 26 26 0 0 ],[0 0 30 30 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[18.33" " 18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[15.33 15.33 18." "33 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[12.33 12.33 15.33 15.33 12.33 ]" ",[1 1 1 ]);\npatch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "7404" Ports [1, 1] Position [147, 200, 173, 230] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2" sg_icon_stat "26,30,1,1,white,blue,0,07b98262,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 26 26 0 0 ],[0 0 30 30 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[18.33" " 18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[15.33 15.33 18." "33 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[12.33 12.33 15.33 15.33 12.33 ]" ",[1 1 1 ]);\npatch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "7405" Ports [1, 1] Position [147, 260, 173, 290] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2" sg_icon_stat "26,30,1,1,white,blue,0,07b98262,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 26 26 0 0 ],[0 0 30 30 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[18.33" " 18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[15.33 15.33 18." "33 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[12.33 12.33 15.33 15.33 12.33 ]" ",[1 1 1 ]);\npatch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "7406" Ports [1, 1] Position [147, 325, 173, 355] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2" sg_icon_stat "26,30,1,1,white,blue,0,07b98262,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 26 26 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 26 26 0 0 ],[0 0 30 30 0 ]);\npatch([6.325 10.66 13.66 16.66 19.66 13.66 9.325 6.325 ],[18.33" " 18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([9.325 13.66 10.66 6.325 9.325 ],[15.33 15.33 18." "33 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([6.325 10.66 13.66 9.325 6.325 ],[12.33 12.33 15.33 15.33 12.33 ]" ",[1 1 1 ]);\npatch([9.325 19.66 16.66 13.66 10.66 6.325 9.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "7407" Ports [5, 1] Position [275, 78, 330, 402] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "5" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "8.2" sg_icon_stat "55,324,5,1,white,blue,0,2904cdfe,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 324 324 0 ],[0.77 0." "82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 324 324 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ]" ",[169.77 169.77 176.77 169.77 176.77 176.77 176.77 169.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 " "],[162.77 162.77 169.77 169.77 162.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[155.7" "7 155.77 162.77 162.77 155.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[148.77 148.77" " 155.77 148.77 155.77 155.77 148.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf" "('','COMMENT: begin icon text');\n\n\n\n\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7408" Position [375, 233, 405, 247] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [80, 0] Branch { DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 Points [0, 5] Branch { DstBlock "Delay1" DstPort 1 } Branch { DstBlock "Logical" DstPort 2 } } Line { SrcBlock "Delay1" SrcPort 1 Points [0, 5] Branch { DstBlock "Delay2" DstPort 1 } Branch { DstBlock "Logical" DstPort 3 } } Line { SrcBlock "Delay2" SrcPort 1 Points [0, 10] Branch { DstBlock "Delay3" DstPort 1 } Branch { DstBlock "Logical" DstPort 4 } } Line { SrcBlock "Delay3" SrcPort 1 Points [0, 10] DstBlock "Logical" DstPort 5 } } } Block { BlockType Outport Name "Rst" SID "7409" Position [845, 328, 875, 342] IconDisplay "Port number" } Line { SrcBlock "From9" SrcPort 1 DstBlock "Logical10" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Logical10" DstPort 2 } Line { SrcBlock "RXreset" SrcPort 1 DstBlock "Rx_PktDetReset_In" DstPort 1 } Line { SrcBlock "Rx_PktDetReset_In" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Logical10" SrcPort 1 DstBlock "debounce" DstPort 1 } Line { SrcBlock "debounce" SrcPort 1 DstBlock "Rst" DstPort 1 } } } Block { BlockType SubSystem Name "Fine_Pkt_det" SID "7410" Ports [2, 1] Position [165, 489, 245, 531] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Fine_Pkt_det" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Samp Count" SID "7411" Position [220, 408, 250, 422] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Long CorrA" SID "7412" Position [195, 218, 225, 232] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "7413" Ports [1, 1] Position [825, 439, 855, 461] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "64" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,1,1,white,blue,0,0603ebe1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.33 14.3" "3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 14.33 14" ".33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('" "z^{-64}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "7414" Position [105, 238, 295, 252] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_PktDet_LongCorr_Thresh" TagVisibility "global" } Block { BlockType From Name "From3" SID "7415" Position [55, 428, 245, 442] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_PktDet_LongCorr_WindStart" TagVisibility "global" } Block { BlockType From Name "From4" SID "7416" Position [50, 473, 240, 487] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_PktDet_LongCorr_WindEnd" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "7417" Position [1015, 386, 1185, 404] ShowName off GotoTag "longCorrAboveThresh_Twice" TagVisibility "global" } Block { BlockType Reference Name "Logical1" SID "7418" Ports [2, 1] Position [895, 410, 920, 465] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,55,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 55 55 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[30.33 30.33 " "33.33 30.33 33.33 33.33 33.33 30.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33 30.33 2" "7.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[24.33 24.33 27.33 27.33 24.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[21.33 21.33 24.33 21.33 24.33 24.33 21.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "7419" Ports [3, 1] Position [685, 393, 710, 457] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,64,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 64 64 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 64 64 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[35.33 35.33 " "38.33 35.33 38.33 38.33 38.33 35.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[32.33 32.33 35.33 35.33 3" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[29.33 29.33 32.33 32.33 29.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[26.33 26.33 29.33 26.33 29.33 29.33 26.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "Long Corr\nPkt Det" SID "7420" Ports [5] Position [835, 545, 875, 625] Floating off Location [1189, 185, 2356, 1119] Open off NumInputPorts "5" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" } TimeRange "2500" YMin "0~-1~0~0~0" YMax "37500~1~1~1~350" SaveName "ScopeData10" DataFormat "StructureWithTime" SampleTime "0" } Block { BlockType Reference Name "Relational1" SID "7421" Ports [2, 1] Position [410, 403, 455, 447] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b','texmo" "de','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "7422" Ports [2, 1] Position [365, 213, 410, 257] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b','texmo" "de','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "7423" Ports [2, 1] Position [410, 448, 455, 492] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a<=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,52e4b236,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\leq b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done1" SID "7424" Ports [1, 1] Position [725, 550, 760, 560] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done3" SID "7425" Ports [1, 1] Position [725, 580, 760, 590] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done4" SID "7426" Ports [1, 1] Position [725, 595, 760, 605] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done5" SID "7427" Ports [1, 1] Position [725, 610, 760, 620] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Outport Name "Det" SID "7428" Position [990, 433, 1020, 447] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 Points [90, 0] Branch { Points [0, 25] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "Samp Count" SrcPort 1 Points [130, 0] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "Relational3" DstPort 1 } Branch { Points [0, 155] DstBlock "done5" DstPort 1 } } } Line { SrcBlock "done4" SrcPort 1 DstBlock "Long Corr\nPkt Det" DstPort 4 } Line { SrcBlock "done3" SrcPort 1 DstBlock "Long Corr\nPkt Det" DstPort 3 } Line { Points [765, 570] DstBlock "Long Corr\nPkt Det" DstPort 2 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Long Corr\nPkt Det" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Relational3" SrcPort 1 Points [190, 0; 0, -25] DstBlock "Logical2" DstPort 3 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Long CorrA" SrcPort 1 Points [110, 0] Branch { DstBlock "Relational2" DstPort 1 } Branch { Points [0, 330] DstBlock "done1" DstPort 1 } } Line { SrcBlock "Relational2" SrcPort 1 Points [210, 0; 0, 10; 35, 0; 0, 160] Branch { DstBlock "Logical2" DstPort 1 } Branch { Points [0, 180] DstBlock "done3" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 Points [45, 0] Branch { DstBlock "Det" DstPort 1 } Branch { Points [0, -45] DstBlock "Goto1" DstPort 1 } Branch { Points [0, 80; -275, 0; 0, 80] DstBlock "done4" DstPort 1 } } Line { SrcBlock "done5" SrcPort 1 DstBlock "Long Corr\nPkt Det" DstPort 5 } } } Block { BlockType From Name "From1" SID "7429" Position [935, 391, 1070, 409] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_reqLongCorr" TagVisibility "global" } Block { BlockType From Name "From2" SID "7430" Position [895, 277, 1015, 293] ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset_DV2" TagVisibility "global" } Block { BlockType From Name "From3" SID "7431" Position [125, 96, 335, 114] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_PktDet_LongCorr_CountLoad" TagVisibility "global" } Block { BlockType From Name "From4" SID "7432" Position [1035, 545, 1160, 565] BlockMirror on NamePlacement "alternate" ShowName off CloseFcn "tagdialog Close" GotoTag "rx_global_reset_DV2" TagVisibility "global" } Block { BlockType From Name "From6" SID "7433" Position [85, 171, 230, 189] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_PktDet_Delay" TagVisibility "global" } Block { BlockType From Name "From7" SID "7434" Position [1200, 580, 1325, 600] BlockMirror on NamePlacement "alternate" ShowName off CloseFcn "tagdialog Close" GotoTag "Tx_Running" TagVisibility "global" } Block { BlockType From Name "From8" SID "7435" Position [1195, 596, 1405, 614] BlockMirror on NamePlacement "alternate" ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_forceDisableOnTx" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "7436" Position [1025, 132, 1180, 148] ShowName off GotoTag "RxPktTiming_SampleCount" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "7437" Position [455, 802, 550, 818] ShowName off GotoTag "RxPktDone" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "7438" Ports [1, 1] Position [1040, 278, 1075, 292] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "7439" Ports [1, 1] Position [1040, 368, 1075, 382] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "7440" Ports [2, 1] Position [395, 482, 420, 518] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,36,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 36 36 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 36 36 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[21" ".33 21.33 24.33 21.33 24.33 24.33 24.33 21.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[18.33 18.33 " "21.33 21.33 18.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[15.33 15.33 18.33 18.33 15.3" "3 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 12.33 15.33 15.33 12.33 ]," "[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n" "\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "7441" Ports [2, 1] Position [1110, 230, 1155, 265] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 35 35 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 35 35 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[22." "55 22.55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[17.55 17.55" " 22.55 22.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[12.55 12.55 17.55 17.55 1" "2.55 ],[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n" "\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "7442" Ports [2, 1] Position [1100, 580, 1145, 615] BlockMirror on LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,35,2,1,white,blue,0,83a4b621,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 35 35 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 35 35 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[22." "55 22.55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[17.55 17.55" " 22.55 22.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[12.55 12.55 17.55 17.55 1" "2.55 ],[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n" "\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "7443" Ports [6, 1] Position [965, 549, 995, 636] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "6" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,87,6,1,white,blue,0,31bf5775,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 87 87 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 87 87 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[47.44 " "47.44 51.44 47.44 51.44 51.44 51.44 47.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[43.44 43.44 47.44 4" "7.44 43.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[39.44 39.44 43.44 43.44 39.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[35.44 35.44 39.44 35.44 39.44 39.44 35.44 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\n\ncol" "or('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "7444" Ports [3, 1] Position [1120, 335, 1160, 415] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,80,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 80 80 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 80 80 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[45.55" " 45.55 50.55 45.55 50.55 50.55 50.55 45.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[40.55 40.55 45" ".55 45.55 40.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[35.55 35.55 40.55 40.55 35.55 " "],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 30.55 35.55 35.55 30.55 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational5" SID "7445" Ports [2, 1] Position [950, 218, 995, 262] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28." "66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 2" "8.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('out" "put',1,'\\bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational6" SID "7446" Ports [2, 1] Position [950, 328, 995, 372] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28." "66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 2" "8.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('out" "put',1,'\\bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_PktDetReset" SID "7447" Ports [1, 1] Position [1050, 522, 1105, 538] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,16,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 16 16 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 16 16 0 ]);\npatch([22.55 25.44 27.44 29.44 31.44 27.44 24.55 22.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([24.55 27.44 25.44 22.55 24.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.985 0.979 0.895 ]);\npatch([22.55 25.44 27.44 24.55 22.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([24.55 31.44 29.44 27.44 25.44 22.55 24.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.985 0.97" "9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_debug_PktDone" SID "7448" Ports [1, 1] Position [450, 752, 505, 768] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,16,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 16 16 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 55 55 0 0 ],[0 0 16 16 0 ]);\npatch([22.55 25.44 27.44 29.44 31.44 27.44 24.55 22.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([24.55 27.44 25.44 22.55 24.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.985 0.979 0.895 ]);\npatch([22.55 25.44 27.44 24.55 22.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([24.55 31.44 29.44 27.44 25.44 22.55 24.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.985 0.97" "9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_debug_payload" SID "7449" Ports [1, 1] Position [1240, 180, 1275, 190] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.985 0.979 0.895 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.985 0." "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch" SID "7450" Ports [2, 1] Position [455, 493, 500, 522] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch" Location [-708, 675, -515, 767] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "7451" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "7452" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "7453" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 13.22 " "11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.931" " 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 11.44 9.44" " 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon" " graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "7454" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 30.66 3" "6.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 30.66 24" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('bl" "ack');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Outport Name "Q" SID "7455" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType SubSystem Name "S-R Latch1" SID "7456" Ports [2, 1] Position [545, 173, 590, 202] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch1" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "7457" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "7458" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "7459" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 13.22 " "11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0.931" " 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 11.44 9.44" " 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon" " graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "7460" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 30.66 3" "6.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 30.66 24" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('bl" "ack');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon te" "xt');" } Block { BlockType Outport Name "Q" SID "7461" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Reference Name "Up Sample" SID "7462" Ports [1, 1] Position [950, 516, 980, 544] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sampl" "e.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a m" "ux and single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "30,28,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "7463" Ports [1, 1] Position [375, 746, 405, 774] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sampl" "e.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a m" "ux and single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "30,28,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "7464" Ports [1, 1] Position [1190, 171, 1220, 199] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sampl" "e.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a m" "ux and single bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "30,28,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Payload_Preamble" SID "7465" Position [1200, 243, 1230, 257] IconDisplay "Port number" } Block { BlockType Outport Name "PktReset" SID "7466" Position [945, 468, 975, 482] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "PktDetected" SID "7467" Position [995, 158, 1025, 172] Port "3" IconDisplay "Port number" } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Up Sample2" DstPort 1 } Line { SrcBlock "Copy_Downsample" SrcPort 1 Points [0, 0; 60, 0] Branch { Points [0, -25; 515, 0; 0, -20] DstBlock "Logical5" DstPort 6 } Branch { DstBlock "Disable for Interrupts" DstPort 1 } } Line { SrcBlock "Assert" SrcPort 1 Points [0, 0; -25, 0] Branch { Points [-150, 0] Branch { Points [0, -285] Branch { Points [-180, 0] DstBlock "S-R Latch1" DstPort 2 } Branch { Points [0, -130] DstBlock "Counter" DstPort 3 } } Branch { Points [-270, 0] DstBlock "S-R Latch" DstPort 2 } } Branch { Points [0, -65] Branch { Points [0, -55] DstBlock "PktReset" DstPort 1 } Branch { DstBlock "Up Sample" DstPort 1 } } } Line { SrcBlock "Disable for Interrupts" SrcPort 1 Points [345, 0; 0, -60] DstBlock "Logical5" DstPort 5 } Line { SrcBlock "Done" SrcPort 1 Points [30, 0] Branch { DstBlock "Copy_Downsample" DstPort 1 } Branch { Points [0, 85] DstBlock "Up Sample1" DstPort 1 } } Line { SrcBlock "S-R Latch1" SrcPort 1 Points [0, 0; 10, 0] Branch { Points [75, 0; 0, 10; 40, 0] Branch { DstBlock "Counter" DstPort 4 } Branch { Points [0, 20; 195, 0; 0, -55] DstBlock "PktDetected" DstPort 1 } } Branch { Points [0, 210; -265, 0; 0, 90] DstBlock "Logical2" DstPort 1 } } Line { SrcBlock "S-R Latch" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [0, 35; 220, 0; 0, -170] DstBlock "Inverter3" DstPort 1 } Branch { DstBlock "Edge Det1" DstPort 1 } } Line { SrcBlock "Edge Det1" SrcPort 1 Points [105, 0; 0, -370] DstBlock "Counter" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 Points [135, 0; 0, 55] DstBlock "Counter" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 Points [0, 0] DstBlock "S-R Latch" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 Points [100, 0; 0, 195] DstBlock "Logical5" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical6" DstPort 3 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "Relational6" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Constant11" SrcPort 1 DstBlock "Relational6" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "Assert" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 Points [0, 0; 10, 0] Branch { Points [0, -40; -75, 0] DstBlock "Convert1" DstPort 1 } Branch { DstBlock "Payload_Preamble" DstPort 1 } } Line { SrcBlock "Relational5" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 Points [10, 0; 0, -30] DstBlock "Logical3" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 Points [0, 0] DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 DstBlock "ASR" DstPort 2 } Line { SrcBlock "ASR" SrcPort 1 Points [0, 0] DstBlock "Edge Det" DstPort 1 } Line { SrcBlock "Pkt Det" SrcPort 1 Points [0, 0] DstBlock "ASR" DstPort 1 } Line { SrcBlock "Constant6" SrcPort 1 Points [0, 0] DstBlock "Relational5" DstPort 2 } Line { SrcBlock "Edge Det" SrcPort 1 Points [50, 0; 0, 10] DstBlock "S-R Latch1" DstPort 1 } Line { SrcBlock "Counter" SrcPort 1 Points [0, 0; 30, 0] Branch { Points [0, 60] Branch { DstBlock "Relational5" DstPort 1 } Branch { Points [0, 110] Branch { DstBlock "Relational6" DstPort 1 } Branch { Points [-725, 0; 0, 160] DstBlock "Fine_Pkt_det" DstPort 1 } } } Branch { Points [0, -30] DstBlock "Goto1" DstPort 1 } } Line { SrcBlock "Fine_Pkt_det" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Up Sample" SrcPort 1 DstBlock "Rx_PktDetReset" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 Points [10, 0] Branch { DstBlock "Rx_debug_PktDone" DstPort 1 } Branch { Points [0, 50] DstBlock "Goto2" DstPort 1 } } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Rx_debug_payload" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 Points [-10, 0; 0, -15] DstBlock "Logical5" DstPort 3 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Ext Reset" SrcPort 1 Points [-85, 0; 0, -55] DstBlock "Logical5" DstPort 4 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Long CorrA" SrcPort 1 DstBlock "Fine_Pkt_det" DstPort 2 } } } Block { BlockType Scope Name "Rx Input" SID "7468" Ports [7] Position [1050, 34, 1095, 146] NamePlacement "alternate" Floating off Location [1117, 556, 2712, 1488] Open off NumInputPorts "7" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "14600 " YMin "-0.25~-0.4~-1~-1~0~0~0.95" YMax "0.25~0.3~1~1~1~45000~1.05" SaveName "ScopeData48" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "Rx Reset Logic" SID "7469" Ports [] Position [175, 540, 245, 577] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Rx Reset Logic" Location [-93, 372, 1175, 1298] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Constant Name "Constant" SID "7470" Position [35, 55, 65, 85] Value "0" } Block { BlockType Reference Name "Convert" SID "7471" Ports [1, 1] Position [195, 63, 240, 77] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "8" bin_pt "6" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,470,336" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 14 14 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample6" SID "7472" Ports [1, 1] Position [330, 72, 360, 98] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,368,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[" "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 1" "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13." "33 10.33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7" ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\n\n\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt" "}\\bf\\downarrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From3" SID "7473" Position [40, 31, 155, 49] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_GlobalReset" TagVisibility "global" } Block { BlockType Goto Name "Goto23" SID "7474" Position [425, 42, 530, 68] ShowName off GotoTag "rx_global_reset" TagVisibility "global" } Block { BlockType Goto Name "Goto24" SID "7475" Position [425, 72, 530, 98] ShowName off GotoTag "rx_global_reset_DV2" TagVisibility "global" } Block { BlockType Reference Name "Logical1" SID "7476" Ports [2, 1] Position [270, 27, 295, 83] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,262" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,56,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 56 56 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 56 56 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[31" ".33 31.33 34.33 31.33 34.33 34.33 34.33 31.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[28.33 28.33 " "31.33 31.33 28.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[25.33 25.33 28.33 28.33 25.3" "3 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[22.33 22.33 25.33 22.33 25.33 25.33 22.33 ]," "[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n" "\ncolor('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Rx_Reset" SID "7477" Ports [1, 1] Position [115, 62, 155, 78] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx" " fixed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "4" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,423" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.985 0.97" "9 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\n" "fprintf('','COMMENT: end icon text');" } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [10, 0] Branch { DstBlock "Goto23" DstPort 1 } Branch { Points [0, 30] DstBlock "Down Sample6" DstPort 1 } } Line { SrcBlock "Rx_Reset" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Down Sample6" SrcPort 1 DstBlock "Goto24" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Rx_Reset" DstPort 1 } } } Block { BlockType Reference Name "done1" SID "7478" Ports [1, 1] Position [900, 100, 935, 110] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o" "r fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depen" "ding on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.11 " "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "done2" SID "7479" Ports [1, 1] Position [900, 115, 935, 125] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o" "r fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depen" "ding on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.11 " "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "done3" SID "7480" Ports [1, 1] Position [900, 70, 935, 80] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o" "r fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depen" "ding on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.11 " "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "done4" SID "7481" Ports [1, 1] Position [900, 40, 935, 50] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o" "r fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depen" "ding on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.11 " "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "done5" SID "7482" Ports [1, 1] Position [900, 55, 935, 65] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o" "r fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depen" "ding on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.11 " "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "done6" SID "7483" Ports [1, 1] Position [900, 85, 935, 95] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o" "r fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depen" "ding on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.11 " "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "done7" SID "9663" Ports [1, 1] Position [900, 130, 935, 140] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o" "r fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depen" "ding on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.11 " "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "done8" SID "9690" Ports [1, 1] Position [510, 550, 545, 560] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o" "r fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depen" "ding on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.11 " "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "done9" SID "9691" Ports [1, 1] Position [510, 565, 545, 575] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o" "r fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depen" "ding on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.11 " "7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Line { Labels [0, 0] SrcBlock "Packet_Detection" SrcPort 1 Points [35, 0] Branch { DstBlock "Packet_Timing_Control" DstPort 1 } Branch { Points [0, -75] DstBlock "done1" DstPort 1 } } Line { SrcBlock "Packet_Timing_Control" SrcPort 1 Points [15, 0] Branch { Points [45, 0] Branch { Points [0, 90; -225, 0] Branch { Points [0, 20] DstBlock "Equalizer & Packetizer" DstPort 1 } Branch { Points [-180, 0] Branch { Points [0, 30] DstBlock "FFT & Chan Est" DstPort 1 } Branch { Points [-185, 0] Branch { Points [0, -70] DstBlock "Packet_Detection" DstPort 3 } Branch { Points [-15, 0; 0, 170] DstBlock "AF Buffers" DstPort 2 } } } } Branch { DstBlock "Goto5" DstPort 1 } } Branch { Points [0, -45] DstBlock "done7" DstPort 1 } } Line { SrcBlock "Long Corr HP" SrcPort 1 Points [45, 0] Branch { DstBlock "Packet_Timing_Control" DstPort 2 } Branch { Points [0, -90] DstBlock "done2" DstPort 1 } } Line { SrcBlock "Coarse Freq Correction" SrcPort 2 Points [15, 0] Branch { DstBlock "FFT & Chan Est" DstPort 3 } Branch { Points [0, -120] DstBlock "Long Corr HP" DstPort 2 } } Line { SrcBlock "Coarse Freq Correction" SrcPort 3 DstBlock "FFT & Chan Est" DstPort 4 } Line { SrcBlock "Coarse Freq Correction" SrcPort 4 DstBlock "FFT & Chan Est" DstPort 5 } Line { SrcBlock "AntA_I" SrcPort 1 DstBlock "ADC Inputs\n& Antenna Selection" DstPort 2 } Line { SrcBlock "AntA_Q" SrcPort 1 DstBlock "ADC Inputs\n& Antenna Selection" DstPort 3 } Line { SrcBlock "AntB_I" SrcPort 1 Points [5, 0; 0, -25] DstBlock "ADC Inputs\n& Antenna Selection" DstPort 4 } Line { Labels [3, 0] SrcBlock "AntB_Q" SrcPort 1 Points [10, 0; 0, -25] DstBlock "ADC Inputs\n& Antenna Selection" DstPort 5 } Line { SrcBlock "Equalizer & Packetizer" SrcPort 1 Points [45, 0; 0, 75; -210, 0] Branch { DstBlock "Packet_Timing_Control" DstPort 3 } Branch { Points [-320, 0; 0, 15] DstBlock "AF Buffers" DstPort 1 } } Line { SrcBlock "FFT & Chan Est" SrcPort 1 DstBlock "Equalizer & Packetizer" DstPort 2 } Line { SrcBlock "FFT & Chan Est" SrcPort 2 DstBlock "Equalizer & Packetizer" DstPort 3 } Line { SrcBlock "FFT & Chan Est" SrcPort 3 DstBlock "Equalizer & Packetizer" DstPort 4 } Line { SrcBlock "FFT & Chan Est" SrcPort 4 DstBlock "Equalizer & Packetizer" DstPort 5 } Line { SrcBlock "FFT & Chan Est" SrcPort 5 DstBlock "Equalizer & Packetizer" DstPort 6 } Line { SrcBlock "FFT & Chan Est" SrcPort 6 DstBlock "Equalizer & Packetizer" DstPort 7 } Line { SrcBlock "FFT & Chan Est" SrcPort 7 DstBlock "Equalizer & Packetizer" DstPort 8 } Line { SrcBlock "Packet_Timing_Control" SrcPort 2 Points [25, 0; 0, 55; -560, 0] Branch { Points [-250, 0; 0, 75] DstBlock "ADC Inputs\n& Antenna Selection" DstPort 1 } Branch { DstBlock "Coarse Freq Correction" DstPort 1 } Branch { Points [0, -85] DstBlock "Packet_Detection" DstPort 2 } } Line { SrcBlock "Packet_Timing_Control" SrcPort 3 Points [15, 0] Branch { DstBlock "Goto2" DstPort 1 } Branch { Points [0, 20; -555, 0] Branch { Points [0, 65] DstBlock "Coarse Freq Correction" DstPort 2 } Branch { Points [0, -100] DstBlock "Packet_Detection" DstPort 1 } } } Line { SrcBlock "ADC Inputs\n& Antenna Selection" SrcPort 1 Points [45, 0] Branch { DstBlock "Coarse Freq Correction" DstPort 3 } Branch { Points [0, 115] DstBlock "AF Buffers" DstPort 3 } Branch { Points [0, -295] DstBlock "done4" DstPort 1 } } Line { SrcBlock "ADC Inputs\n& Antenna Selection" SrcPort 2 Points [50, 0] Branch { DstBlock "Coarse Freq Correction" DstPort 4 } Branch { Points [0, 115] DstBlock "AF Buffers" DstPort 4 } Branch { Points [0, -295] DstBlock "done5" DstPort 1 } } Line { SrcBlock "ADC Inputs\n& Antenna Selection" SrcPort 3 Points [55, 0] Branch { DstBlock "Coarse Freq Correction" DstPort 5 } Branch { Points [0, -295] DstBlock "done3" DstPort 1 } } Line { SrcBlock "ADC Inputs\n& Antenna Selection" SrcPort 4 Points [60, 0] Branch { DstBlock "Coarse Freq Correction" DstPort 6 } Branch { Points [0, -295] DstBlock "done6" DstPort 1 } } Line { SrcBlock "FFT & Chan Est" SrcPort 8 DstBlock "Equalizer & Packetizer" DstPort 9 } Line { SrcBlock "Coarse Freq Correction" SrcPort 1 Points [10, 0] Branch { DstBlock "FFT & Chan Est" DstPort 2 } Branch { Points [0, -125] DstBlock "Long Corr HP" DstPort 1 } } Line { SrcBlock "FFT & Chan Est" SrcPort 9 DstBlock "Equalizer & Packetizer" DstPort 10 } Line { SrcBlock "done4" SrcPort 1 DstBlock "Rx Input" DstPort 1 } Line { SrcBlock "done5" SrcPort 1 DstBlock "Rx Input" DstPort 2 } Line { SrcBlock "done3" SrcPort 1 DstBlock "Rx Input" DstPort 3 } Line { SrcBlock "done6" SrcPort 1 DstBlock "Rx Input" DstPort 4 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Rx Input" DstPort 5 } Line { SrcBlock "done2" SrcPort 1 DstBlock "Rx Input" DstPort 6 } Line { SrcBlock "done7" SrcPort 1 DstBlock "Rx Input" DstPort 7 } Line { SrcBlock "Divide" SrcPort 1 DstBlock "Display" DstPort 1 } Line { SrcBlock "From26" SrcPort 1 DstBlock "done8" DstPort 1 } Line { SrcBlock "From27" SrcPort 1 DstBlock "done9" DstPort 1 } Line { SrcBlock "done8" SrcPort 1 Points [40, 0] Branch { DstBlock "Divide" DstPort 1 } Branch { Points [0, 35] DstBlock "Display1" DstPort 1 } } Line { SrcBlock "done9" SrcPort 1 Points [35, 0] Branch { DstBlock "Divide" DstPort 2 } Branch { Points [0, 45] DstBlock "Display2" DstPort 1 } } Annotation { Position [772, 351] } } } Block { BlockType SubSystem Name "OFDM Tx MIMO" SID "7487" Ports [0, 4] Position [30, 36, 70, 99] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "OFDM Tx MIMO" Location [2, 82, 1678, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "136" Block { BlockType SubSystem Name "IFFT" SID "7488" Ports [5, 6] Position [380, 180, 490, 335] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "IFFT" Location [2, 82, 1910, 1026] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "124" Block { BlockType Inport Name "Payload Done" SID "7489" Position [275, 778, 305, 792] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "xn_I" SID "7490" Position [280, 348, 310, 362] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "xn_Q" SID "7491" Position [280, 383, 310, 397] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Start" SID "7492" Position [145, 408, 175, 422] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Pkt Done" SID "7493" Position [70, 598, 100, 612] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "Constant2" SID "7494" Ports [0, 1] Position [665, 709, 690, 731] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant3" SID "7495" Ports [0, 1] Position [310, 449, 335, 471] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant4" SID "7496" Ports [0, 1] Position [310, 484, 335, 506] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('output',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant6" SID "7497" Ports [0, 1] Position [315, 554, 340, 576] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('output',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter" SID "7498" Ports [3, 1] Position [485, 665, 545, 725] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited co" "unter is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up/Down" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "3" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "60,60,3,1,white,blue,0,3837bb23,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.8" "8 38.88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.8" "8 38.88 30.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1" " 1 1 ]);\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'up');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input'" ",3,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf\\pm\\pm}','texmode','on');\nfprintf('','COMMENT: end icon" " text');" } Block { BlockType Reference Name "Fast Fourier Transform 7.1 " SID "9237" Ports [8, 10] Position [465, 335, 560, 610] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Fast Fourier Transform 7.1 " SourceType "Xilinx Fast Fourier Transform 7.1 Block" transform_length "64" implementation_options "pipelined_streaming_io" target_clock_frequency "40" target_data_throughput "50" run_time_configurable_transform_length off phase_factor_width "24" scaling_options "scaled" rounding_modes "convergent_rounding" output_ordering "bit_reversed_order" cyclic_prefix_insertion off ce off sclr on ovflo on input_data_offset "three_cycle_offset" memory_options_data "block_ram" memory_options_phase_factors "block_ram" number_of_stages_using_block_ram_for_data_and_phase_factors "1" memory_options_reorder "block_ram" memory_options_hybrid off complex_mult_type "use_mults_resources" butterfly_type "use_luts" xl_use_area off xl_area "[0,0,0,0,0,0,0]" channels "1" input_ordering "natural_order" input_width "16" simulation_type "external_xfix" simulation_model "fftv71_CModel:fftv71_cmodel" ip_name "Fast Fourier Transform" ip_version "7.1" dsptool_ready "true" wrapper_available "true" port_translation_map "{ 'ce' => 'en', 'sclr' => 'rst' }" ipcore_fpga_part "xlipgetpartsetting(gcb, {'virtex4', 'xc4vsx35', '-10', 'ff668'})" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "xfft_v7_1" sg_icon_stat "95,275,8,10,white,blue,0,a033fd5a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 95 95 0 0 ],[0 0 275 275 0 ],[0.77" " 0.82 0.91 ]);\nplot([0 95 95 0 0 ],[0 0 275 275 0 ]);\npatch([18.075 36.86 49.86 62.86 75.86 49.86 31.075 18.0" "75 ],[151.43 151.43 164.43 151.43 164.43 164.43 164.43 151.43 ],[1 1 1 ]);\npatch([31.075 49.86 36.86 18.075 31" ".075 ],[138.43 138.43 151.43 151.43 138.43 ],[0.931 0.946 0.973 ]);\npatch([18.075 36.86 49.86 31.075 18.075 ]," "[125.43 125.43 138.43 138.43 125.43 ],[1 1 1 ]);\npatch([31.075 75.86 62.86 49.86 36.86 18.075 31.075 ],[112.43" " 112.43 125.43 112.43 125.43 125.43 112.43 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\n" "fprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'xn_re');\ncolor('black');port_lab" "el('input',2,'xn_im');\ncolor('black');port_label('input',3,'start');\ncolor('black');port_label('input',4,'fwd" "_inv');\ncolor('black');port_label('input',5,'fwd_inv_we');\ncolor('black');port_label('input',6,'scale_sch');\n" "color('black');port_label('input',7,'scale_sch_we');\ncolor('black');port_label('input',8,'rst');\ncolor('black" "');port_label('output',1,'xk_re');\ncolor('black');port_label('output',2,'xk_im');\ncolor('black');port_label('" "output',3,'xn_index');\ncolor('black');port_label('output',4,'xk_index');\ncolor('black');port_label('output',5" ",'rfd');\ncolor('black');port_label('output',6,'busy');\ncolor('black');port_label('output',7,'dv');\ncolor('bl" "ack');port_label('output',8,'edone');\ncolor('black');port_label('output',9,'done');\ncolor('black');port_label" "('output',10,'ovflo');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "7500" Position [205, 522, 285, 538] ShowName off CloseFcn "tagdialog Close" GotoTag "Tx_FFTScaling" TagVisibility "global" } Block { BlockType From Name "From2" SID "7501" Position [185, 582, 265, 598] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReset" TagVisibility "global" } Block { BlockType Scope Name "IFFT Ovflo" SID "7502" Ports [1] Position [830, 568, 890, 602] NamePlacement "alternate" Floating off Location [6, 45, 1926, 1127] Open off NumInputPorts "1" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" } TimeRange "392.7801724137931" YMin "-0.5" YMax "0.5" SaveName "ScopeData19" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "Inverter3" SID "7503" Ports [1, 1] Position [225, 423, 250, 437] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,201" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22" " 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 " "7.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "7504" Ports [2, 1] Position [280, 407, 305, 438] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,31,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 31 31 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 31 31 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[18" ".33 18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[15.33 15.33 " "18.33 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\nc" "olor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "7505" Ports [2, 1] Position [430, 697, 455, 728] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,31,2,1,white,blue,0,dc21e094,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 31 31 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 31 31 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[18" ".33 18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[15.33 15.33 " "18.33 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\nc" "olor('black');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "7506" Ports [2, 1] Position [855, 702, 880, 733] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,31,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 31 31 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 31 31 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[18" ".33 18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[15.33 15.33 " "18.33 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\nc" "olor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "7507" Ports [2, 1] Position [315, 582, 340, 613] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,31,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 31 31 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 31 31 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[18" ".33 18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[15.33 15.33 " "18.33 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\nc" "olor('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge2" SID "7508" Ports [1, 1] Position [970, 714, 1005, 726] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge2" Location [2, 74, 598, 375] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "7509" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "7510" Ports [1, 1] Position [95, 46, 125, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "7511" Ports [1, 1] Position [160, 48, 185, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "7512" Ports [2, 1] Position [215, 28, 260, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7513" Position [285, 43, 315, 57] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType Reference Name "Relational2" SID "7514" Ports [2, 1] Position [740, 684, 790, 731] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,47,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 47 47 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 47 47 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[2" "9.66 29.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[23.66 23.6" "6 29.66 29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[17.66 17.66 23.66 23.66 1" "7.66 ],[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.6" "6 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label" "('output',1,'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "SR Latch" SID "7515" Ports [2, 1] Position [1055, 710, 1095, 745] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "7516" Position [250, 213, 280, 227] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "7517" Position [250, 198, 280, 212] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "7518" Ports [0, 1] Position [265, 157, 280, 173] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 12.22 " "10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 ],[0.931" " 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 11.44 9.44" " 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon" " graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Payload\nRunning3" SID "7519" Ports [3, 1] Position [315, 183, 355, 227] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27.55 32." "55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 27.55 22." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('bla" "ck');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Outport Name "Q" SID "7520" Position [425, 198, 455, 212] IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 Points [0, 25] DstBlock "Payload\nRunning3" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Payload\nRunning3" DstPort 2 } Line { SrcBlock "S" SrcPort 1 DstBlock "Payload\nRunning3" DstPort 3 } Line { SrcBlock "Payload\nRunning3" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType Reference Name "done1" SID "7521" Ports [1, 1] Position [695, 215, 730, 225] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "7522" Ports [1, 1] Position [695, 230, 730, 240] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done3" SID "7523" Ports [1, 1] Position [695, 185, 730, 195] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "7524" Ports [1, 1] Position [695, 155, 730, 165] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "7525" Ports [1, 1] Position [695, 170, 730, 180] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done6" SID "7526" Ports [1, 1] Position [695, 200, 730, 210] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done7" SID "7527" Ports [1, 1] Position [695, 245, 730, 255] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done8" SID "7528" Ports [1, 1] Position [705, 580, 740, 590] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Outport Name "xn_Index" SID "7529" Position [720, 403, 750, 417] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "Vout" SID "7530" Position [860, 503, 890, 517] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "xk_I" SID "7531" Position [770, 353, 800, 367] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "xk_Q" SID "7532" Position [770, 378, 800, 392] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "xk_Index" SID "7533" Position [720, 428, 750, 442] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "LastSym" SID "7534" Position [1175, 723, 1205, 737] Port "6" IconDisplay "Port number" } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Fast Fourier Transform 7.1 " DstPort 4 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Fast Fourier Transform 7.1 " DstPort 5 } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "Fast Fourier Transform 7.1 " DstPort 7 } Line { SrcBlock "Logical4" SrcPort 1 Points [30, 0] Branch { Points [0, 95] Branch { DstBlock "Counter" DstPort 2 } Branch { Points [0, 40] DstBlock "SR Latch" DstPort 2 } } Branch { DstBlock "Fast Fourier Transform 7.1 " DstPort 8 } } Line { SrcBlock "xn_I" SrcPort 1 Points [35, 0] Branch { Points [0, -195] DstBlock "done4" DstPort 1 } Branch { DstBlock "Fast Fourier Transform 7.1 " DstPort 1 } } Line { SrcBlock "Fast Fourier Transform 7.1 " SrcPort 1 Points [70, 0] Branch { DstBlock "xk_I" DstPort 1 } Branch { Points [0, -140] DstBlock "done1" DstPort 1 } } Line { SrcBlock "Fast Fourier Transform 7.1 " SrcPort 2 Points [75, 0] Branch { DstBlock "xk_Q" DstPort 1 } Branch { Points [0, -150] DstBlock "done2" DstPort 1 } } Line { SrcBlock "xn_Q" SrcPort 1 Points [40, 0] Branch { Points [0, -215] DstBlock "done5" DstPort 1 } Branch { DstBlock "Fast Fourier Transform 7.1 " DstPort 2 } } Line { SrcBlock "Fast Fourier Transform 7.1 " SrcPort 3 Points [60, 0] Branch { DstBlock "xn_Index" DstPort 1 } Branch { Points [0, -110; -220, 0; 0, -110] DstBlock "done3" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 Points [95, 0; 0, 250] Branch { DstBlock "Counter" DstPort 1 } Branch { Points [0, 30] DstBlock "Logical2" DstPort 1 } } Line { SrcBlock "Fast Fourier Transform 7.1 " SrcPort 4 Points [85, 0] Branch { DstBlock "xk_Index" DstPort 1 } Branch { Points [0, -185] DstBlock "done7" DstPort 1 } } Line { SrcBlock "Fast Fourier Transform 7.1 " SrcPort 7 DstBlock "Vout" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Fast Fourier Transform 7.1 " DstPort 6 } Line { SrcBlock "Fast Fourier Transform 7.1 " SrcPort 8 Points [50, 0; 0, 215; -200, 0] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Pkt Done" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Start" SrcPort 1 Points [60, 0] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, -15; 180, 0] Branch { Points [0, -195] DstBlock "done6" DstPort 1 } Branch { Points [25, 0; 0, 25] DstBlock "Fast Fourier Transform 7.1 " DstPort 3 } } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Counter" DstPort 3 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Counter" SrcPort 1 DstBlock "Relational2" DstPort 1 } Line { SrcBlock "Payload Done" SrcPort 1 Points [35, 0] Branch { Points [0, -55; -175, 0; 0, -300] DstBlock "Inverter3" DstPort 1 } Branch { Points [460, 0; 0, -60] DstBlock "Logical3" DstPort 2 } } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Posedge2" DstPort 1 } Line { SrcBlock "SR Latch" SrcPort 1 DstBlock "LastSym" DstPort 1 } Line { SrcBlock "Posedge2" SrcPort 1 DstBlock "SR Latch" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "done4" SrcPort 1 Points [45, 0] } Line { SrcBlock "done5" SrcPort 1 Points [45, 0] } Line { SrcBlock "done3" SrcPort 1 Points [45, 0] } Line { SrcBlock "done6" SrcPort 1 Points [45, 0] } Line { SrcBlock "done1" SrcPort 1 Points [45, 0] } Line { SrcBlock "done2" SrcPort 1 Points [45, 0] } Line { SrcBlock "done7" SrcPort 1 Points [45, 0] } Line { SrcBlock "Fast Fourier Transform 7.1 " SrcPort 10 DstBlock "done8" DstPort 1 } Line { SrcBlock "done8" SrcPort 1 DstBlock "IFFT Ovflo" DstPort 1 } Annotation { Position [708, 227] } } } Block { BlockType SubSystem Name "OutputBuffers" SID "7535" Ports [5, 6] Position [565, 206, 675, 334] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "OutputBuffers" Location [60, 93, 1776, 1037] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "89" Block { BlockType Inport Name "IFFT Vout" SID "7536" Position [85, 483, 110, 497] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "I" SID "7537" Position [545, 943, 570, 957] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "7538" Position [545, 983, 570, 997] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Xk_index" SID "7539" Position [410, 788, 435, 802] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Last Sym" SID "7540" Position [85, 428, 110, 442] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType SubSystem Name "1 Shift Reg" SID "7541" Ports [3, 1] Position [690, 339, 730, 371] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "1 Shift Reg" Location [212, 92, 622, 221] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "d" SID "7542" Position [215, 133, 245, 147] IconDisplay "Port number" } Block { BlockType Inport Name "rst" SID "7543" Position [160, 193, 190, 207] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "en" SID "7544" Position [265, 188, 295, 202] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Payload\nRunning1" SID "7545" Ports [3, 1] Position [330, 133, 370, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27.55 32." "55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 27.55 22." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('bla" "ck');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Outport Name "Q" SID "7546" Position [630, 148, 660, 162] IconDisplay "Port number" } Line { SrcBlock "en" SrcPort 1 Points [15, 0] DstBlock "Payload\nRunning1" DstPort 3 } Line { SrcBlock "rst" SrcPort 1 Points [65, 0; 0, -45] DstBlock "Payload\nRunning1" DstPort 2 } Line { SrcBlock "d" SrcPort 1 DstBlock "Payload\nRunning1" DstPort 1 } Line { SrcBlock "Payload\nRunning1" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType SubSystem Name "1 Shift Reg2" SID "7547" Ports [3, 1] Position [775, 404, 815, 436] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "1 Shift Reg2" Location [212, 92, 622, 221] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "d" SID "7548" Position [215, 133, 245, 147] IconDisplay "Port number" } Block { BlockType Inport Name "rst" SID "7549" Position [160, 193, 190, 207] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "en" SID "7550" Position [265, 188, 295, 202] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Payload\nRunning1" SID "7551" Ports [3, 1] Position [330, 133, 370, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27.55 32." "55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 27.55 22." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('bla" "ck');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Outport Name "Q" SID "7552" Position [630, 148, 660, 162] IconDisplay "Port number" } Line { SrcBlock "en" SrcPort 1 Points [15, 0] DstBlock "Payload\nRunning1" DstPort 3 } Line { SrcBlock "rst" SrcPort 1 Points [65, 0; 0, -45] DstBlock "Payload\nRunning1" DstPort 2 } Line { SrcBlock "d" SrcPort 1 DstBlock "Payload\nRunning1" DstPort 1 } Line { SrcBlock "Payload\nRunning1" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType SubSystem Name "Addr Gen" SID "7553" Ports [5, 7] Position [510, 585, 620, 885] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Addr Gen" Location [2, 74, 1278, 1000] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "TrainingSym" SID "7554" Position [190, 708, 220, 722] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "BaseRateSym" SID "7555" Position [255, 128, 285, 142] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "SymWrDone" SID "7556" Position [265, 243, 295, 257] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Xk Index" SID "7557" Position [450, 368, 480, 382] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "rst" SID "7558" Position [265, 228, 295, 242] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType SubSystem Name "1 Shift Reg" SID "7559" Ports [3, 1] Position [900, 467, 940, 503] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "1 Shift Reg" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "d" SID "7560" Position [215, 133, 245, 147] IconDisplay "Port number" } Block { BlockType Inport Name "rst" SID "7561" Position [160, 193, 190, 207] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "en" SID "7562" Position [265, 188, 295, 202] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Payload\nRunning1" SID "7563" Ports [3, 1] Position [330, 133, 370, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7564" Position [425, 148, 455, 162] IconDisplay "Port number" } Line { SrcBlock "en" SrcPort 1 Points [15, 0] DstBlock "Payload\nRunning1" DstPort 3 } Line { SrcBlock "rst" SrcPort 1 Points [65, 0; 0, -45] DstBlock "Payload\nRunning1" DstPort 2 } Line { SrcBlock "d" SrcPort 1 DstBlock "Payload\nRunning1" DstPort 1 } Line { SrcBlock "Payload\nRunning1" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType SubSystem Name "1 Shift Reg1" SID "7565" Ports [3, 1] Position [665, 757, 705, 793] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "1 Shift Reg1" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "d" SID "7566" Position [215, 133, 245, 147] IconDisplay "Port number" } Block { BlockType Inport Name "rst" SID "7567" Position [160, 193, 190, 207] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "en" SID "7568" Position [265, 188, 295, 202] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Payload\nRunning1" SID "7569" Ports [3, 1] Position [330, 133, 370, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7570" Position [425, 148, 455, 162] IconDisplay "Port number" } Line { SrcBlock "Payload\nRunning1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "d" SrcPort 1 DstBlock "Payload\nRunning1" DstPort 1 } Line { SrcBlock "rst" SrcPort 1 Points [65, 0; 0, -45] DstBlock "Payload\nRunning1" DstPort 2 } Line { SrcBlock "en" SrcPort 1 Points [15, 0] DstBlock "Payload\nRunning1" DstPort 3 } } } Block { BlockType SubSystem Name "2 Shift Reg" SID "7571" Ports [3, 1] Position [560, 495, 600, 555] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "2 Shift Reg" Location [212, 92, 622, 221] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "d" SID "7572" Position [170, 133, 200, 147] IconDisplay "Port number" } Block { BlockType Inport Name "en" SID "7573" Position [160, 218, 190, 232] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "rst" SID "7574" Position [160, 193, 190, 207] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Payload\nRunning1" SID "7575" Ports [3, 1] Position [330, 133, 370, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Payload\nRunning3" SID "7576" Ports [3, 1] Position [420, 148, 460, 192] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7577" Position [515, 163, 545, 177] IconDisplay "Port number" } Line { SrcBlock "en" SrcPort 1 Points [115, 0] Branch { Points [0, -55] DstBlock "Payload\nRunning1" DstPort 3 } Branch { Points [95, 0] DstBlock "Payload\nRunning3" DstPort 3 } } Line { SrcBlock "rst" SrcPort 1 Points [0, 0; 65, 0] Branch { Points [0, -45] DstBlock "Payload\nRunning1" DstPort 2 } Branch { Points [130, 0; 0, -30] DstBlock "Payload\nRunning3" DstPort 2 } } Line { SrcBlock "d" SrcPort 1 DstBlock "Payload\nRunning1" DstPort 1 } Line { SrcBlock "Payload\nRunning3" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Payload\nRunning1" SrcPort 1 DstBlock "Payload\nRunning3" DstPort 1 } } } Block { BlockType Reference Name "6LSB1" SID "7578" Ports [1, 1] Position [650, 379, 685, 401] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "log2(numSubcarriers)" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');po" "rt_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub" SID "7579" Ports [2, 1] Position [550, 360, 590, 415] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,55,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 55 55 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[32.55 32.55 37." "55 32.55 37.55 37.55 37.55 32.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[27.55 27.55 32.55 32.55 27." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[22.55 22.55 27.55 27.55 22.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[17.55 17.55 22.55 17.55 22.55 22.55 17.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "7580" Ports [2, 1] Position [295, 370, 335, 425] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,55,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 55 55 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[32.55 32.55 37." "55 32.55 37.55 37.55 37.55 32.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[27.55 27.55 32.55 32.55 27." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[22.55 22.55 27.55 27.55 22.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[17.55 17.55 22.55 17.55 22.55 22.55 17.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "7581" Ports [2, 1] Position [1065, 329, 1095, 411] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at z" "ero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,82,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 82 82 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 82 82 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[45.44 45.44 49.4" "4 45.44 49.44 49.44 49.44 45.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[41.44 41.44 45.44 45.44 41.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[37.44 37.44 41.44 41.44 37.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[33.44 33.44 37.44 33.44 37.44 37.44 33.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi" "');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat1" SID "7582" Ports [2, 1] Position [1065, 466, 1095, 544] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at z" "ero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,78,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 78 78 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 78 78 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[43.44 43.44 47.4" "4 43.44 47.44 47.44 47.44 43.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[39.44 39.44 43.44 43.44 39.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 39.44 35.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 31.44 35.44 35.44 31.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi" "');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "7583" Ports [0, 1] Position [515, 497, 530, 513] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 12.22 " "10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 ],[0.931" " 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 11.44 9.44" " 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon" " graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "7584" Ports [1, 1] Position [675, 1003, 700, 1017] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.22 11.2" "2 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 ],[0.931" " 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.55 16.44 14" ".44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end" " icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "7585" Ports [1, 1] Position [790, 533, 815, 557] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "7586" Ports [1, 1] Position [965, 471, 995, 499] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,e5fb4045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}\\" "bf\\downarrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "7587" Ports [1, 1] Position [460, 511, 490, 539] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,303" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample2" SID "7588" Ports [1, 1] Position [460, 566, 490, 594] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "7589" Position [415, 637, 550, 653] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_Alamouti_Mode" TagVisibility "global" } Block { BlockType From Name "From2" SID "7590" Position [70, 376, 185, 394] ShowName off CloseFcn "tagdialog Close" GotoTag "regRX_CP_Length" TagVisibility "global" } Block { BlockType From Name "From3" SID "7591" Position [495, 1002, 630, 1018] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_SISO_Mode" TagVisibility "global" } Block { BlockType From Name "From4" SID "7592" Position [70, 400, 225, 420] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_PostIFFTCycShift" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "7593" Ports [1, 1] Position [800, 467, 840, 483] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "7594" Ports [1, 1] Position [640, 832, 680, 848] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "7595" Ports [1, 1] Position [710, 682, 750, 698] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,267846e5,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter6" SID "7596" Ports [1, 1] Position [850, 967, 890, 983] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "7597" Ports [2, 1] Position [800, 796, 830, 829] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "7598" Ports [2, 1] Position [800, 915, 830, 950] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 35 35 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 35 35 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[21.44 21.44 25.4" "4 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[17.44 17.44 21.44 21.44 17.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "7599" Ports [2, 1] Position [965, 911, 995, 944] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,33,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "7600" Ports [3, 1] Position [665, 668, 695, 702] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,34,3,1,white,blue,0,98d76266,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 34 34 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 34 34 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[21.44 21.44 25.4" "4 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[17.44 17.44 21.44 21.44 17.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('and');\nfprint" "f('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical8" SID "7601" Ports [2, 1] Position [960, 806, 990, 839] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Oscillator1" SID "7602" Ports [2, 1] Position [565, 800, 610, 835] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Oscillator1" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "en" SID "7603" Position [260, 313, 290, 327] IconDisplay "Port number" } Block { BlockType Inport Name "rst" SID "7604" Position [260, 288, 290, 302] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Assert" SID "7605" Ports [1, 1] Position [425, 222, 470, 248] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type on type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,423" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,26,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 26 26 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "7606" Ports [1, 1] Position [345, 227, 375, 243] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,267846e5,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "7607" Ports [3, 1] Position [335, 259, 400, 331] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "65,72,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 72 72 0 ]);\npatch([11.975 24.98 33.98 42.98 51.98 33.98 20.975 11.975 ],[45" ".99 45.99 54.99 45.99 54.99 54.99 54.99 45.99 ],[1 1 1 ]);\npatch([20.975 33.98 24.98 11.975 20.975 ],[36.99 36." "99 45.99 45.99 36.99 ],[0.931 0.946 0.973 ]);\npatch([11.975 24.98 33.98 20.975 11.975 ],[27.99 27.99 36.99 36.9" "9 27.99 ],[1 1 1 ]);\npatch([20.975 51.98 42.98 33.98 24.98 11.975 20.975 ],[18.99 18.99 27.99 18.99 27.99 27.99" " 18.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port" "_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7608" Position [575, 288, 605, 302] IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 Points [150, 0] Branch { Points [0, -60] DstBlock "Assert" DstPort 1 } Branch { DstBlock "Q" DstPort 1 } } Line { SrcBlock "en" SrcPort 1 DstBlock "Register" DstPort 3 } Line { SrcBlock "Inverter1" SrcPort 1 Points [-25, 0; 0, 35] DstBlock "Register" DstPort 1 } Line { SrcBlock "Assert" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "rst" SrcPort 1 DstBlock "Register" DstPort 2 } } } Block { BlockType SubSystem Name "Read Addr\nGenerator" SID "7609" Ports [3, 3] Position [675, 517, 735, 573] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Read Addr\nGenerator" Location [540, 526, 830, 621] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "156" Block { BlockType Inport Name "En" SID "7610" Position [105, 168, 135, 182] IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "7611" Position [110, 238, 140, 252] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "SwapDir" SID "7612" Position [400, 33, 430, 47] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "6LSB" SID "7613" Ports [1, 1] Position [585, 58, 610, 72] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "log2(numSubcarriers)" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "6LSB1" SID "7614" Ports [1, 1] Position [585, 83, 610, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "log2(numSubcarriers)" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub" SID "7615" Ports [2, 1] Position [465, 155, 500, 190] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "8.2.02" sg_icon_stat "35,35,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a" " + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "7616" Ports [0, 1] Position [400, 172, 415, 188] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "32" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(numSubcarriers + CPLength - 1))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,b5591290,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 " "12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'32');\n" "fprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant3" SID "7617" Ports [0, 1] Position [345, 242, 360, 258] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "numSubcarriers + CPLength - 1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(numSubcarriers + CPLength - 1))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,ed27c8eb,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 " "12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'79');\n" "fprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" SID "7618" Ports [1, 1] Position [470, 26, 500, 54] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,e5fb4045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\f" "ontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "7619" Ports [2, 1] Position [177, 200, 208, 230] BlockRotation 270 ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "31,30,2,1,white,blue,0,7ede7d88,up,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 31 31 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 31 31 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "7620" Ports [3, 1] Position [690, 26, 715, 104] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "8.2.02" sg_icon_stat "25,78,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 11.1429 66.8571 78 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 11.1429 66.8571 78 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[42.33 42.33 45.33 42.33 45.33 45.33 45.33 42.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[39.33 39.33 42.33 42.33 39.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[36.33 36.33 " "39.33 39.33 36.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[33.33 33.33 36.33 33.33 36.33" " 36.33 33.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');" } Block { BlockType Reference Name "Negate" SID "7621" Ports [1, 1] Position [560, 162, 590, 188] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "negate" block_version "8.2.02" sg_icon_stat "30,26,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('\\bf{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Read\nCounter" SID "7622" Ports [2, 1] Position [215, 139, 265, 186] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "numSubcarriers + CPLength - 1" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(numSubcarriers + CPLength - 1))" bin_pt "0" load_pin off rst on en on explicit_period "off" period "2" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,356,630" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,47,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 47 47 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 47 47 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[29.66" " 29.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[23.66 23.66 29." "66 29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[17.66 17.66 23.66 23.66 17.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\font" "size{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Relational" SID "7623" Ports [2, 1] Position [245, 226, 280, 259] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,33,2,1,white,blue,0,2a81ff49,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 33 33 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmo" "de','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample" SID "7624" Ports [1, 1] Position [315, 282, 340, 308] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples off en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7625" Position [795, 58, 825, 72] IconDisplay "Port number" } Block { BlockType Outport Name "Ovfl" SID "7626" Position [380, 288, 410, 302] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Slot" SID "7627" Position [805, 148, 835, 162] Port "3" IconDisplay "Port number" } Line { SrcBlock "Read\nCounter" SrcPort 1 Points [0, 0; 25, 0] Branch { DstBlock "Relational" DstPort 1 } Branch { Points [100, 0] Branch { DstBlock "AddSub" DstPort 1 } Branch { Points [0, -100] DstBlock "6LSB" DstPort 1 } } } Line { SrcBlock "Relational" SrcPort 1 Points [0, 0; -40, 0] Branch { DstBlock "Logical" DstPort 2 } Branch { Points [0, 50] DstBlock "Up Sample" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [0, -45] DstBlock "Read\nCounter" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 Points [0, 0] DstBlock "Relational" DstPort 2 } Line { SrcBlock "En" SrcPort 1 DstBlock "Read\nCounter" DstPort 2 } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Up Sample" SrcPort 1 DstBlock "Ovfl" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Negate" DstPort 1 } Line { SrcBlock "Negate" SrcPort 1 Points [40, 0; 0, -45; -65, 0] DstBlock "6LSB1" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "6LSB" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "6LSB1" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "SwapDir" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 Points [165, 0] Branch { DstBlock "Mux" DstPort 1 } Branch { Points [0, 115] DstBlock "Slot" DstPort 1 } } Annotation { Name "About the addresses:\nThe IFFT output time series [0,1,...63] is written to a RAM with an offset of 1" "6, modulo 64, so that:\nXn=[0,1,...63] -> WrAddr=[16,17,...15]\n\nThis allows much easier read address generatio" "n, which must include both the full IFFT output and a cyclic prefix.\n\nFor SISO/Multiplexing MIMO modes, the ou" "tput series per symbol must be:\nXn_out = [48,49...63,0,1,...63] - 80 samples long ({CP SYM} = {SYM[48:63] SYM[0" ":63]})\n\nThus, the 80-sample sequence of read addresses is\nRdAddr=[0,1,...15,16,17,...63,0,1,...15]\n\nFor Ala" "mouti mode, the non-conjugated symbols are handled the same as the SISO/Multiplexing mode. For the\nconjugated s" "ymbols, we use the Fourier identity of:\nif x(t) = ifft(X(f)) then\nifft(conj(X(f))) = conj(x(-t))\n\nSo we can " "\"generate\" the conjugate of the frequency domain symbol by reading the time domain series (which we\nalready h" "ave, since Alamouti uses the same symbol twice) backwards, then conjugating. Notice that the zero'th entry\nin t" "he time series doesn't change, but the rest do.\n\nSo, for conjugated Alamouti symbols:\nXn_out = [16,15,14,...0" ",63,...2,1] - 80 saples long {CP SYM} = {SYM[16:1] SYM[0] SYM[63:1]}\nThus,\nRdAddr = [32,31,...0,63,62,...17]" Position [112, 536] HorizontalAlignment "left" } } } Block { BlockType SubSystem Name "SR Latch" SID "7628" Ports [2, 1] Position [750, 595, 790, 630] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "7629" Position [250, 213, 280, 227] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "7630" Position [250, 198, 280, 212] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "7631" Ports [0, 1] Position [265, 157, 280, 173] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 " "12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Payload\nRunning3" SID "7632" Ports [3, 1] Position [315, 183, 355, 227] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7633" Position [425, 198, 455, 212] IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 Points [0, 25] DstBlock "Payload\nRunning3" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Payload\nRunning3" DstPort 2 } Line { SrcBlock "S" SrcPort 1 DstBlock "Payload\nRunning3" DstPort 3 } Line { SrcBlock "Payload\nRunning3" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType SubSystem Name "Subsystem" SID "7634" Ports [4, 1] Position [575, 207, 650, 278] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Subsystem" Location [396, 160, 773, 345] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "BaseRate" SID "7635" Position [155, 238, 180, 252] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "7636" Position [145, 318, 175, 332] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "En" SID "7637" Position [190, 343, 220, 357] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Training" SID "7638" Position [255, 368, 285, 382] Port "4" IconDisplay "Port number" } Block { BlockType From Name "From4" SID "7639" Position [480, 157, 615, 173] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_Alamouti_Mode" TagVisibility "global" } Block { BlockType Reference Name "Mux" SID "7640" Ports [3, 1] Position [670, 282, 695, 338] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "25,56,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 8 48 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 8 48 56 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[31.33 " "31.33 34.33 31.33 34.33 34.33 34.33 31.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[28.33 28.33 31.33" " 31.33 28.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[25.33 25.33 28.33 28.33 25.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[22.33 22.33 25.33 22.33 25.33 25.33 22.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input'," "3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Oscillator" SID "7641" Ports [3, 1] Position [450, 314, 495, 386] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Oscillator" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "rst" SID "7642" Position [260, 288, 290, 302] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "en" SID "7643" Position [260, 313, 290, 327] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Period" SID "7644" Position [505, 228, 535, 242] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Assert" SID "7645" Ports [1, 1] Position [820, 159, 855, 181] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type on type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,423" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "7646" Ports [1, 1] Position [735, 162, 765, 178] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,267846e5,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "7647" Ports [3, 1] Position [630, 227, 655, 283] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "25,56,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 8 48 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 8 48 56 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[31.33 " "31.33 34.33 31.33 34.33 34.33 34.33 31.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[28.33 28.33 31.33" " 31.33 28.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[25.33 25.33 28.33 28.33 25.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[22.33 22.33 25.33 22.33 25.33 25.33 22.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input'," "3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "7648" Ports [3, 1] Position [335, 259, 400, 331] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "65,72,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 72 72 0 ]);\npatch([11.975 24.98 33.98 42.98 51.98 33.98 20.975 11.975 ],[45" ".99 45.99 54.99 45.99 54.99 54.99 54.99 45.99 ],[1 1 1 ]);\npatch([20.975 33.98 24.98 11.975 20.975 ],[36.99 36." "99 45.99 45.99 36.99 ],[0.931 0.946 0.973 ]);\npatch([11.975 24.98 33.98 20.975 11.975 ],[27.99 27.99 36.99 36.9" "9 27.99 ],[1 1 1 ]);\npatch([20.975 51.98 42.98 33.98 24.98 11.975 20.975 ],[18.99 18.99 27.99 18.99 27.99 27.99" " 18.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port" "_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "7649" Ports [3, 1] Position [515, 284, 580, 356] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "65,72,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 72 72 0 ]);\npatch([11.975 24.98 33.98 42.98 51.98 33.98 20.975 11.975 ],[45" ".99 45.99 54.99 45.99 54.99 54.99 54.99 45.99 ],[1 1 1 ]);\npatch([20.975 33.98 24.98 11.975 20.975 ],[36.99 36." "99 45.99 45.99 36.99 ],[0.931 0.946 0.973 ]);\npatch([11.975 24.98 33.98 20.975 11.975 ],[27.99 27.99 36.99 36.9" "9 27.99 ],[1 1 1 ]);\npatch([20.975 51.98 42.98 33.98 24.98 11.975 20.975 ],[18.99 18.99 27.99 18.99 27.99 27.99" " 18.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port" "_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "7650" Ports [3, 1] Position [685, 309, 750, 381] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "65,72,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 72 72 0 ]);\npatch([11.975 24.98 33.98 42.98 51.98 33.98 20.975 11.975 ],[45" ".99 45.99 54.99 45.99 54.99 54.99 54.99 45.99 ],[1 1 1 ]);\npatch([20.975 33.98 24.98 11.975 20.975 ],[36.99 36." "99 45.99 45.99 36.99 ],[0.931 0.946 0.973 ]);\npatch([11.975 24.98 33.98 20.975 11.975 ],[27.99 27.99 36.99 36.9" "9 27.99 ],[1 1 1 ]);\npatch([20.975 51.98 42.98 33.98 24.98 11.975 20.975 ],[18.99 18.99 27.99 18.99 27.99 27.99" " 18.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port" "_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register3" SID "7651" Ports [3, 1] Position [915, 334, 980, 406] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "65,72,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 72 72 0 ]);\npatch([11.975 24.98 33.98 42.98 51.98 33.98 20.975 11.975 ],[45" ".99 45.99 54.99 45.99 54.99 54.99 54.99 45.99 ],[1 1 1 ]);\npatch([20.975 33.98 24.98 11.975 20.975 ],[36.99 36." "99 45.99 45.99 36.99 ],[0.931 0.946 0.973 ]);\npatch([11.975 24.98 33.98 20.975 11.975 ],[27.99 27.99 36.99 36.9" "9 27.99 ],[1 1 1 ]);\npatch([20.975 51.98 42.98 33.98 24.98 11.975 20.975 ],[18.99 18.99 27.99 18.99 27.99 27.99" " 18.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port" "_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7652" Position [1050, 323, 1080, 337] IconDisplay "Port number" } Line { SrcBlock "rst" SrcPort 1 Points [10, 0] Branch { DstBlock "Register" DstPort 2 } Branch { Points [0, 45; 170, 0] Branch { Points [0, -20] DstBlock "Register1" DstPort 2 } Branch { Points [0, 30; 155, 0] Branch { Points [0, -25] DstBlock "Register2" DstPort 2 } Branch { Points [0, 35; 180, 0; 0, -35] DstBlock "Register3" DstPort 2 } } } } Line { SrcBlock "Assert" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 Points [-120, 0] Branch { Points [-295, 0; 0, 100] DstBlock "Register" DstPort 1 } Branch { Points [0, 105] DstBlock "Mux" DstPort 3 } } Line { SrcBlock "en" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Register" DstPort 3 } Branch { Points [0, 25] Branch { DstBlock "Register1" DstPort 3 } Branch { Points [0, 75; 345, 0] Branch { Points [215, 0; 0, -25] DstBlock "Register3" DstPort 3 } Branch { Points [0, -50] DstBlock "Register2" DstPort 3 } } } } Line { SrcBlock "Register1" SrcPort 1 Points [20, 0; 0, -65] DstBlock "Mux" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 Points [0, -40] Branch { Points [0, -160] DstBlock "Assert" DstPort 1 } Branch { DstBlock "Q" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Register3" DstPort 1 } Line { SrcBlock "Period" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 Points [5, 0; 0, 65] DstBlock "Register2" DstPort 1 } Annotation { Name "This is an osciilator with period 2 or 4.\nThe initial values of the DFF's are key-\nthe output toggl" "es after the first two EN pulses,\nthen toggers every four EN pulses after that." Position [688, 648] } } } Block { BlockType SubSystem Name "Oscillator2" SID "7653" Ports [3, 1] Position [450, 231, 495, 309] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off Port { PortNumber 1 Name "Wr Bank Sel" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } System { Name "Oscillator2" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "period" SID "7654" Position [260, 393, 290, 407] IconDisplay "Port number" } Block { BlockType Inport Name "rst" SID "7655" Position [260, 288, 290, 302] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "en" SID "7656" Position [260, 313, 290, 327] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Assert" SID "7657" Ports [1, 1] Position [430, 224, 465, 246] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type on type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,423" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "7658" Ports [1, 1] Position [345, 227, 375, 243] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,267846e5,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "7659" Ports [3, 1] Position [450, 387, 475, 453] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,66,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 9.42857 56.5714 66 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 9.42857 56.5714 66 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[36.33 36.33 39.33 36.33 39.33 39.33 39.33 36.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[33.33 33.33 36.33 36.33 33.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[30.33 30.33 " "33.33 33.33 30.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33 27.33 30.33" " 30.33 27.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');" } Block { BlockType Reference Name "Register" SID "7660" Ports [3, 1] Position [335, 259, 400, 331] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "65,72,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 72 72 0 ]);\npatch([11.975 24.98 33.98 42.98 51.98 33.98 20.975 11.975 ],[45" ".99 45.99 54.99 45.99 54.99 54.99 54.99 45.99 ],[1 1 1 ]);\npatch([20.975 33.98 24.98 11.975 20.975 ],[36.99 36." "99 45.99 45.99 36.99 ],[0.931 0.946 0.973 ]);\npatch([11.975 24.98 33.98 20.975 11.975 ],[27.99 27.99 36.99 36.9" "9 27.99 ],[1 1 1 ]);\npatch([20.975 51.98 42.98 33.98 24.98 11.975 20.975 ],[18.99 18.99 27.99 18.99 27.99 27.99" " 18.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port" "_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "7661" Ports [3, 1] Position [565, 284, 630, 356] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "65,72,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 72 72 0 ]);\npatch([11.975 24.98 33.98 42.98 51.98 33.98 20.975 11.975 ],[45" ".99 45.99 54.99 45.99 54.99 54.99 54.99 45.99 ],[1 1 1 ]);\npatch([20.975 33.98 24.98 11.975 20.975 ],[36.99 36." "99 45.99 45.99 36.99 ],[0.931 0.946 0.973 ]);\npatch([11.975 24.98 33.98 20.975 11.975 ],[27.99 27.99 36.99 36.9" "9 27.99 ],[1 1 1 ]);\npatch([20.975 51.98 42.98 33.98 24.98 11.975 20.975 ],[18.99 18.99 27.99 18.99 27.99 27.99" " 18.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port" "_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7662" Position [685, 313, 715, 327] IconDisplay "Port number" } Line { SrcBlock "Register" SrcPort 1 Points [25, 0; 0, 125] DstBlock "Mux" DstPort 2 } Line { SrcBlock "period" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 Points [45, 0; 0, -125] DstBlock "Register1" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [30, 0] Branch { Points [0, -85] DstBlock "Assert" DstPort 1 } Branch { DstBlock "Q" DstPort 1 } } Line { SrcBlock "en" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 25] DstBlock "Register1" DstPort 3 } Branch { DstBlock "Register" DstPort 3 } } Line { SrcBlock "Inverter1" SrcPort 1 Points [-25, 0; 0, 35] Branch { Points [0, 170] DstBlock "Mux" DstPort 3 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Assert" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "rst" SrcPort 1 Points [10, 0] Branch { Points [0, 75; 235, 0; 0, -50] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register" DstPort 2 } } } } Block { BlockType Outport Name "Q" SID "7663" Position [780, 303, 810, 317] IconDisplay "Port number" } Line { Name "Wr Bank Sel" Labels [0, 0] SrcBlock "Oscillator2" SrcPort 1 Points [15, 0; 0, 40] DstBlock "Mux" DstPort 2 } Line { SrcBlock "Oscillator" SrcPort 1 Points [15, 0; 0, -20] DstBlock "Mux" DstPort 3 } Line { SrcBlock "BaseRate" SrcPort 1 DstBlock "Oscillator2" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 Points [240, 0] Branch { Points [0, -55] DstBlock "Oscillator2" DstPort 2 } Branch { DstBlock "Oscillator" DstPort 1 } } Line { SrcBlock "En" SrcPort 1 Points [200, 0] Branch { Points [0, -55] DstBlock "Oscillator2" DstPort 3 } Branch { DstBlock "Oscillator" DstPort 2 } } Line { SrcBlock "Training" SrcPort 1 DstBlock "Oscillator" DstPort 3 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 Points [15, 0; 0, 125] DstBlock "Mux" DstPort 1 } Annotation { Position [451, 388] } Annotation { Name "Alamouti mode treats base rate and full rate symbols\nthe same, so the memory address generation logi" "c \nignore BaseRate for Alamouti transmissions." Position [680, 383] } } } Block { BlockType Outport Name "LastSamp" SID "7664" Position [910, 538, 940, 552] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "OE#A" SID "7665" Position [1055, 818, 1085, 832] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "OE#B" SID "7666" Position [1060, 923, 1090, 937] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Wr Addr" SID "7667" Position [1190, 363, 1220, 377] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Rd Addr" SID "7668" Position [1195, 498, 1225, 512] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Rd Vout" SID "7669" Position [910, 608, 940, 622] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Slot" SID "7670" Position [1195, 558, 1225, 572] Port "7" IconDisplay "Port number" } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Concat1" DstPort 1 } Line { SrcBlock "Read Addr\nGenerator" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "2 Shift Reg" DstPort 1 } Line { SrcBlock "2 Shift Reg" SrcPort 1 Points [5, 0] Branch { Points [0, 80] DstBlock "SR Latch" DstPort 1 } Branch { DstBlock "Read Addr\nGenerator" DstPort 1 } } Line { SrcBlock "Down Sample2" SrcPort 1 Points [35, 0] Branch { Points [0, -35] DstBlock "2 Shift Reg" DstPort 3 } Branch { Points [0, 40] DstBlock "SR Latch" DstPort 2 } Branch { Points [90, 0; 0, -35] DstBlock "Read Addr\nGenerator" DstPort 2 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "6LSB1" DstPort 1 } Line { SrcBlock "6LSB1" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "2 Shift Reg" DstPort 2 } Line { SrcBlock "rst" SrcPort 1 Points [85, 0] Branch { Points [0, 250] Branch { DstBlock "1 Shift Reg" DstPort 2 } Branch { Points [0, 0; 0, 95] Branch { DstBlock "Down Sample2" DstPort 1 } Branch { Points [0, 245; 145, 0] Branch { DstBlock "Oscillator1" DstPort 2 } Branch { Points [0, -50] DstBlock "1 Shift Reg1" DstPort 2 } } } } Branch { Labels [0, 0] DstBlock "Subsystem" DstPort 2 } } Line { SrcBlock "SymWrDone" SrcPort 1 Points [125, 0] Branch { Points [0, 275] DstBlock "Down Sample1" DstPort 1 } Branch { Labels [0, 0] DstBlock "Subsystem" DstPort 3 } } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Wr Addr" DstPort 1 } Line { SrcBlock "Xk Index" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "Rd Addr" DstPort 1 } Line { SrcBlock "SR Latch" SrcPort 1 DstBlock "Rd Vout" DstPort 1 } Line { SrcBlock "1 Shift Reg" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Read Addr\nGenerator" SrcPort 2 DstBlock "Delay" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 Points [50, 0] Branch { Points [0, -50] DstBlock "1 Shift Reg" DstPort 3 } Branch { DstBlock "LastSamp" DstPort 1 } Branch { Points [0, 160; -320, 0; 0, 80] Branch { DstBlock "Oscillator1" DstPort 1 } Branch { DstBlock "1 Shift Reg1" DstPort 3 } } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "1 Shift Reg" DstPort 1 } Line { SrcBlock "Oscillator1" SrcPort 1 Points [5, 0] Branch { Points [0, 20] DstBlock "Inverter1" DstPort 1 } Branch { Points [120, 0] Branch { DstBlock "Logical" DstPort 2 } Branch { Points [0, -135] DstBlock "Logical4" DstPort 2 } } } Line { SrcBlock "Inverter1" SrcPort 1 Points [80, 0; 0, 85] DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "TrainingSym" SrcPort 1 Points [175, 0] Branch { Points [250, 0] DstBlock "1 Shift Reg1" DstPort 1 } Branch { Labels [0, 0] Points [0, -450] DstBlock "Subsystem" DstPort 4 } } Line { SrcBlock "1 Shift Reg1" SrcPort 1 Points [50, 0] Branch { Points [0, 30] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 135] DstBlock "Logical1" DstPort 2 } } Branch { Points [5, 0] DstBlock "Inverter3" DstPort 1 } } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "BaseRateSym" SrcPort 1 Points [110, 0; 0, 85] DstBlock "Subsystem" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Logical8" DstPort 1 } Line { SrcBlock "Inverter3" SrcPort 1 Points [5, 0] DstBlock "Logical4" DstPort 3 } Line { SrcBlock "Logical4" SrcPort 1 Points [-15, 0; 0, -120] DstBlock "Read Addr\nGenerator" DstPort 3 } Line { SrcBlock "Read Addr\nGenerator" SrcPort 3 DstBlock "Slot" DstPort 1 } Line { SrcBlock "Subsystem" SrcPort 1 Points [130, 0; 0, 105] Branch { DstBlock "Inverter" DstPort 1 } Branch { Labels [1, 0] DstBlock "Concat" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 Points [155, 0] DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 Points [125, 0] Branch { Points [0, -35] DstBlock "Inverter6" DstPort 1 } Branch { Points [0, 40; 105, 0; 0, -130] DstBlock "Logical2" DstPort 1 } } Line { SrcBlock "From3" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Inverter6" SrcPort 1 Points [15, 0; 0, -145] DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "OE#B" DstPort 1 } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "OE#A" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "AddSub1" DstPort 2 } } } Block { BlockType Reference Name "Convert1" SID "7671" Ports [1, 1] Position [650, 982, 680, 998] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "7672" Ports [1, 1] Position [650, 942, 680, 958] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "7673" Ports [1, 1] Position [975, 447, 1000, 473] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo" "p. If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.3" "3 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncol" "or('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "7674" Position [350, 847, 425, 863] ShowName off CloseFcn "tagdialog Close" GotoTag "LocalReset" } Block { BlockType From Name "From2" SID "7675" Position [1075, 402, 1150, 418] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReset" TagVisibility "global" } Block { BlockType From Name "From3" SID "7676" Position [675, 297, 820, 313] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_Alamouti_Mode" TagVisibility "global" } Block { BlockType From Name "From4" SID "7677" Position [145, 562, 220, 578] ShowName off CloseFcn "tagdialog Close" GotoTag "LocalReset" } Block { BlockType From Name "From5" SID "7678" Position [420, 347, 495, 363] ShowName off CloseFcn "tagdialog Close" GotoTag "LocalReset" } Block { BlockType Goto Name "Goto" SID "7679" Position [1295, 411, 1380, 429] ShowName off GotoTag "LocalReset" TagVisibility "local" } Block { BlockType Reference Name "Logical" SID "7680" Ports [2, 1] Position [740, 558, 770, 587] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 29 29 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 29 29 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "7681" Ports [2, 1] Position [740, 598, 770, 627] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 29 29 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 29 29 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "7682" Ports [2, 1] Position [900, 407, 930, 458] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,51,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 51 51 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 51 51 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[29.44 " "29.44 33.44 29.44 33.44 33.44 33.44 29.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[25.44 25.44 29.44 2" "9.44 25.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[21.44 21.44 25.44 25.44 21.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[17.44 17.44 21.44 17.44 21.44 21.44 17.44 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('blac" "k');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "7683" Ports [2, 1] Position [1190, 402, 1230, 438] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,36,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55" " 23.55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23" ".55 23.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 " "],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolo" "r('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "7684" Ports [2, 1] Position [1040, 422, 1070, 473] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,51,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 51 51 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 51 51 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[29.44 " "29.44 33.44 29.44 33.44 33.44 33.44 29.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[25.44 25.44 29.44 2" "9.44 25.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[21.44 21.44 25.44 25.44 21.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[17.44 17.44 21.44 17.44 21.44 21.44 17.44 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('blac" "k');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Mem Control" SID "7685" Ports [1, 4] Position [365, 542, 465, 618] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Mem Control" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "FFTsymNum" SID "7686" Position [300, 478, 330, 492] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "1LSB" SID "7687" Ports [1, 1] Position [585, 461, 630, 489] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18.44 22" ".44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18.44 14.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "1LSB+1" SID "7688" Ports [1, 1] Position [585, 306, 630, 334] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18.44 22" ".44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18.44 14.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub1" SID "7689" Ports [2, 1] Position [355, 534, 395, 596] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,62,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 62 62 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 62 62 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[36.55 36.55 41." "55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[31.55 31.55 36.55 36.55 31." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "7690" Ports [0, 1] Position [490, 657, 505, 673] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 12.22 " "10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 ],[0.931" " 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 11.44 9.44" " 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon" " graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'2');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "7691" Ports [0, 1] Position [490, 707, 505, 723] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 12.22 " "10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 ],[0.931" " 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 11.44 9.44" " 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon" " graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'2');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Constant3" SID "7692" Ports [0, 1] Position [195, 572, 295, 588] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "100,16,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 100 100 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0" ".91 ]);\nplot([0 100 100 0 0 ],[0 0 16 16 0 ]);\npatch([45.55 48.44 50.44 52.44 54.44 50.44 47.55 45.55 ],[10.22 1" "0.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([47.55 50.44 48.44 45.55 47.55 ],[8.22 8.22 10.22 10." "22 8.22 ],[0.931 0.946 0.973 ]);\npatch([45.55 48.44 50.44 47.55 45.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\np" "atch([47.55 54.44 52.44 50.44 48.44 45.55 47.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('outpu" "t',1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "7693" Ports [1, 1] Position [675, 312, 710, 328] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "7694" Ports [1, 1] Position [680, 467, 715, 483] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "7695" Position [15, 543, 195, 557] ShowName off CloseFcn "tagdialog Close" GotoTag "reg_numBaseRateSyms" TagVisibility "global" } Block { BlockType From Name "From2" SID "7696" Position [830, 292, 975, 308] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_Alamouti_Mode" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "7697" Ports [1, 1] Position [760, 464, 795, 486] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,201" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "7698" Ports [2, 1] Position [655, 539, 695, 601] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,62,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 62 62 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 62 62 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[36.55 36.55 41." "55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[31.55 31.55 36.55 36.55 31." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('a" "nd');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "7699" Ports [2, 1] Position [800, 310, 840, 345] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 35 35 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 35 35 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[22.55 22.55 27." "55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[17.55 17.55 22.55 22.55 17." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "7700" Ports [2, 1] Position [900, 322, 935, 353] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,31,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 31 31 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 31 31 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([12.1" " 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "7701" Ports [2, 1] Position [895, 450, 935, 485] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 35 35 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 35 35 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[22.55 22.55 27." "55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[17.55 17.55 22.55 22.55 17." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "7702" Ports [2, 1] Position [895, 520, 935, 555] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 35 35 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 35 35 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[22.55 22.55 27." "55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[17.55 17.55 22.55 22.55 17." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "7703" Ports [2, 1] Position [900, 382, 935, 413] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,31,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 31 31 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 31 31 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([12.1" " 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "7704" Ports [3, 1] Position [1180, 291, 1205, 349] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "25,58,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 8.28571 49.7143 58 0 ],[0." "77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 8.28571 49.7143 58 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325" " 5.325 ],[32.33 32.33 35.33 32.33 35.33 35.33 35.33 32.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[29." "33 29.33 32.33 32.33 29.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[26.33 26.33 29.33 29.3" "3 26.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[23.33 23.33 26.33 23.33 26.33 26.33 23.33" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('i" "nput',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "7705" Ports [3, 1] Position [1180, 351, 1205, 409] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "25,58,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 8.28571 49.7143 58 0 ],[0." "77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 8.28571 49.7143 58 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325" " 5.325 ],[32.33 32.33 35.33 32.33 35.33 35.33 35.33 32.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[29." "33 29.33 32.33 32.33 29.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[26.33 26.33 29.33 29.3" "3 26.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[23.33 23.33 26.33 23.33 26.33 26.33 23.33" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('i" "nput',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "7706" Ports [2, 1] Position [550, 629, 600, 676] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,47,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 47 47 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[29.66 29.66" " 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[23.66 23.66 29.66 29.66" " 23.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1 1 ])" ";\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\geq" " b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "7707" Ports [2, 1] Position [550, 679, 600, 726] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a<=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,47,2,1,white,blue,0,52e4b236,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 47 47 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[29.66 29.66" " 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[23.66 23.66 29.66 29.66" " 23.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1 1 ])" ";\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\leq" " b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "7708" Ports [2, 1] Position [550, 529, 600, 576] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a> 1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "weA" SID "7710" Position [1330, 313, 1360, 327] IconDisplay "Port number" } Block { BlockType Outport Name "weB" SID "7711" Position [1330, 373, 1360, 387] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "TrainingSym" SID "7712" Position [690, 698, 720, 712] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "BaseRateSym" SID "7713" Position [1175, 563, 1205, 577] Port "4" IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Shift" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "FFTsymNum" SrcPort 1 Points [185, 0] Branch { Points [0, 55] Branch { DstBlock "Relational4" DstPort 1 } Branch { Points [0, 100] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 50] DstBlock "Relational2" DstPort 1 } } } Branch { Points [0, -10] Branch { DstBlock "1LSB" DstPort 1 } Branch { Points [0, -155] DstBlock "1LSB+1" DstPort 1 } } } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 Points [0, -70] DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [130, 0] Branch { Points [0, -25] Branch { Points [0, -85] DstBlock "Logical4" DstPort 1 } Branch { DstBlock "Logical5" DstPort 2 } } Branch { DstBlock "BaseRateSym" DstPort 1 } } Line { SrcBlock "Shift" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 Points [55, 0] Branch { DstBlock "TrainingSym" DstPort 1 } Branch { Points [0, -30; 120, 0; 0, -340] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "1LSB" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 Points [20, 0] Branch { DstBlock "Inverter1" DstPort 1 } Branch { Points [0, 55; 135, 0] Branch { DstBlock "Logical5" DstPort 1 } Branch { Points [0, -125] DstBlock "Logical6" DstPort 2 } } } Line { SrcBlock "Inverter1" SrcPort 1 Points [70, 0] Branch { DstBlock "Logical4" DstPort 2 } Branch { Points [0, -130] DstBlock "Logical3" DstPort 2 } } Line { SrcBlock "From2" SrcPort 1 Points [175, 0] Branch { DstBlock "Mux" DstPort 1 } Branch { Points [0, 60] DstBlock "Mux1" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "weA" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 Points [190, 0; 0, -150] DstBlock "Mux" DstPort 2 } Line { SrcBlock "Logical5" SrcPort 1 Points [200, 0; 0, -160] DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "weB" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "1LSB+1" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 Points [15, 0] Branch { DstBlock "Logical3" DstPort 1 } Branch { Points [0, 60] DstBlock "Logical6" DstPort 1 } } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Logical2" DstPort 1 } Annotation { Name "The IFFT of the training symbols is only computed once per antenna, regardless\nof the number of actual " "copies of training symbols that are transmitted. This is why\na constant 2 is used to decide whether the current I" "FFT core output symbol\nis a training symbol or not- the third IFFT output is guaranteed to be a base-rate symbol." Position [210, 692] } } } Block { BlockType Reference Name "Mux1" SID "7714" Ports [3, 1] Position [850, 336, 875, 394] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.3" sg_icon_stat "25,58,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 8.28571 49.7143 58 " "0 ],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 8.28571 49.7143 58 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 1" "2.66 8.325 5.325 ],[32.33 32.33 35.33 32.33 35.33 35.33 35.33 32.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325" " 8.325 ],[29.33 29.33 32.33 32.33 29.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[26.33 " "26.33 29.33 29.33 26.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[23.33 23.33 26.33 23.3" "3 26.33 26.33 23.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b" "egin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncol" "or('black');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType SubSystem Name "RAMs" SID "7715" Ports [10, 5] Position [880, 553, 990, 957] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "RAMs" Location [812, 82, 1162, 440] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "A We" SID "7716" Position [255, 308, 285, 322] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "B We" SID "7717" Position [255, 448, 285, 462] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "A OE#" SID "7718" Position [255, 368, 285, 382] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "B OE#" SID "7719" Position [255, 508, 285, 522] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Wr Addr" SID "7720" Position [255, 328, 285, 342] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Rd Addr" SID "7721" Position [255, 408, 285, 422] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Rd Vin" SID "7722" Position [265, 623, 295, 637] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "Slot" SID "7723" Position [185, 213, 215, 227] NamePlacement "alternate" Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "I" SID "7724" Position [305, 268, 335, 282] NamePlacement "alternate" Port "9" IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "7725" Position [305, 288, 335, 302] Port "10" IconDisplay "Port number" } Block { BlockType SubSystem Name "Alamouti Encoding" SID "7726" Ports [5, 4] Position [740, 179, 835, 541] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Alamouti Encoding" Location [202, 74, 1799, 1045] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Slot" SID "7727" Position [185, 103, 215, 117] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "EvenSyms_I" SID "7728" Position [185, 128, 215, 142] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "EvenSyms_Q" SID "7729" Position [185, 198, 215, 212] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "OddSyms_I" SID "7730" Position [185, 298, 215, 312] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "OddSyms_Q" SID "7731" Position [185, 368, 215, 382] Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "Mux" SID "7732" Ports [3, 1] Position [560, 339, 580, 411] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "8.2.02" sg_icon_stat "20,72,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 10.2857 61.7143 72 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 20 20 0 0 ],[0 10.2857 61.7143 72 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 " "7.55 5.55 ],[38.22 38.22 40.22 38.22 40.22 40.22 40.22 38.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[3" "6.22 36.22 38.22 38.22 36.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[34.22 34.22 36.22 36." "22 34.22 ],[1 1 1 ]);\npatch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[32.22 32.22 34.22 32.22 34.22 34.22 32.22" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_labe" "l('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "7733" Ports [3, 1] Position [560, 269, 580, 341] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "8.2.02" sg_icon_stat "20,72,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 10.2857 61.7143 72 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 20 20 0 0 ],[0 10.2857 61.7143 72 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 " "7.55 5.55 ],[38.22 38.22 40.22 38.22 40.22 40.22 40.22 38.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[3" "6.22 36.22 38.22 38.22 36.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[34.22 34.22 36.22 36." "22 34.22 ],[1 1 1 ]);\npatch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[32.22 32.22 34.22 32.22 34.22 34.22 32.22" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_labe" "l('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "7734" Ports [3, 1] Position [560, 169, 580, 241] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "8.2.02" sg_icon_stat "20,72,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 10.2857 61.7143 72 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 20 20 0 0 ],[0 10.2857 61.7143 72 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 " "7.55 5.55 ],[38.22 38.22 40.22 38.22 40.22 40.22 40.22 38.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[3" "6.22 36.22 38.22 38.22 36.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[34.22 34.22 36.22 36." "22 34.22 ],[1 1 1 ]);\npatch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[32.22 32.22 34.22 32.22 34.22 34.22 32.22" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_labe" "l('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux3" SID "7735" Ports [3, 1] Position [560, 99, 580, 171] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "8.2.02" sg_icon_stat "20,72,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 10.2857 61.7143 72 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 20 20 0 0 ],[0 10.2857 61.7143 72 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 " "7.55 5.55 ],[38.22 38.22 40.22 38.22 40.22 40.22 40.22 38.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[3" "6.22 36.22 38.22 38.22 36.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[34.22 34.22 36.22 36." "22 34.22 ],[1 1 1 ]);\npatch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[32.22 32.22 34.22 32.22 34.22 34.22 32.22" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_labe" "l('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate" SID "7736" Ports [1, 1] Position [440, 146, 475, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "negate" block_version "8.2.02" sg_icon_stat "35,28,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\bf" "{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate1" SID "7737" Ports [1, 1] Position [450, 386, 485, 414] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Saturate" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "negate" block_version "8.2.02" sg_icon_stat "35,28,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\bf" "{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "AntA_I" SID "7738" Position [690, 128, 720, 142] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "AntA_Q" SID "7739" Position [690, 198, 720, 212] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "AntB_I" SID "7740" Position [695, 298, 725, 312] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "AntB_Q" SID "7741" Position [695, 368, 725, 382] Port "4" IconDisplay "Port number" } Line { SrcBlock "Mux" SrcPort 1 DstBlock "AntB_Q" DstPort 1 } Line { SrcBlock "Mux3" SrcPort 1 DstBlock "AntA_I" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "AntA_Q" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "AntB_I" DstPort 1 } Line { SrcBlock "Slot" SrcPort 1 Points [110, 0] Branch { Points [0, 70] Branch { Points [0, 100] Branch { DstBlock "Mux1" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux" DstPort 1 } } Branch { DstBlock "Mux2" DstPort 1 } } Branch { DstBlock "Mux3" DstPort 1 } } Line { SrcBlock "EvenSyms_I" SrcPort 1 Points [180, 0] Branch { DstBlock "Mux3" DstPort 2 } Branch { Points [0, 195] DstBlock "Mux1" DstPort 3 } } Line { SrcBlock "EvenSyms_Q" SrcPort 1 Points [135, 0] Branch { DstBlock "Mux2" DstPort 2 } Branch { Points [0, 195] DstBlock "Negate1" DstPort 1 } } Line { SrcBlock "OddSyms_I" SrcPort 1 Points [150, 0] Branch { DstBlock "Mux1" DstPort 2 } Branch { Points [0, -145] DstBlock "Negate" DstPort 1 } } Line { SrcBlock "OddSyms_Q" SrcPort 1 Points [165, 0] Branch { DstBlock "Mux" DstPort 2 } Branch { Points [0, -145] DstBlock "Mux2" DstPort 3 } } Line { SrcBlock "Negate" SrcPort 1 DstBlock "Mux3" DstPort 3 } Line { SrcBlock "Negate1" SrcPort 1 DstBlock "Mux" DstPort 3 } Annotation { Name "In Alamouti mode, even and odd syms are sent via\nboth antennas, in anternating order. In MIMO mode,\n" "even/odd syms are mapped to antennas A/B." Position [353, 47] } } } Block { BlockType Reference Name "Delay" SID "7742" Ports [1, 1] Position [565, 205, 600, 235] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "8.2.02" sg_icon_stat "35,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 30 30 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([12.1" " 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "7743" Ports [1, 1] Position [595, 482, 635, 518] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23.55 28." "55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 23.55 18." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\" "newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "7744" Ports [1, 1] Position [595, 412, 635, 448] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23.55 28." "55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 23.55 18." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\" "newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample2" SID "7745" Ports [1, 1] Position [595, 342, 635, 378] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23.55 28." "55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 23.55 18." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\" "newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "7746" Ports [1, 1] Position [595, 272, 635, 308] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,36,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23.55 28." "55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 23.55 18." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\" "newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "7747" Ports [1, 1] Position [610, 184, 635, 206] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 14.33 " "17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33 14.33 1" "1.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Even Syms RAM" SID "7748" Ports [6, 2] Position [480, 257, 545, 393] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Even Syms RAM" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "7749" Position [310, 178, 340, 192] IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "7750" Position [330, 358, 360, 372] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "We" SID "7751" Position [330, 393, 360, 407] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Wr Addr" SID "7752" Position [330, 323, 360, 337] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Rd Addr" SID "7753" Position [330, 428, 360, 442] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "OE#" SID "7754" Position [315, 268, 345, 282] Port "6" IconDisplay "Port number" } Block { BlockType Reference Name "Constant8" SID "7755" Ports [0, 1] Position [430, 229, 455, 251] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Dual Port RAM" SID "7756" Ports [7, 2] Position [500, 38, 615, 302] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "2*numSubcarriers" initVector "[repmat(0.25,1,64) repmat(0.5,1,64)]" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b on en_a off en_b off latency "1" write_mode_A "Read Before Write" write_mode_B "Read Before Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,384,398" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "115,264,7,2,white,blue,0,7d88b3c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 115 115 0 0 ],[0 0 264 264 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 115 115 0 0 ],[0 0 264 264 0 ]);\npatch([21.4 44.52 60.52 76.52 92.52 60.52 37.4 21.4 ],[" "149.76 149.76 165.76 149.76 165.76 165.76 165.76 149.76 ],[1 1 1 ]);\npatch([37.4 60.52 44.52 21.4 37.4 ],[133.7" "6 133.76 149.76 149.76 133.76 ],[0.931 0.946 0.973 ]);\npatch([21.4 44.52 60.52 37.4 21.4 ],[117.76 117.76 133.7" "6 133.76 117.76 ],[1 1 1 ]);\npatch([37.4 92.52 76.52 60.52 44.52 21.4 37.4 ],[101.76 101.76 117.76 101.76 117.7" "6 117.76 101.76 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'addra');\ncolor('black');port_label('input',2,'dina');\ncolor" "('black');port_label('input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('black');port_label" "('input',5,'dinb');\ncolor('black');port_label('input',6,'web');\ncolor('black');port_label('input',7,'rstb');\n" "color('black');port_label('output',1,'A');\ncolor('black');port_label('output',2,'B');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Reference Name "Dual Port RAM1" SID "7757" Ports [7, 2] Position [500, 303, 615, 567] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "2*numSubcarriers" initVector "[repmat(0.25,1,64) repmat(0.5,1,64)]" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b on en_a off en_b off latency "1" write_mode_A "Read Before Write" write_mode_B "Read Before Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,384,398" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "115,264,7,2,white,blue,0,7d88b3c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 115 115 0 0 ],[0 0 264 264 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 115 115 0 0 ],[0 0 264 264 0 ]);\npatch([21.4 44.52 60.52 76.52 92.52 60.52 37.4 21.4 ],[" "149.76 149.76 165.76 149.76 165.76 165.76 165.76 149.76 ],[1 1 1 ]);\npatch([37.4 60.52 44.52 21.4 37.4 ],[133.7" "6 133.76 149.76 149.76 133.76 ],[0.931 0.946 0.973 ]);\npatch([21.4 44.52 60.52 37.4 21.4 ],[117.76 117.76 133.7" "6 133.76 117.76 ],[1 1 1 ]);\npatch([37.4 92.52 76.52 60.52 44.52 21.4 37.4 ],[101.76 101.76 117.76 101.76 117.7" "6 117.76 101.76 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'addra');\ncolor('black');port_label('input',2,'dina');\ncolor" "('black');port_label('input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('black');port_label" "('input',5,'dinb');\ncolor('black');port_label('input',6,'web');\ncolor('black');port_label('input',7,'rstb');\n" "color('black');port_label('output',1,'A');\ncolor('black');port_label('output',2,'B');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name " I" SID "7758" Position [740, 228, 770, 242] IconDisplay "Port number" } Block { BlockType Outport Name " Q" SID "7759" Position [745, 493, 775, 507] Port "2" IconDisplay "Port number" } Line { SrcBlock "OE#" SrcPort 1 Points [125, 0] Branch { Points [0, 265] DstBlock "Dual Port RAM1" DstPort 7 } Branch { DstBlock "Dual Port RAM" DstPort 7 } } Line { SrcBlock "We" SrcPort 1 Points [40, 0] Branch { DstBlock "Dual Port RAM1" DstPort 3 } Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 3 } } Line { SrcBlock "Q" SrcPort 1 Points [60, 0; 15, 0] Branch { DstBlock "Dual Port RAM1" DstPort 2 } Branch { Points [0, 105] DstBlock "Dual Port RAM1" DstPort 5 } } Line { SrcBlock "I" SrcPort 1 Points [45, 0; 0, 20] Branch { Points [0, -105] DstBlock "Dual Port RAM" DstPort 2 } Branch { DstBlock "Dual Port RAM" DstPort 5 } } Line { SrcBlock "Dual Port RAM" SrcPort 2 DstBlock " I" DstPort 1 } Line { SrcBlock "Dual Port RAM1" SrcPort 2 DstBlock " Q" DstPort 1 } Line { SrcBlock "Rd Addr" SrcPort 1 Points [40, 0; 15, 0] Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 4 } Branch { DstBlock "Dual Port RAM1" DstPort 4 } } Line { SrcBlock "Constant8" SrcPort 1 Points [20, 0] Branch { Points [0, 265] DstBlock "Dual Port RAM1" DstPort 6 } Branch { DstBlock "Dual Port RAM" DstPort 6 } } Line { SrcBlock "Wr Addr" SrcPort 1 Points [15, 0] Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 1 } Branch { DstBlock "Dual Port RAM1" DstPort 1 } } } } Block { BlockType From Name "From5" SID "7760" Position [420, 187, 555, 203] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_Alamouti_Mode" TagVisibility "global" } Block { BlockType Reference Name "Logical" SID "7761" Ports [2, 1] Position [675, 182, 705, 233] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,51,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 51 51 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 51 51 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[29.44 29.44 33.4" "4 29.44 33.44 33.44 33.44 29.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[25.44 25.44 29.44 29.44 25.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[21.44 21.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[17.44 17.44 21.44 17.44 21.44 21.44 17.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Odd Syms RAM" SID "7762" Ports [6, 2] Position [480, 397, 545, 533] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Odd Syms RAM" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "7763" Position [310, 178, 340, 192] IconDisplay "Port number" } Block { BlockType Inport Name "Q" SID "7764" Position [330, 358, 360, 372] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "We" SID "7765" Position [325, 393, 355, 407] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Wr Addr" SID "7766" Position [330, 323, 360, 337] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Rd Addr" SID "7767" Position [330, 428, 360, 442] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "OE#" SID "7768" Position [315, 268, 345, 282] Port "6" IconDisplay "Port number" } Block { BlockType Reference Name "Constant8" SID "7769" Ports [0, 1] Position [430, 229, 455, 251] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Dual Port RAM" SID "7770" Ports [7, 2] Position [500, 38, 615, 302] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "2*numSubcarriers" initVector "-[repmat(0.25,1,64) repmat(0.5,1,64)]" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b on en_a off en_b off latency "1" write_mode_A "Read Before Write" write_mode_B "Read Before Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "115,264,7,2,white,blue,0,7d88b3c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 115 115 0 0 ],[0 0 264 264 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 115 115 0 0 ],[0 0 264 264 0 ]);\npatch([21.4 44.52 60.52 76.52 92.52 60.52 37.4 21.4 ],[" "149.76 149.76 165.76 149.76 165.76 165.76 165.76 149.76 ],[1 1 1 ]);\npatch([37.4 60.52 44.52 21.4 37.4 ],[133.7" "6 133.76 149.76 149.76 133.76 ],[0.931 0.946 0.973 ]);\npatch([21.4 44.52 60.52 37.4 21.4 ],[117.76 117.76 133.7" "6 133.76 117.76 ],[1 1 1 ]);\npatch([37.4 92.52 76.52 60.52 44.52 21.4 37.4 ],[101.76 101.76 117.76 101.76 117.7" "6 117.76 101.76 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'addra');\ncolor('black');port_label('input',2,'dina');\ncolor" "('black');port_label('input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('black');port_label" "('input',5,'dinb');\ncolor('black');port_label('input',6,'web');\ncolor('black');port_label('input',7,'rstb');\n" "color('black');port_label('output',1,'A');\ncolor('black');port_label('output',2,'B');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Reference Name "Dual Port RAM1" SID "7771" Ports [7, 2] Position [500, 303, 615, 567] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "2*numSubcarriers" initVector "-[repmat(0.25,1,64) repmat(0.5,1,64)]" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b on en_a off en_b off latency "1" write_mode_A "Read Before Write" write_mode_B "Read Before Write" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dpram" block_version "VER_STRING_GOES_HERE" sg_icon_stat "115,264,7,2,white,blue,0,7d88b3c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 115 115 0 0 ],[0 0 264 264 0 ],[0.77 " "0.82 0.91 ]);\nplot([0 115 115 0 0 ],[0 0 264 264 0 ]);\npatch([21.4 44.52 60.52 76.52 92.52 60.52 37.4 21.4 ],[" "149.76 149.76 165.76 149.76 165.76 165.76 165.76 149.76 ],[1 1 1 ]);\npatch([37.4 60.52 44.52 21.4 37.4 ],[133.7" "6 133.76 149.76 149.76 133.76 ],[0.931 0.946 0.973 ]);\npatch([21.4 44.52 60.52 37.4 21.4 ],[117.76 117.76 133.7" "6 133.76 117.76 ],[1 1 1 ]);\npatch([37.4 92.52 76.52 60.52 44.52 21.4 37.4 ],[101.76 101.76 117.76 101.76 117.7" "6 117.76 101.76 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'addra');\ncolor('black');port_label('input',2,'dina');\ncolor" "('black');port_label('input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('black');port_label" "('input',5,'dinb');\ncolor('black');port_label('input',6,'web');\ncolor('black');port_label('input',7,'rstb');\n" "color('black');port_label('output',1,'A');\ncolor('black');port_label('output',2,'B');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Outport Name " I" SID "7772" Position [740, 228, 770, 242] IconDisplay "Port number" } Block { BlockType Outport Name " Q" SID "7773" Position [745, 493, 775, 507] Port "2" IconDisplay "Port number" } Line { SrcBlock "Wr Addr" SrcPort 1 Points [15, 0] Branch { DstBlock "Dual Port RAM1" DstPort 1 } Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 1 } } Line { SrcBlock "Constant8" SrcPort 1 Points [20, 0] Branch { DstBlock "Dual Port RAM" DstPort 6 } Branch { Points [0, 265] DstBlock "Dual Port RAM1" DstPort 6 } } Line { SrcBlock "Rd Addr" SrcPort 1 Points [40, 0; 15, 0] Branch { DstBlock "Dual Port RAM1" DstPort 4 } Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 4 } } Line { SrcBlock "Dual Port RAM1" SrcPort 2 DstBlock " Q" DstPort 1 } Line { SrcBlock "Dual Port RAM" SrcPort 2 DstBlock " I" DstPort 1 } Line { SrcBlock "I" SrcPort 1 Points [45, 0; 0, 20] Branch { DstBlock "Dual Port RAM" DstPort 5 } Branch { Points [0, -105] DstBlock "Dual Port RAM" DstPort 2 } } Line { SrcBlock "Q" SrcPort 1 Points [60, 0; 15, 0] Branch { Points [0, 105] DstBlock "Dual Port RAM1" DstPort 5 } Branch { DstBlock "Dual Port RAM1" DstPort 2 } } Line { SrcBlock "We" SrcPort 1 Points [45, 0] Branch { DstBlock "Dual Port RAM1" DstPort 3 } Branch { Points [0, -265] DstBlock "Dual Port RAM" DstPort 3 } } Line { SrcBlock "OE#" SrcPort 1 Points [125, 0] Branch { DstBlock "Dual Port RAM" DstPort 7 } Branch { Points [0, 265] DstBlock "Dual Port RAM1" DstPort 7 } } } } Block { BlockType Outport Name "AntA_I" SID "7774" Position [915, 218, 945, 232] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "AntA_Q" SID "7775" Position [915, 308, 945, 322] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "AntB_I" SID "7776" Position [920, 398, 950, 412] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "AntB_Q" SID "7777" Position [920, 488, 950, 502] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Rd Vout" SID "7778" Position [705, 623, 735, 637] Port "5" IconDisplay "Port number" } Line { SrcBlock "Odd Syms RAM" SrcPort 2 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Odd Syms RAM" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Rd Addr" SrcPort 1 Points [135, 0] Branch { Points [0, -60] DstBlock "Even Syms RAM" DstPort 5 } Branch { Points [0, 80] DstBlock "Odd Syms RAM" DstPort 5 } } Line { SrcBlock "Even Syms RAM" SrcPort 2 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "Even Syms RAM" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Wr Addr" SrcPort 1 Points [140, 0] Branch { DstBlock "Even Syms RAM" DstPort 4 } Branch { Points [0, 140] DstBlock "Odd Syms RAM" DstPort 4 } } Line { SrcBlock "I" SrcPort 1 Points [105, 0] Branch { DstBlock "Even Syms RAM" DstPort 1 } Branch { Points [0, 140] DstBlock "Odd Syms RAM" DstPort 1 } } Line { SrcBlock "Q" SrcPort 1 Points [95, 0] Branch { DstBlock "Even Syms RAM" DstPort 2 } Branch { Points [0, 140] DstBlock "Odd Syms RAM" DstPort 2 } } Line { SrcBlock "A We" SrcPort 1 DstBlock "Even Syms RAM" DstPort 3 } Line { SrcBlock "B We" SrcPort 1 DstBlock "Odd Syms RAM" DstPort 3 } Line { SrcBlock "B OE#" SrcPort 1 DstBlock "Odd Syms RAM" DstPort 6 } Line { SrcBlock "A OE#" SrcPort 1 DstBlock "Even Syms RAM" DstPort 6 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Alamouti Encoding" DstPort 5 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Alamouti Encoding" DstPort 4 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "Alamouti Encoding" DstPort 3 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Alamouti Encoding" DstPort 2 } Line { SrcBlock "Rd Vin" SrcPort 1 DstBlock "Rd Vout" DstPort 1 } Line { SrcBlock "Alamouti Encoding" SrcPort 1 DstBlock "AntA_I" DstPort 1 } Line { SrcBlock "Alamouti Encoding" SrcPort 2 DstBlock "AntA_Q" DstPort 1 } Line { SrcBlock "Alamouti Encoding" SrcPort 3 DstBlock "AntB_I" DstPort 1 } Line { SrcBlock "Alamouti Encoding" SrcPort 4 DstBlock "AntB_Q" DstPort 1 } Line { SrcBlock "Slot" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Down Sample4" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 Points [5, 0; 0, 10] DstBlock "Alamouti Encoding" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock "Logical" DstPort 1 } } } Block { BlockType Scope Name "Rx Input" SID "7779" Ports [7] Position [1010, 1004, 1055, 1116] NamePlacement "alternate" Floating off Location [235, 102, 1915, 1078] Open off NumInputPorts "7" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "14600 " YMin "-0.25~-0.25~-1~-1~0~0~0" YMax "0.25~0.25~1~1~1~3500~1" SaveName "ScopeData29" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "Symbol\nCounter" SID "7780" Ports [2, 1] Position [265, 561, 315, 594] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited co" "unter is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(max_OFDM_symbols+1))" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[4 7 0 7 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,33,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 33 33 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 33 33 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[20.4" "4 20.44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[16.44 16.44 20.4" "4 20.44 16.44 ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1" " 1 1 ]);\npatch([20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "done1" SID "7781" Ports [1, 1] Position [890, 1040, 925, 1050] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "7782" Ports [1, 1] Position [890, 1055, 925, 1065] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done3" SID "7783" Ports [1, 1] Position [890, 1070, 925, 1080] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "7784" Ports [1, 1] Position [890, 1010, 925, 1020] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "7785" Ports [1, 1] Position [890, 1025, 925, 1035] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done6" SID "7786" Ports [1, 1] Position [890, 1085, 925, 1095] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "negedge" SID "7787" Ports [1, 1] Position [160, 518, 200, 542] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "negedge" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "7788" Position [25, 38, 55, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "7789" Ports [1, 1] Position [110, 63, 135, 87] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "7790" Ports [1, 1] Position [105, 35, 140, 55] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,251" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "7791" Ports [2, 1] Position [180, 29, 220, 91] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,62,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 62 62 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 62 62 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[36.55 36.55 41." "55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[31.55 31.55 36.55 36.55 31." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('a" "nd');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7792" Position [270, 53, 300, 67] IconDisplay "Port number" } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 Points [0, 0] DstBlock "Logical3" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 30] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 Points [0, 0] DstBlock "Logical3" DstPort 1 } } } Block { BlockType Outport Name "AntA_I" SID "7793" Position [1055, 588, 1085, 602] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "AntA_Q" SID "7794" Position [1055, 668, 1085, 682] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "AntB_I" SID "7795" Position [1055, 748, 1085, 762] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "AntB_Q" SID "7796" Position [1060, 828, 1090, 842] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Vout" SID "7797" Position [1060, 908, 1090, 922] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Pkt Done" SID "7798" Position [1190, 443, 1220, 457] Port "6" IconDisplay "Port number" } Line { SrcBlock "Q" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "I" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 Points [45, 0; 0, -55] DstBlock "RAMs" DstPort 9 } Line { SrcBlock "Convert1" SrcPort 1 Points [60, 0; 0, -55] DstBlock "RAMs" DstPort 10 } Line { SrcBlock "Xk_index" SrcPort 1 DstBlock "Addr Gen" DstPort 4 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Symbol\nCounter" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "RAMs" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "RAMs" DstPort 2 } Line { SrcBlock "RAMs" SrcPort 1 DstBlock "AntA_I" DstPort 1 } Line { SrcBlock "RAMs" SrcPort 2 DstBlock "AntA_Q" DstPort 1 } Line { SrcBlock "RAMs" SrcPort 3 DstBlock "AntB_I" DstPort 1 } Line { SrcBlock "RAMs" SrcPort 4 DstBlock "AntB_Q" DstPort 1 } Line { SrcBlock "Mem Control" SrcPort 1 Points [0, 15] DstBlock "Logical" DstPort 1 } Line { SrcBlock "Mem Control" SrcPort 2 Points [225, 0; 0, 50] DstBlock "Logical1" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Addr Gen" DstPort 5 } Line { SrcBlock "Mem Control" SrcPort 4 Points [5, 0; 0, 65] DstBlock "Addr Gen" DstPort 2 } Line { SrcBlock "Symbol\nCounter" SrcPort 1 DstBlock "Mem Control" DstPort 1 } Line { SrcBlock "Addr Gen" SrcPort 2 Points [155, 0] Branch { DstBlock "RAMs" DstPort 3 } Branch { Points [0, 420] DstBlock "done3" DstPort 1 } } Line { SrcBlock "Addr Gen" SrcPort 3 Points [150, 0] Branch { DstBlock "RAMs" DstPort 4 } Branch { Points [0, 395] DstBlock "done6" DstPort 1 } } Line { SrcBlock "Addr Gen" SrcPort 4 Points [210, 0] Branch { DstBlock "RAMs" DstPort 5 } Branch { Points [0, 280] DstBlock "done4" DstPort 1 } } Line { SrcBlock "Addr Gen" SrcPort 5 Points [200, 0] Branch { DstBlock "RAMs" DstPort 6 } Branch { Points [0, 255] DstBlock "done5" DstPort 1 } } Line { SrcBlock "IFFT Vout" SrcPort 1 Points [20, 0] Branch { Points [575, 0; 0, 90] Branch { DstBlock "Logical" DstPort 2 } Branch { Points [0, 25] DstBlock "Logical1" DstPort 1 } } Branch { Points [0, 40] DstBlock "negedge" DstPort 1 } } Line { SrcBlock "negedge" SrcPort 1 Points [35, 0; 0, 55] Branch { DstBlock "Symbol\nCounter" DstPort 2 } Branch { Points [0, 150] DstBlock "Addr Gen" DstPort 3 } } Line { SrcBlock "Mem Control" SrcPort 3 Points [25, 0] DstBlock "Addr Gen" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Addr Gen" SrcPort 1 Points [25, 0; 0, -170] Branch { DstBlock "Logical3" DstPort 2 } Branch { Points [0, -15] Branch { Points [0, -65] DstBlock "1 Shift Reg" DstPort 3 } Branch { DstBlock "1 Shift Reg2" DstPort 3 } } } Line { SrcBlock "Logical3" SrcPort 1 Points [25, 0] Branch { DstBlock "Logical5" DstPort 1 } Branch { DstBlock "Delay" DstPort 1 } } Line { SrcBlock "RAMs" SrcPort 5 DstBlock "Vout" DstPort 1 } Line { SrcBlock "Addr Gen" SrcPort 6 Points [190, 0] Branch { DstBlock "RAMs" DstPort 7 } Branch { Points [0, 230] DstBlock "done1" DstPort 1 } } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Goto" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Logical5" SrcPort 1 Points [15, 0] Branch { DstBlock "Pkt Done" DstPort 1 } Branch { Points [0, -20] DstBlock "Logical4" DstPort 2 } } Line { SrcBlock "Addr Gen" SrcPort 7 Points [180, 0] Branch { DstBlock "RAMs" DstPort 8 } Branch { Points [0, 205] DstBlock "done2" DstPort 1 } } Line { SrcBlock "Last Sym" SrcPort 1 Points [410, 0; 0, -90] DstBlock "1 Shift Reg" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 Points [5, 0; 0, 40] DstBlock "Mux1" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 Points [10, 0; 0, 55] DstBlock "Logical3" DstPort 1 } Line { SrcBlock "1 Shift Reg" SrcPort 1 Points [25, 0; 0, 10] Branch { DstBlock "Mux1" DstPort 2 } Branch { DstBlock "1 Shift Reg2" DstPort 1 } } Line { SrcBlock "From5" SrcPort 1 Points [165, 0] Branch { DstBlock "1 Shift Reg" DstPort 2 } Branch { Points [0, 65] DstBlock "1 Shift Reg2" DstPort 2 } } Line { SrcBlock "1 Shift Reg2" SrcPort 1 Points [5, 0; 0, -35] DstBlock "Mux1" DstPort 3 } Line { SrcBlock "done4" SrcPort 1 DstBlock "Rx Input" DstPort 1 } Line { SrcBlock "done5" SrcPort 1 DstBlock "Rx Input" DstPort 2 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Rx Input" DstPort 3 } Line { SrcBlock "done2" SrcPort 1 DstBlock "Rx Input" DstPort 4 } Line { SrcBlock "done3" SrcPort 1 DstBlock "Rx Input" DstPort 5 } Line { SrcBlock "done6" SrcPort 1 DstBlock "Rx Input" DstPort 6 } } } Block { BlockType SubSystem Name "OutputMuxes" SID "7799" Ports [7, 5] Position [750, 182, 850, 338] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "OutputMuxes" Location [138, 130, 1846, 1074] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Pream Index" SID "7800" Position [110, 493, 140, 507] IconDisplay "Port number" } Block { BlockType Inport Name "AntA I" SID "7801" Position [555, 488, 585, 502] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "AntA Q" SID "7802" Position [555, 593, 585, 607] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "AntB I" SID "7803" Position [555, 708, 585, 722] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "AntB Q" SID "7804" Position [560, 813, 590, 827] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "vin" SID "7805" Position [200, 408, 230, 422] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "Pkt Done" SID "7806" Position [200, 379, 225, 391] NamePlacement "alternate" Port "7" IconDisplay "Port number" } Block { BlockType SubSystem Name "Antenna Swapping" SID "7807" Ports [6, 5] Position [990, 341, 1080, 674] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Antenna Swapping" Location [907, 265, 1117, 546] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Rst" SID "7808" Position [250, 272, 280, 288] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "PreamIndex" SID "7809" Position [245, 302, 275, 318] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "AntA_I" SID "7810" Position [725, 258, 755, 272] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "AntA_Q" SID "7811" Position [720, 398, 750, 412] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "AntB_I" SID "7812" Position [725, 293, 755, 307] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "AntB_Q" SID "7813" Position [720, 433, 750, 447] NamePlacement "alternate" Port "6" IconDisplay "Port number" } Block { BlockType Reference Name "1LSB" SID "7814" Ports [1, 1] Position [928, 505, 942, 535] BlockRotation 270 BlockMirror on LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "LSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "14,30,1,1,white,blue,0,1fd851a7,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 14 14 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 14 14 0 0 ],[0 0 30 30 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[17.22 17.22 19.22 " "17.22 19.22 19.22 19.22 17.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[15.22 15.22 17.22 17.22 15.22 ],[0." "931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[13.22 13.22 15.22 15.22 13.22 ],[1 1 1 ]);\npatch([4.55 11" ".44 9.44 7.44 5.44 2.55 4.55 ],[11.22 11.22 13.22 11.22 13.22 13.22 11.22 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a:b" "]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "7815" Ports [2, 1] Position [705, 111, 745, 144] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at z" "ero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1.3" sg_icon_stat "40,33,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 33 33 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20.44 24" ".44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20.44 16.44" " ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch(" "[15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "7816" Ports [0, 1] Position [250, 320, 280, 340] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "9*length(shortSymbol_time)" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "30,20,0,1,white,blue,0,1018acba,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('outp" "ut',1,'144');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant1" SID "7817" Ports [0, 1] Position [335, 88, 360, 112] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "ActionID_AFTransmit" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(ActionID_AFTransmit))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,24,0,1,white,blue,0,8a5cc997,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'," "1,'31');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert" SID "7818" Ports [1, 1] Position [455, 139, 485, 151] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "7819" Ports [1, 1] Position [455, 159, 485, 171] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "7820" Ports [1, 1] Position [850, 54, 880, 66] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "7821" Ports [1, 1] Position [850, 69, 880, 81] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.931 0.946 0.973 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.973 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('outpu" "t',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "7822" Ports [1, 1] Position [850, 119, 875, 141] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 14.33 " "17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33 14.33 1" "1.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "7823" Ports [1, 1] Position [715, 49, 740, 71] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 14.33 " "17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33 14.33 1" "1.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\ne" "wline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "7824" Position [195, 61, 375, 79] ShowName off CloseFcn "tagdialog Close" GotoTag "RxAutoReply_Action_BufNum" TagVisibility "global" } Block { BlockType From Name "From2" SID "7825" Position [255, 136, 395, 154] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_SwapAntennas" TagVisibility "global" } Block { BlockType From Name "From3" SID "7826" Position [625, 346, 775, 364] ShowName off CloseFcn "tagdialog Close" GotoTag "AF_OutputSamples_I" TagVisibility "global" } Block { BlockType From Name "From4" SID "7827" Position [255, 156, 395, 174] ShowName off CloseFcn "tagdialog Close" GotoTag "RxAutoReplyProc_SwapAnt" TagVisibility "global" } Block { BlockType From Name "From5" SID "7828" Position [625, 486, 775, 504] ShowName off CloseFcn "tagdialog Close" GotoTag "AF_OutputSamples_Q" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "7829" Ports [1, 1] Position [545, 105, 575, 125] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "7830" Ports [2, 1] Position [605, 97, 635, 173] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,76,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 76 76 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 76 76 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[42.44 42.44 46.4" "4 42.44 46.44 46.44 46.44 42.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[38.44 38.44 42.44 42.44 38.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[34.44 34.44 38.44 38.44 34.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[30.44 30.44 34.44 30.44 34.44 34.44 30.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "7831" Ports [2, 1] Position [530, 135, 560, 175] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,40,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 40 40 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[24.44 24.44 28.4" "4 24.44 28.44 28.44 28.44 24.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[20.44 20.44 24.44 24.44 20.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[16.44 16.44 20.44 20.44 16.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[12.44 12.44 16.44 12.44 16.44 16.44 12.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "7832" Ports [2, 1] Position [1000, 51, 1035, 84] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 33 33 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([12.1" " 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "7833" Ports [4, 1] Position [960, 354, 990, 491] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,137,4,1,white,blue,3,58b3489d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 19.5714 117.429 137 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 19.5714 117.429 137 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1" " 6.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 76.44 72.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[68.44 68" ".44 72.44 72.44 68.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[64.44 64.44 68.44 68.44 64.44 ]" ",[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[60.44 60.44 64.44 60.44 64.44 64.44 60.44 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1'" ");\ncolor('black');port_label('input',4,'d2');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMME" "NT: end icon text');\n" } Block { BlockType Reference Name "Mux2" SID "7834" Ports [3, 1] Position [835, 445, 865, 505] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,60,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 8.57143 51.4286 60 0 ],[0." "77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 8.57143 51.4286 60 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6" ".1 ],[34.44 34.44 38.44 34.44 38.44 38.44 38.44 34.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[30.44 30.4" "4 34.44 34.44 30.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[26.44 26.44 30.44 30.44 26.44 ],[" "1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[22.44 22.44 26.44 22.44 26.44 26.44 22.44 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');" "\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux3" SID "7835" Ports [3, 1] Position [965, 566, 995, 704] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,138,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 19.7143 118.286 138 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 19.7143 118.286 138 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1" " 6.1 ],[73.44 73.44 77.44 73.44 77.44 77.44 77.44 73.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[69.44 69" ".44 73.44 73.44 69.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[65.44 65.44 69.44 69.44 65.44 ]" ",[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[61.44 61.44 65.44 61.44 65.44 65.44 61.44 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1'" ");\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux4" SID "7836" Ports [4, 1] Position [960, 214, 990, 351] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,137,4,1,white,blue,3,58b3489d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 19.5714 117.429 137 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 19.5714 117.429 137 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1" " 6.1 ],[72.44 72.44 76.44 72.44 76.44 76.44 76.44 72.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[68.44 68" ".44 72.44 72.44 68.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[64.44 64.44 68.44 68.44 64.44 ]" ",[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[60.44 60.44 64.44 60.44 64.44 64.44 60.44 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1'" ");\ncolor('black');port_label('input',4,'d2');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMME" "NT: end icon text');\n" } Block { BlockType Reference Name "Mux5" SID "7837" Ports [3, 1] Position [840, 305, 870, 365] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,60,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 8.57143 51.4286 60 0 ],[0." "77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 8.57143 51.4286 60 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6" ".1 ],[34.44 34.44 38.44 34.44 38.44 38.44 38.44 34.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[30.44 30.4" "4 34.44 34.44 30.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[26.44 26.44 30.44 30.44 26.44 ],[" "1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[22.44 22.44 26.44 22.44 26.44 26.44 22.44 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');" "\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux6" SID "7838" Ports [3, 1] Position [965, 706, 995, 844] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,138,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 19.7143 118.286 138 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 19.7143 118.286 138 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1" " 6.1 ],[73.44 73.44 77.44 73.44 77.44 77.44 77.44 73.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[69.44 69" ".44 73.44 73.44 69.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[65.44 65.44 69.44 69.44 65.44 ]" ",[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[61.44 61.44 65.44 61.44 65.44 65.44 61.44 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1'" ");\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "PreambleEn" SID "7839" Ports [2, 1] Position [610, 297, 665, 328] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "PreambleEn" Location [158, 69, 1365, 1151] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "7840" Position [125, 223, 155, 237] IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "7841" Position [155, 243, 185, 257] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "7842" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "7843" Ports [1, 1] Position [205, 223, 230, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "7844" Ports [1, 1] Position [205, 243, 230, 257] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "7845" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7846" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType Reference Name "Relational" SID "7847" Ports [2, 1] Position [380, 300, 420, 340] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "40,40,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b','texmod" "e','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "7848" Ports [2, 1] Position [440, 54, 480, 116] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "40,62,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 62 62 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 62 62 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[36.55 36.55 41." "55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[31.55 31.55 36.55 36.55 31." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmod" "e','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "Tx" SID "7849" Ports [7] Position [1280, 149, 1325, 261] NamePlacement "alternate" Floating off Location [5, 36, 1925, 1150] Open off NumInputPorts "7" ZoomMode "yonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "9328" YMin "-0.2~-0.25~-1~-1~0~0~0" YMax "0.15~0.15~1~1~1~3500~1" SaveName "ScopeData7" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "done1" SID "7850" Ports [1, 1] Position [1130, 215, 1165, 225] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done2" SID "7851" Ports [1, 1] Position [1130, 230, 1165, 240] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done3" SID "7852" Ports [1, 1] Position [1130, 185, 1165, 195] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done4" SID "7853" Ports [1, 1] Position [1130, 155, 1165, 165] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done5" SID "7854" Ports [1, 1] Position [1130, 170, 1165, 180] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done6" SID "7855" Ports [1, 1] Position [1130, 200, 1165, 210] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType SubSystem Name "posedge3" SID "7856" Ports [1, 1] Position [500, 312, 540, 328] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge3" Location [202, 74, 1392, 1156] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "7857" Position [200, 253, 230, 267] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "7858" Ports [1, 1] Position [425, 223, 460, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "7859" Ports [1, 1] Position [485, 226, 510, 244] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "7860" Ports [2, 1] Position [540, 221, 585, 274] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7861" Position [610, 243, 640, 257] IconDisplay "Port number" } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [165, 0] Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } } } Block { BlockType Outport Name "AF Payload" SID "7862" Position [1210, 63, 1240, 77] IconDisplay "Port number" } Block { BlockType Outport Name " AntA_I" SID "7863" Position [1050, 278, 1080, 292] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name " AntA_Q" SID "7864" Position [1050, 418, 1080, 432] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name " AntB_I" SID "7865" Position [1050, 628, 1080, 642] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name " AntB_Q" SID "7866" Position [1050, 768, 1080, 782] Port "5" IconDisplay "Port number" } Line { SrcBlock "AntA_I" SrcPort 1 Points [60, 0] Branch { Points [90, 0] Branch { DstBlock "Mux4" DstPort 2 } Branch { Points [0, 415] DstBlock "Mux3" DstPort 3 } } Branch { Points [0, 70] DstBlock "Mux5" DstPort 2 } Branch { Points [0, -105] DstBlock "done4" DstPort 1 } } Line { SrcBlock "AntB_I" SrcPort 1 Points [155, 0] Branch { DstBlock "Mux4" DstPort 3 } Branch { Points [0, 335] DstBlock "Mux3" DstPort 2 } } Line { SrcBlock "PreamIndex" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Mux5" SrcPort 1 DstBlock "Mux4" DstPort 4 } Line { SrcBlock "From3" SrcPort 1 Points [20, 0] Branch { DstBlock "Mux5" DstPort 3 } Branch { Points [0, -165] DstBlock "done3" DstPort 1 } } Line { SrcBlock "PreambleEn" SrcPort 1 Points [145, 0] Branch { DstBlock "Mux5" DstPort 1 } Branch { Points [0, 140] DstBlock "Mux2" DstPort 1 } Branch { Points [0, -240] DstBlock "Convert3" DstPort 1 } } Line { SrcBlock "Mux4" SrcPort 1 Points [15, 0] Branch { DstBlock " AntA_I" DstPort 1 } Branch { Points [0, -65] DstBlock "done1" DstPort 1 } } Line { SrcBlock "Mux1" SrcPort 1 Points [20, 0] Branch { DstBlock " AntA_Q" DstPort 1 } Branch { Points [0, -190] DstBlock "done2" DstPort 1 } } Line { SrcBlock "AntA_Q" SrcPort 1 Points [55, 0] Branch { Points [0, 70] DstBlock "Mux2" DstPort 2 } Branch { Points [75, 0] Branch { DstBlock "Mux1" DstPort 2 } Branch { Points [0, 415] DstBlock "Mux6" DstPort 3 } Branch { Points [0, -230] DstBlock "done5" DstPort 1 } } } Line { SrcBlock "AntB_Q" SrcPort 1 Points [135, 0] Branch { DstBlock "Mux1" DstPort 3 } Branch { Points [0, 335] DstBlock "Mux6" DstPort 2 } } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "Mux1" DstPort 4 } Line { SrcBlock "From5" SrcPort 1 Points [25, 0] Branch { DstBlock "Mux2" DstPort 3 } Branch { Points [0, -290] DstBlock "done6" DstPort 1 } } Line { SrcBlock "Mux3" SrcPort 1 DstBlock " AntB_I" DstPort 1 } Line { SrcBlock "Mux6" SrcPort 1 DstBlock " AntB_Q" DstPort 1 } Line { SrcBlock "1LSB" SrcPort 1 Points [0, 50] Branch { DstBlock "Mux3" DstPort 1 } Branch { Points [0, 140] DstBlock "Mux6" DstPort 1 } } Line { SrcBlock "Down Sample" SrcPort 1 Points [55, 0; 0, 100] Branch { DstBlock "Mux4" DstPort 1 } Branch { Points [0, 140] Branch { DstBlock "Mux1" DstPort 1 } Branch { DstBlock "1LSB" DstPort 1 } } } Line { SrcBlock "From1" SrcPort 1 DstBlock "Relational1" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Relational1" SrcPort 1 Points [40, 0] Branch { Points [0, 30] DstBlock "Inverter" DstPort 1 } Branch { Points [125, 0] Branch { Points [0, 35] DstBlock "Concat" DstPort 1 } Branch { Points [0, -25] DstBlock "Down Sample1" DstPort 1 } } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 DstBlock "posedge3" DstPort 1 } Line { SrcBlock "posedge3" SrcPort 1 DstBlock "PreambleEn" DstPort 2 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Relational" DstPort 2 } Line { SrcBlock "Rst" SrcPort 1 Points [155, 0; 0, 25] DstBlock "PreambleEn" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "AF Payload" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "done4" SrcPort 1 DstBlock "Tx" DstPort 1 } Line { SrcBlock "done5" SrcPort 1 DstBlock "Tx" DstPort 2 } Line { SrcBlock "done3" SrcPort 1 DstBlock "Tx" DstPort 3 } Line { SrcBlock "done6" SrcPort 1 DstBlock "Tx" DstPort 4 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Tx" DstPort 5 } Line { SrcBlock "done2" SrcPort 1 DstBlock "Tx" DstPort 6 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Convert2" DstPort 1 } } } Block { BlockType Reference Name "Constant1" SID "7867" Ports [0, 1] Position [780, 277, 795, 293] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 " "8.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant7" SID "7868" Ports [0, 1] Position [595, 362, 610, 378] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 " "8.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "7869" Ports [1, 1] Position [530, 292, 565, 308] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo" "p. If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,16,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "7870" Ports [1, 1] Position [1235, 367, 1270, 383] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo" "p. If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,16,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "7871" Position [25, 462, 150, 478] ShowName off CloseFcn "tagdialog Close" GotoTag "AF_PreambleIndex" TagVisibility "global" } Block { BlockType Goto Name "Goto6" SID "7872" Position [1415, 241, 1545, 259] ShowName off GotoTag "Tx_Running" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "7873" Ports [1, 1] Position [1205, 290, 1235, 310] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor" "('black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "LSB" SID "7874" Ports [1, 1] Position [330, 306, 370, 324] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "7875" Ports [2, 1] Position [775, 379, 805, 406] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[" "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 1" "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13." "33 10.33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7" ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\n\n\n\ncolor('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "7876" Ports [2, 1] Position [240, 455, 270, 515] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,60,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 60 60 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 60 60 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[34.44 " "34.44 38.44 34.44 38.44 38.44 38.44 34.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[30.44 30.44 34.44 3" "4.44 30.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[26.44 26.44 30.44 30.44 26.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[22.44 22.44 26.44 22.44 26.44 26.44 22.44 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('blac" "k');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "7877" Ports [2, 1] Position [1120, 359, 1150, 386] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[" "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 1" "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13." "33 10.33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7" ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\n\n\n\ncolor('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "7878" Ports [3, 1] Position [865, 406, 895, 514] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,108,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 15.4286 92.5714 108" " 0 ],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 15.4286 92.5714 108 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 " "15.88 10.1 6.1 ],[58.44 58.44 62.44 58.44 62.44 62.44 62.44 58.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10." "1 ],[54.44 54.44 58.44 58.44 54.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[50.44 50.44 54." "44 54.44 50.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[46.44 46.44 50.44 46.44 50.44 50.4" "4 46.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te" "xt');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "Mux1" SID "7879" Ports [3, 1] Position [865, 511, 895, 619] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,108,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 15.4286 92.5714 108" " 0 ],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 15.4286 92.5714 108 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 " "15.88 10.1 6.1 ],[58.44 58.44 62.44 58.44 62.44 62.44 62.44 58.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10." "1 ],[54.44 54.44 58.44 58.44 54.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[50.44 50.44 54." "44 54.44 50.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[46.44 46.44 50.44 46.44 50.44 50.4" "4 46.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te" "xt');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "Mux2" SID "7880" Ports [3, 1] Position [865, 626, 895, 734] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,108,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 15.4286 92.5714 108" " 0 ],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 15.4286 92.5714 108 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 " "15.88 10.1 6.1 ],[58.44 58.44 62.44 58.44 62.44 62.44 62.44 58.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10." "1 ],[54.44 54.44 58.44 58.44 54.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[50.44 50.44 54." "44 54.44 50.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[46.44 46.44 50.44 46.44 50.44 50.4" "4 46.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te" "xt');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "Mux3" SID "7881" Ports [3, 1] Position [865, 731, 895, 839] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,108,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 15.4286 92.5714 108" " 0 ],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 15.4286 92.5714 108 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 " "15.88 10.1 6.1 ],[58.44 58.44 62.44 58.44 62.44 62.44 62.44 58.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10." "1 ],[54.44 54.44 58.44 58.44 54.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[50.44 50.44 54." "44 54.44 50.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[46.44 46.44 50.44 46.44 50.44 50.4" "4 46.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te" "xt');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');" "port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "Payload\nRunning" SID "7882" Ports [3, 1] Position [675, 363, 715, 407] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55" " 27.55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27" ".55 27.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 " "],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor(" "'black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('in" "put',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Payload\nRunning1" SID "7883" Ports [3, 1] Position [825, 278, 865, 322] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55" " 27.55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27" ".55 27.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 " "],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor(" "'black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('in" "put',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge2" SID "7884" Ports [1, 1] Position [735, 309, 770, 321] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge2" Location [2, 74, 598, 375] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "7885" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "7886" Ports [1, 1] Position [95, 46, 125, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "7887" Ports [1, 1] Position [160, 48, 185, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "7888" Ports [2, 1] Position [215, 28, 260, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7889" Position [285, 43, 315, 57] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType SubSystem Name "Preamble\nGeneration" SID "7890" Ports [1, 4] Position [335, 453, 425, 512] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Preamble\nGeneration" Location [277, 286, 1292, 661] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "SampInd" SID "7891" Position [25, 93, 55, 107] IconDisplay "Port number" } Block { BlockType Reference Name "14LSB" SID "7892" Ports [1, 1] Position [600, 57, 635, 73] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "14" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "14LSB " SID "7893" Ports [1, 1] Position [600, 127, 635, 143] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "14" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "14LSB+16" SID "7894" Ports [1, 1] Position [600, 77, 635, 93] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "14" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "14LSB+16 " SID "7895" Ports [1, 1] Position [600, 147, 635, 163] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "14" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Addr Gen" SID "7896" Ports [1, 3] Position [115, 73, 205, 127] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Addr Gen" Location [2, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Samp Ind" SID "7897" Position [245, 618, 275, 632] IconDisplay "Port number" } Block { BlockType Reference Name "AddSub3" SID "7898" Ports [2, 1] Position [830, 625, 870, 680] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "9" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "8.2.02" sg_icon_stat "40,55,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 55 55 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[32.55 32." "55 37.55 32.55 37.55 37.55 37.55 32.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[27.55 27.55 32.55 3" "2.55 27.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[22.55 22.55 27.55 27.55 22.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[17.55 17.55 22.55 17.55 22.55 22.55 17.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub5" SID "7899" Ports [2, 1] Position [715, 545, 755, 600] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "9" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "8.2.02" sg_icon_stat "40,55,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 55 55 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[32.55 32." "55 37.55 32.55 37.55 37.55 37.55 32.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[27.55 27.55 32.55 3" "2.55 27.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[22.55 22.55 27.55 27.55 22.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[17.55 17.55 22.55 17.55 22.55 22.55 17.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "7900" Ports [3, 1] Position [605, 595, 630, 675] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "3" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,165" block_type "concat" block_version "10.1.3" sg_icon_stat "25,80,3,1,white,blue,0,61ef8218,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 80 80 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 80 80 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[43.33 " "43.33 46.33 43.33 46.33 46.33 46.33 43.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[40.33 40.33 43.33" " 43.33 40.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[37.33 37.33 40.33 40.33 37.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[34.33 34.33 37.33 34.33 37.33 37.33 34.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'hi');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('\\fontsize" "{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "7901" Ports [0, 1] Position [535, 627, 560, 643] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant4" SID "7902" Ports [0, 1] Position [535, 652, 560, 668] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,16,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 16 16 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[8.22 8.22 10.22 10.22" " 8.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant5" SID "7903" Ports [0, 1] Position [320, 633, 360, 657] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "(10 * length(shortSymbol_time))" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "40,24,0,1,white,blue,0,1d99491c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 24 24 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('output',1,'160');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample" SID "7904" Ports [1, 1] Position [600, 762, 625, 788] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "7905" Position [415, 767, 550, 783] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_AntBPreambleShift" TagVisibility "global" } Block { BlockType Reference Name "Relational1" SID "7906" Ports [2, 1] Position [415, 614, 465, 656] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "50,42,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 42 42 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[27.66" " 27.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[21.66 21.66 27." "66 27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[15.66 15.66 21.66 21.66 15.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1," "'\\bfa \\geq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "AddrA" SID "7907" Position [950, 568, 980, 582] IconDisplay "Port number" } Block { BlockType Outport Name "AddrB" SID "7908" Position [950, 648, 980, 662] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "LTS" SID "7909" Position [950, 418, 980, 432] Port "3" IconDisplay "Port number" } Line { SrcBlock "From1" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Samp Ind" SrcPort 1 Points [95, 0] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, -65] DstBlock "AddSub5" DstPort 1 } } Line { SrcBlock "Constant5" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Relational1" SrcPort 1 Points [60, 0; 0, -25] Branch { DstBlock "Concat" DstPort 1 } Branch { Points [0, -185] DstBlock "LTS" DstPort 1 } } Line { SrcBlock "Concat" SrcPort 1 Points [40, 0; 0, -50] DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "AddSub5" SrcPort 1 Points [30, 0] Branch { DstBlock "AddrA" DstPort 1 } Branch { Points [0, 65] DstBlock "AddSub3" DstPort 1 } } Line { SrcBlock "Down Sample" SrcPort 1 Points [55, 0; 0, -110] DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "AddrB" DstPort 1 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Concat" DstPort 3 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Concat" DstPort 2 } Annotation { Name "Add either 8 or 24 to the sample index\nto jump past the cyclic padding in\nthe preamble buffer" Position [537, 703] } Annotation { Name "Add another offset for antenna B" Position [577, 811] } } } Block { BlockType Reference Name "Constant1" SID "7910" Ports [0, 1] Position [360, 51, 385, 69] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "8.2.02" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "7911" Ports [0, 1] Position [360, 71, 385, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "14" bin_pt "13" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "8.2.02" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType From Name "From6" SID "7912" Position [270, 152, 390, 168] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_DisableAntBPreamble" TagVisibility "global" } Block { BlockType Reference Name "Preamble" SID "7913" Ports [7, 2] Position [465, 28, 530, 172] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Dual Port RAM" SourceType "Xilinx Dual Port Random Access Memory Block" depth "length(preamble_ROM)" initVector "preamble_ROM" distributed_mem "Block RAM" init_a "0" init_b "0" rst_a off rst_b on en_a off en_b off latency "1" write_mode_A "Read After Write" write_mode_B "Read After Write" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,384,398" block_type "dpram" block_version "8.2.01" sg_icon_stat "65,144,7,2,white,blue,0,7d88b3c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 144 144 0 ],[0.77 0.82 0" ".91 ]);\nplot([0 65 65 0 0 ],[0 0 144 144 0 ]);\npatch([11.975 24.98 33.98 42.98 51.98 33.98 20.975 11.975 ],[81.9" "9 81.99 90.99 81.99 90.99 90.99 90.99 81.99 ],[1 1 1 ]);\npatch([20.975 33.98 24.98 11.975 20.975 ],[72.99 72.99 8" "1.99 81.99 72.99 ],[0.931 0.946 0.973 ]);\npatch([11.975 24.98 33.98 20.975 11.975 ],[63.99 63.99 72.99 72.99 63.9" "9 ],[1 1 1 ]);\npatch([20.975 51.98 42.98 33.98 24.98 11.975 20.975 ],[54.99 54.99 63.99 54.99 63.99 63.99 54.99 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'addra');\ncolor('black');port_label('input',2,'dina');\ncolor('black');port_label(" "'input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('black');port_label('input',5,'dinb');\nco" "lor('black');port_label('input',6,'web');\ncolor('black');port_label('input',7,'rstb');\ncolor('black');port_label" "('output',1,'A');\ncolor('black');port_label('output',2,'B');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Reinterpret" SID "7914" Ports [1, 1] Position [700, 57, 730, 73] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal between " "signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.

<" "P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned" " with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000" " in binary)." force_arith_type on arith_type "Signed (2's comp)" force_bin_pt on bin_pt "13" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret1" SID "7915" Ports [1, 1] Position [700, 77, 730, 93] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal between " "signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.

<" "P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned" " with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000" " in binary)." force_arith_type on arith_type "Signed (2's comp)" force_bin_pt on bin_pt "13" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret2" SID "7916" Ports [1, 1] Position [700, 127, 730, 143] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal between " "signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.

<" "P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned" " with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000" " in binary)." force_arith_type on arith_type "Signed (2's comp)" force_bin_pt on bin_pt "13" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret3" SID "7917" Ports [1, 1] Position [700, 147, 730, 163] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the binary representation. You can changed the signal between " "signed and unsigned, and relocate the binary point.

Hardware notes: In hardware this block costs nothing.

<" "P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned" " with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000" " in binary)." force_arith_type on arith_type "Signed (2's comp)" force_bin_pt on bin_pt "13" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('reinterpret" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "AntA_I" SID "7918" Position [855, 58, 885, 72] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "AntA_Q" SID "7919" Position [855, 78, 885, 92] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "AntB_I" SID "7920" Position [855, 128, 885, 142] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "AntB_Q" SID "7921" Position [855, 148, 885, 162] Port "4" IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 Points [30, 0] Branch { DstBlock "Preamble" DstPort 2 } Branch { Points [0, 60] DstBlock "Preamble" DstPort 5 } } Line { SrcBlock "Constant2" SrcPort 1 Points [25, 0] Branch { DstBlock "Preamble" DstPort 3 } Branch { Points [0, 60] DstBlock "Preamble" DstPort 6 } } Line { SrcBlock "SampInd" SrcPort 1 DstBlock "Addr Gen" DstPort 1 } Line { SrcBlock "Preamble" SrcPort 1 Points [45, 0] Branch { DstBlock "14LSB" DstPort 1 } Branch { Points [0, 20] DstBlock "14LSB+16" DstPort 1 } } Line { SrcBlock "14LSB" SrcPort 1 DstBlock "Reinterpret" DstPort 1 } Line { SrcBlock "14LSB+16" SrcPort 1 DstBlock "Reinterpret1" DstPort 1 } Line { SrcBlock "14LSB " SrcPort 1 DstBlock "Reinterpret2" DstPort 1 } Line { SrcBlock "14LSB+16 " SrcPort 1 DstBlock "Reinterpret3" DstPort 1 } Line { SrcBlock "Preamble" SrcPort 2 Points [45, 0] Branch { DstBlock "14LSB " DstPort 1 } Branch { Points [0, 20] DstBlock "14LSB+16 " DstPort 1 } } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "AntA_I" DstPort 1 } Line { SrcBlock "Reinterpret1" SrcPort 1 DstBlock "AntA_Q" DstPort 1 } Line { SrcBlock "Reinterpret2" SrcPort 1 DstBlock "AntB_I" DstPort 1 } Line { SrcBlock "Addr Gen" SrcPort 2 DstBlock "Preamble" DstPort 4 } Line { SrcBlock "Addr Gen" SrcPort 1 Points [120, 0; 0, -40] DstBlock "Preamble" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Preamble" DstPort 7 } Line { SrcBlock "Reinterpret3" SrcPort 1 DstBlock "AntB_Q" DstPort 1 } } } Block { BlockType Scope Name "Preambles" SID "7922" Ports [7] Position [355, 584, 400, 696] NamePlacement "alternate" Floating off Location [5, 36, 1925, 1150] Open off NumInputPorts "7" ZoomMode "yonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "9328" YMin "-0.2~-0.25~-1~-1~0~0~0" YMax "0.15~0.15~1~1~1~3500~1" SaveName "ScopeData13" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "Register" SID "7923" Ports [2, 1] Position [1230, 433, 1275, 482] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,49,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 49 49 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 49 49 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('o" "utput',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register1" SID "7924" Ports [2, 1] Position [1230, 498, 1275, 547] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,49,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 49 49 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 49 49 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('o" "utput',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register2" SID "7925" Ports [2, 1] Position [1230, 563, 1275, 612] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,49,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 49 49 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 49 49 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('o" "utput',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register3" SID "7926" Ports [2, 1] Position [1230, 628, 1275, 677] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,49,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 49 49 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 49 49 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('o" "utput',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "TxDone Logic" SID "7927" Ports [1, 1] Position [325, 369, 415, 401] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "TxDone Logic" Location [297, 232, 807, 328] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Pkt Done" SID "7928" Position [215, 294, 240, 306] IconDisplay "Port number" } Block { BlockType SubSystem Name "Copy_Downsample" SID "7929" Ports [1, 1] Position [525, 288, 570, 302] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Copy_Downsample" Location [202, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "7930" Position [110, 353, 140, 367] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "7931" Ports [1, 1] Position [210, 347, 235, 373] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "7932" Ports [1, 1] Position [390, 355, 415, 385] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 30 30 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[18.33 " "18.33 21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[15.33 15.33 18.33" " 18.33 15.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "7933" Ports [2, 1] Position [280, 348, 325, 392] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7934" Position [475, 363, 505, 377] NamePlacement "alternate" IconDisplay "Port number" } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [30, 0] Branch { Points [0, 20] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical" DstPort 1 } } } Block { BlockType Reference Name "Delay4" SID "7935" Ports [1, 1] Position [785, 277, 820, 293] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "10" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,16,1,1,white,blue,0,8c471295,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-10}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From2" SID "7936" Position [200, 262, 285, 278] ShowName off CloseFcn "tagdialog Close" GotoTag "AF_TxDone" TagVisibility "global" } Block { BlockType From Name "From4" SID "7937" Position [200, 277, 250, 293] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReset" TagVisibility "global" } Block { BlockType Reference Name "Logical3" SID "7938" Ports [2, 1] Position [375, 279, 405, 306] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.33 16.3" "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 16.33 16" ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 " "1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black'" ");disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "7939" Ports [2, 1] Position [660, 256, 685, 309] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,53,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 53 53 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 53 53 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[29.33 29.33 " "32.33 29.33 32.33 32.33 32.33 29.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[26.33 26.33 29.33 29.33 2" "6.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[23.33 23.33 26.33 26.33 23.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[20.33 20.33 23.33 20.33 23.33 23.33 20.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Done" SID "7940" Position [890, 278, 920, 292] IconDisplay "Port number" } Line { SrcBlock "From4" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Pkt Done" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Copy_Downsample" DstPort 1 } Line { SrcBlock "Copy_Downsample" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Delay4" DstPort 1 } Line { SrcBlock "Delay4" SrcPort 1 DstBlock "Done" DstPort 1 } Annotation { Name "Delay to allow final samples to leave pipeline\nbefore Tx gets disabled" Position [825, 251] } } } Block { BlockType SubSystem Name "TxRunning Outputs" SID "7941" Ports [1] Position [1300, 284, 1360, 316] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "TxRunning Outputs" Location [1477, 335, 1832, 415] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Tx" SID "7942" Position [305, 323, 335, 337] IconDisplay "Port number" } Block { BlockType Reference Name "Convert" SID "7943" Ports [1, 1] Position [450, 321, 485, 339] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "7944" Ports [1, 1] Position [845, 481, 880, 499] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "7945" Ports [1, 1] Position [845, 521, 880, 539] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Delay" SID "7946" Ports [2, 2] Position [545, 439, 615, 481] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Delay" Location [202, 74, 1910, 1112] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Tx" SID "7947" Position [325, 323, 355, 337] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "7948" Position [325, 358, 355, 372] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Counter" SID "7949" Ports [2, 1] Position [730, 310, 790, 370] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "9" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" use_rpm "off" has_advanced_control "0" sggui_pos "1081,412,348,619" block_type "counter" block_version "10.1.3" sg_icon_stat "60,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38" ".88 46.88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38." "88 30.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf" "++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "7950" Ports [1, 1] Position [610, 457, 645, 473] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,16,1,1,white,blue,0,85ce9542,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From9" SID "7951" Position [235, 409, 375, 431] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_TxRunningOut_delay" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "7952" Ports [1, 1] Position [655, 317, 685, 333] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "30,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "7953" Ports [2, 1] Position [485, 356, 515, 394] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.4" "4 27.44 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 " "19.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "7954" Ports [2, 1] Position [850, 328, 895, 372] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch4" SID "7955" Ports [2, 1] Position [535, 305, 570, 400] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch4" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "7956" Position [140, 103, 170, 117] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "7957" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" SID "7958" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11.22 " "13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 9.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "7959" Ports [1, 1] Position [195, 88, 220, 102] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "7960" Ports [1, 1] Position [195, 103, 220, 117] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'" "cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "7961" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "7962" Position [325, 88, 355, 102] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Outport Name "Tx_d" SID "7963" Position [1065, 343, 1095, 357] IconDisplay "Port number" } Block { BlockType Outport Name "dly" SID "7964" Position [1055, 433, 1085, 447] Port "2" IconDisplay "Port number" } Line { SrcBlock "S-R Latch4" SrcPort 1 Points [55, 0] Branch { DstBlock "Counter" DstPort 2 } Branch { Points [0, -30] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Counter" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Counter" DstPort 1 } Line { SrcBlock "Tx" SrcPort 1 DstBlock "S-R Latch4" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [15, 0] Branch { DstBlock "Tx_d" DstPort 1 } Branch { Points [0, 115] DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "S-R Latch4" DstPort 2 } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From9" SrcPort 1 Points [435, 0] Branch { Points [0, -60] DstBlock "Relational" DstPort 2 } Branch { Points [0, 20] DstBlock "dly" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 Points [-150, 0; 0, -80] DstBlock "Logical4" DstPort 2 } Annotation { Name "Delay stretches output pulse to a few cycles." Position [612, 488] } } } Block { BlockType Reference Name "Down Sample6" SID "7965" Ports [1, 1] Position [370, 456, 400, 484] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\newline '," "'texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "7966" Position [410, 533, 570, 547] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_TxRunningOut_en0" TagVisibility "global" } Block { BlockType From Name "From2" SID "7967" Position [245, 462, 325, 478] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReset" TagVisibility "global" } Block { BlockType From Name "From3" SID "7968" Position [410, 493, 570, 507] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_TxRunningOut_en1" TagVisibility "global" } Block { BlockType Reference Name "Logical1" SID "7969" Ports [2, 1] Position [770, 471, 800, 509] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.44 27.4" "4 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 19.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "7970" Ports [2, 1] Position [770, 511, 800, 549] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.44 27.4" "4 23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 19.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Payload\nRunning" SID "7971" Ports [1, 1] Position [935, 475, 965, 505] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n" "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Reference Name "Payload\nRunning1" SID "7972" Ports [1, 1] Position [935, 515, 965, 545] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n" "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Scope Name "TxRunning" SID "7973" Ports [7] Position [1330, 244, 1375, 356] NamePlacement "alternate" Floating off Location [181, 176, 1865, 995] Open off NumInputPorts "7" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "9328" YMin "-0.2~-0.25~-1~-1~0~0~0" YMax "0.15~0.15~1~1~1~3500~1" SaveName "ScopeData5" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "Tx_debug_pktRunning" SID "7974" Ports [1, 1] Position [625, 319, 680, 341] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" UseAsDAC off DACChannel "'1'" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'debug_pktRunning'}}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,22,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.985 0.979 0.895 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.985 0.979 " "0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Tx_pktRunning_d0" SID "7975" Ports [1, 1] Position [1035, 519, 1090, 541] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" UseAsDAC off DACChannel "'1'" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'debug_pktRunning'}}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,22,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.985 0.979 0.895 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.985 0.979 " "0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Tx_pktRunning_d1" SID "7976" Ports [1, 1] Position [1035, 479, 1090, 501] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" UseAsDAC off DACChannel "'1'" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'debug_pktRunning'}}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,22,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.985 0.979 0.895 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.985 0.979 " "0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample" SID "7977" Ports [1, 1] Position [535, 316, 565, 344] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "30,28,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}\\" "bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "7978" Ports [1, 1] Position [650, 446, 680, 474] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "30,28,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}\\" "bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done1" SID "7979" Ports [1, 1] Position [1180, 280, 1215, 290] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done2" SID "7980" Ports [1, 1] Position [1180, 295, 1215, 305] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done3" SID "7981" Ports [1, 1] Position [1180, 310, 1215, 320] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done4" SID "7982" Ports [1, 1] Position [1180, 250, 1215, 260] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done5" SID "7983" Ports [1, 1] Position [1180, 265, 1215, 275] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "done6" SID "7984" Ports [1, 1] Position [1180, 325, 1215, 335] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6.11 6.1" "1 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6.11 5.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType SubSystem Name "posedge2" SID "7985" Ports [1, 1] Position [455, 442, 495, 458] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge2" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In" SID "7986" Position [20, 33, 50, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "7987" Ports [1, 1] Position [80, 67, 140, 123] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2" sg_icon_stat "60,56,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36" ".88 44.88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36." "88 28.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "7988" Ports [1, 1] Position [170, 66, 225, 124] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2" sg_icon_stat "55,58,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 58 58 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[36" ".77 36.77 43.77 36.77 43.77 43.77 43.77 36.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[29.77 29." "77 36.77 36.77 29.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[22.77 22.77 29.77 29.7" "7 22.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[15.77 15.77 22.77 15.77 22.77 22.77" " 15.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "7989" Ports [2, 1] Position [260, 25, 315, 85] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2" sg_icon_stat "55,60,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ],[37" ".77 37.77 44.77 37.77 44.77 44.77 44.77 37.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[30.77 30." "77 37.77 37.77 30.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[23.77 23.77 30.77 30.7" "7 23.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[16.77 16.77 23.77 16.77 23.77 23.77" " 16.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\n\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Out" SID "7990" Position [340, 48, 370, 62] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 Points [0, 0] DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 Points [5, 0; 0, -25] DstBlock "Logical" DstPort 2 } Line { SrcBlock "In" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 55] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [0, 0] DstBlock "Out" DstPort 1 } } } Line { SrcBlock "Up Sample" SrcPort 1 Points [35, 0] Branch { DstBlock "Tx_debug_pktRunning" DstPort 1 } Branch { Points [0, -60] DstBlock "done5" DstPort 1 } } Line { SrcBlock "Tx" SrcPort 1 Points [85, 0] Branch { Points [0, 120] DstBlock "posedge2" DstPort 1 } Branch { DstBlock "Convert" DstPort 1 } Branch { Points [0, -75] DstBlock "done4" DstPort 1 } } Line { SrcBlock "posedge2" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Down Sample6" DstPort 1 } Line { SrcBlock "Payload\nRunning" SrcPort 1 Points [25, 0] Branch { DstBlock "Tx_pktRunning_d1" DstPort 1 } Branch { Points [0, -175] DstBlock "done3" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { Labels [1, 0] SrcBlock "Logical2" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Payload\nRunning1" SrcPort 1 Points [30, 0] Branch { DstBlock "Tx_pktRunning_d0" DstPort 1 } Branch { Points [0, -200] DstBlock "done6" DstPort 1 } } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Payload\nRunning" DstPort 1 } Line { Labels [1, 0] SrcBlock "Convert3" SrcPort 1 DstBlock "Payload\nRunning1" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Up Sample" DstPort 1 } Line { SrcBlock "Down Sample6" SrcPort 1 DstBlock "Delay" DstPort 2 } Line { SrcBlock "Delay" SrcPort 1 Points [0, 10] DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 Points [20, 0] Branch { Points [0, 20] Branch { Points [0, 40] DstBlock "Logical2" DstPort 1 } Branch { DstBlock "Logical1" DstPort 1 } } Branch { Points [0, -80; 235, 0; 0, -95] DstBlock "done1" DstPort 1 } } Line { SrcBlock "done4" SrcPort 1 DstBlock "TxRunning" DstPort 1 } Line { SrcBlock "done5" SrcPort 1 DstBlock "TxRunning" DstPort 2 } Line { SrcBlock "Delay" SrcPort 2 Points [20, 0; 0, -70; 310, 0; 0, -100] DstBlock "done2" DstPort 1 } Line { SrcBlock "done1" SrcPort 1 DstBlock "TxRunning" DstPort 3 } Line { SrcBlock "done2" SrcPort 1 DstBlock "TxRunning" DstPort 4 } Line { SrcBlock "done3" SrcPort 1 DstBlock "TxRunning" DstPort 5 } Line { SrcBlock "done6" SrcPort 1 DstBlock "TxRunning" DstPort 6 } } } Block { BlockType Reference Name "done1" SID "7991" Ports [1, 1] Position [260, 621, 295, 629] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,8,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 8 8 0 ],[0.88 0.8" "8 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 8 8 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[5." "11 5.11 6.11 5.11 6.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 5" ".11 4.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[3.11 3.11 4.11 4.11 3.11 ],[1 1 1" " ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[2.11 2.11 3.11 2.11 3.11 3.11 2.11 ],[0.964 0.964 " "0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');p" "ort_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "7992" Ports [1, 1] Position [260, 590, 295, 600] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "7993" Ports [1, 1] Position [260, 605, 295, 615] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Payload" SID "7994" Position [1350, 369, 1385, 381] IconDisplay "Port number" } Block { BlockType Outport Name " AntA I" SID "7995" Position [1350, 454, 1385, 466] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name " AntA Q" SID "7996" Position [1350, 518, 1380, 532] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name " AntB I" SID "7997" Position [1350, 583, 1380, 597] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name " AntB Q" SID "7998" Position [1350, 648, 1380, 662] Port "5" IconDisplay "Port number" } Line { SrcBlock "Logical1" SrcPort 1 Points [25, 0] Branch { Points [0, 30] Branch { DstBlock "Mux" DstPort 1 } Branch { Points [0, 105] Branch { DstBlock "Mux1" DstPort 1 } Branch { Points [0, 115] Branch { DstBlock "Mux2" DstPort 1 } Branch { Points [0, 105] DstBlock "Mux3" DstPort 1 } } } } Branch { Points [0, -60; 260, 0; 0, 30] DstBlock "Logical3" DstPort 1 } } Line { SrcBlock "Constant7" SrcPort 1 DstBlock "Payload\nRunning" DstPort 1 } Line { SrcBlock "TxDone Logic" SrcPort 1 Points [75, 0] Branch { DstBlock "Payload\nRunning" DstPort 2 } Branch { Points [0, -85] DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "vin" SrcPort 1 Points [390, 0] Branch { Points [0, -15] DstBlock "Payload\nRunning" DstPort 3 } Branch { Points [0, 10; 135, 0] DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "AntA I" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "AntA Q" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Payload\nRunning1" DstPort 1 } Line { SrcBlock "Payload\nRunning1" SrcPort 1 Points [80, 0] Branch { Points [0, 70] DstBlock "Antenna Swapping" DstPort 1 } Branch { Points [225, 0] Branch { Points [0, 170] Branch { DstBlock "Register" DstPort 2 } Branch { Points [0, 65] Branch { DstBlock "Register1" DstPort 2 } Branch { Points [0, 65] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, 65] DstBlock "Register3" DstPort 2 } } } } Branch { Labels [0, 0] DstBlock "Inverter" DstPort 1 } } } Line { SrcBlock "LSB" SrcPort 1 DstBlock "Posedge2" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 Points [10, 0] Branch { Points [0, -140] Branch { Points [0, -30] DstBlock "LSB" DstPort 1 } Branch { Labels [0, 0] Points [655, 0; 0, 80] DstBlock "Antenna Swapping" DstPort 2 } } Branch { DstBlock "Preamble\nGeneration" DstPort 1 } } Line { SrcBlock "Preamble\nGeneration" SrcPort 2 Points [70, 0; 0, 90] DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock " AntA I" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock " AntA Q" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 Points [60, 0; 0, -90] DstBlock "Antenna Swapping" DstPort 5 } Line { SrcBlock "Mux3" SrcPort 1 Points [75, 0] DstBlock "Antenna Swapping" DstPort 6 } Line { SrcBlock "Register2" SrcPort 1 DstBlock " AntB I" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 DstBlock " AntB Q" DstPort 1 } Line { SrcBlock "AntB I" SrcPort 1 DstBlock "Mux2" DstPort 3 } Line { SrcBlock "AntB Q" SrcPort 1 DstBlock "Mux3" DstPort 3 } Line { Labels [0, 0] SrcBlock "Preamble\nGeneration" SrcPort 3 Points [50, 0; 0, 190] DstBlock "Mux2" DstPort 2 } Line { SrcBlock "Preamble\nGeneration" SrcPort 4 Points [35, 0; 0, 280] DstBlock "Mux3" DstPort 2 } Line { SrcBlock "Payload\nRunning" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Payload\nRunning1" DstPort 2 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "Payload" DstPort 1 } Line { SrcBlock "Preamble\nGeneration" SrcPort 1 Points [85, 0] Branch { DstBlock "Mux" DstPort 2 } Branch { Points [0, 90; -290, 0; 0, 75] DstBlock "done1" DstPort 1 } } Line { Labels [0, 0] SrcBlock "Mux" SrcPort 1 Points [35, 0; 0, 20] DstBlock "Antenna Swapping" DstPort 3 } Line { Labels [0, 0] SrcBlock "Mux1" SrcPort 1 Points [75, 0] DstBlock "Antenna Swapping" DstPort 4 } Line { SrcBlock "Antenna Swapping" SrcPort 2 DstBlock "Register" DstPort 1 } Line { SrcBlock "Antenna Swapping" SrcPort 3 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Antenna Swapping" SrcPort 4 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Antenna Swapping" SrcPort 5 DstBlock "Register3" DstPort 1 } Line { SrcBlock "Pream Index" SrcPort 1 Points [65, 0] Branch { DstBlock "Logical2" DstPort 2 } Branch { Points [0, 110] DstBlock "done5" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 Points [60, 0] Branch { DstBlock "Logical2" DstPort 1 } Branch { Points [0, 125] DstBlock "done4" DstPort 1 } } Line { SrcBlock "Posedge2" SrcPort 1 DstBlock "Payload\nRunning1" DstPort 3 } Line { SrcBlock "Pkt Done" SrcPort 1 DstBlock "TxDone Logic" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "Antenna Swapping" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [10, 0] Branch { Points [0, -50] DstBlock "Goto6" DstPort 1 } Branch { Labels [0, 0] DstBlock "TxRunning Outputs" DstPort 1 } } Line { SrcBlock "done4" SrcPort 1 DstBlock "Preambles" DstPort 1 } Line { SrcBlock "done5" SrcPort 1 DstBlock "Preambles" DstPort 2 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Preambles" DstPort 3 } Annotation { Name "Cheap output-enable circuit. Output registers are\nbrought out of reset on the first 0->1 transiti" "on in the \nLSB of Pream Index. In other words, the outputs are\nenabled when the preamble starts, and disabled" " when\nthe entire packet is finished." Position [739, 202] DropShadow on } } } Block { BlockType SubSystem Name "Pre-Spin, \nFilters & DACs" SID "7999" Ports [5, 4] Position [920, 178, 985, 342] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Pre-Spin, \nFilters & DACs" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Payload" SID "8000" Position [930, 283, 960, 297] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "A_I" SID "8001" Position [580, 313, 610, 327] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "A_Q" SID "8002" Position [580, 333, 610, 347] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "B_I" SID "8003" Position [580, 433, 610, 447] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "B_Q" SID "8004" Position [580, 453, 610, 467] Port "5" IconDisplay "Port number" } Block { BlockType SubSystem Name "A*conj(B)" SID "8005" Ports [4, 2] Position [700, 310, 775, 390] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "A*conj(B)" Location [202, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[A]" SID "8006" Position [55, 143, 85, 157] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[A]" SID "8007" Position [55, 168, 85, 182] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Im[B]" SID "8008" Position [55, 328, 85, 342] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Re[B]" SID "8009" Position [55, 303, 85, 317] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Add1" SID "8010" Ports [2, 1] Position [565, 173, 610, 217] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter" SID "8011" Ports [0, 1] Position [104, 40, 156, 90] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter i" "s implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "4" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "2" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "52,50,0,1,white,blue,0,7ac47ef5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 52 52 0 0 ],[0 0 50 50 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 52 52 0 0 ],[0 0 50 50 0 ]);\npatch([10.425 20.54 27.54 34.54 41.54 27.54 17.425 10.425 ],[32.77 32" ".77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([17.425 27.54 20.54 10.425 17.425 ],[25.77 25.77 32.77" " 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([10.425 20.54 27.54 17.425 10.425 ],[18.77 18.77 25.77 25.77 18.77 ]," "[1 1 1 ]);\npatch([17.425 41.54 34.54 27.54 20.54 10.425 17.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('" "black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "8012" Ports [1, 1] Position [840, 177, 875, 213] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23.55 28." "55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 23.55 18." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\" "newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "8013" Ports [1, 1] Position [840, 232, 875, 268] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23.55 28." "55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 23.55 18." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\" "newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult4" SID "8014" Ports [2, 1] Position [395, 163, 440, 207] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipel" "ine for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "17" bin_pt "16" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\times b'," "'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "8015" Ports [5, 1] Position [305, 267, 340, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,136,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 " "5.875 ],[73.55 73.55 78.55 73.55 78.55 78.55 78.55 73.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[68." "55 68.55 73.55 73.55 68.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[63.55 63.55 68.55 68.5" "5 63.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[58.55 58.55 63.55 58.55 63.55 63.55 58.55 " "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('in" "put',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('bl" "ack');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "8016" Ports [5, 1] Position [305, 107, 340, 243] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,136,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 " "5.875 ],[73.55 73.55 78.55 73.55 78.55 78.55 78.55 73.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[68." "55 68.55 73.55 73.55 68.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[63.55 63.55 68.55 68.5" "5 63.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[58.55 58.55 63.55 58.55 63.55 63.55 58.55 " "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('in" "put',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('bl" "ack');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate" SID "8017" Ports [1, 1] Position [205, 155, 245, 195] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate1" SID "8018" Ports [1, 1] Position [200, 315, 240, 355] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "8019" Ports [1, 1] Position [675, 183, 705, 207] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "64,51,348,193" block_type "register" block_version "10.1.2" sg_icon_stat "30,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.3" "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15" ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "8020" Ports [1, 1] Position [730, 183, 760, 207] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.2" sg_icon_stat "30,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.3" "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15" ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "8021" Ports [1, 1] Position [475, 193, 505, 217] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.2" sg_icon_stat "30,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.3" "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15" ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "8022" Ports [1, 1] Position [200, 116, 235, 134] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "8023" Ports [1, 1] Position [135, 164, 170, 186] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "8024" Ports [1, 1] Position [140, 299, 175, 321] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample3" SID "8025" Ports [1, 1] Position [135, 139, 170, 161] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample4" SID "8026" Ports [1, 1] Position [140, 324, 175, 346] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Re" SID "8027" Position [985, 188, 1015, 202] IconDisplay "Port number" } Block { BlockType Outport Name "Im" SID "8028" Position [985, 243, 1015, 257] Port "2" IconDisplay "Port number" } Line { SrcBlock "Slice" SrcPort 1 Points [30, 0] Branch { Points [0, 160] DstBlock "Mux" DstPort 1 } Branch { DstBlock "Mux1" DstPort 1 } } Line { SrcBlock "Counter" SrcPort 1 Points [0, 30] DstBlock "Slice" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Mult4" SrcPort 1 Points [0, 0; 5, 0] Branch { DstBlock "Add1" DstPort 1 } Branch { Points [0, 20] DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Up Sample1" SrcPort 1 Points [5, 0] Branch { Points [0, 50] DstBlock "Mux1" DstPort 5 } Branch { DstBlock "Negate" DstPort 1 } } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "Negate1" DstPort 1 } Line { SrcBlock "Up Sample2" SrcPort 1 Points [90, 0] Branch { DstBlock "Mux" DstPort 2 } Branch { Points [0, 75] DstBlock "Mux" DstPort 5 } } Line { SrcBlock "Up Sample3" SrcPort 1 Points [0, 0; 110, 0] Branch { Points [0, 50] DstBlock "Mux1" DstPort 4 } Branch { DstBlock "Mux1" DstPort 2 } } Line { SrcBlock "Re[A]" SrcPort 1 DstBlock "Up Sample3" DstPort 1 } Line { SrcBlock "Re[B]" SrcPort 1 DstBlock "Up Sample2" DstPort 1 } Line { SrcBlock "Im[A]" SrcPort 1 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "Im[B]" SrcPort 1 DstBlock "Up Sample4" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Mult4" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 Points [35, 0] DstBlock "Mult4" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock "Im" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Re" DstPort 1 } Line { SrcBlock "Add1" SrcPort 1 Points [30, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 55] DstBlock "Down Sample4" DstPort 1 } } Line { SrcBlock "Negate" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Negate1" SrcPort 1 Points [40, 0] Branch { Points [0, 25] DstBlock "Mux" DstPort 4 } Branch { DstBlock "Mux" DstPort 3 } } } } Block { BlockType SubSystem Name "A*conj(B) " SID "8029" Ports [4, 2] Position [700, 390, 775, 470] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "A*conj(B) " Location [202, 74, 1910, 1156] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Re[B]" SID "8030" Position [55, 303, 85, 317] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Im[B]" SID "8031" Position [55, 328, 85, 342] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Re[A]" SID "8032" Position [55, 143, 85, 157] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Im[A]" SID "8033" Position [55, 168, 85, 182] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Add1" SID "8034" Ports [2, 1] Position [565, 173, 610, 217] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[9 0 0 16 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Counter" SID "8035" Ports [0, 1] Position [104, 40, 156, 90] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter i" "s implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "4" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "2" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[3 3 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "52,50,0,1,white,blue,0,7ac47ef5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 52 52 0 0 ],[0 0 50 50 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 52 52 0 0 ],[0 0 50 50 0 ]);\npatch([10.425 20.54 27.54 34.54 41.54 27.54 17.425 10.425 ],[32.77 32" ".77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([17.425 27.54 20.54 10.425 17.425 ],[25.77 25.77 32.77" " 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([10.425 20.54 27.54 17.425 10.425 ],[18.77 18.77 25.77 25.77 18.77 ]," "[1 1 1 ]);\npatch([17.425 41.54 34.54 27.54 20.54 10.425 17.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('" "black');disp('{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "8036" Ports [1, 1] Position [840, 177, 875, 213] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23.55 28." "55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 23.55 18." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\" "newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "8037" Ports [1, 1] Position [840, 232, 875, 268] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "First Value of Frame" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,475c248c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23.55 28." "55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 23.55 18." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}\\" "newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult4" SID "8038" Ports [2, 1] Position [395, 163, 440, 207] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipel" "ine for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "17" bin_pt "16" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[14 27 0 27 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,356,448" block_type "mult" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\times b'," "'texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "8039" Ports [5, 1] Position [305, 267, 340, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,136,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 " "5.875 ],[73.55 73.55 78.55 73.55 78.55 78.55 78.55 73.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[68." "55 68.55 73.55 73.55 68.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[63.55 63.55 68.55 68.5" "5 63.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[58.55 58.55 63.55 58.55 63.55 63.55 58.55 " "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('in" "put',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('bl" "ack');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "8040" Ports [5, 1] Position [305, 107, 340, 243] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,136,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 19.4286 116.571 136 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 " "5.875 ],[73.55 73.55 78.55 73.55 78.55 78.55 78.55 73.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[68." "55 68.55 73.55 73.55 68.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[63.55 63.55 68.55 68.5" "5 63.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[58.55 58.55 63.55 58.55 63.55 63.55 58.55 " "],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('in" "put',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3');\n\ncolor('bl" "ack');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate" SID "8041" Ports [1, 1] Position [205, 155, 245, 195] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Negate1" SID "8042" Ports [1, 1] Position [200, 315, 240, 355] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Flag as error" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,40,1,1,white,blue,0,36bd7045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('\\b" "f{x(-1)}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "8043" Ports [1, 1] Position [675, 183, 705, 207] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.2" sg_icon_stat "30,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.3" "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15" ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "8044" Ports [1, 1] Position [730, 183, 760, 207] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.2" sg_icon_stat "30,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.3" "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15" ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "8045" Ports [1, 1] Position [475, 193, 505, 217] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.2" sg_icon_stat "30,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.33 15.3" "3 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 15.33 15" ".33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]" ");\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "8046" Ports [1, 1] Position [200, 116, 235, 134] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample1" SID "8047" Ports [1, 1] Position [135, 164, 170, 186] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "8048" Ports [1, 1] Position [140, 299, 175, 321] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample3" SID "8049" Ports [1, 1] Position [135, 139, 170, 161] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample4" SID "8050" Ports [1, 1] Position [140, 324, 175, 346] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Re" SID "8051" Position [985, 188, 1015, 202] IconDisplay "Port number" } Block { BlockType Outport Name "Im" SID "8052" Position [985, 243, 1015, 257] Port "2" IconDisplay "Port number" } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Negate" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Add1" SrcPort 1 Points [30, 0] Branch { Points [0, 55] DstBlock "Down Sample4" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Re" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock "Im" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 Points [35, 0] DstBlock "Mult4" DstPort 2 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Mult4" DstPort 1 } Line { SrcBlock "Im[B]" SrcPort 1 DstBlock "Up Sample4" DstPort 1 } Line { SrcBlock "Im[A]" SrcPort 1 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "Re[B]" SrcPort 1 DstBlock "Up Sample2" DstPort 1 } Line { SrcBlock "Re[A]" SrcPort 1 DstBlock "Up Sample3" DstPort 1 } Line { SrcBlock "Up Sample3" SrcPort 1 Points [0, 0; 110, 0] Branch { DstBlock "Mux1" DstPort 2 } Branch { Points [0, 50] DstBlock "Mux1" DstPort 4 } } Line { SrcBlock "Up Sample2" SrcPort 1 Points [90, 0] Branch { Points [0, 75] DstBlock "Mux" DstPort 5 } Branch { DstBlock "Mux" DstPort 2 } } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "Negate1" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 Points [5, 0] Branch { DstBlock "Negate" DstPort 1 } Branch { Points [0, 50] DstBlock "Mux1" DstPort 5 } } Line { SrcBlock "Mult4" SrcPort 1 Points [0, 0; 5, 0] Branch { Points [0, 20] DstBlock "Register2" DstPort 1 } Branch { DstBlock "Add1" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Add1" DstPort 2 } Line { SrcBlock "Counter" SrcPort 1 Points [0, 30] DstBlock "Slice" DstPort 1 } Line { SrcBlock "Slice" SrcPort 1 Points [30, 0] Branch { DstBlock "Mux1" DstPort 1 } Branch { Points [0, 160] DstBlock "Mux" DstPort 1 } } Line { SrcBlock "Negate1" SrcPort 1 Points [40, 0] Branch { DstBlock "Mux" DstPort 3 } Branch { Points [0, 25] DstBlock "Mux" DstPort 4 } } } } Block { BlockType SubSystem Name "Interpolation" SID "8053" Ports [4, 4] Position [895, 307, 955, 473] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Interpolation" Location [802, 373, 1142, 615] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "A_I " SID "8054" Position [115, 63, 145, 77] IconDisplay "Port number" } Block { BlockType Inport Name "A_Q " SID "8055" Position [115, 103, 145, 117] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "B_I " SID "8056" Position [120, 193, 150, 207] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "B_Q " SID "8057" Position [120, 233, 150, 247] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Tx_AntA_I_DIV1" SID "8058" Ports [1, 1] Position [365, 60, 430, 80] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed " "point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,348,406" block_type "gatewayin" block_version "10.1.3" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT:" " end icon text');" } Block { BlockType Reference Name "Tx_AntA_I_DIV4" SID "8059" Ports [1, 1] Position [235, 60, 295, 80] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT" ": end icon text');" } Block { BlockType Reference Name "Tx_AntA_Q_DIV1" SID "8060" Ports [1, 1] Position [365, 100, 430, 120] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed " "point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,348,406" block_type "gatewayin" block_version "10.1.3" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT:" " end icon text');" } Block { BlockType Reference Name "Tx_AntA_Q_DIV4" SID "8061" Ports [1, 1] Position [235, 100, 295, 120] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT" ": end icon text');" } Block { BlockType Reference Name "Tx_AntB_I_DIV1" SID "8062" Ports [1, 1] Position [360, 190, 425, 210] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed " "point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,348,406" block_type "gatewayin" block_version "10.1.3" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT:" " end icon text');" } Block { BlockType Reference Name "Tx_AntB_I_DIV4" SID "8063" Ports [1, 1] Position [230, 190, 290, 210] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT" ": end icon text');" } Block { BlockType Reference Name "Tx_AntB_Q_DIV1" SID "8064" Ports [1, 1] Position [360, 230, 425, 250] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed " "point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,348,406" block_type "gatewayin" block_version "10.1.3" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT:" " end icon text');" } Block { BlockType Reference Name "Tx_AntB_Q_DIV4" SID "8065" Ports [1, 1] Position [230, 230, 290, 250] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT" ": end icon text');" } Block { BlockType Outport Name "A_I" SID "8066" Position [495, 63, 525, 77] IconDisplay "Port number" } Block { BlockType Outport Name "A_Q" SID "8067" Position [495, 103, 525, 117] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "B_I" SID "8068" Position [490, 193, 520, 207] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "B_Q" SID "8069" Position [490, 233, 520, 247] Port "4" IconDisplay "Port number" } Line { SrcBlock "Tx_AntA_I_DIV4" SrcPort 1 DstBlock "Tx_AntA_I_DIV1" DstPort 1 } Line { SrcBlock "Tx_AntA_Q_DIV4" SrcPort 1 DstBlock "Tx_AntA_Q_DIV1" DstPort 1 } Line { SrcBlock "Tx_AntB_I_DIV4" SrcPort 1 DstBlock "Tx_AntB_I_DIV1" DstPort 1 } Line { SrcBlock "Tx_AntB_Q_DIV4" SrcPort 1 DstBlock "Tx_AntB_Q_DIV1" DstPort 1 } Line { SrcBlock "A_I " SrcPort 1 DstBlock "Tx_AntA_I_DIV4" DstPort 1 } Line { SrcBlock "A_Q " SrcPort 1 DstBlock "Tx_AntA_Q_DIV4" DstPort 1 } Line { SrcBlock "Tx_AntA_I_DIV1" SrcPort 1 DstBlock "A_I" DstPort 1 } Line { SrcBlock "Tx_AntA_Q_DIV1" SrcPort 1 DstBlock "A_Q" DstPort 1 } Line { SrcBlock "Tx_AntB_I_DIV1" SrcPort 1 DstBlock "B_I" DstPort 1 } Line { SrcBlock "B_I " SrcPort 1 DstBlock "Tx_AntB_I_DIV4" DstPort 1 } Line { SrcBlock "Tx_AntB_Q_DIV1" SrcPort 1 DstBlock "B_Q" DstPort 1 } Line { SrcBlock "B_Q " SrcPort 1 DstBlock "Tx_AntB_Q_DIV4" DstPort 1 } Annotation { Name "Filters are implemented in external\nrate_change_filters pcore" Position [335, 288] } } } Block { BlockType SubSystem Name "Pre-CFO\nSinusoid" SID "8070" Ports [0, 2] Position [415, 371, 460, 404] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Pre-CFO\nSinusoid" Location [-8, 391, 622, 598] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Constant1" SID "8071" Ports [0, 1] Position [255, 133, 375, 157] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "4" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "120,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 120 120 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0" ".91 ]);\nplot([0 120 120 0 0 ],[0 0 24 24 0 ]);\npatch([53.325 57.66 60.66 63.66 66.66 60.66 56.325 53.325 ],[15.3" "3 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([56.325 60.66 57.66 53.325 56.325 ],[12.33 12.33 1" "5.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([53.325 57.66 60.66 56.325 53.325 ],[9.33 9.33 12.33 12.33 9.33 ]" ",[1 1 1 ]);\npatch([56.325 66.66 63.66 60.66 57.66 53.325 56.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "8072" Ports [0, 1] Position [260, 58, 380, 82] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "4" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "120,24,0,1,white,blue,0,170720a6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 120 120 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0" ".91 ]);\nplot([0 120 120 0 0 ],[0 0 24 24 0 ]);\npatch([53.325 57.66 60.66 63.66 66.66 60.66 56.325 53.325 ],[15.3" "3 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([56.325 60.66 57.66 53.325 56.325 ],[12.33 12.33 1" "5.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([53.325 57.66 60.66 56.325 53.325 ],[9.33 9.33 12.33 12.33 9.33 ]" ",[1 1 1 ]);\npatch([56.325 66.66 63.66 60.66 57.66 53.325 56.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'0.999969482421875');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "8073" Ports [1, 1] Position [245, 43, 275, 57] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([12.5" "5 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "8074" Ports [1, 1] Position [450, 32, 475, 58] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "8075" Position [260, 87, 380, 103] ShowName off CloseFcn "tagdialog Close" GotoTag "CFO_DDSOut_I" TagVisibility "global" } Block { BlockType From Name "From3" SID "8076" Position [255, 162, 375, 178] ShowName off CloseFcn "tagdialog Close" GotoTag "CFO_DDSOut_Q" TagVisibility "global" } Block { BlockType From Name "From4" SID "8077" Position [25, 43, 210, 57] ShowName off CloseFcn "tagdialog Close" GotoTag "RxAutoReplyProc_UsePreCFO" TagVisibility "global" } Block { BlockType From Name "From6" SID "8078" Position [25, 28, 200, 42] ShowName off CloseFcn "tagdialog Close" GotoTag "regTx_AlwaysUsePreSpin" TagVisibility "global" } Block { BlockType Reference Name "Logical1" SID "8079" Ports [2, 1] Position [350, 29, 380, 56] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.33 16.3" "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 16.33 16" ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 " "1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black'" ");disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "8080" Ports [3, 1] Position [530, 32, 550, 108] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,76,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 10.8571 65.1429 76 0 ],[0." "77 0.82 0.91 ]);\nplot([0 20 20 0 0 ],[0 10.8571 65.1429 76 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5" ".55 ],[40.22 40.22 42.22 40.22 42.22 42.22 42.22 40.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[38.22 38." "22 40.22 40.22 38.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[36.22 36.22 38.22 38.22 36.22 ]" ",[1 1 1 ]);\npatch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[34.22 34.22 36.22 34.22 36.22 36.22 34.22 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1'" ");\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux3" SID "8081" Ports [3, 1] Position [530, 107, 550, 183] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,76,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 10.8571 65.1429 76 0 ],[0." "77 0.82 0.91 ]);\nplot([0 20 20 0 0 ],[0 10.8571 65.1429 76 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5" ".55 ],[40.22 40.22 42.22 40.22 42.22 42.22 42.22 40.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[38.22 38." "22 40.22 40.22 38.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[36.22 36.22 38.22 38.22 36.22 ]" ",[1 1 1 ]);\npatch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[34.22 34.22 36.22 34.22 36.22 36.22 34.22 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1'" ");\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "I" SID "8082" Position [575, 63, 605, 77] IconDisplay "Port number" } Block { BlockType Outport Name "Q" SID "8083" Position [575, 138, 605, 152] Port "2" IconDisplay "Port number" } Line { SrcBlock "From4" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Mux3" DstPort 3 } Line { SrcBlock "Down Sample" SrcPort 1 Points [25, 0] Branch { Points [0, 75] DstBlock "Mux3" DstPort 1 } Branch { DstBlock "Mux1" DstPort 1 } } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Mux3" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "I" DstPort 1 } Line { SrcBlock "Mux3" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType SubSystem Name "Scaling" SID "8084" Ports [5, 4] Position [1095, 268, 1165, 472] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Scaling" Location [382, 224, 1247, 566] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Payload" SID "8085" Position [25, 38, 55, 52] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "A_I " SID "8086" Position [635, 178, 665, 192] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "A_Q " SID "8087" Position [635, 218, 665, 232] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "B_I " SID "8088" Position [635, 258, 665, 272] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "B_Q " SID "8089" Position [635, 298, 665, 312] Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "Delay1" SID "8090" Ports [1, 1] Position [135, 29, 165, 61] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "8" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "30,32,1,1,white,blue,0,e47f993a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.4" "4 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-8}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From2" SID "8091" Position [420, 97, 565, 113] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_postIFFTScaling" TagVisibility "global" } Block { BlockType From Name "From7" SID "8092" Position [420, 67, 565, 83] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_PreambleScaling" TagVisibility "global" } Block { BlockType Reference Name "Mult1" SID "8093" Ports [2, 1] Position [745, 194, 785, 236] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipel" "ine for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26.55 31." "55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 26.55 21." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\times b','" "texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult2" SID "8094" Ports [2, 1] Position [745, 234, 785, 276] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipel" "ine for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26.55 31." "55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 26.55 21." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\times b','" "texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult3" SID "8095" Ports [2, 1] Position [745, 274, 785, 316] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipel" "ine for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26.55 31." "55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 26.55 21." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\times b','" "texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult7" SID "8096" Ports [2, 1] Position [745, 154, 785, 196] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipel" "ine for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,2,1,white,blue,0,82c891c1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26.55 31." "55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 26.55 21." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\times b','" "texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\n ');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux4" SID "8097" Ports [3, 1] Position [630, 26, 650, 124] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,98,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 14 84 98 0 ],[0.77 0.82 0." "91 ]);\nplot([0 20 20 0 0 ],[0 14 84 98 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[51.22 51.22 5" "3.22 51.22 53.22 53.22 53.22 51.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[49.22 49.22 51.22 51.22 49.22" " ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[47.22 47.22 49.22 49.22 47.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[45.22 45.22 47.22 45.22 47.22 47.22 45.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1" ",'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\n\ncolor('black')" ";disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample13" SID "8098" Ports [1, 1] Position [545, 31, 580, 59] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1" " 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}\\" "bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "A_I" SID "8099" Position [835, 168, 865, 182] IconDisplay "Port number" } Block { BlockType Outport Name "A_Q" SID "8100" Position [835, 208, 865, 222] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "B_I" SID "8101" Position [835, 248, 865, 262] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "B_Q" SID "8102" Position [835, 288, 865, 302] Port "4" IconDisplay "Port number" } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Up Sample13" DstPort 1 } Line { SrcBlock "Up Sample13" SrcPort 1 DstBlock "Mux4" DstPort 1 } Line { SrcBlock "Mux4" SrcPort 1 Points [70, 0; 0, 90] Branch { Points [0, 40] Branch { Points [0, 40] Branch { DstBlock "Mult2" DstPort 1 } Branch { Points [0, 40] DstBlock "Mult3" DstPort 1 } } Branch { DstBlock "Mult1" DstPort 1 } } Branch { DstBlock "Mult7" DstPort 1 } } Line { SrcBlock "From2" SrcPort 1 DstBlock "Mux4" DstPort 3 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Mux4" DstPort 2 } Line { SrcBlock "Payload" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "A_I " SrcPort 1 DstBlock "Mult7" DstPort 2 } Line { SrcBlock "A_Q " SrcPort 1 DstBlock "Mult1" DstPort 2 } Line { SrcBlock "Mult7" SrcPort 1 DstBlock "A_I" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 DstBlock "A_Q" DstPort 1 } Line { SrcBlock "Mult2" SrcPort 1 DstBlock "B_I" DstPort 1 } Line { SrcBlock "B_I " SrcPort 1 DstBlock "Mult2" DstPort 2 } Line { SrcBlock "Mult3" SrcPort 1 DstBlock "B_Q" DstPort 1 } Line { SrcBlock "B_Q " SrcPort 1 DstBlock "Mult3" DstPort 2 } Annotation { Name "Delay for mults (2) \nand filters (6)" Position [152, 94] } } } Block { BlockType Scope Name "Tx" SID "8103" Ports [7] Position [1345, 504, 1390, 616] Floating off Location [6, 45, 1686, 1021] Open off NumInputPorts "7" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "9328" YMin "-1~-1~-1~-1~-0.4~-0.4~0.25" YMax "1~1~1~1~0.4~0.5~1.5" SaveName "ScopeData9" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "Tx_AntA_DAC_I" SID "8104" Ports [1, 1] Position [1225, 285, 1285, 305] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','o" "n');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Tx_AntA_DAC_Q" SID "8105" Ports [1, 1] Position [1225, 335, 1285, 355] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','o" "n');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Tx_AntB_DAC_I" SID "8106" Ports [1, 1] Position [1225, 385, 1285, 405] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','o" "n');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Tx_AntB_DAC_Q" SID "8107" Ports [1, 1] Position [1225, 435, 1285, 455] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','o" "n');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done1" SID "8108" Ports [1, 1] Position [1240, 585, 1275, 595] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "8109" Ports [1, 1] Position [1240, 570, 1275, 580] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done3" SID "8110" Ports [1, 1] Position [1240, 540, 1275, 550] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "8111" Ports [1, 1] Position [1240, 510, 1275, 520] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "8112" Ports [1, 1] Position [1240, 525, 1275, 535] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done6" SID "8113" Ports [1, 1] Position [1240, 555, 1275, 565] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done7" SID "8114" Ports [1, 1] Position [1240, 600, 1275, 610] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0" ".88 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[6.11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6." "11 6.11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0." "964 0.964 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Outport Name " A_I" SID "8115" Position [1355, 288, 1385, 302] IconDisplay "Port number" } Block { BlockType Outport Name " A_Q" SID "8116" Position [1355, 338, 1385, 352] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name " B_I" SID "8117" Position [1355, 388, 1385, 402] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name " B_Q" SID "8118" Position [1355, 438, 1385, 452] Port "4" IconDisplay "Port number" } Line { SrcBlock "Tx_AntA_DAC_I" SrcPort 1 DstBlock " A_I" DstPort 1 } Line { SrcBlock "Tx_AntA_DAC_Q" SrcPort 1 DstBlock " A_Q" DstPort 1 } Line { SrcBlock "Tx_AntB_DAC_I" SrcPort 1 DstBlock " B_I" DstPort 1 } Line { SrcBlock "Tx_AntB_DAC_Q" SrcPort 1 DstBlock " B_Q" DstPort 1 } Line { SrcBlock "Scaling" SrcPort 2 Points [20, 0] Branch { DstBlock "Tx_AntA_DAC_Q" DstPort 1 } Branch { Points [0, 260] DstBlock "done7" DstPort 1 } } Line { SrcBlock "Scaling" SrcPort 4 DstBlock "Tx_AntB_DAC_Q" DstPort 1 } Line { SrcBlock "Scaling" SrcPort 3 DstBlock "Tx_AntB_DAC_I" DstPort 1 } Line { SrcBlock "B_Q" SrcPort 1 DstBlock "A*conj(B) " DstPort 4 } Line { SrcBlock "B_I" SrcPort 1 DstBlock "A*conj(B) " DstPort 3 } Line { SrcBlock "Pre-CFO\nSinusoid" SrcPort 1 Points [190, 0] Branch { DstBlock "A*conj(B)" DstPort 4 } Branch { Points [0, 20] DstBlock "A*conj(B) " DstPort 1 } } Line { SrcBlock "Pre-CFO\nSinusoid" SrcPort 2 Points [185, 0] Branch { Points [0, -35] DstBlock "A*conj(B)" DstPort 3 } Branch { Points [0, 25] DstBlock "A*conj(B) " DstPort 2 } } Line { SrcBlock "A_I" SrcPort 1 DstBlock "A*conj(B)" DstPort 1 } Line { SrcBlock "A_Q" SrcPort 1 DstBlock "A*conj(B)" DstPort 2 } Line { SrcBlock "Scaling" SrcPort 1 Points [25, 0] Branch { DstBlock "Tx_AntA_DAC_I" DstPort 1 } Branch { Points [0, 295] DstBlock "done1" DstPort 1 } } Line { SrcBlock "done4" SrcPort 1 DstBlock "Tx" DstPort 1 } Line { SrcBlock "done5" SrcPort 1 DstBlock "Tx" DstPort 2 } Line { SrcBlock "done3" SrcPort 1 DstBlock "Tx" DstPort 3 } Line { SrcBlock "done6" SrcPort 1 DstBlock "Tx" DstPort 4 } Line { SrcBlock "done2" SrcPort 1 DstBlock "Tx" DstPort 5 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Tx" DstPort 6 } Line { SrcBlock "done7" SrcPort 1 DstBlock "Tx" DstPort 7 } Line { Labels [0, 0] SrcBlock "A*conj(B)" SrcPort 1 Points [60, 0] Branch { Points [0, 185] DstBlock "done4" DstPort 1 } Branch { Labels [0, 0] DstBlock "Interpolation" DstPort 1 } } Line { Labels [0, 0] SrcBlock "A*conj(B)" SrcPort 2 Points [50, 0] Branch { Points [0, 160] DstBlock "done5" DstPort 1 } Branch { Labels [0, 0] DstBlock "Interpolation" DstPort 2 } } Line { Labels [0, 0] SrcBlock "A*conj(B) " SrcPort 1 DstBlock "Interpolation" DstPort 3 } Line { Labels [0, 0] SrcBlock "A*conj(B) " SrcPort 2 DstBlock "Interpolation" DstPort 4 } Line { SrcBlock "Interpolation" SrcPort 1 Points [80, 0] Branch { Points [0, 215] DstBlock "done3" DstPort 1 } Branch { Labels [0, 0] DstBlock "Scaling" DstPort 2 } } Line { SrcBlock "Interpolation" SrcPort 3 DstBlock "Scaling" DstPort 4 } Line { SrcBlock "Interpolation" SrcPort 4 DstBlock "Scaling" DstPort 5 } Line { SrcBlock "Interpolation" SrcPort 2 Points [75, 0] Branch { Points [0, 190] DstBlock "done6" DstPort 1 } Branch { Labels [0, 0] DstBlock "Scaling" DstPort 3 } } Line { SrcBlock "Payload" SrcPort 1 Points [90, 0] Branch { DstBlock "Scaling" DstPort 1 } Branch { Points [0, 285] DstBlock "done2" DstPort 1 } } } } Block { BlockType SubSystem Name "Training_Data" SID "8119" Ports [7, 3] Position [380, 85, 490, 175] BlockMirror on NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Training_Data" Location [2, 82, 1270, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "CPn_Data" SID "8120" Position [50, 208, 80, 222] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "train_pay" SID "8121" Position [50, 248, 80, 262] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "BaseRate_En" SID "8122" Position [55, 333, 85, 347] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "FFT En" SID "8123" Position [50, 68, 80, 82] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Start" SID "8124" Position [50, 283, 80, 297] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "packet_done" SID "8125" Position [50, 158, 80, 172] NamePlacement "alternate" Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "xn_index" SID "8126" Position [50, 118, 80, 132] NamePlacement "alternate" Port "7" IconDisplay "Port number" } Block { BlockType SubSystem Name "Ant Selector" SID "8127" Ports [3, 1] Position [385, 358, 460, 402] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Ant Selector" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "BaseRate" SID "8128" Position [135, 453, 165, 467] IconDisplay "Port number" } Block { BlockType Inport Name "CP#_Data" SID "8129" Position [135, 498, 165, 512] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "8130" Position [485, 323, 515, 337] Port "3" IconDisplay "Port number" } Block { BlockType From Name "From1" SID "8131" Position [120, 407, 245, 423] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_Alamouti_Mode" TagVisibility "global" } Block { BlockType Reference Name "Inverter2" SID "8132" Ports [1, 1] Position [230, 450, 265, 470] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\n" "patch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8133" Ports [2, 1] Position [435, 448, 480, 492] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8134" Ports [2, 1] Position [320, 428, 365, 472] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Oscillator" SID "8135" Ports [2, 1] Position [555, 303, 595, 412] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Oscillator" Location [2, 82, 1184, 1016] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "rst" SID "8136" Position [260, 288, 290, 302] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "en" SID "8137" Position [260, 313, 290, 327] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Assert" SID "8138" Ports [1, 1] Position [425, 224, 465, 246] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type on type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,423" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,22,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "8139" Ports [1, 1] Position [345, 227, 375, 243] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,267846e5,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "8140" Ports [3, 1] Position [335, 259, 400, 331] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "65,72,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 72 72 0 ]);\npatch([11.975 24.98 33.98 42.98 51.98 33.98 20.975 11.975 ],[45" ".99 45.99 54.99 45.99 54.99 54.99 54.99 45.99 ],[1 1 1 ]);\npatch([20.975 33.98 24.98 11.975 20.975 ],[36.99 36." "99 45.99 45.99 36.99 ],[0.931 0.946 0.973 ]);\npatch([11.975 24.98 33.98 20.975 11.975 ],[27.99 27.99 36.99 36.9" "9 27.99 ],[1 1 1 ]);\npatch([20.975 51.98 42.98 33.98 24.98 11.975 20.975 ],[18.99 18.99 27.99 18.99 27.99 27.99" " 18.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port" "_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8141" Position [565, 288, 595, 302] IconDisplay "Port number" } Line { SrcBlock "en" SrcPort 1 DstBlock "Register" DstPort 3 } Line { SrcBlock "Inverter1" SrcPort 1 Points [-30, 0; 0, 35] DstBlock "Register" DstPort 1 } Line { SrcBlock "Assert" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 Points [110, 0] Branch { Points [0, -60] DstBlock "Assert" DstPort 1 } Branch { DstBlock "Q" DstPort 1 } } Line { SrcBlock "rst" SrcPort 1 DstBlock "Register" DstPort 2 } } } Block { BlockType SubSystem Name "negedge" SID "8142" Ports [1, 1] Position [295, 493, 335, 517] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "negedge" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "8143" Position [25, 38, 55, 52] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "8144" Ports [1, 1] Position [110, 63, 135, 87] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "8145" Ports [1, 1] Position [105, 35, 140, 55] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "8146" Ports [2, 1] Position [180, 29, 220, 91] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,62,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 62 62 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[36.55 36." "55 41.55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[31.55 31.55 36.55 3" "6.55 31.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[26.55 26.55 31.55 31.55 26.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8147" Position [270, 53, 300, 67] IconDisplay "Port number" } Line { SrcBlock "Inverter1" SrcPort 1 Points [0, 0] DstBlock "Logical3" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Inverter1" DstPort 1 } Branch { Points [0, 30] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 Points [0, 0] DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType Outport Name "Sel" SID "8148" Position [655, 353, 685, 367] IconDisplay "Port number" } Line { SrcBlock "CP#_Data" SrcPort 1 DstBlock "negedge" DstPort 1 } Line { SrcBlock "Oscillator" SrcPort 1 DstBlock "Sel" DstPort 1 } Line { SrcBlock "negedge" SrcPort 1 Points [25, 0; 0, -25] DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Rst" SrcPort 1 DstBlock "Oscillator" DstPort 1 } Line { SrcBlock "BaseRate" SrcPort 1 DstBlock "Inverter2" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [30, 0; 0, -85] DstBlock "Oscillator" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 Points [25, 0; 0, 25] DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 Points [50, 0] DstBlock "Logical1" DstPort 1 } Annotation { Name "In SISO and multiplexing modes, antenna selction should switch with\nalternate OFDM symbols during full-" "rate paylod symbols. During training\nand base rate symbols there is no need to switch.\nIn Alamouti mode, the sel" "ection switches during base-rate\nand full-rate symbols." Position [1023, 294] } } } Block { BlockType Reference Name "Convert2" SID "8149" Ports [1, 1] Position [950, 260, 980, 280] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,374,375" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('" "black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "8150" Ports [1, 1] Position [950, 200, 980, 220] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('" "black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "8151" Ports [1, 1] Position [170, 241, 200, 269] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo" "p. If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "FlexibleMod" SID "8152" Ports [6, 3] Position [510, 152, 625, 303] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "FlexibleMod" Location [2, 78, 1661, 983] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "ifft_index" SID "8153" Position [440, 363, 470, 377] IconDisplay "Port number" } Block { BlockType Inport Name "packet_done" SID "8154" Position [55, 318, 85, 332] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "vin" SID "8155" Position [440, 413, 470, 427] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "start" SID "8156" Position [155, 353, 185, 367] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "BaseRate_En" SID "8157" Position [380, 388, 410, 402] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "ant_sel" SID "8158" Position [380, 438, 410, 452] Port "6" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "8159" Ports [2, 1] Position [1045, 39, 1090, 66] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "16" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,27,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 27 27 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 27 27 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[16.33 16" ".33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[10.33 10.33 13.33 13.33 10.33 ]," "[1 1 1 ]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\b" "f{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert4" SID "8160" Ports [1, 1] Position [985, 441, 1015, 459] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this blo" "ck costs nothing." assert_type on type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "16" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" assert_rate off rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,432" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,9657e937,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Assert');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant3" SID "8161" Ports [0, 1] Position [990, 37, 1005, 53] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 12.22 " "10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 ],[0.931" " 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 11.44 9.44" " 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon" " graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'2');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Display Name "Display" SID "8162" Ports [1] Position [1595, 286, 1680, 314] ShowName off Decimation "1" Lockdown off } Block { BlockType Display Name "Display1" SID "8163" Ports [1] Position [1525, 486, 1610, 514] ShowName off Decimation "1" Lockdown off } Block { BlockType Scope Name "Encoder" SID "8164" Ports [11] Position [1750, 795, 1815, 955] Floating off Location [136, 93, 1808, 1060] Open off NumInputPorts "11" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" axes8 "%" axes9 "%" axes10 "%" axes11 "%" } TimeRange "13320 " YMin "0~-1~-1~0~-1~0~0~0~-1~100~-1" YMax "1~2~2~250~2~150~300~200~2~300~2" SaveName "ScopeData31" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Scope Name "FEC1" SID "8165" Ports [7] Position [645, 673, 710, 787] Floating off Location [6, 52, 1686, 1019] Open off NumInputPorts "7" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } TimeRange "15000" YMin "0~0~-1~-5~-1~-5~-1" YMax "2~2~2~5~2~5~2" SaveName "ScopeData32" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType From Name "From1" SID "8166" Position [15, 332, 95, 348] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReset" TagVisibility "global" } Block { BlockType From Name "From2" SID "8167" Position [985, 292, 1065, 308] ShowName off CloseFcn "tagdialog Close" GotoTag "Coding_En" TagVisibility "global" } Block { BlockType Reference Name "Gateway Out1" SID "8168" Ports [1, 1] Position [1640, 809, 1670, 821] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "start" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out10" SID "8169" Ports [1, 1] Position [535, 709, 565, 721] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "start" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out11" SID "8170" Ports [1, 1] Position [535, 724, 565, 736] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "ant_sel" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out12" SID "8171" Ports [1, 1] Position [535, 739, 565, 751] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "pkt_done" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out13" SID "8172" Ports [1, 1] Position [535, 754, 565, 766] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "nbytes" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out14" SID "8173" Ports [1, 1] Position [535, 769, 565, 781] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "payload_done" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out15" SID "8174" Ports [1, 1] Position [1640, 899, 1670, 911] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "info_data" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out16" SID "8175" Ports [1, 1] Position [1640, 914, 1670, 926] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "coding_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out17" SID "8176" Ports [1, 1] Position [1640, 929, 1670, 941] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "codeword_len" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out18" SID "8177" Ports [1, 1] Position [1640, 944, 1670, 956] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "pkt_done" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out19" SID "9377" Ports [1, 1] Position [1410, 494, 1440, 506] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Gateway Out2" SID "8178" Ports [1, 1] Position [1640, 824, 1670, 836] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "fec_rd" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out20" SID "9378" Ports [1, 1] Position [1545, 294, 1575, 306] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Gateway Out3" SID "8179" Ports [1, 1] Position [1640, 839, 1670, 851] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "fec_data" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out4" SID "8180" Ports [1, 1] Position [1640, 794, 1670, 806] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "nrst" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out5" SID "8181" Ports [1, 1] Position [1640, 854, 1670, 866] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "info_rd" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out6" SID "8182" Ports [1, 1] Position [1640, 869, 1670, 881] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "info_raddr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out7" SID "8183" Ports [1, 1] Position [1640, 884, 1670, 896] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "info_scram" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out8" SID "8184" Ports [1, 1] Position [535, 679, 565, 691] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "ifft_index" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out9" SID "8185" Ports [1, 1] Position [535, 694, 565, 706] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "vout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Inverter" SID "8186" Ports [1, 1] Position [330, 186, 380, 214] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,248" block_type "inv" block_version "10.1.3" sg_icon_stat "50,28,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 28 28 0 ]);\npatch([16.1 21.88 25.88 29.88 33.88 25.88 20.1 16.1 ],[18.44 18.44 22" ".44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([20.1 25.88 21.88 16.1 20.1 ],[14.44 14.44 18.44 18.44 14.44" " ],[0.931 0.946 0.973 ]);\npatch([16.1 21.88 25.88 20.1 16.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch(" "[20.1 33.88 29.88 25.88 21.88 16.1 20.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8187" Ports [2, 1] Position [155, 319, 185, 346] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.33 16.3" "3 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 16.33 16" ".33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 " "1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black'" ");disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "PktBuffer_CRC1" SID "8188" Ports [3, 4] Position [775, 117, 915, 188] BlockMirror on NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "PktBuffer_CRC1" Location [6, 82, 1674, 996] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "121" Block { BlockType Inport Name "Rst" SID "8189" Position [30, 413, 60, 427] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "DataOut_Addr Vin" SID "8190" Position [30, 363, 60, 377] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "DataOut_Addr" SID "8191" Position [15, 298, 45, 312] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Assert" SID "8192" Ports [1, 1] Position [855, 526, 895, 544] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,432" block_type "assert" block_version "8.2.01" sg_icon_stat "40,18,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Byte Selector" SID "8193" Ports [4, 1] Position [850, 299, 940, 356] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Byte Selector" Location [480, 85, 1044, 370] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "CRC32_en" SID "8194" Position [290, 138, 320, 152] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "ByteSel" SID "8195" Position [285, 188, 315, 202] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "CRC32" SID "8196" Position [285, 233, 315, 247] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "CRC16" SID "8197" Position [280, 473, 310, 487] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "1LSB" SID "8198" Ports [1, 1] Position [490, 422, 525, 438] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "2LSB" SID "8199" Ports [1, 1] Position [430, 187, 465, 203] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+0" SID "8200" Ports [1, 1] Position [420, 226, 465, 254] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+0 " SID "8201" Ports [1, 1] Position [415, 466, 460, 494] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+16" SID "8202" Ports [1, 1] Position [420, 316, 465, 344] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+24" SID "8203" Ports [1, 1] Position [420, 361, 465, 389] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+8" SID "8204" Ports [1, 1] Position [420, 271, 465, 299] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+8 " SID "8205" Ports [1, 1] Position [415, 516, 460, 544] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Display Name "Display" SID "8206" Ports [1] Position [675, 59, 765, 81] ShowName off Decimation "1" Lockdown off } Block { BlockType Display Name "Display1" SID "8207" Ports [1] Position [675, 84, 765, 106] ShowName off Decimation "1" Lockdown off } Block { BlockType Display Name "Display2" SID "8208" Ports [1] Position [675, 109, 765, 131] ShowName off Decimation "1" Lockdown off } Block { BlockType Display Name "Display3" SID "8209" Ports [1] Position [675, 134, 765, 156] ShowName off Decimation "1" Lockdown off } Block { BlockType Display Name "Display4" SID "8210" Ports [1] Position [635, 559, 725, 581] ShowName off Decimation "1" Lockdown off } Block { BlockType Display Name "Display5" SID "8211" Ports [1] Position [635, 584, 725, 606] ShowName off Decimation "1" Lockdown off } Block { BlockType Reference Name "Gateway Out" SID "8212" Ports [1, 1] Position [610, 63, 645, 77] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "Gateway Out1" SID "8213" Ports [1, 1] Position [610, 88, 645, 102] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "Gateway Out10" SID "8214" Ports [1, 1] Position [570, 588, 605, 602] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "Gateway Out2" SID "8215" Ports [1, 1] Position [610, 113, 645, 127] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "Gateway Out3" SID "8216" Ports [1, 1] Position [610, 138, 645, 152] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "Gateway Out4" SID "8217" Ports [1, 1] Position [945, 609, 975, 621] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out5" SID "8218" Ports [1, 1] Position [945, 624, 975, 636] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out6" SID "8219" Ports [1, 1] Position [945, 639, 975, 651] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out7" SID "8220" Ports [1, 1] Position [945, 654, 975, 666] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out8" SID "8221" Ports [1, 1] Position [945, 669, 975, 681] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out9" SID "8222" Ports [1, 1] Position [570, 563, 605, 577] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "35,14,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.964 0.964 0.964 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.964 0.964 0.964 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "Mux" SID "8223" Ports [5, 1] Position [590, 167, 620, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,236,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 33.7143 202.286 236 0 " "],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 33.7143 202.286 236 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.8" "8 10.1 6.1 ],[122.44 122.44 126.44 122.44 126.44 126.44 126.44 122.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 " "10.1 ],[118.44 118.44 122.44 122.44 118.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[114.44 1" "14.44 118.44 118.44 114.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[110.44 110.44 114.44 11" "0.44 114.44 114.44 110.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME" "NT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\n" "color('black');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_labe" "l('input',5,'d3');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "8224" Ports [3, 1] Position [590, 401, 620, 559] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,158,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 22.5714 135.429 158 0 " "],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 22.5714 135.429 158 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.8" "8 10.1 6.1 ],[83.44 83.44 87.44 83.44 87.44 87.44 87.44 83.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[" "79.44 79.44 83.44 83.44 79.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[75.44 75.44 79.44 79." "44 75.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[71.44 71.44 75.44 71.44 75.44 75.44 71.44" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_labe" "l('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "8225" Ports [3, 1] Position [810, 156, 840, 314] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,158,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 22.5714 135.429 158 0 " "],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 22.5714 135.429 158 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.8" "8 10.1 6.1 ],[83.44 83.44 87.44 83.44 87.44 87.44 87.44 83.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[" "79.44 79.44 83.44 83.44 79.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[75.44 75.44 79.44 79." "44 75.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[71.44 71.44 75.44 71.44 75.44 75.44 71.44" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_labe" "l('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "Tx CRC2" SID "8226" Ports [8] Position [1105, 598, 1140, 737] Floating off Location [5, 45, 1925, 1127] Open off NumInputPorts "8" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" axes8 "%" } TimeRange "7000" YMin "0~0~-1~0~0~-1~-1~-1" YMax "3~4000000000~1~1~300~1~1~1" SaveName "ScopeData22" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Outport Name "1 Byte Out" SID "8227" Position [935, 228, 965, 242] IconDisplay "Port number" } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Mux2" DstPort 3 } Line { SrcBlock "ByteSel" SrcPort 1 Points [45, 0] Branch { DstBlock "2LSB" DstPort 1 } Branch { Points [0, 235] Branch { DstBlock "1LSB" DstPort 1 } Branch { Points [0, 185] DstBlock "Gateway Out4" DstPort 1 } } } Line { SrcBlock "8LSB+24" SrcPort 1 Points [90, 0] Branch { DstBlock "Mux" DstPort 5 } Branch { Points [0, -230] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "8LSB+16" SrcPort 1 Points [85, 0] Branch { DstBlock "Mux" DstPort 4 } Branch { Points [0, -210] DstBlock "Gateway Out2" DstPort 1 } } Line { SrcBlock "8LSB+8" SrcPort 1 Points [80, 0] Branch { DstBlock "Mux" DstPort 3 } Branch { Points [0, -190] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "8LSB+0" SrcPort 1 Points [75, 0] Branch { DstBlock "Mux" DstPort 2 } Branch { Points [0, -170] DstBlock "Gateway Out" DstPort 1 } } Line { SrcBlock "CRC32" SrcPort 1 Points [55, 0] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 255] DstBlock "Gateway Out5" DstPort 1 } Branch { DstBlock "8LSB+24" DstPort 1 } } Branch { DstBlock "8LSB+16" DstPort 1 } } Branch { DstBlock "8LSB+8" DstPort 1 } } Branch { DstBlock "8LSB+0" DstPort 1 } } Line { SrcBlock "Gateway Out" SrcPort 1 DstBlock "Display" DstPort 1 } Line { SrcBlock "Gateway Out1" SrcPort 1 DstBlock "Display1" DstPort 1 } Line { SrcBlock "Gateway Out2" SrcPort 1 DstBlock "Display2" DstPort 1 } Line { SrcBlock "Gateway Out3" SrcPort 1 DstBlock "Display3" DstPort 1 } Line { SrcBlock "CRC16" SrcPort 1 Points [55, 0] Branch { Points [0, 50] Branch { Points [0, 115] DstBlock "Gateway Out6" DstPort 1 } Branch { DstBlock "8LSB+8 " DstPort 1 } } Branch { DstBlock "8LSB+0 " DstPort 1 } } Line { SrcBlock "8LSB+8 " SrcPort 1 Points [60, 0] Branch { DstBlock "Mux1" DstPort 3 } Branch { Points [0, 65] DstBlock "Gateway Out10" DstPort 1 } } Line { SrcBlock "8LSB+0 " SrcPort 1 Points [65, 0] Branch { DstBlock "Mux1" DstPort 2 } Branch { Points [0, 90] DstBlock "Gateway Out9" DstPort 1 } } Line { SrcBlock "1LSB" SrcPort 1 DstBlock "Mux1" DstPort 1 } Line { SrcBlock "2LSB" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 Points [160, 0; 0, -245] DstBlock "Mux2" DstPort 2 } Line { SrcBlock "Mux2" SrcPort 1 Points [20, 0] Branch { DstBlock "1 Byte Out" DstPort 1 } Branch { Points [0, 440] DstBlock "Gateway Out8" DstPort 1 } } Line { SrcBlock "CRC32_en" SrcPort 1 Points [200, 0; 0, -95; 255, 0; 0, 135] Branch { DstBlock "Mux2" DstPort 1 } Branch { Points [-20, 0; 0, 475] DstBlock "Gateway Out7" DstPort 1 } } Line { SrcBlock "Gateway Out4" SrcPort 1 DstBlock "Tx CRC2" DstPort 1 } Line { SrcBlock "Gateway Out5" SrcPort 1 DstBlock "Tx CRC2" DstPort 2 } Line { SrcBlock "Gateway Out6" SrcPort 1 DstBlock "Tx CRC2" DstPort 3 } Line { SrcBlock "Gateway Out7" SrcPort 1 DstBlock "Tx CRC2" DstPort 4 } Line { SrcBlock "Gateway Out8" SrcPort 1 DstBlock "Tx CRC2" DstPort 5 } Line { SrcBlock "Gateway Out9" SrcPort 1 DstBlock "Display4" DstPort 1 } Line { SrcBlock "Gateway Out10" SrcPort 1 DstBlock "Display5" DstPort 1 } Annotation { Position [477, 431] } } } Block { BlockType SubSystem Name "CRC Length Calc1" SID "8228" Ports [3, 5] Position [490, 181, 635, 259] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "CRC Length Calc1" Location [-54, 89, 1662, 1033] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "NumBytes" SID "8229" Position [590, 328, 620, 342] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "ByteAddr" SID "8230" Position [590, 348, 620, 362] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "8231" Position [635, 708, 665, 722] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "1LSB" SID "8232" Ports [1, 1] Position [870, 576, 905, 594] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "3LSB" SID "8233" Ports [1, 1] Position [870, 616, 905, 634] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "3" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub4" SID "8234" Ports [2, 1] Position [715, 324, 755, 366] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "14" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,42,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub5" SID "8235" Ports [2, 1] Position [715, 394, 755, 436] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "14" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,42,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "AddSub6" SID "8236" Ports [2, 1] Position [950, 614, 990, 656] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "2" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,42,2,1,white,blue,0,32e1f85f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 42 42 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[26.55 26." "55 31.55 26.55 31.55 31.55 31.55 26.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 2" "6.55 21.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[16.55 16.55 21.55 21.55 16.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[11.55 11.55 16.55 11.55 16.55 16.55 11.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "8237" Ports [0, 1] Position [720, 511, 745, 529] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant3" SID "8238" Ports [0, 1] Position [725, 371, 750, 389] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "4" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,0,1,white,blue,0,85f36853,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'4');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant5" SID "8239" Ports [0, 1] Position [725, 441, 750, 459] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'2');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant7" SID "8240" Ports [0, 1] Position [875, 636, 900, 654] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant8" SID "8241" Ports [0, 1] Position [800, 811, 825, 829] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "6" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,0,1,white,blue,0,f0403ad7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'6');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant9" SID "8242" Ports [0, 1] Position [800, 881, 825, 899] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "4" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,0,1,white,blue,0,85f36853,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'4');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "8243" Ports [1, 1] Position [830, 228, 860, 242] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "8244" Position [615, 267, 775, 283] ShowName off CloseFcn "tagdialog Close" GotoTag "regTxRx_numHeaderBytes" TagVisibility "global" } Block { BlockType From Name "From2" SID "8245" Position [420, 227, 580, 243] ShowName off CloseFcn "tagdialog Close" GotoTag "RxAutoReplyProc_ReTxCRC" TagVisibility "global" } Block { BlockType From Name "From3" SID "8246" Position [485, 397, 645, 413] ShowName off CloseFcn "tagdialog Close" GotoTag "regTxRx_numHeaderBytes" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "8247" Ports [1, 1] Position [950, 572, 990, 598] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "40,26,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 26 26 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "8248" Ports [1, 1] Position [935, 229, 975, 241] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "40,12,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 12 12 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 12 12 0 ]);\npatch([17.775 19.22 20.22 21.22 22.22 20.22 18.775 17.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([18.775 20.22 19.22 17.775 18.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.931 0.946 0.973 ]);\npatch([17.775 19.22 20.22 18.775 17.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([18.775 22.22 21.22 20.22 19.22 17.775 18.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8249" Ports [2, 1] Position [885, 274, 915, 361] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,87,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 87 87 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 87 87 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[47.44 47.4" "4 51.44 47.44 51.44 51.44 51.44 47.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[43.44 43.44 47.44 47.44 " "43.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[39.44 39.44 43.44 43.44 39.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[35.44 35.44 39.44 35.44 39.44 39.44 35.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical12" SID "8250" Ports [2, 1] Position [1010, 782, 1050, 813] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,31,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 31 31 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8251" Ports [2, 1] Position [1015, 852, 1055, 883] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,31,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 31 31 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');di" "sp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "8252" Ports [2, 1] Position [890, 424, 920, 511] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,87,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 87 87 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 87 87 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[47.44 47.4" "4 51.44 47.44 51.44 51.44 51.44 47.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[43.44 43.44 47.44 47.44 " "43.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[39.44 39.44 43.44 43.44 39.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[35.44 35.44 39.44 35.44 39.44 39.44 35.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "8253" Ports [2, 1] Position [1070, 284, 1100, 331] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,47,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 47 47 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 47 47 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[27.44 27.4" "4 31.44 27.44 31.44 31.44 31.44 27.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[23.44 23.44 27.44 27.44 " "23.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 23.44 19.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 15.44 19.44 19.44 15.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "8254" Ports [2, 1] Position [1070, 354, 1100, 401] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,47,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 47 47 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 47 47 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[27.44 27.4" "4 31.44 27.44 31.44 31.44 31.44 27.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[23.44 23.44 27.44 27.44 " "23.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 23.44 19.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 15.44 19.44 19.44 15.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "8255" Ports [3, 1] Position [1055, 506, 1085, 664] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,158,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 22.5714 135.429 158 0 " "],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 22.5714 135.429 158 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.8" "8 10.1 6.1 ],[83.44 83.44 87.44 83.44 87.44 87.44 87.44 83.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[" "79.44 79.44 83.44 83.44 79.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[75.44 75.44 79.44 79." "44 75.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[71.44 71.44 75.44 71.44 75.44 75.44 71.44" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_labe" "l('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "8256" Ports [2, 1] Position [830, 398, 860, 467] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,69,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 69 69 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 69 69 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[38.44 38.4" "4 42.44 38.44 42.44 42.44 42.44 38.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[34.44 34.44 38.44 38.44 " "34.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[30.44 30.44 34.44 34.44 30.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[26.44 26.44 30.44 26.44 30.44 30.44 26.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "8257" Ports [2, 1] Position [855, 768, 885, 837] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,69,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 69 69 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 69 69 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[38.44 38.4" "4 42.44 38.44 42.44 42.44 42.44 38.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[34.44 34.44 38.44 38.44 " "34.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[30.44 30.44 34.44 34.44 30.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[26.44 26.44 30.44 26.44 30.44 30.44 26.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "8258" Ports [2, 1] Position [830, 468, 860, 537] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,69,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 69 69 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 69 69 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[38.44 38.4" "4 42.44 38.44 42.44 42.44 42.44 38.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[34.44 34.44 38.44 38.44 " "34.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[30.44 30.44 34.44 34.44 30.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[26.44 26.44 30.44 26.44 30.44 30.44 26.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','t" "exmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "8259" Ports [2, 1] Position [825, 328, 855, 397] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a<=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,69,2,1,white,blue,0,52e4b236,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 69 69 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 69 69 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[38.44 38.4" "4 42.44 38.44 42.44 42.44 42.44 38.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[34.44 34.44 38.44 38.44 " "34.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[30.44 30.44 34.44 34.44 30.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[26.44 26.44 30.44 26.44 30.44 30.44 26.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\leq b" "','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational7" SID "8260" Ports [2, 1] Position [825, 258, 855, 327] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8MSB" SID "8273" Ports [1, 1] Position [325, 301, 370, 329] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert" SID "8274" Ports [1, 1] Position [330, 258, 365, 272] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,436" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Ass" "ert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "CRC Remainders" SID "8275" Ports [1, 1] Position [630, 309, 680, 361] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "256" initVector "CRC_Table16" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "16" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,1,1,white,blue,0,eff69a7e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'addr');\n\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "8276" Ports [2, 1] Position [610, 185, 660, 240] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,165" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,55,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 55 55 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[34.7" "7 34.77 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[27.77 27.77 " "34.77 34.77 27.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[20.77 20.77 27.77 27.77 20." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\" "fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "8277" Ports [0, 1] Position [535, 212, 560, 238] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "8278" Ports [1, 1] Position [670, 109, 710, 131] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2.01" sg_icon_stat "40,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8279" Ports [2, 1] Position [400, 295, 445, 375] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,80,2,1,white,blue,0,dc21e094,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 80 80 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 80 80 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[46.66 4" "6.66 52.66 46.66 52.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 " "46.66 40.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[34.66 34.66 40.66 40.66 34.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[28.66 28.66 34.66 28.66 34.66 34.66 28.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8280" Ports [2, 1] Position [795, 217, 840, 268] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,51,2,1,white,blue,0,dc21e094,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 51 51 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[31.66 3" "1.66 37.66 31.66 37.66 37.66 37.66 31.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[25.66 25.66 31.66 " "31.66 25.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[19.66 19.66 25.66 25.66 19.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[13.66 13.66 19.66 13.66 19.66 19.66 13.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "8281" Ports [2, 1] Position [555, 109, 585, 131] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "crc_accum" SID "8282" Ports [3, 1] Position [400, 238, 445, 292] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0*hex2dec('FFFF')" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,54,3,1,white,blue,0,30546de1,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 3" "3.66 39.66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 " "33.66 27.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "crc_capt" SID "8283" Ports [3, 1] Position [760, 73, 805, 127] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,54,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 3" "3.66 39.66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 " "33.66 27.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "16-bit CRC Capt" SID "8284" Position [975, 93, 1005, 107] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "crc_capt" DstPort 3 } Line { SrcBlock "crc_capt" SrcPort 1 DstBlock "16-bit CRC Capt" DstPort 1 } Line { SrcBlock "Capt" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "Assert" SrcPort 1 Points [-35, 0] Branch { Points [0, -65] DstBlock "8LSB" DstPort 1 } Branch { Points [0, 50] DstBlock "8MSB" DstPort 1 } } Line { SrcBlock "Vin" SrcPort 1 Points [-75, 0] Branch { Points [0, -160] DstBlock "Logical4" DstPort 2 } Branch { DstBlock "crc_accum" DstPort 3 } } Line { SrcBlock "ByteIn" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Rst" SrcPort 1 Points [-140, 0] Branch { Points [0, -165] DstBlock "crc_capt" DstPort 2 } Branch { DstBlock "crc_accum" DstPort 2 } } Line { SrcBlock "CRC Remainders" SrcPort 1 Points [185, 0; 0, -80] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Concat" SrcPort 1 Points [205, 0; 0, 15] DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "8LSB" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 Points [-295, 0] Branch { Points [0, -165] DstBlock "crc_capt" DstPort 1 } Branch { DstBlock "crc_accum" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "CRC Remainders" DstPort 1 } Line { SrcBlock "crc_accum" SrcPort 1 DstBlock "Assert" DstPort 1 } Line { SrcBlock "8MSB" SrcPort 1 DstBlock "Logical1" DstPort 1 } } } Block { BlockType SubSystem Name "CRC32 Calc" SID "8285" Ports [4, 1] Position [335, 302, 425, 363] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "CRC32 Calc" Location [202, 82, 1918, 1026] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "ByteIn" SID "8286" Position [245, 348, 275, 362] IconDisplay "Port number" } Block { BlockType Inport Name "Vin" SID "8287" Position [585, 278, 615, 292] BlockMirror on Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "8288" Position [645, 258, 675, 272] BlockMirror on Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Capt" SID "8289" Position [405, 108, 435, 122] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "24LSB" SID "8290" Ports [1, 1] Position [315, 186, 360, 214] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "24" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8MSB" SID "8291" Ports [1, 1] Position [325, 301, 370, 329] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert" SID "8292" Ports [1, 1] Position [330, 258, 365, 272] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,423" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Ass" "ert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "CRC Remainders" SID "8293" Ports [1, 1] Position [630, 309, 680, 361] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "256" initVector "CRC_Table32" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,1,1,white,blue,0,eff69a7e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'addr');\n\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "8294" Ports [2, 1] Position [610, 185, 660, 240] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,55,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 55 55 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[34.7" "7 34.77 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[27.77 27.77 " "34.77 34.77 27.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[20.77 20.77 27.77 27.77 20." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\" "fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "8295" Ports [0, 1] Position [525, 212, 550, 238] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "8296" Ports [1, 1] Position [670, 109, 710, 131] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "8.2.01" sg_icon_stat "40,22,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8297" Ports [2, 1] Position [400, 295, 445, 375] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,80,2,1,white,blue,0,dc21e094,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 80 80 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 80 80 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[46.66 4" "6.66 52.66 46.66 52.66 52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 " "46.66 40.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[34.66 34.66 40.66 40.66 34.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[28.66 28.66 34.66 28.66 34.66 34.66 28.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8298" Ports [2, 1] Position [795, 217, 840, 268] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,51,2,1,white,blue,0,dc21e094,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 51 51 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[31.66 3" "1.66 37.66 31.66 37.66 37.66 37.66 31.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[25.66 25.66 31.66 " "31.66 25.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[19.66 19.66 25.66 25.66 19.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[13.66 13.66 19.66 13.66 19.66 19.66 13.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "8299" Ports [2, 1] Position [555, 109, 585, 131] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,22,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.3" "3 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 " "14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "crc_accum" SID "8300" Ports [3, 1] Position [400, 238, 445, 292] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "hex2dec('FFFFFFFF')" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,54,3,1,white,blue,0,30546de1,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 3" "3.66 39.66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 " "33.66 27.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "crc_capt" SID "8301" Ports [3, 1] Position [760, 73, 805, 127] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,54,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 54 54 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 54 54 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[33.66 3" "3.66 39.66 33.66 39.66 39.66 39.66 33.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 " "33.66 27.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[21.66 21.66 27.66 27.66 21.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[15.66 15.66 21.66 15.66 21.66 21.66 15.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "32-bit CRC Capt" SID "8302" Position [975, 93, 1005, 107] IconDisplay "Port number" } Line { SrcBlock "8MSB" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "crc_accum" SrcPort 1 DstBlock "Assert" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "CRC Remainders" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 Points [-295, 0] Branch { DstBlock "crc_accum" DstPort 1 } Branch { Points [0, -165] DstBlock "crc_capt" DstPort 1 } } Line { SrcBlock "24LSB" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "Concat" SrcPort 1 Points [205, 0; 0, 15] DstBlock "Logical2" DstPort 1 } Line { SrcBlock "CRC Remainders" SrcPort 1 Points [185, 0; 0, -80] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Rst" SrcPort 1 Points [-140, 0] Branch { DstBlock "crc_accum" DstPort 2 } Branch { Points [0, -165] DstBlock "crc_capt" DstPort 2 } } Line { SrcBlock "ByteIn" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Vin" SrcPort 1 Points [-75, 0] Branch { DstBlock "crc_accum" DstPort 3 } Branch { Points [0, -160] DstBlock "Logical4" DstPort 2 } } Line { SrcBlock "Assert" SrcPort 1 Points [-35, 0] Branch { Points [0, -65] DstBlock "24LSB" DstPort 1 } Branch { Points [0, 50] DstBlock "8MSB" DstPort 1 } } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "Capt" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "crc_capt" SrcPort 1 DstBlock "32-bit CRC Capt" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "crc_capt" DstPort 3 } } } Block { BlockType Reference Name "Gateway Out1" SID "8303" Ports [1, 1] Position [1155, 459, 1185, 471] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "addr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out2" SID "8304" Ports [1, 1] Position [1155, 474, 1185, 486] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "vin" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out3" SID "8305" Ports [1, 1] Position [1185, 489, 1215, 501] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "rst" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out4" SID "8306" Ports [1, 1] Position [1155, 444, 1185, 456] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "data" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out5" SID "8307" Ports [1, 1] Position [1185, 504, 1215, 516] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "numBytes" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out6" SID "8308" Ports [1, 1] Position [1185, 519, 1215, 531] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "Rate" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType SubSystem Name "Header Decoding1" SID "8309" Ports [4, 2] Position [320, 87, 435, 148] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Header Decoding1" Location [-106, 206, 1610, 1067] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "TxByteAddr" SID "8310" Position [165, 207, 195, 223] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "TxByte" SID "8311" Position [540, 193, 570, 207] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "TxByteAddrVin" SID "8312" Position [450, 214, 475, 226] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "8313" Position [180, 98, 210, 112] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "4LSB" SID "8314" Ports [1, 1] Position [870, 411, 905, 429] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "4MSB" SID "8315" Ports [1, 1] Position [870, 436, 905, 454] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB" SID "8316" Ports [1, 1] Position [295, 306, 330, 324] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB+8" SID "8317" Ports [1, 1] Position [295, 391, 330, 409] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8MSB" SID "8318" Ports [1, 1] Position [295, 536, 330, 554] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert1" SID "8319" Ports [1, 1] Position [795, 301, 825, 319] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,432" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,9657e937,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert2" SID "8320" Ports [1, 1] Position [770, 496, 800, 514] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,423" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,9657e937,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From2" SID "8321" Position [15, 392, 175, 408] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_headerByteNums" TagVisibility "global" } Block { BlockType Reference Name "Logical1" SID "8322" Ports [2, 1] Position [555, 513, 580, 542] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 29 29 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[17.33 " "17.33 20.33 17.33 20.33 20.33 20.33 17.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[14.33 14.33 17.33" " 17.33 14.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[11.33 11.33 14.33 14.33 11.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[8.33 8.33 11.33 8.33 11.33 11.33 8.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8323" Ports [2, 1] Position [545, 365, 580, 400] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "8324" Ports [2, 1] Position [550, 280, 585, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22." "55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 2" "2.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "8325" Ports [3, 1] Position [670, 470, 715, 540] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "34" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,70,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 70 70 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 70 70 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[41.66 4" "1.66 47.66 41.66 47.66 47.66 47.66 41.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[35.66 35.66 41.66 " "41.66 35.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[29.66 29.66 35.66 35.66 29.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 23.66 29.66 29.66 23.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "8326" Ports [2, 1] Position [300, 203, 345, 252] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,49,2,1,white,blue,0,140cc11c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 49 49 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1," "'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Relational1" SID "8327" Ports [2, 1] Position [430, 513, 475, 557] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "8328" Ports [2, 1] Position [435, 283, 480, 327] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "8329" Ports [2, 1] Position [435, 368, 480, 412] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "numBytesUpdate" SID "8330" Ports [6, 1] Position [675, 265, 760, 350] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "numBytesUpdate" Location [-18, 232, 1579, 1176] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "rst" SID "8331" Position [90, 388, 120, 402] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "d" SID "8332" Position [145, 363, 175, 377] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "lsb_EN" SID "8333" Position [90, 523, 120, 537] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "msb_EN" SID "8334" Position [90, 413, 120, 427] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "modMask_AntA" SID "8335" Position [90, 628, 120, 642] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "modMask_AntB" SID "8336" Position [90, 668, 120, 682] Port "6" IconDisplay "Port number" } Block { BlockType Reference Name "Concat1" SID "8337" Ports [2, 1] Position [430, 427, 480, 478] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\" "fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Length Sanity\nChecking" SID "8338" Ports [3, 1] Position [725, 469, 820, 541] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Length Sanity\nChecking" Location [2, 82, 1678, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Req Len" SID "8339" Position [240, 398, 270, 412] IconDisplay "Port number" } Block { BlockType Inport Name "modMask_AntA" SID "8340" Position [395, 258, 425, 272] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "modMask_AntB" SID "8341" Position [395, 273, 425, 287] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "Concat" SID "8342" Ports [2, 1] Position [790, 350, 815, 425] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,162" block_type "concat" block_version "10.1.3" sg_icon_stat "25,75,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 75 75 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[40.33 " "40.33 43.33 40.33 43.33 43.33 43.33 40.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[37.33 37.33 40.33" " 40.33 37.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[34.33 34.33 37.33 37.33 34.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[31.33 31.33 34.33 31.33 34.33 34.33 31.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{2" "0}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat1" SID "8343" Ports [2, 1] Position [485, 256, 510, 289] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1.3" sg_icon_stat "25,33,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 33 33 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[19.33 " "19.33 22.33 19.33 22.33 22.33 22.33 19.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[16.33 16.33 19.33" " 19.33 16.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[13.33 13.33 16.33 16.33 13.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[10.33 10.33 13.33 10.33 13.33 13.33 10.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{2" "0}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "8344" Ports [0, 1] Position [415, 411, 460, 429] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "RAM_init_size-16" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(RAM_init_size+1))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,414,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,18,0,1,white,blue,0,b0afa05f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 18 18 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_la" "bel('output',1,'16368');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant2" SID "8345" Ports [0, 1] Position [485, 231, 505, 249] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 18 18 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[11.22 11." "22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From3" SID "8346" Position [175, 352, 335, 368] ShowName off CloseFcn "tagdialog Close" GotoTag "regTxRx_numHeaderBytes" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "8347" Ports [1, 1] Position [670, 388, 695, 402] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "25,14,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 14 14 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[9.22 9.2" "2 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[7.22 7.22 9.22 9.22 7.22 " "],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([9.5" "5 16.44 14.44 12.44 10.44 7.55 9.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf" "('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8348" Ports [2, 1] Position [720, 342, 750, 378] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,36,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 36 36 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[22.44 22.4" "4 26.44 22.44 26.44 26.44 26.44 22.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[18.44 18.44 22.44 22.44 " "18.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[14.44 14.44 18.44 18.44 14.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[10.44 10.44 14.44 10.44 14.44 14.44 10.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "8349" Ports [2, 1] Position [720, 387, 750, 423] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,36,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 36 36 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[22.44 22.4" "4 26.44 22.44 26.44 26.44 26.44 22.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[18.44 18.44 22.44 22.44 " "18.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[14.44 14.44 18.44 18.44 14.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[10.44 10.44 14.44 10.44 14.44 14.44 10.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "8350" Ports [4, 1] Position [880, 364, 905, 551] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,187,4,1,white,blue,3,58b3489d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 26.7143 160.286 187 0 " "],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 26.7143 160.286 187 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12." "66 8.325 5.325 ],[96.33 96.33 99.33 96.33 99.33 99.33 99.33 96.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8." "325 ],[93.33 93.33 96.33 96.33 93.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[90.33 90.3" "3 93.33 93.33 90.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[87.33 87.33 90.33 87.33 90." "33 90.33 87.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i" "con text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('bla" "ck');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\n\ncolor('black');disp('\\bf{}','te" "xmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Relational1" SID "8351" Ports [2, 1] Position [560, 396, 605, 429] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,33,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 33 33 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b'," "'texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "8352" Ports [2, 1] Position [560, 351, 605, 384] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,33,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 33 33 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 33 33 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b'," "'texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "8353" Ports [2, 1] Position [565, 243, 610, 287] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Len" SID "8354" Position [990, 453, 1020, 467] IconDisplay "Port number" } Line { SrcBlock "Req Len" SrcPort 1 Points [250, 0] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 30] DstBlock "Mux1" DstPort 2 } Branch { Points [0, -30] DstBlock "Relational2" DstPort 2 } } Line { SrcBlock "Constant1" SrcPort 1 Points [55, 0] Branch { Points [0, 60] DstBlock "Mux1" DstPort 3 } Branch { DstBlock "Relational1" DstPort 2 } } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Len" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 Points [175, 0] Branch { Points [0, 165] DstBlock "Mux1" DstPort 4 } Branch { DstBlock "Relational2" DstPort 1 } } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Mux1" DstPort 1 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "modMask_AntA" SrcPort 1 DstBlock "Concat1" DstPort 1 } Line { SrcBlock "modMask_AntB" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 Points [20, 0; 0, 15] DstBlock "Relational3" DstPort 1 } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [0, 10] DstBlock "Concat" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 Points [40, 0; 0, 85] Branch { DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } } } Block { BlockType Reference Name "Logical4" SID "8355" Ports [2, 1] Position [525, 257, 555, 328] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,71,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 71 71 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 71 71 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[39.44 39.4" "4 43.44 39.44 43.44 43.44 43.44 39.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[35.44 35.44 39.44 39.44 " "35.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[31.44 31.44 35.44 35.44 31.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[27.44 27.44 31.44 27.44 31.44 31.44 27.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge" SID "8356" Ports [1, 1] Position [559, 375, 581, 410] BlockRotation 270 BlockMirror on NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge" Location [202, 70, 1799, 1056] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "8357" Position [35, 33, 65, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Inverter" SID "8358" Ports [1, 1] Position [110, 49, 150, 71] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,22,1,1,white,blue,0,e69ac283,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 22 22 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\nnot');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Reference Name "Logical" SID "8359" Ports [2, 1] Position [205, 28, 250, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8360" Position [275, 43, 305, 57] IconDisplay "Port number" } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 20] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType Reference Name "Register4" SID "8361" Ports [3, 1] Position [330, 360, 375, 430] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,70,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 70 70 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 70 70 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[41.66 4" "1.66 47.66 41.66 47.66 47.66 47.66 41.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[35.66 35.66 41.66 " "41.66 35.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[29.66 29.66 35.66 35.66 29.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 23.66 29.66 29.66 23.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register5" SID "8362" Ports [3, 1] Position [330, 470, 375, 540] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "100" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,70,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 70 70 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 70 70 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[41.66 4" "1.66 47.66 41.66 47.66 47.66 47.66 41.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[35.66 35.66 41.66 " "41.66 35.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[29.66 29.66 35.66 35.66 29.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 23.66 29.66 29.66 23.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register6" SID "8363" Ports [3, 1] Position [610, 445, 655, 515] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "100" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,70,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 70 70 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 70 70 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[41.66 4" "1.66 47.66 41.66 47.66 47.66 47.66 41.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[35.66 35.66 41.66 " "41.66 35.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[29.66 29.66 35.66 35.66 29.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 23.66 29.66 29.66 23.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType SubSystem Name "SR Latch " SID "8364" Ports [2, 1] Position [430, 257, 475, 288] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch " Location [-179, 208, 1418, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "8365" Position [125, 223, 155, 237] IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "8366" Position [170, 243, 200, 257] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "8367" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "8368" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8369" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } } } Block { BlockType SubSystem Name "SR Latch 1" SID "8370" Ports [2, 1] Position [430, 292, 475, 323] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch 1" Location [-170, 164, 1427, 1108] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "8371" Position [125, 223, 155, 237] IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "8372" Position [170, 243, 200, 257] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant4" SID "8373" Ports [0, 1] Position [175, 202, 195, 218] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 16 16 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[10.22 10." "22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([" "7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'" "1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "8374" Ports [3, 1] Position [260, 200, 300, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[5 10 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,60,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 60 60 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[35.55 35." "55 40.55 35.55 40.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[30.55 30.55 35.55 3" "5.55 30.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[25.55 25.55 30.55 30.55 25.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 20.55 25.55 25.55 20.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8375" Position [370, 223, 400, 237] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Register1" DstPort 1 } } } Block { BlockType Outport Name "numBytes" SID "8376" Position [975, 498, 1005, 512] IconDisplay "Port number" } Line { SrcBlock "d" SrcPort 1 Points [10, 0] Branch { DstBlock "Register4" DstPort 1 } Branch { Points [0, 110] DstBlock "Register5" DstPort 1 } } Line { SrcBlock "rst" SrcPort 1 Points [10, 0] Branch { Points [160, 0] Branch { DstBlock "Register4" DstPort 2 } Branch { Points [0, 110] Branch { DstBlock "Register5" DstPort 2 } Branch { Points [0, 50; 255, 0; 0, -75] DstBlock "Register6" DstPort 2 } } } Branch { Points [0, -130; 270, 0] Branch { DstBlock "SR Latch " DstPort 1 } Branch { Points [0, 35] DstBlock "SR Latch 1" DstPort 1 } } } Line { SrcBlock "lsb_EN" SrcPort 1 Points [140, 0] Branch { DstBlock "Register5" DstPort 3 } Branch { Points [0, -215] DstBlock "SR Latch 1" DstPort 2 } } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "Register6" DstPort 1 } Line { SrcBlock "Register4" SrcPort 1 Points [15, 0; 0, 45] DstBlock "Concat1" DstPort 1 } Line { SrcBlock "Register5" SrcPort 1 Points [15, 0; 0, -40] DstBlock "Concat1" DstPort 2 } Line { SrcBlock "msb_EN" SrcPort 1 Points [130, 0] Branch { DstBlock "Register4" DstPort 3 } Branch { Points [0, -140] DstBlock "SR Latch " DstPort 2 } } Line { SrcBlock "SR Latch " SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "SR Latch 1" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 Points [10, 0] DstBlock "Posedge" DstPort 1 } Line { SrcBlock "Posedge" SrcPort 1 Points [0, 90] DstBlock "Register6" DstPort 3 } Line { SrcBlock "Length Sanity\nChecking" SrcPort 1 DstBlock "numBytes" DstPort 1 } Line { Labels [0, 0] SrcBlock "Register6" SrcPort 1 DstBlock "Length Sanity\nChecking" DstPort 1 } Line { SrcBlock "modMask_AntA" SrcPort 1 Points [545, 0; 0, -130] DstBlock "Length Sanity\nChecking" DstPort 2 } Line { SrcBlock "modMask_AntB" SrcPort 1 Points [555, 0; 0, -145] DstBlock "Length Sanity\nChecking" DstPort 3 } Annotation { Name "This register has an initial value of 100,\nwhich will let the Rx process 100 bytes should\nsomething" " go very wrong in decoding the\nheader. A default value of 0 will break\nthe Rx state machine!" Position [725, 402] } } } Block { BlockType Outport Name "numBytes" SID "8377" Position [895, 303, 925, 317] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "modMask" SID "8378" Position [910, 498, 940, 512] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "8LSB+8" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "8LSB" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Rst" SrcPort 1 Points [40, 0] Branch { Points [370, 0; 0, 165] Branch { Points [0, 235] DstBlock "Register1" DstPort 2 } Branch { DstBlock "numBytesUpdate" DstPort 1 } } Branch { Points [0, 135] DstBlock "Register2" DstPort 2 } } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "numBytesUpdate" DstPort 3 } Line { SrcBlock "Logical2" SrcPort 1 Points [25, 0; 0, -70] DstBlock "numBytesUpdate" DstPort 4 } Line { SrcBlock "numBytesUpdate" SrcPort 1 DstBlock "Assert1" DstPort 1 } Line { SrcBlock "Assert1" SrcPort 1 DstBlock "numBytes" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 Points [0, 0; 55, 0] Branch { Points [0, 0] Branch { DstBlock "8LSB+8" DstPort 1 } Branch { Points [0, -85] DstBlock "8LSB" DstPort 1 } } Branch { Points [0, 145] DstBlock "8MSB" DstPort 1 } } Line { SrcBlock "TxByteAddrVin" SrcPort 1 Points [30, 0; 0, 70] Branch { DstBlock "Logical4" DstPort 1 } Branch { Points [0, 85] Branch { Points [0, 145] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Logical2" DstPort 1 } } } Line { SrcBlock "TxByte" SrcPort 1 Points [40, 0; 0, 85] Branch { DstBlock "numBytesUpdate" DstPort 2 } Branch { Points [0, 195] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 Points [50, 0; 0, 65] Branch { DstBlock "Relational2" DstPort 1 } Branch { Points [0, 85] Branch { DstBlock "Relational3" DstPort 1 } Branch { Points [0, 145] DstBlock "Relational1" DstPort 1 } } } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [0, 0] DstBlock "Register1" DstPort 3 } Line { SrcBlock "8MSB" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Assert2" DstPort 1 } Line { SrcBlock "Assert2" SrcPort 1 Points [40, 0] Branch { DstBlock "modMask" DstPort 1 } Branch { Points [0, -60] Branch { Points [0, -25] DstBlock "4LSB" DstPort 1 } Branch { DstBlock "4MSB" DstPort 1 } } } Line { SrcBlock "4LSB" SrcPort 1 Points [35, 0; 0, -50; -300, 0; 0, -25] DstBlock "numBytesUpdate" DstPort 6 } Line { SrcBlock "4MSB" SrcPort 1 Points [30, 0; 0, -65; -300, 0; 0, -50] DstBlock "numBytesUpdate" DstPort 5 } Line { SrcBlock "TxByteAddr" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType Reference Name "Logical8" SID "8379" Ports [2, 1] Position [720, 183, 755, 212] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,29,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 29 29 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "8380" Ports [3, 1] Position [1000, 231, 1030, 349] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,306" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,118,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 16.8571 101.143 118 0 " "],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 16.8571 101.143 118 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.8" "8 10.1 6.1 ],[63.44 63.44 67.44 63.44 67.44 67.44 67.44 63.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[" "59.44 59.44 63.44 63.44 59.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[55.44 55.44 59.44 59." "44 55.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[51.44 51.44 55.44 51.44 55.44 55.44 51.44" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_labe" "l('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Packet Buffer" SID "8381" Ports [1, 1] Position [110, 283, 215, 327] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Packet Buffer" Location [2, 82, 1661, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "TxByteAddr" SID "8382" Position [90, 508, 120, 522] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "1LSB" SID "8383" Ports [1, 1] Position [285, 726, 325, 744] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB" SID "8384" Ports [1, 1] Position [1070, 651, 1110, 669] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "AutoTx\nHeader Translation" SID "8385" Ports [1, 2] Position [255, 489, 360, 536] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AutoTx\nHeader Translation" Location [2, 78, 1678, 1000] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "ByteAddr" SID "8386" Position [300, 393, 330, 407] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "5LSB" SID "8387" Ports [1, 1] Position [860, 466, 900, 484] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,460,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "5LSB1" SID "8388" Ports [1, 1] Position [510, 446, 550, 464] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "5LSB2" SID "8389" Ports [1, 1] Position [510, 421, 550, 439] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "5MSB" SID "8390" Ports [1, 1] Position [860, 601, 900, 619] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "8391" Ports [2, 1] Position [580, 418, 610, 467] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1.3" sg_icon_stat "30,49,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 49 49 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[28.44 28.4" "4 32.44 28.44 32.44 32.44 32.44 28.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[24.44 24.44 28.44 28.44 " "24.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[20.44 20.44 24.44 24.44 20.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 16.44 20.44 20.44 16.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmod" "e','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "8392" Ports [0, 1] Position [650, 463, 670, 487] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "10" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "20,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('o" "utput',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "8393" Ports [0, 1] Position [650, 493, 670, 517] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "10" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "20,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 24 24 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[14.22 14." "22 16.22 14.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[12.22 12.22 14.22 14.22" " 12.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('o" "utput',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "8394" Ports [1, 1] Position [735, 386, 770, 414] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "8395" Ports [1, 1] Position [740, 216, 775, 244] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From2" SID "8396" Position [270, 285, 415, 305] ShowName off CloseFcn "tagdialog Close" GotoTag "RxAutoReplyProc_UseTrans" TagVisibility "global" } Block { BlockType From Name "From4" SID "8397" Position [190, 421, 410, 439] ShowName off CloseFcn "tagdialog Close" GotoTag "RxAutoReply_Action_BufNum" TagVisibility "global" } Block { BlockType From Name "From5" SID "8398" Position [265, 312, 425, 328] ShowName off CloseFcn "tagdialog Close" GotoTag "regTxRx_numHeaderBytes" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "8399" Position [975, 583, 1185, 597] ShowName off GotoTag "RxAutoReply_TransHdr_BufOveride" TagVisibility "global" } Block { BlockType Goto Name "Goto31" SID "8400" Position [975, 603, 1185, 617] ShowName off GotoTag "RxAutoReply_TransHdr_BufNum" TagVisibility "global" } Block { BlockType Reference Name "Logical1" SID "8401" Ports [2, 1] Position [740, 275, 780, 350] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,75,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 75 75 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[42.55 42." "55 47.55 42.55 47.55 47.55 47.55 42.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[37.55 37.55 42.55 4" "2.55 37.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[32.55 32.55 37.55 37.55 32.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[27.55 27.55 32.55 27.55 32.55 32.55 27.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "8402" Ports [3, 1] Position [995, 399, 1025, 491] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "8.2.02" sg_icon_stat "30,92,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.1429 78.8571 92 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.1429 78.8571 92 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[50.44 50.44 54.44 50.44 54.44 54.44 54.44 50.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[46" ".44 46.44 50.44 50.44 46.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[42.44 42.44 46.44 46.44" " 42.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[38.44 38.44 42.44 38.44 42.44 42.44 38.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "8403" Ports [2, 1] Position [515, 309, 565, 351] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,42,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 42 42 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 42 42 0 ]);\npatch([11.65 20.32 26.32 32.32 38.32 26.32 17.65 11.65 ],[27.66" " 27.66 33.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([17.65 26.32 20.32 11.65 17.65 ],[21.66 21.66 27." "66 27.66 21.66 ],[0.931 0.946 0.973 ]);\npatch([11.65 20.32 26.32 17.65 11.65 ],[15.66 15.66 21.66 21.66 15.66 ]" ",[1 1 1 ]);\npatch([17.65 38.32 32.32 26.32 20.32 11.65 17.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1," "'\\bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shared Memory" SID "8404" Ports [3, 1] Position [715, 430, 795, 520] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shared Memory" SourceType "Xilinx Shared Memory Random Access Memory Block" shared_memory_name "'TxHeaderTranslate'" depth "32 * 32 %numBytes * numBuffs" ownership "Locally Owned and Initialized" initVector "2^5 + mod([0:1023],32)" en off mutex "Unprotected" mode "Read and Write" write_mode "Read After Write" time_out "0" latency "1" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "5+5" bin_pt "0" preci_type "Single" xl_use_area off xl_area "[0,0,0,0,0,0,0]" implementation "Block RAM" use_rpm "off" has_advanced_control "0" sggui_pos "20,20,384,381" block_type "shmem" block_version "10.1.3" sg_icon_stat "80,90,3,1,white,blue,0,bf435243,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 90 90 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[57" ".21 57.21 68.21 57.21 68.21 68.21 68.21 57.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[46.21 46." "21 57.21 57.21 46.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[35.21 35.21 46.21 46.2" "1 35.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[24.21 24.21 35.21 24.21 35.21 35.21" " 24.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');p" "ort_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name " ByteAddr" SID "8405" Position [1115, 438, 1145, 452] IconDisplay "Port number" } Block { BlockType Outport Name "Header" SID "8406" Position [1115, 223, 1145, 237] Port "2" IconDisplay "Port number" } Line { SrcBlock "Shared Memory" SrcPort 1 Points [25, 0] Branch { DstBlock "5LSB" DstPort 1 } Branch { Points [0, 135] DstBlock "5MSB" DstPort 1 } } Line { SrcBlock "From5" SrcPort 1 DstBlock "Relational3" DstPort 1 } Line { SrcBlock "5LSB1" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Shared Memory" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Shared Memory" DstPort 3 } Line { SrcBlock "Relational3" SrcPort 1 Points [25, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -100] DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 Points [145, 0; 0, 100] Branch { DstBlock "Mux2" DstPort 1 } Branch { Points [0, 175] DstBlock "Goto1" DstPort 1 } } Line { SrcBlock "5LSB" SrcPort 1 DstBlock "Mux2" DstPort 3 } Line { SrcBlock "Delay" SrcPort 1 Points [100, 0; 0, 45] DstBlock "Mux2" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 DstBlock " ByteAddr" DstPort 1 } Line { SrcBlock "5MSB" SrcPort 1 DstBlock "Goto31" DstPort 1 } Line { SrcBlock "ByteAddr" SrcPort 1 Points [150, 0] Branch { DstBlock "Delay" DstPort 1 } Branch { Points [0, -60] DstBlock "Relational3" DstPort 2 } Branch { Points [0, 55] DstBlock "5LSB1" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Header" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "5LSB2" DstPort 1 } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Shared Memory" DstPort 1 } Line { SrcBlock "5LSB2" SrcPort 1 DstBlock "Concat" DstPort 1 } } } Block { BlockType Reference Name "Convert" SID "8407" Ports [1, 1] Position [660, 573, 690, 587] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "8408" Ports [1, 1] Position [660, 593, 690, 607] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "8409" Ports [1, 1] Position [660, 613, 690, 627] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "8410" Ports [1, 1] Position [660, 633, 690, 647] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "8411" Ports [1, 1] Position [960, 596, 995, 624] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "8412" Ports [1, 1] Position [965, 726, 1000, 754] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay3" SID "8413" Ports [1, 1] Position [375, 746, 410, 774] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay4" SID "8414" Ports [1, 1] Position [720, 736, 755, 764] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay5" SID "8415" Ports [1, 1] Position [275, 811, 310, 839] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay6" SID "8416" Ports [1, 1] Position [720, 811, 755, 839] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "8417" Ports [1, 1] Position [495, 612, 525, 628] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,303" block_type "dsamp" block_version "8.2.02" sg_icon_stat "30,16,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "8418" Ports [1, 1] Position [495, 632, 525, 648] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,303" block_type "dsamp" block_version "8.2.02" sg_icon_stat "30,16,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmo" "de','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "8419" Position [440, 461, 590, 479] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_FlexBERMode" TagVisibility "global" } Block { BlockType From Name "From2" SID "8420" Position [350, 590, 550, 610] ShowName off CloseFcn "tagdialog Close" GotoTag "regTx_RandomPayload" TagVisibility "global" } Block { BlockType From Name "From3" SID "8421" Position [410, 520, 610, 540] ShowName off CloseFcn "tagdialog Close" GotoTag "FlexBER_BRAM_Rx_ByteWrAddr" TagVisibility "global" } Block { BlockType From Name "From4" SID "8422" Position [250, 631, 445, 649] ShowName off CloseFcn "tagdialog Close" GotoTag "RxAutoReply_ExtTxEn" TagVisibility "global" } Block { BlockType From Name "From5" SID "8423" Position [250, 611, 445, 629] ShowName off CloseFcn "tagdialog Close" GotoTag "RxAutoReply_AutoTx" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "8424" Position [1225, 730, 1415, 750] ShowName off GotoTag "Tx_RandomPayloadByte_valid" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "8425" Position [1225, 815, 1415, 835] ShowName off GotoTag "Tx_RandomPayloadByte_addr" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "8426" Position [1225, 680, 1415, 700] ShowName off GotoTag "Tx_RandomPayloadByte" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "8427" Ports [1, 1] Position [590, 614, 630, 626] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "40,12,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 12 12 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 12 12 0 ]);\npatch([17.775 19.22 20.22 21.22 22.22 20.22 18.775 17.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([18.775 20.22 19.22 17.775 18.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.931 0.946 0.973 ]);\npatch([17.775 19.22 20.22 18.775 17.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([18.775 22.22 21.22 20.22 19.22 17.775 18.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "8428" Ports [1, 1] Position [560, 574, 600, 586] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "40,12,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 12 12 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 12 12 0 ]);\npatch([17.775 19.22 20.22 21.22 22.22 20.22 18.775 17.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([18.775 20.22 19.22 17.775 18.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.931 0.946 0.973 ]);\npatch([17.775 19.22 20.22 18.775 17.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([18.775 22.22 21.22 20.22 19.22 17.775 18.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "8429" Ports [1, 1] Position [590, 634, 630, 646] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "40,12,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 12 12 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 12 12 0 ]);\npatch([17.775 19.22 20.22 21.22 22.22 20.22 18.775 17.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([18.775 20.22 19.22 17.775 18.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.931 0.946 0.973 ]);\npatch([17.775 19.22 20.22 18.775 17.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([18.775 22.22 21.22 20.22 19.22 17.775 18.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.931 0.946 0.9" "73 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');d" "isp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "LFSR" SID "8430" Ports [1, 1] Position [955, 638, 1010, 682] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/LFSR" SourceType "Xilinx Linear Feedback Shift Register Block" lfsr_type "Fibonacci" gate_type "XOR" n_bits "12" polynomial "dec2hex(2^11+2^8+2^6+2^0)" rst_value "'1'" rst off en on reloadable_seed off input_type off output_type on arith_type "Unsigned" bin_pt "0" dbl_ovrd off explicit_period off period "1" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,412" block_type "lfsr" block_version "10.1.3" sg_icon_stat "55,44,1,1,white,blue,0,66316410,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 44 44 0 ]);\npatch([13.65 22.32 28.32 34.32 40.32 28.32 19.65 13.65 ],[28.66" " 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([19.65 28.32 22.32 13.65 19.65 ],[22.66 22.66 28." "66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([13.65 22.32 28.32 19.65 13.65 ],[16.66 16.66 22.66 22.66 16.66 ]" ",[1 1 1 ]);\npatch([19.65 40.32 34.32 28.32 22.32 13.65 19.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end ico" "n text');" } Block { BlockType Reference Name "Logical1" SID "8431" Ports [4, 1] Position [740, 572, 780, 648] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,76,4,1,white,blue,0,50b60d37,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 76 76 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 76 76 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[43.55 43." "55 48.55 43.55 48.55 48.55 48.55 43.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[38.55 38.55 43.55 4" "3.55 38.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[33.55 33.55 38.55 38.55 33.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[28.55 28.55 33.55 28.55 33.55 33.55 28.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\ncolo" "r('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8432" Ports [2, 1] Position [470, 724, 510, 771] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,47,2,1,white,blue,0,dc21e094,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 47 47 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 47 47 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[28.55 28." "55 33.55 28.55 33.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[23.55 23.55 28.55 2" "8.55 23.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[18.55 18.55 23.55 23.55 18.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[13.55 13.55 18.55 13.55 18.55 18.55 13.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "8433" Ports [2, 1] Position [835, 722, 875, 758] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,36,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "8434" Ports [3, 1] Position [660, 454, 690, 546] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "8.2.02" sg_icon_stat "30,92,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.1429 78.8571 92 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.1429 78.8571 92 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[50.44 50.44 54.44 50.44 54.44 54.44 54.44 50.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[46" ".44 46.44 50.44 50.44 46.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[42.44 42.44 46.44 46.44" " 42.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[38.44 38.44 42.44 38.44 42.44 42.44 38.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "8435" Ports [3, 1] Position [1185, 444, 1215, 536] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "8.2.02" sg_icon_stat "30,92,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 13.1429 78.8571 92 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 13.1429 78.8571 92 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 " "10.1 6.1 ],[50.44 50.44 54.44 50.44 54.44 54.44 54.44 50.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[46" ".44 46.44 50.44 50.44 46.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[42.44 42.44 46.44 46.44" " 42.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[38.44 38.44 42.44 38.44 42.44 42.44 38.44 ]" ",[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label(" "'input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Pkt Buf IF" SID "8436" Ports [1, 1] Position [930, 463, 1035, 517] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Pkt Buf IF" Location [2, 82, 1678, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "ByteAddr" SID "8437" Position [50, 268, 80, 282] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "3LSB" SID "8438" Ports [1, 1] Position [700, 265, 745, 285] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "3" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "45,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte0" SID "8439" Ports [1, 1] Position [700, 546, 740, 564] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte1" SID "8440" Ports [1, 1] Position [700, 511, 740, 529] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte2" SID "8441" Ports [1, 1] Position [700, 476, 740, 494] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte3" SID "8442" Ports [1, 1] Position [700, 441, 740, 459] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte4" SID "8443" Ports [1, 1] Position [700, 406, 740, 424] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "32" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte5" SID "8444" Ports [1, 1] Position [700, 371, 740, 389] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "40" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte6" SID "8445" Ports [1, 1] Position [700, 336, 740, 354] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "48" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte7" SID "8446" Ports [1, 1] Position [700, 301, 740, 319] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "56" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "8447" Ports [1, 1] Position [1040, 399, 1075, 431] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,303" block_type "dsamp" block_version "8.2.02" sg_icon_stat "35,32,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 32 32 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From4" SID "8448" Position [445, 300, 590, 320] ShowName off CloseFcn "tagdialog Close" GotoTag "BRAM_Tx_DIn" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "8449" Position [260, 300, 405, 320] ShowName off GotoTag "BRAM_Tx_RdAddr" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "8450" Position [1125, 445, 1315, 465] ShowName off GotoTag "FlexBER_TxPktBuffBtyte_HW" TagVisibility "global" } Block { BlockType Reference Name "MSB" SID "8451" Ports [1, 1] Position [140, 300, 185, 320] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "log2(max_numBytes)-3" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "45,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux" SID "8452" Ports [9, 1] Position [940, 254, 970, 576] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "8" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "8.2.02" sg_icon_stat "30,322,9,1,white,blue,3,9717d9a5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 46 276 322 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 46 276 322 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[165." "44 165.44 169.44 165.44 169.44 169.44 169.44 165.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[161.44 161" ".44 165.44 165.44 161.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[157.44 157.44 161.44 161.4" "4 157.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[153.44 153.44 157.44 153.44 157.44 157.44" " 153.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon tex" "t');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');po" "rt_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input',5,'d3')" ";\ncolor('black');port_label('input',6,'d4');\ncolor('black');port_label('input',7,'d5');\ncolor('black');port_l" "abel('input',8,'d6');\ncolor('black');port_label('input',9,'d7');\n\ncolor('black');disp('\\bf{}','texmode','on'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "8453" Ports [1, 1] Position [820, 259, 860, 291] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "8.2.02" sg_icon_stat "40,32,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 32 32 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Outport Name "ByteOut" SID "8454" Position [1185, 408, 1215, 422] IconDisplay "Port number" } Line { SrcBlock "3LSB" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Byte7" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Byte6" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Byte5" SrcPort 1 DstBlock "Mux" DstPort 4 } Line { SrcBlock "Byte4" SrcPort 1 DstBlock "Mux" DstPort 5 } Line { SrcBlock "Byte3" SrcPort 1 DstBlock "Mux" DstPort 6 } Line { SrcBlock "Byte2" SrcPort 1 DstBlock "Mux" DstPort 7 } Line { SrcBlock "Byte1" SrcPort 1 DstBlock "Mux" DstPort 8 } Line { SrcBlock "Byte0" SrcPort 1 DstBlock "Mux" DstPort 9 } Line { SrcBlock "From4" SrcPort 1 Points [45, 0] Branch { Points [0, 35] Branch { Points [0, 35] Branch { Points [0, 35] Branch { Points [0, 35] Branch { Points [0, 35] Branch { Points [0, 35] Branch { DstBlock "Byte1" DstPort 1 } Branch { Points [0, 35] DstBlock "Byte0" DstPort 1 } } Branch { DstBlock "Byte2" DstPort 1 } } Branch { DstBlock "Byte3" DstPort 1 } } Branch { DstBlock "Byte4" DstPort 1 } } Branch { DstBlock "Byte5" DstPort 1 } } Branch { DstBlock "Byte6" DstPort 1 } } Branch { DstBlock "Byte7" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "MSB" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 Points [20, 0] Branch { Points [0, 40] DstBlock "Goto3" DstPort 1 } Branch { DstBlock "ByteOut" DstPort 1 } } Line { SrcBlock "ByteAddr" SrcPort 1 Points [30, 0] Branch { Points [0, 35] DstBlock "MSB" DstPort 1 } Branch { DstBlock "3LSB" DstPort 1 } } Line { SrcBlock "Register" SrcPort 1 DstBlock "Mux" DstPort 1 } Annotation { Name "The Tx control block requests a byte address. The actual Pkt\nis 64-bits wide (8 bytes). This block s" "lices off the top 8MSB\nas the 64-bit word address, then selects the correct byte\nfrom the 8 that are returned." " The BRAM read takes 1 cycle." Position [286, 233] } } } Block { BlockType Reference Name "Simulation Multiplexer" SID "8455" Ports [2, 1] Position [760, 462, 810, 513] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specified" " For Simulation will be used during Simulink simulation. The input specified For Generation will be used during" " code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or ModelSim" " subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "20,20,336,197" block_type "simmux" block_version "10.1.3" sg_icon_stat "50,51,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n" "\n\nfprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\nplot(swLineX" ",hwSwLineY);\n" } Block { BlockType Scope Name "Tx Pkt Buf" SID "8456" Ports [8] Position [1485, 246, 1530, 359] NamePlacement "alternate" Floating off Location [5, 50, 1915, 867] Open off NumInputPorts "8" ZoomMode "yonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" axes8 "%" } TimeRange "8000" YMin "0~0~0~0~0~0~0~0" YMax "80~80~200~300~1~1~80~1" SaveName "ScopeData16" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "Up Sample7" SID "8457" Ports [1, 1] Position [585, 487, 610, 513] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.<" "P>

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux a" "nd single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "8.2.02" sg_icon_stat "25,26,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "done1" SID "8458" Ports [1, 1] Position [1405, 305, 1440, 315] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "8459" Ports [1, 1] Position [1405, 320, 1440, 330] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done3" SID "8460" Ports [1, 1] Position [1405, 275, 1440, 285] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "8461" Ports [1, 1] Position [1405, 245, 1440, 255] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "8462" Ports [1, 1] Position [1405, 260, 1440, 270] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done6" SID "8463" Ports [1, 1] Position [1405, 290, 1440, 300] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done7" SID "8464" Ports [1, 1] Position [1405, 335, 1440, 345] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Outport Name "ByteOut" SID "8465" Position [1275, 483, 1305, 497] IconDisplay "Port number" } Line { SrcBlock "From1" SrcPort 1 DstBlock "Mux1" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Simulation Multiplexer" DstPort 2 } Line { SrcBlock "Up Sample7" SrcPort 1 Points [15, 0] Branch { DstBlock "Mux1" DstPort 2 } Branch { Points [0, -70; 95, 0; 0, 45] DstBlock "Simulation Multiplexer" DstPort 1 } } Line { SrcBlock "AutoTx\nHeader Translation" SrcPort 1 Points [40, 0] Branch { DstBlock "Up Sample7" DstPort 1 } Branch { Points [0, -235] DstBlock "done5" DstPort 1 } } Line { Labels [0, 0] SrcBlock "Simulation Multiplexer" SrcPort 1 DstBlock "Pkt Buf IF" DstPort 1 } Line { SrcBlock "Pkt Buf IF" SrcPort 1 Points [45, 0] Branch { DstBlock "Mux2" DstPort 2 } Branch { Points [0, -210] DstBlock "done3" DstPort 1 } } Line { Labels [0, 0] SrcBlock "TxByteAddr" SrcPort 1 Points [20, 0] Branch { DstBlock "AutoTx\nHeader Translation" DstPort 1 } Branch { Points [0, -265] DstBlock "done4" DstPort 1 } Branch { Points [0, 220] Branch { DstBlock "1LSB" DstPort 1 } Branch { Points [0, 90] DstBlock "Delay5" DstPort 1 } } } Line { SrcBlock "AutoTx\nHeader Translation" SrcPort 2 Points [25, 0; 0, 55] DstBlock "Inverter2" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Delay" DstPort 1 } Branch { Points [0, 120] DstBlock "Logical3" DstPort 1 } } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "ByteOut" DstPort 1 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "LFSR" SrcPort 1 DstBlock "8LSB" DstPort 1 } Line { SrcBlock "8LSB" SrcPort 1 Points [45, 0] Branch { Points [0, 30] DstBlock "Goto3" DstPort 1 } Branch { Points [0, -140] Branch { DstBlock "Mux2" DstPort 3 } Branch { Points [0, -225] DstBlock "done6" DstPort 1 } } } Line { SrcBlock "Delay" SrcPort 1 Points [120, 0; 0, -150] DstBlock "Mux2" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 Points [190, 0] Branch { DstBlock "Goto1" DstPort 1 } Branch { Points [0, -150; 100, 0; 0, -265] DstBlock "done2" DstPort 1 } } Line { SrcBlock "1LSB" SrcPort 1 Points [25, 0] Branch { DstBlock "Logical2" DstPort 1 } Branch { Points [0, 25] DstBlock "Delay3" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 Points [35, 0] Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, -80] Branch { DstBlock "LFSR" DstPort 1 } Branch { Points [0, -350] DstBlock "done1" DstPort 1 } } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Delay4" DstPort 1 } Line { SrcBlock "done4" SrcPort 1 DstBlock "Tx Pkt Buf" DstPort 1 } Line { SrcBlock "done5" SrcPort 1 DstBlock "Tx Pkt Buf" DstPort 2 } Line { SrcBlock "done3" SrcPort 1 DstBlock "Tx Pkt Buf" DstPort 3 } Line { SrcBlock "done6" SrcPort 1 DstBlock "Tx Pkt Buf" DstPort 4 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Tx Pkt Buf" DstPort 5 } Line { SrcBlock "Delay4" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Delay5" SrcPort 1 DstBlock "Delay6" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 Points [440, 0] Branch { DstBlock "Goto2" DstPort 1 } Branch { Points [0, -170; 100, 0; 0, -315] DstBlock "done7" DstPort 1 } } Line { SrcBlock "done2" SrcPort 1 DstBlock "Tx Pkt Buf" DstPort 6 } Line { SrcBlock "done7" SrcPort 1 DstBlock "Tx Pkt Buf" DstPort 7 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Logical1" DstPort 3 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Logical1" DstPort 4 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Inverter3" DstPort 1 } Annotation { Name "For real-time BER testing, the Rx block uses this logic\nto access the packet buffer. In hardware, Tx" "/Rx is half-duplex,\nso sharing the logic is no problem. In simulation, it's full-duplex\n(loopback, really), so" " some muxing is required." Position [717, 392] } Annotation { Name "Use a long (12-bit) LFSR for more random payloads\nDelay the Mux select by 1 cycle to line up with th" "e latency\nof the actual packet buffer (don't want to randomize the last\nbyte of the header!)\nPolynomial set t" "o dec2hex(2^11+2^8+2^6+2^0),\nthe optimal for a 12-bit LFSR per xapp210." Position [986, 900] } Annotation { Name "Increment the LFSR on each new byte address. This\nlogic will \"miss\" byte0, but since we don't reco" "rd\nheaders for random payloads, it doesn't matter." Position [435, 887] } Annotation { Name "Disable random payload generation for\nautomatically transmitted packets\n(either via autoTwoTx or vi" "a\nautoResponders)" Position [156, 617] } } } Block { BlockType Reference Name "Register1" SID "8466" Ports [1, 1] Position [125, 410, 145, 430] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,20,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 20 20 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[12.22 12." "22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "8467" Ports [1, 1] Position [65, 245, 85, 265] BlockRotation 270 NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,20,1,1,white,blue,0,c80657c5,up,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 20 20 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[12.22 12." "22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Register3" SID "8468" Ports [1, 1] Position [125, 360, 145, 380] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,20,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 20 20 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[12.22 12." "22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Register4" SID "8469" Ports [1, 1] Position [940, 560, 975, 580] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register5" SID "8470" Ports [1, 1] Position [1015, 560, 1050, 580] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register6" SID "8471" Ports [1, 1] Position [350, 210, 385, 230] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,20,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Scrambling" SID "8472" Ports [2, 1] Position [1180, 275, 1220, 335] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Scrambling" Location [-112, 654, 1485, 1598] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Din" SID "8473" Position [335, 273, 365, 287] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Addr" SID "8474" Position [115, 308, 145, 322] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "5LSB" SID "8475" Ports [1, 1] Position [265, 305, 305, 325] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "ceil(log2(length(TxDataScrambling_Seq)))" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical" SID "8476" Ports [2, 1] Position [470, 260, 505, 335] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "8.2.02" sg_icon_stat "35,75,2,1,white,blue,0,dc21e094,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 75 75 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 75 75 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[42.55 42." "55 47.55 42.55 47.55 47.55 47.55 42.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[37.55 37.55 42.55 4" "2.55 37.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[32.55 32.55 37.55 37.55 32.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[27.55 27.55 32.55 27.55 32.55 32.55 27.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('b" "lack');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "ROM" SID "8477" Ports [1, 1] Position [360, 298, 405, 332] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "length(TxDataScrambling_Seq)" initVector "TxDataScrambling_Seq" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "8.2.02" sg_icon_stat "45,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 34 34 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[21.44 21" ".44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[17.44 17.44 21.44 21." "44 17.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Dout" SID "8478" Position [565, 293, 595, 307] NamePlacement "alternate" IconDisplay "Port number" } Line { SrcBlock "ROM" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "5LSB" SrcPort 1 DstBlock "ROM" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Dout" DstPort 1 } Line { SrcBlock "Din" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Addr" SrcPort 1 DstBlock "5LSB" DstPort 1 } } } Block { BlockType Scope Name "Tx Bytes" SID "8479" Ports [6] Position [1250, 435, 1315, 540] Floating off Location [6, 52, 1686, 1019] Open off NumInputPorts "6" ZoomMode "yonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" } TimeRange "15000" YMin "0~0~-1~-5~-5~-5" YMax "3~4e+009~2~5~5~5" SaveName "ScopeData1" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Outport Name "NumBytes" SID "8480" Position [1250, 98, 1280, 112] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "FullRateMasks" SID "8481" Position [1090, 128, 1120, 142] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Dout" SID "8482" Position [1315, 298, 1345, 312] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Info_data" SID "8483" Position [880, 468, 910, 482] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Line { SrcBlock "Header Decoding1" SrcPort 1 Points [20, 0] Branch { Points [0, 90] DstBlock "CRC Length Calc1" DstPort 1 } Branch { Points [590, 0] Branch { Points [0, 405] DstBlock "Gateway Out5" DstPort 1 } Branch { DstBlock "NumBytes" DstPort 1 } } } Line { SrcBlock "Header Decoding1" SrcPort 2 Points [625, 0] Branch { DstBlock "FullRateMasks" DstPort 1 } Branch { Points [0, 390] DstBlock "Gateway Out6" DstPort 1 } } Line { SrcBlock "DataOut_Addr" SrcPort 1 Points [20, 0] Branch { Points [5, 0] Branch { DstBlock "Packet Buffer" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Branch { Points [5, 0; 0, 265] DstBlock "Register4" DstPort 1 } } Line { SrcBlock "Scrambling" SrcPort 1 DstBlock "Dout" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 Points [45, 0] Branch { DstBlock "Scrambling" DstPort 1 } Branch { Points [0, 160] Branch { Points [0, 85] DstBlock "Assert" DstPort 1 } Branch { DstBlock "Gateway Out4" DstPort 1 } } } Line { SrcBlock "Packet Buffer" SrcPort 1 Points [15, 0; 0, -15] Branch { DstBlock "Mux" DstPort 2 } Branch { Points [0, -180] DstBlock "Header Decoding1" DstPort 2 } } Line { SrcBlock "DataOut_Addr Vin" SrcPort 1 Points [30, 0] Branch { DstBlock "Register3" DstPort 1 } Branch { Points [0, 245; 1045, 0] DstBlock "Gateway Out2" DstPort 1 } } Line { SrcBlock "Rst" SrcPort 1 Points [20, 0] Branch { DstBlock "Register1" DstPort 1 } Branch { Points [0, 240; 1070, 0; 0, -165] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "CRC Length Calc1" SrcPort 3 Points [35, 0; 0, 100] DstBlock "Byte Selector" DstPort 2 } Line { SrcBlock "Byte Selector" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "CRC Length Calc1" SrcPort 4 Points [25, 0; 0, 290; -365, 0; 0, -170] DstBlock "CRC32 Calc" DstPort 4 } Line { SrcBlock "Assert" SrcPort 1 Points [-25, 0] Branch { Points [-535, 0; 0, -145] Branch { DstBlock "CRC16 Calc" DstPort 1 } Branch { Points [0, -80] DstBlock "CRC32 Calc" DstPort 1 } } Branch { Points [0, -60] DstBlock "Info_data" DstPort 1 } } Line { SrcBlock "Register3" SrcPort 1 Points [95, 0; 0, -45] Branch { Points [0, -80] Branch { Points [0, -120] DstBlock "Header Decoding1" DstPort 3 } Branch { DstBlock "CRC Length Calc1" DstPort 3 } } Branch { Points [40, 0] Branch { DstBlock "CRC32 Calc" DstPort 2 } Branch { Points [0, 80] DstBlock "CRC16 Calc" DstPort 2 } } } Line { SrcBlock "Register1" SrcPort 1 Points [110, 0] Branch { Points [0, -80] Branch { DstBlock "CRC32 Calc" DstPort 3 } Branch { Points [0, -200] DstBlock "Header Decoding1" DstPort 4 } } Branch { DstBlock "CRC16 Calc" DstPort 3 } } Line { SrcBlock "Register2" SrcPort 1 Points [0, -20; 15, 0] Branch { Points [0, -125] DstBlock "Header Decoding1" DstPort 1 } Branch { Points [230, 0] Branch { DstBlock "Register6" DstPort 1 } Branch { Points [0, 55; 165, 0; 0, 110; 620, 0; 0, -65] DstBlock "Scrambling" DstPort 2 } } } Line { SrcBlock "CRC32 Calc" SrcPort 1 DstBlock "Byte Selector" DstPort 3 } Line { SrcBlock "CRC Length Calc1" SrcPort 5 Points [10, 0; 0, 260; -340, 0; 0, -75] DstBlock "CRC16 Calc" DstPort 4 } Line { SrcBlock "CRC Length Calc1" SrcPort 1 Points [40, 0] Branch { DstBlock "Logical8" DstPort 1 } Branch { Points [0, 115] DstBlock "Byte Selector" DstPort 1 } } Line { SrcBlock "CRC Length Calc1" SrcPort 2 DstBlock "Logical8" DstPort 2 } Line { SrcBlock "Logical8" SrcPort 1 Points [160, 0; 0, 50] DstBlock "Mux" DstPort 1 } Line { SrcBlock "CRC16 Calc" SrcPort 1 Points [395, 0; 0, -65] DstBlock "Byte Selector" DstPort 4 } Line { Name "data" Labels [0, 0] SrcBlock "Gateway Out4" SrcPort 1 DstBlock "Tx Bytes" DstPort 1 } Line { Name "addr" Labels [0, 0] SrcBlock "Gateway Out1" SrcPort 1 DstBlock "Tx Bytes" DstPort 2 } Line { SrcBlock "Register4" SrcPort 1 DstBlock "Register5" DstPort 1 } Line { SrcBlock "Register5" SrcPort 1 Points [70, 0; 0, -105] DstBlock "Gateway Out1" DstPort 1 } Line { SrcBlock "Register6" SrcPort 1 DstBlock "CRC Length Calc1" DstPort 2 } Line { Name "vin" Labels [0, 0] SrcBlock "Gateway Out2" SrcPort 1 DstBlock "Tx Bytes" DstPort 3 } Line { Name "rst" Labels [0, 0] SrcBlock "Gateway Out3" SrcPort 1 DstBlock "Tx Bytes" DstPort 4 } Line { Name "numBytes" Labels [0, 0] SrcBlock "Gateway Out5" SrcPort 1 DstBlock "Tx Bytes" DstPort 5 } Line { Name "Rate" Labels [0, 0] SrcBlock "Gateway Out6" SrcPort 1 DstBlock "Tx Bytes" DstPort 6 } } } Block { BlockType SubSystem Name "QAM" SID "8484" Ports [2, 2] Position [1205, 531, 1305, 684] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "QAM" Location [2, 82, 582, 367] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Mod Bits" SID "8485" Position [115, 403, 145, 417] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Mod Sel" SID "8486" Position [145, 223, 175, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "16QAM Mapper" SID "8487" Ports [1, 1] Position [330, 318, 380, 342] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "max(size(modConstellation_qam16))" initVector "modConstellation_qam16" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,24,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([21.325 31.66 28.66 25.66 22.66 18.325 21.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: e" "nd icon text');\n" } Block { BlockType Reference Name "16QAM Mapper1" SID "8488" Ports [1, 1] Position [330, 558, 380, 582] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "max(size(modConstellation_qam16))" initVector "modConstellation_qam16" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,24,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([21.325 31.66 28.66 25.66 22.66 18.325 21.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: e" "nd icon text');\n" } Block { BlockType Reference Name "1MSB" SID "8489" Ports [1, 1] Position [275, 261, 305, 279] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "1MSB-1" SID "8490" Ports [1, 1] Position [275, 521, 305, 539] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-1" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "2MSB" SID "8491" Ports [1, 1] Position [275, 321, 305, 339] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "2MSB-2" SID "8492" Ports [1, 1] Position [275, 561, 305, 579] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Upper Bit Location + Width" bit1 "-2" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "3LSB" SID "8493" Ports [1, 1] Position [220, 221, 250, 239] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "3" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "3MS-3" SID "8494" Ports [1, 1] Position [275, 601, 305, 619] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "3" boolean_output off mode "Upper Bit Location + Width" bit1 "-3" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "3MSB" SID "8495" Ports [1, 1] Position [275, 361, 305, 379] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "3" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "64QAM Mapper" SID "8496" Ports [1, 1] Position [330, 358, 380, 382] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "max(size(modConstellation_qam64))" initVector "modConstellation_qam64" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,24,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([21.325 31.66 28.66 25.66 22.66 18.325 21.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: e" "nd icon text');\n" } Block { BlockType Reference Name "64QAM Mapper1" SID "8497" Ports [1, 1] Position [330, 598, 380, 622] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "max(size(modConstellation_qam64))" initVector "modConstellation_qam64" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,24,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 24 24 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([21.325 31.66 28.66 25.66 22.66 18.325 21.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: e" "nd icon text');\n" } Block { BlockType Reference Name "Constant7" SID "8498" Ports [0, 1] Position [320, 471, 345, 489] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "8499" Ports [1, 1] Position [340, 217, 365, 243] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 " "16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('blac" "k');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "8500" Ports [8, 1] Position [480, 451, 530, 629] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "7" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[36 0 0 72 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,178,8,1,white,blue,3,7c302544,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 25.4286 152.571 178 0 " "],[0.77 0.82 0.91 ]);\nplot([0 50 50 0 0 ],[0 25.4286 152.571 178 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26" ".54 16.425 9.425 ],[96.77 96.77 103.77 96.77 103.77 103.77 103.77 96.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 " "9.425 16.425 ],[89.77 89.77 96.77 96.77 89.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ]," "[82.77 82.77 89.77 89.77 82.77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[75.77 75.77 8" "2.77 75.77 82.77 82.77 75.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','CO" "MMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0'" ");\ncolor('black');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_" "label('input',5,'d3');\ncolor('black');port_label('input',6,'d4');\ncolor('black');port_label('input',7,'d5');\n" "color('black');port_label('input',8,'d6');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT" ": end icon text');" } Block { BlockType Reference Name "Mux2" SID "8501" Ports [8, 1] Position [475, 211, 525, 389] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "7" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[36 0 0 72 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,178,8,1,white,blue,3,7c302544,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 25.4286 152.571 178 0 " "],[0.77 0.82 0.91 ]);\nplot([0 50 50 0 0 ],[0 25.4286 152.571 178 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26" ".54 16.425 9.425 ],[96.77 96.77 103.77 96.77 103.77 103.77 103.77 96.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 " "9.425 16.425 ],[89.77 89.77 96.77 96.77 89.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ]," "[82.77 82.77 89.77 89.77 82.77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[75.77 75.77 8" "2.77 75.77 82.77 82.77 75.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','CO" "MMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0'" ");\ncolor('black');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_" "label('input',5,'d3');\ncolor('black');port_label('input',6,'d4');\ncolor('black');port_label('input',7,'d5');\n" "color('black');port_label('input',8,'d6');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT" ": end icon text');" } Block { BlockType SubSystem Name "QPSK Map" SID "8502" Ports [1, 1] Position [330, 257, 380, 283] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "QPSK Map" Location [-139, 149, 1249, 1075] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Bit" SID "8503" Position [215, 58, 245, 72] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Constant6" SID "8504" Ports [0, 1] Position [180, 80, 225, 110] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "modConstellation_qpsk(1)" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,0,1,white,blue,0,145c935e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('output',1,'0.7109375');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant7" SID "8505" Ports [0, 1] Position [130, 112, 225, 138] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "modConstellation_qpsk(2)" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "95,26,0,1,white,blue,0,21fb1025,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 95 95 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 95 95 0 0 ],[0 0 26 26 0 ]);\npatch([40.325 44.66 47.66 50.66 53.66 47.66 43.325 40.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([43.325 47.66 44.66 40.325 43.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([40.325 44.66 47.66 43.325 40.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([43.325 53.66 50.66 47.66 44.66 40.325 43.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'-0.7109375');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux2" SID "8506" Ports [3, 1] Position [270, 51, 295, 139] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,88,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 12.5714 75.4286 88 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 12.5714 75.4286 88 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[47.33 47.33 50.33 47.33 50.33 50.33 50.33 47.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[44.33 44.33 47.33 47.33 44.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[41.33 41.33 " "44.33 44.33 41.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[38.33 38.33 41.33 38.33 41.33" " 41.33 38.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Outport Name "Sym" SID "8507" Position [320, 88, 350, 102] IconDisplay "Port number" } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "Sym" DstPort 1 } Line { SrcBlock "Bit" SrcPort 1 DstBlock "Mux2" DstPort 1 } Line { SrcBlock "Constant7" SrcPort 1 DstBlock "Mux2" DstPort 3 } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "Mux2" DstPort 2 } } } Block { BlockType SubSystem Name "QPSK Map1" SID "8508" Ports [1, 1] Position [330, 517, 380, 543] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "QPSK Map1" Location [-129, 84, 1259, 1010] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Bit" SID "8509" Position [215, 58, 245, 72] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Constant6" SID "8510" Ports [0, 1] Position [180, 80, 225, 110] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "modConstellation_qpsk(1)" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,0,1,white,blue,0,145c935e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('output',1,'0.7109375');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant7" SID "8511" Ports [0, 1] Position [130, 112, 225, 138] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "modConstellation_qpsk(2)" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "95,26,0,1,white,blue,0,21fb1025,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 95 95 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 95 95 0 0 ],[0 0 26 26 0 ]);\npatch([40.325 44.66 47.66 50.66 53.66 47.66 43.325 40.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([43.325 47.66 44.66 40.325 43.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([40.325 44.66 47.66 43.325 40.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([43.325 53.66 50.66 47.66 44.66 40.325 43.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'-0.7109375');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux2" SID "8512" Ports [3, 1] Position [270, 51, 295, 139] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,88,3,1,white,blue,3,a150fb03,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 12.5714 75.4286 88 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 12.5714 75.4286 88 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[47.33 47.33 50.33 47.33 50.33 50.33 50.33 47.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[44.33 44.33 47.33 47.33 44.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[41.33 41.33 " "44.33 44.33 41.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[38.33 38.33 41.33 38.33 41.33" " 41.33 38.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Outport Name "Sym" SID "8513" Position [320, 88, 350, 102] IconDisplay "Port number" } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "Mux2" DstPort 2 } Line { SrcBlock "Constant7" SrcPort 1 DstBlock "Mux2" DstPort 3 } Line { SrcBlock "Bit" SrcPort 1 DstBlock "Mux2" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "Sym" DstPort 1 } } } Block { BlockType Outport Name "I" SID "8514" Position [565, 293, 595, 307] IconDisplay "Port number" } Block { BlockType Outport Name "Q" SID "8515" Position [550, 533, 580, 547] Port "2" IconDisplay "Port number" } Line { SrcBlock "1MSB-1" SrcPort 1 DstBlock "QPSK Map1" DstPort 1 } Line { SrcBlock "1MSB" SrcPort 1 DstBlock "QPSK Map" DstPort 1 } Line { SrcBlock "2MSB-2" SrcPort 1 DstBlock "16QAM Mapper1" DstPort 1 } Line { SrcBlock "2MSB" SrcPort 1 DstBlock "16QAM Mapper" DstPort 1 } Line { SrcBlock "Mod Bits" SrcPort 1 Points [110, 0] Branch { Points [0, -25] Branch { Points [0, -55] Branch { DstBlock "1MSB" DstPort 1 } Branch { DstBlock "2MSB" DstPort 1 } } Branch { DstBlock "3MSB" DstPort 1 } } Branch { Points [0, 120] Branch { Points [0, 40] Branch { DstBlock "2MSB-2" DstPort 1 } Branch { DstBlock "3MS-3" DstPort 1 } } Branch { DstBlock "1MSB-1" DstPort 1 } } } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "I" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "3MS-3" SrcPort 1 DstBlock "64QAM Mapper1" DstPort 1 } Line { SrcBlock "3MSB" SrcPort 1 DstBlock "64QAM Mapper" DstPort 1 } Line { SrcBlock "QPSK Map1" SrcPort 1 DstBlock "Mux1" DstPort 4 } Line { SrcBlock "16QAM Mapper1" SrcPort 1 DstBlock "Mux1" DstPort 6 } Line { SrcBlock "64QAM Mapper1" SrcPort 1 DstBlock "Mux1" DstPort 8 } Line { SrcBlock "Mod Sel" SrcPort 1 DstBlock "3LSB" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 Points [80, 0] Branch { DstBlock "Mux2" DstPort 1 } Branch { Points [0, 240] DstBlock "Mux1" DstPort 1 } } Line { SrcBlock "Constant7" SrcPort 1 Points [65, 0] Branch { Points [0, -130] Branch { Points [0, -40] Branch { Points [0, -60] DstBlock "Mux2" DstPort 2 } Branch { DstBlock "Mux2" DstPort 5 } } Branch { DstBlock "Mux2" DstPort 7 } } Branch { Points [0, 10] Branch { Points [0, 20] Branch { DstBlock "Mux1" DstPort 3 } Branch { Points [0, 40] Branch { DstBlock "Mux1" DstPort 5 } Branch { Points [0, 40] DstBlock "Mux1" DstPort 7 } } } Branch { DstBlock "Mux1" DstPort 2 } } } Line { SrcBlock "QPSK Map" SrcPort 1 Points [50, 0] Branch { DstBlock "Mux2" DstPort 3 } Branch { Points [0, 20] DstBlock "Mux2" DstPort 4 } } Line { SrcBlock "16QAM Mapper" SrcPort 1 DstBlock "Mux2" DstPort 6 } Line { SrcBlock "64QAM Mapper" SrcPort 1 DstBlock "Mux2" DstPort 8 } Line { SrcBlock "3LSB" SrcPort 1 DstBlock "Delay" DstPort 1 } Annotation { Name "Mod-masks are interpreted as literal bits/symbol value. Only\nBPSK/QPSK/16QAM/64QAM are implemented (" "1/2/4/6 b/sym),\nbut other schemes could be added in this block to fill the unused\nmod mask values." Position [288, 151] } } } Block { BlockType Reference Name "Register1" SID "8516" Ports [1, 1] Position [835, 635, 855, 655] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,20,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 20 20 0 0 ],[0 0 20 20 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[12.22 12.22 14." "22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 12.22 10.22 ]" ",[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([7.55 " "14.44 12.44 10.44 8.44 5.55 7.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolo" "r('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "Register2" SID "8517" Ports [1, 1] Position [835, 540, 855, 560] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,20,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 20 20 0 0 ],[0 0 20 20 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[12.22 12.22 14." "22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 12.22 10.22 ]" ",[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([7.55 " "14.44 12.44 10.44 8.44 5.55 7.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolo" "r('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "Relational4" SID "8518" Ports [2, 1] Position [1195, 95, 1230, 150] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a<=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,55,2,1,white,blue,0,52e4b236,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 55 55 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 55 55 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[32.55 32.55 37." "55 32.55 37.55 37.55 37.55 32.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[27.55 27.55 32.55 32.55 27." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[22.55 22.55 27.55 27.55 22.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 17.55 22.55 22.55 17.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\leq b','te" "xmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch1" SID "8519" Ports [2, 1] Position [255, 326, 305, 359] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch1" Location [2, 82, 1184, 1016] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "8520" Position [135, 188, 165, 202] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "8521" Position [135, 213, 165, 227] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant3" SID "8522" Ports [0, 1] Position [185, 162, 200, 178] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 " "12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "8523" Ports [3, 1] Position [230, 157, 280, 233] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,76,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 76 76 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 76 76 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[45.7" "7 45.77 52.77 45.77 52.77 52.77 52.77 45.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[38.77 38.77 " "45.77 45.77 38.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[31.77 31.77 38.77 38.77 31." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[24.77 24.77 31.77 24.77 31.77 31.77 24.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label" "('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8524" Position [305, 188, 335, 202] IconDisplay "Port number" } Line { SrcBlock "Constant3" SrcPort 1 Points [0, 0] DstBlock "Register" DstPort 1 } Line { SrcBlock "R" SrcPort 1 Points [0, 0] DstBlock "Register" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 Points [0, 0] DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 Points [0, 0] DstBlock "Register" DstPort 3 } } } Block { BlockType SubSystem Name "SR Latch" SID "8525" Ports [2, 1] Position [1305, 80, 1350, 115] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SR Latch" Location [202, 82, 1918, 1026] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "R" SID "8526" Position [210, 203, 240, 217] IconDisplay "Port number" } Block { BlockType Inport Name "S" SID "8527" Position [265, 223, 295, 237] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant2" SID "8528" Ports [0, 1] Position [330, 181, 355, 199] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22" " 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatc" "h([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'" ",1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "8529" Ports [1, 1] Position [330, 203, 360, 217] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,375" block_type "convert" block_version "8.2.01" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "8530" Ports [1, 1] Position [330, 223, 360, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,375" block_type "convert" block_version "8.2.01" sg_icon_stat "30,14,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "crc_accum2" SID "8531" Ports [3, 1] Position [435, 179, 485, 241] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,62,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 62 62 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[38.7" "7 38.77 45.77 38.77 45.77 45.77 45.77 38.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[31.77 31.77 " "38.77 38.77 31.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[24.77 24.77 31.77 31.77 24." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[17.77 17.77 24.77 17.77 24.77 24.77 17.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label" "('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8532" Position [545, 203, 575, 217] IconDisplay "Port number" } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "crc_accum2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "crc_accum2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "crc_accum2" DstPort 2 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "crc_accum2" DstPort 3 } } } Block { BlockType SubSystem Name "control" SID "8533" Ports [7, 3] Position [515, 284, 675, 456] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "control" Location [2, 82, 1678, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "110" Block { BlockType Inport Name "FullRateMasks" SID "8534" Position [390, 348, 420, 362] IconDisplay "Port number" } Block { BlockType Inport Name "length" SID "8535" Position [40, 78, 70, 92] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "ready" SID "8536" Position [275, 138, 305, 152] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "ifft_index" SID "8537" Position [465, 328, 495, 342] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "BaseRate_En" SID "8538" Position [465, 288, 495, 302] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "valid" SID "8539" Position [830, 223, 860, 237] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "ant_sel" SID "8540" Position [390, 308, 420, 322] Port "7" IconDisplay "Port number" } Block { BlockType Reference Name "Accumulator" SID "8541" Ports [2, 1] Position [890, 63, 940, 112] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. Output type and binary point position match the input.

Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to run " "at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "1" overflow "Saturate" scale "1" rst on hasbypass off en off dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,49,2,1,white,blue,0,6949434e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 49 49 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[31.7" "7 31.77 38.77 31.77 38.77 38.77 38.77 31.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[24.77 24.77 " "31.77 31.77 24.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[17.77 17.77 24.77 24.77 17." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[10.77 10.77 17.77 10.77 17.77 17.77 10.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label" "('output',1,'\\bf+=b','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Accumulator2" SID "8542" Ports [3, 1] Position [1265, 304, 1315, 366] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. Output type and binary point position match the input.

Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to run " "at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "16" overflow "Wrap" scale "1" rst on hasbypass off en on dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,457" block_type "accum" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,62,3,1,white,blue,0,ee9eb47a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 62 62 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 62 62 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[38.7" "7 38.77 45.77 38.77 45.77 45.77 45.77 38.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[31.77 31.77 " "38.77 38.77 31.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[24.77 24.77 31.77 31.77 24." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[17.77 17.77 24.77 17.77 24.77 24.77 17.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label" "('input',3,'en');\ncolor('black');port_label('output',1,'\\bf+=b','texmode','on');\nfprintf('','COMMENT: end ico" "n text');" } Block { BlockType Reference Name "AddSub1" SID "8543" Ports [2, 1] Position [955, 447, 1005, 498] BlockMirror on LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[8 0 0 14 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,e139daf6,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert" SID "8544" Ports [1, 1] Position [705, 468, 740, 482] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type off type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,423" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('Ass" "ert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "8545" Ports [3, 1] Position [680, 94, 730, 146] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "3" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,52,3,1,white,blue,0,61ef8218,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 52 52 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'hi');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('" "\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Concat1" SID "8546" Ports [2, 1] Position [115, 47, 165, 98] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Concat1" Location [101, 339, 1283, 1273] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "in0" SID "8547" Position [70, 107, 100, 123] IconDisplay "Port number" } Block { BlockType Inport Name "in1" SID "8548" Position [70, 147, 100, 163] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Concat1" SID "8549" Ports [2, 1] Position [150, 102, 200, 153] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,51,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[32.7" "7 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 25.77 " "32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25.77 18." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.77 11.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\" "fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "out0" SID "8550" Position [330, 122, 360, 138] IconDisplay "Port number" } Line { SrcBlock "in0" SrcPort 1 DstBlock "Concat1" DstPort 1 } Line { SrcBlock "in1" SrcPort 1 Points [15, 0; 0, -15] DstBlock "Concat1" DstPort 2 } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "out0" DstPort 1 } } } Block { BlockType Reference Name "Concat2" SID "8551" Ports [4, 1] Position [1130, 196, 1180, 249] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "4" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,53,4,1,white,blue,0,47d3d416,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 53 53 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.7" "7 33.77 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 " "33.77 33.77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp" "('\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "8552" Ports [0, 1] Position [40, 48, 75, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "8553" Ports [1, 1] Position [1020, 205, 1065, 235] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "8554" Ports [1, 1] Position [800, 60, 845, 90] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,30,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 30 30 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19" ".44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19." "44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "8555" Ports [1, 1] Position [941, 145, 959, 165] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "18,20,1,1,white,blue,0,edca21da,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 18 18 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 18 18 0 0 ],[0 0 20 20 0 ]);\npatch([4.55 7.44 9.44 11.44 13.44 9.44 6.55 4.55 ],[12.22 12.22" " 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([6.55 9.44 7.44 4.55 6.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.931 0.946 0.973 ]);\npatch([4.55 7.44 9.44 6.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch(" "[6.55 13.44 11.44 9.44 7.44 4.55 6.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1" ",'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "8556" Ports [1, 1] Position [535, 285, 575, 305] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "8557" Ports [1, 1] Position [590, 192, 620, 218] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "2" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,26,1,1,white,blue,0,85ce9542,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-2}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "8558" Ports [1, 1] Position [545, 517, 575, 543] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,26,1,1,white,blue,0,d390c2d8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 26 26 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[16.3" "3 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 13.33 " "16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13.33 10." "33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "8559" Position [270, 167, 320, 183] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReset" TagVisibility "global" } Block { BlockType From Name "From4" SID "8560" Position [710, 217, 760, 233] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReset" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "8561" Ports [1, 1] Position [485, 94, 510, 116] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "8562" Ports [1, 1] Position [490, 377, 545, 403] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,26,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "8563" Ports [1, 1] Position [854, 125, 876, 150] BlockRotation 270 ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "22,25,1,1,white,blue,0,267846e5,up,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 22 22 0 0 ],[0 0 25 25 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 22 22 0 0 ],[0 0 25 25 0 ]);\npatch([4.325 8.66 11.66 14.66 17.66 11.66 7.325 4.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([7.325 11.66 8.66 4.325 7.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([4.325 8.66 11.66 7.325 4.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([7.325 17.66 14.66 11.66 8.66 4.325 7.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "8564" Ports [1, 1] Position [939, 105, 961, 125] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "22,20,1,1,white,blue,0,267846e5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 22 22 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 22 22 0 0 ],[0 0 20 20 0 ]);\npatch([6.55 9.44 11.44 13.44 15.44 11.44 8.55 6.55 ],[12.22 12." "22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([8.55 11.44 9.44 6.55 8.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([6.55 9.44 11.44 8.55 6.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npa" "tch([8.55 15.44 13.44 11.44 9.44 6.55 8.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter4" SID "8565" Ports [1, 1] Position [335, 164, 360, 186] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "8566" Ports [2, 1] Position [1105, 293, 1150, 337] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[4 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8567" Ports [2, 1] Position [535, 83, 565, 112] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 29 29 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8568" Ports [3, 1] Position [680, 168, 725, 212] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "8569" Ports [3, 1] Position [965, 204, 995, 236] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.4" "4 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 " "16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical4" SID "8570" Ports [2, 1] Position [460, 188, 490, 217] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,29,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 29 29 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "8571" Ports [2, 1] Position [1050, 398, 1080, 427] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,29,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 29 29 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "8572" Ports [1, 1] Position [865, 450, 905, 500] BlockMirror on LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 15 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,50,1,1,white,blue,0,c80657c5,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 50 50 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 50 50 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[30.55 30." "55 35.55 30.55 35.55 35.55 35.55 30.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[25.55 25.55 30.55 3" "0.55 25.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[20.55 20.55 25.55 25.55 20.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[15.55 15.55 20.55 15.55 20.55 20.55 15.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register3" SID "8573" Ports [1, 1] Position [890, 213, 930, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,34,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 34 34 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[21.44 21" ".44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[17.44 17.44 21.44 21." "44 17.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]" ");\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational" SID "8574" Ports [2, 1] Position [295, 62, 340, 113] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a<=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[8 0 0 16 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,51,2,1,white,blue,0,52e4b236,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 51 51 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[31.66 3" "1.66 37.66 31.66 37.66 37.66 37.66 31.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[25.66 25.66 31.66 " "31.66 25.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[19.66 19.66 25.66 25.66 19.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[13.66 13.66 19.66 13.66 19.66 19.66 13.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\leq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Shift" SID "8575" Ports [1, 1] Position [210, 59, 255, 91] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shift" SourceType "Xilinx Binary Shift Operator Block" infoedit "Hardware notes: In hardware this block costs nothing if full output precision is used." shift_dir "Left" shift_bits "3" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "shift" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,32,1,1,white,blue,0,2cc77cbe,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 32 32 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 32 32 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[20.44 20" ".44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[16.44 16.44 20.44 20." "44 16.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('\\bf{X << 3}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "Tx Ctrl" SID "8576" Ports [6] Position [1345, 615, 1410, 720] Floating off Location [6, 52, 1686, 1019] Open off NumInputPorts "6" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" } TimeRange "15000" YMin "-1~-1~-1~-1~-1~10" YMax "1~1~1~1~1~10" SaveName "ScopeData39" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "Tx Modulation" SID "8577" Ports [4, 1] Position [670, 282, 760, 368] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Tx Modulation" Location [469, 279, 838, 382] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "133" Block { BlockType Inport Name "BaseRate" SID "8578" Position [25, 183, 55, 197] IconDisplay "Port number" } Block { BlockType Inport Name "Ant Sel" SID "8579" Position [25, 88, 55, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "IFFT Index" SID "8580" Position [245, 288, 275, 302] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "FullRateMasks" SID "8581" Position [155, 108, 185, 122] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "4LSB" SID "8582" Ports [1, 1] Position [265, 108, 300, 122] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "4MSB" SID "8583" Ports [1, 1] Position [265, 128, 300, 142] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "AntB Mod\nLogic" SID "8584" Ports [2, 1] Position [145, 237, 220, 288] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AntB Mod\nLogic" Location [249, 393, 698, 511] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "338" Block { BlockType Inport Name "BaseRate" SID "8585" Position [95, 93, 125, 107] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "AntSel" SID "8586" Position [95, 113, 125, 127] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Convert1" SID "8587" Ports [1, 1] Position [180, 110, 220, 130] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "8588" Ports [1, 1] Position [180, 91, 220, 109] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "8589" Ports [2, 1] Position [280, 91, 315, 129] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 38 38 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 38 38 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[24.55 24." "55 29.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[19.55 19.55 24.55 2" "4.55 19.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black" "');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "AntB Mod En" SID "8590" Position [365, 103, 395, 117] IconDisplay "Port number" } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "AntB Mod En" DstPort 1 } Line { SrcBlock "AntSel" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "BaseRate" SrcPort 1 DstBlock "Inverter2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical5" DstPort 2 } Annotation { Name "Select the antB mod values when\nAntSel is high (alternate symbols)\nbut not during base rate symbols" "." Position [224, 181] } } } Block { BlockType Reference Name "Concat1" SID "8591" Ports [4, 1] Position [685, 72, 720, 108] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "4" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,4,1,white,blue,0,47d3d416,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp('\\fontsize{20}\\" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat2" SID "8592" Ports [4, 1] Position [690, 122, 725, 158] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "4" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,4,1,white,blue,0,47d3d416,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55 23." "55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23.55 2" "3.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'hi');\n\n\ncolor('black');port_label('input',4,'lo');\n\ncolor('black');disp('\\fontsize{20}\\" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat3" SID "8593" Ports [3, 1] Position [335, 223, 380, 307] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "3" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,84,3,1,white,blue,0,61ef8218,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 84 84 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 84 84 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[48.66 4" "8.66 54.66 48.66 54.66 54.66 54.66 48.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[42.66 42.66 48.66 " "48.66 42.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[36.66 36.66 42.66 42.66 36.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[30.66 30.66 36.66 30.66 36.66 36.66 30.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'hi');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('\\fontsize{2" "0}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "8594" Position [15, 523, 140, 537] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_Alamouti_Mode" TagVisibility "global" } Block { BlockType From Name "From2" SID "8595" Position [360, 36, 490, 54] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_simpleDynRxModulationEn" TagVisibility "global" } Block { BlockType From Name "From4" SID "8596" Position [15, 508, 140, 522] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_SISO_Mode" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" SID "8597" Ports [1, 1] Position [525, 36, 565, 54] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,237" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "8598" Ports [2, 1] Position [910, 193, 955, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8599" Ports [2, 1] Position [450, 498, 470, 547] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,49,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 49 49 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 49 49 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[26.22 26." "22 28.22 26.22 28.22 28.22 28.22 26.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[24.22 24.22 26.22 26.22" " 24.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[22.22 22.22 24.22 24.22 22.22 ],[1 1 1 ]);\n" "patch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[20.22 20.22 22.22 20.22 22.22 22.22 20.22 ],[0.931 0.946 0.973 ]" ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');dis" "p('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8600" Ports [2, 1] Position [395, 499, 420, 521] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "8601" Ports [2, 1] Position [395, 524, 420, 546] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "8602" Ports [3, 1] Position [780, 74, 825, 156] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,82,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 82 82 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 82 82 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[47.66 4" "7.66 53.66 47.66 53.66 53.66 53.66 47.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[41.66 41.66 47.66 " "47.66 41.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[35.66 35.66 41.66 41.66 35.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[29.66 29.66 35.66 29.66 35.66 35.66 29.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor" "('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "8603" Ports [3, 1] Position [545, 82, 570, 148] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "8.2.02" sg_icon_stat "25,66,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 9.42857 56.5714 66 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 9.42857 56.5714 66 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[36.33 36.33 39.33 36.33 39.33 39.33 39.33 36.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[33.33 33.33 36.33 36.33 33.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[30.33 30.33 " "33.33 33.33 30.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33 27.33 30.33" " 30.33 27.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');" } Block { BlockType SubSystem Name "Oscillator" SID "8604" Ports [2, 1] Position [295, 669, 350, 716] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Oscillator" Location [2, 82, 1184, 1016] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "rst" SID "8605" Position [115, 288, 145, 302] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "en" SID "8606" Position [115, 313, 145, 327] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Assert" SID "8607" Ports [1, 1] Position [475, 224, 510, 246] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type on type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,436" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[14" ".33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.33 11." "33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 11.33 " "8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "8608" Ports [1, 1] Position [195, 310, 235, 330] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "8609" Ports [1, 1] Position [670, 235, 710, 255] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "8610" Ports [1, 1] Position [195, 285, 235, 305] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');" "port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "8611" Ports [1, 1] Position [345, 227, 375, 243] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,251" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,267846e5,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "8612" Ports [3, 1] Position [335, 259, 400, 331] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "65,72,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 72 72 0 ]);\npatch([11.975 24.98 33.98 42.98 51.98 33.98 20.975 11.975 ],[45" ".99 45.99 54.99 45.99 54.99 54.99 54.99 45.99 ],[1 1 1 ]);\npatch([20.975 33.98 24.98 11.975 20.975 ],[36.99 36." "99 45.99 45.99 36.99 ],[0.931 0.946 0.973 ]);\npatch([11.975 24.98 33.98 20.975 11.975 ],[27.99 27.99 36.99 36.9" "9 27.99 ],[1 1 1 ]);\npatch([20.975 51.98 42.98 33.98 24.98 11.975 20.975 ],[18.99 18.99 27.99 18.99 27.99 27.99" " 18.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port" "_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "8613" Ports [3, 1] Position [565, 284, 630, 356] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "65,72,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 72 72 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 65 65 0 0 ],[0 0 72 72 0 ]);\npatch([11.975 24.98 33.98 42.98 51.98 33.98 20.975 11.975 ],[45" ".99 45.99 54.99 45.99 54.99 54.99 54.99 45.99 ],[1 1 1 ]);\npatch([20.975 33.98 24.98 11.975 20.975 ],[36.99 36." "99 45.99 45.99 36.99 ],[0.931 0.946 0.973 ]);\npatch([11.975 24.98 33.98 20.975 11.975 ],[27.99 27.99 36.99 36.9" "9 27.99 ],[1 1 1 ]);\npatch([20.975 51.98 42.98 33.98 24.98 11.975 20.975 ],[18.99 18.99 27.99 18.99 27.99 27.99" " 18.99 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port" "_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8614" Position [765, 238, 795, 252] IconDisplay "Port number" } Line { SrcBlock "Register1" SrcPort 1 Points [50, 0] } Line { SrcBlock "en" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 Points [-25, 0; 0, 35] DstBlock "Register" DstPort 1 } Line { SrcBlock "rst" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 Points [120, 0] Branch { DstBlock "Register1" DstPort 1 } Branch { Points [0, -45] Branch { DstBlock "Assert" DstPort 1 } Branch { Points [0, -5] DstBlock "Convert2" DstPort 1 } } } Line { SrcBlock "Convert3" SrcPort 1 Points [65, 0] Branch { Points [0, 75; 235, 0; 0, -50] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register" DstPort 2 } } Line { SrcBlock "Convert1" SrcPort 1 Points [70, 0] Branch { Points [0, 25] DstBlock "Register1" DstPort 3 } Branch { DstBlock "Register" DstPort 3 } } Line { SrcBlock "Assert" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType SubSystem Name "Shared Memory for\nModulation Masks" SID "8615" Ports [2, 1] Position [540, 251, 625, 309] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Shared Memory for\nModulation Masks" Location [377, 277, 819, 551] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Addr" SID "8616" Position [435, 408, 465, 422] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Rst" SID "8617" Position [550, 353, 580, 367] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant" SID "8618" Ports [0, 1] Position [435, 432, 490, 458] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "4" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.2" sg_icon_stat "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "8619" Ports [0, 1] Position [435, 462, 490, 488] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "4" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.2" sg_icon_stat "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "8620" Ports [0, 1] Position [670, 467, 725, 493] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "4" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.2" sg_icon_stat "55,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "8621" Ports [3, 1] Position [770, 393, 815, 497] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.2" sg_icon_stat "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 " "],[0.77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23." "32 14.65 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14." "65 ],[52.66 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 " "52.66 52.66 46.66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66" " 46.66 40.66 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');" } Block { BlockType Reference Name "Shared Memory" SID "8622" Ports [3, 1] Position [560, 400, 640, 490] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Shared Memory" SourceType "Xilinx Shared Memory Random Access Memory Block" shared_memory_name "'TxModulation'" depth "numSubcarriers*3 %AntA, AntB, BaseRate" ownership "Locally Owned and Initialized" initVector "subcarrier_QAM_Values" en off mutex "Unprotected" mode "Read and Write" write_mode "Read After Write" time_out "0" latency "1" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "4" bin_pt "0" preci_type "Single" xl_use_area off xl_area "[0,0,0,0,0,0,0]" implementation "Block RAM" use_rpm "off" has_advanced_control "0" sggui_pos "73,378,484,424" block_type "shmem" block_version "10.1.2" sg_icon_stat "80,90,3,1,white,blue,0,bf435243,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 90 90 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[57" ".21 57.21 68.21 57.21 68.21 68.21 68.21 57.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[46.21 46." "21 57.21 57.21 46.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[35.21 35.21 46.21 46.2" "1 35.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[24.21 24.21 35.21 24.21 35.21 35.21" " 24.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text" "');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');p" "ort_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Outport Name "ModMask" SID "8623" Position [895, 438, 925, 452] IconDisplay "Port number" } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Shared Memory" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Shared Memory" DstPort 3 } Line { SrcBlock "Addr" SrcPort 1 DstBlock "Shared Memory" DstPort 1 } Line { SrcBlock "Rst" SrcPort 1 Points [85, 0; 0, 50] DstBlock "Mux" DstPort 1 } Line { SrcBlock "Shared Memory" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "ModMask" DstPort 1 } } } Block { BlockType SubSystem Name "negedge" SID "8624" Ports [1, 1] Position [220, 693, 265, 717] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "negedge" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "d" SID "8625" Position [45, 198, 75, 212] IconDisplay "Port number" } Block { BlockType Reference Name "Delay2" SID "8626" Ports [1, 1] Position [225, 217, 270, 263] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,46,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 46 46 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 46 46 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 2" "9.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 " "29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bl" "ack');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "8627" Ports [1, 1] Position [130, 188, 175, 222] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,251" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,34,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 34 34 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[21.44 21" ".44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[17.44 17.44 21.44 21." "44 17.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8628" Ports [2, 1] Position [340, 193, 385, 237] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "q" SID "8629" Position [460, 208, 490, 222] IconDisplay "Port number" } Line { SrcBlock "Delay2" SrcPort 1 Points [25, 0; 0, -15] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "d" SrcPort 1 Points [35, 0] Branch { DstBlock "Inverter3" DstPort 1 } Branch { Points [0, 35] DstBlock "Delay2" DstPort 1 } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "q" DstPort 1 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical2" DstPort 1 } } } Block { BlockType SubSystem Name "posedge" SID "8630" Ports [1, 1] Position [220, 668, 265, 692] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "d" SID "8631" Position [45, 198, 75, 212] IconDisplay "Port number" } Block { BlockType Reference Name "Delay2" SID "8632" Ports [1, 1] Position [225, 217, 270, 263] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,269" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,46,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 46 46 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 46 46 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 2" "9.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 " "29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bl" "ack');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "8633" Ports [1, 1] Position [135, 223, 180, 257] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,251" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,34,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 34 34 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[21.44 21" ".44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[17.44 17.44 21.44 21." "44 17.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8634" Ports [2, 1] Position [340, 193, 385, 237] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "q" SID "8635" Position [460, 208, 490, 222] IconDisplay "Port number" } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "q" DstPort 1 } Line { SrcBlock "d" SrcPort 1 Points [35, 0] Branch { Points [0, 35] DstBlock "Inverter3" DstPort 1 } Branch { DstBlock "Logical2" DstPort 1 } } Line { SrcBlock "Delay2" SrcPort 1 Points [25, 0; 0, -15] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Delay2" DstPort 1 } } } Block { BlockType Outport Name "mod" SID "8636" Position [1010, 208, 1040, 222] IconDisplay "Port number" } Line { SrcBlock "BaseRate" SrcPort 1 Points [55, 0] Branch { Points [125, 0] Branch { Points [0, 0; 415, 0; 0, -35] Branch { Points [0, -10] Branch { Points [0, -10] Branch { Points [0, -10] DstBlock "Concat2" DstPort 1 } Branch { DstBlock "Concat2" DstPort 2 } } Branch { DstBlock "Concat2" DstPort 3 } } Branch { DstBlock "Concat2" DstPort 4 } } Branch { Points [0, 45] Branch { DstBlock "Concat3" DstPort 1 } Branch { Points [0, 395; -35, 0] DstBlock "posedge" DstPort 1 } } } Branch { Points [0, 60] DstBlock "AntB Mod\nLogic" DstPort 1 } } Line { SrcBlock "IFFT Index" SrcPort 1 DstBlock "Concat3" DstPort 3 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Concat3" SrcPort 1 DstBlock "Shared Memory for\nModulation Masks" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "mod" DstPort 1 } Line { SrcBlock "FullRateMasks" SrcPort 1 Points [0, 0; 30, 0] Branch { DstBlock "4LSB" DstPort 1 } Branch { Points [0, 20] DstBlock "4MSB" DstPort 1 } } Line { SrcBlock "4LSB" SrcPort 1 Points [0, 0] DstBlock "Mux1" DstPort 2 } Line { SrcBlock "4MSB" SrcPort 1 Points [0, 0] DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 Points [45, 0; 0, 90] DstBlock "Logical" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 Points [0, 0] DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 Points [20, 0; 0, 30; 60, 0] Branch { DstBlock "Concat1" DstPort 1 } Branch { Points [0, 10] Branch { DstBlock "Concat1" DstPort 2 } Branch { Points [0, 10] Branch { DstBlock "Concat1" DstPort 3 } Branch { Points [0, 10] DstBlock "Concat1" DstPort 4 } } } } Line { SrcBlock "Concat2" SrcPort 1 Points [0, 0] DstBlock "Logical4" DstPort 3 } Line { SrcBlock "Ant Sel" SrcPort 1 Points [45, 0] Branch { DstBlock "Mux1" DstPort 1 } Branch { Points [0, 180] Branch { Points [0, 230] Branch { DstBlock "Logical2" DstPort 1 } Branch { Points [0, 200] DstBlock "negedge" DstPort 1 } } Branch { Labels [0, 0] DstBlock "AntB Mod\nLogic" DstPort 2 } } } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Shared Memory for\nModulation Masks" SrcPort 1 Points [245, 0; 0, -55] DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [45, 0; 0, -230] DstBlock "Shared Memory for\nModulation Masks" DstPort 2 } Line { SrcBlock "negedge" SrcPort 1 DstBlock "Oscillator" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Oscillator" SrcPort 1 Points [0, -155] DstBlock "Logical3" DstPort 2 } Line { SrcBlock "AntB Mod\nLogic" SrcPort 1 DstBlock "Concat3" DstPort 2 } Line { SrcBlock "posedge" SrcPort 1 DstBlock "Oscillator" DstPort 1 } Annotation { Name "In Alamouti mode, we need two IFFT frames of data,\nfollowed by two empty frames. The oscillator here" " does this\nby forcing mod=0 for empty frames. The oscillator is reset\nwith each new packet (by posedge(baseRat" "e)).\nIn SISO/Multiplexing, all of this is unnecessary." Position [189, 777] } } } Block { BlockType Reference Name "done1" SID "8637" Ports [1, 1] Position [1265, 625, 1300, 635] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done2" SID "8638" Ports [1, 1] Position [1265, 640, 1300, 650] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done3" SID "8639" Ports [1, 1] Position [1265, 655, 1300, 665] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "8640" Ports [1, 1] Position [1265, 670, 1300, 680] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "8641" Ports [1, 1] Position [1265, 685, 1300, 695] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done6" SID "8642" Ports [1, 1] Position [1265, 700, 1300, 710] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType SubSystem Name "ending" SID "8643" Ports [1, 1] Position [370, 69, 430, 111] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ending" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "signal" SID "8644" Position [45, 198, 75, 212] IconDisplay "Port number" } Block { BlockType Reference Name "Delay2" SID "8645" Ports [1, 1] Position [225, 217, 270, 263] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,46,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 46 46 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 46 46 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 2" "9.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 " "29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bl" "ack');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter3" SID "8646" Ports [1, 1] Position [135, 223, 180, 257] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,34,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 34 34 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[21.44 21" ".44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[17.44 17.44 21.44 21." "44 17.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8647" Ports [2, 1] Position [340, 193, 385, 237] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "pulse" SID "8648" Position [460, 208, 490, 222] IconDisplay "Port number" } Line { SrcBlock "Delay2" SrcPort 1 Points [25, 0; 0, -15] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "signal" SrcPort 1 Points [35, 0] Branch { DstBlock "Logical2" DstPort 1 } Branch { Points [0, 35] DstBlock "Inverter3" DstPort 1 } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "pulse" DstPort 1 } } } Block { BlockType Reference Name "mod-16" SID "8649" Ports [1, 1] Position [1380, 321, 1425, 349] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "off1" SID "8650" Ports [1, 1] Position [380, 196, 425, 224] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "on" SID "8651" Ports [1, 1] Position [885, 166, 930, 194] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "1" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "on_resetting_off1" SID "8652" Ports [3, 1] Position [780, 109, 825, 161] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[2 3 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,52,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 52 52 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 52 52 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 3" "2.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 " "32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "reset1" SID "8653" Ports [2, 1] Position [535, 148, 565, 177] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 29 29 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "reset2" SID "8654" Ports [1, 1] Position [860, 406, 905, 434] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "1" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "reset3" SID "8655" Ports [2, 1] Position [385, 138, 415, 167] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 29 29 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 29 29 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "reset" SID "8656" Position [765, 43, 795, 57] IconDisplay "Port number" } Block { BlockType Outport Name "index" SID "8657" Position [1475, 328, 1505, 342] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "mod" SID "8658" Position [1415, 268, 1445, 282] Port "3" IconDisplay "Port number" } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Assert" DstPort 1 } Line { SrcBlock "on" SrcPort 1 Points [0, 40] DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Concat2" SrcPort 1 Points [25, 0; 0, 30; -120, 0] DstBlock "Logical" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 Points [0, 0; 10, 0] Branch { Points [0, 5] Branch { Points [0, 20] DstBlock "Concat2" DstPort 4 } Branch { Points [0, 5] DstBlock "Concat2" DstPort 3 } } Branch { Points [0, -5] DstBlock "Concat2" DstPort 2 } Branch { Points [0, -20] DstBlock "Concat2" DstPort 1 } } Line { SrcBlock "valid" SrcPort 1 Points [0, 0] Branch { DstBlock "Register3" DstPort 1 } Branch { DstBlock "Inverter2" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [60, 0; 0, 5] Branch { Points [0, -5] Branch { DstBlock "Accumulator2" DstPort 1 } Branch { Points [0, 145] Branch { DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 230] DstBlock "done5" DstPort 1 } } } Branch { Points [0, -45] DstBlock "mod" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 Points [595, 0] Branch { Points [80, 0; 0, -35] DstBlock "Accumulator2" DstPort 3 } Branch { Points [0, 270] DstBlock "done3" DstPort 1 } } Line { SrcBlock "Concat" SrcPort 1 DstBlock "on_resetting_off1" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 Points [15, 0; 0, -40] DstBlock "on_resetting_off1" DstPort 3 } Line { SrcBlock "Logical1" SrcPort 1 Points [35, 0; 0, 35; 60, 0] Branch { DstBlock "Logical2" DstPort 1 } Branch { DstBlock "Concat" DstPort 3 } } Line { SrcBlock "Delay1" SrcPort 1 Points [15, 0] Branch { DstBlock "Logical2" DstPort 3 } Branch { Points [0, -100] DstBlock "Concat" DstPort 1 } } Line { SrcBlock "reset1" SrcPort 1 Points [5, 0] Branch { Points [75, 0] Branch { Points [0, -45] Branch { DstBlock "Concat" DstPort 2 } Branch { Points [0, -70] DstBlock "reset" DstPort 1 } } Branch { Points [0, 20] Branch { Points [0, 5] DstBlock "Logical2" DstPort 2 } Branch { Points [0, 460] DstBlock "done2" DstPort 1 } } } Branch { DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "Logical4" SrcPort 1 Points [10, 0; 0, -35] DstBlock "reset1" DstPort 2 } Line { SrcBlock "off1" SrcPort 1 Points [10, 0] Branch { Points [0, 180] DstBlock "Inverter1" DstPort 1 } Branch { DstBlock "Logical4" DstPort 2 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "ending" SrcPort 1 Points [5, 0] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, -15] DstBlock "Convert1" DstPort 1 } Branch { Points [0, 40] Branch { Points [0, 65] DstBlock "Logical4" DstPort 1 } Branch { Points [-135, 0; 0, 400] DstBlock "Delay2" DstPort 1 } } } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "mod-16" SrcPort 1 Points [15, 0] Branch { DstBlock "index" DstPort 1 } Branch { Points [0, 255; -320, 0; 0, 115] DstBlock "done6" DstPort 1 } } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Concat1" DstPort 1 } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "Shift" DstPort 1 } Line { SrcBlock "length" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "Accumulator2" SrcPort 1 Points [15, 0] Branch { DstBlock "mod-16" DstPort 1 } Branch { Points [0, 150] DstBlock "AddSub1" DstPort 2 } } Line { SrcBlock "on_resetting_off1" SrcPort 1 Points [0, 0] Branch { Points [15, 0; 0, 45] DstBlock "on" DstPort 1 } Branch { Points [0, 105] Branch { Points [0, 180] DstBlock "reset2" DstPort 1 } Branch { Points [-465, 0] DstBlock "off1" DstPort 1 } } } Line { SrcBlock "Relational" SrcPort 1 DstBlock "ending" DstPort 1 } Line { SrcBlock "Shift" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 DstBlock "Logical3" DstPort 3 } Line { SrcBlock "Inverter2" SrcPort 1 Points [0, -20] DstBlock "Accumulator" DstPort 2 } Line { SrcBlock "Accumulator" SrcPort 1 DstBlock "Inverter3" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Tx Modulation" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "reset3" SrcPort 1 Points [50, 0] Branch { DstBlock "reset1" DstPort 1 } Branch { DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "From4" SrcPort 1 DstBlock "on_resetting_off1" DstPort 2 } Line { SrcBlock "ready" SrcPort 1 Points [15, 0] Branch { DstBlock "reset3" DstPort 1 } Branch { Points [0, 485] DstBlock "done1" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "Inverter4" DstPort 1 } Line { SrcBlock "Inverter4" SrcPort 1 Points [0, -15] DstBlock "reset3" DstPort 2 } Line { SrcBlock "BaseRate_En" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Tx Modulation" DstPort 1 } Line { SrcBlock "ifft_index" SrcPort 1 DstBlock "Tx Modulation" DstPort 3 } Line { SrcBlock "ant_sel" SrcPort 1 DstBlock "Tx Modulation" DstPort 2 } Line { SrcBlock "Assert" SrcPort 1 Points [-440, 0; 0, -375] DstBlock "Relational" DstPort 2 } Line { SrcBlock "FullRateMasks" SrcPort 1 DstBlock "Tx Modulation" DstPort 4 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Tx Ctrl" DstPort 1 } Line { SrcBlock "done2" SrcPort 1 DstBlock "Tx Ctrl" DstPort 2 } Line { SrcBlock "done3" SrcPort 1 DstBlock "Tx Ctrl" DstPort 3 } Line { SrcBlock "done4" SrcPort 1 DstBlock "Tx Ctrl" DstPort 4 } Line { SrcBlock "done5" SrcPort 1 DstBlock "Tx Ctrl" DstPort 5 } Line { SrcBlock "done6" SrcPort 1 DstBlock "Tx Ctrl" DstPort 6 } Line { SrcBlock "reset2" SrcPort 1 Points [60, 0; 0, -15] DstBlock "Logical5" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 Points [120, 0] Branch { Points [0, -80] DstBlock "Accumulator2" DstPort 2 } Branch { Points [0, 260] DstBlock "done4" DstPort 1 } } Line { SrcBlock "Delay2" SrcPort 1 Points [455, 0] DstBlock "Logical5" DstPort 2 } Annotation { Name "This input, sub sync, gives the user\n the ability to reset the subcarrier \ncounter so that the user" " can \ncontrol what subcarrier the system starts \nputting data on." Position [142, 319] DropShadow on } Annotation { Name "This input, ready, is a bit that \nis asserted when the user \nis ready for the system to run, \ni.e." " the user has loaded information\n into the memory and is ready to \nhandle the output." Position [154, 222] DropShadow on } Annotation { Name "This input, length, is the length \nof the packet loaded in memory." Position [98, 130] DropShadow on } Annotation { Name "This output puts out a pulse when the entire \nsystem is done taking the bytes from the memory." Position [408, 23] DropShadow on } Annotation { Name "This output, mod, is the desired modulation \ntype for a given group of bits. The values of this \nou" "tput is designated by the values in\n subcarrier_QAM_Values in the init file" Position [1239, 121] DropShadow on } Annotation { Name "This ouput, index, provides the index for \nthe location in the two registersos so that the register" "s \ncan know when to load and the slicer can know \nwhich bits to slice off of the 16-bit output of data_buffer" Position [1112, 781] DropShadow on } Annotation { Name "This subsystem acts as the control unit for the rest of the system. \nIt uses a state system to cont" "rol the system with three states, on, resetting, and off. \nThe number of subcarriers should be a power of two." Position [679, 785] DropShadow on } Annotation { Position [727, 332] } } } Block { BlockType SubSystem Name "data_buffer" SID "8659" Ports [4, 3] Position [770, 290, 920, 515] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "data_buffer" Location [2, 82, 1678, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "RAM data" SID "8660" Position [790, 121, 820, 139] IconDisplay "Port number" } Block { BlockType Inport Name "reset" SID "8661" Position [15, 141, 50, 159] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "index" SID "8662" Position [15, 192, 50, 208] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "mod" SID "8663" Position [15, 236, 55, 254] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" SID "8664" Ports [2, 1] Position [145, 195, 195, 250] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "4" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[2 0 0 4 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,55,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 55 55 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[34.7" "7 34.77 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[27.77 27.77 " "34.77 34.77 27.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[20.77 20.77 27.77 27.77 20." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('" "output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "8665" Ports [2, 1] Position [930, 235, 980, 290] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,55,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 55 55 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[34.7" "7 34.77 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[27.77 27.77 " "34.77 34.77 27.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[20.77 20.77 27.77 27.77 20." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\" "fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "8666" Ports [0, 1] Position [1040, 472, 1075, 498] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "log2(RAM_init_size)" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 26 26 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 26 26 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert" SID "8667" Ports [1, 1] Position [915, 402, 945, 418] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "8668" Ports [1, 1] Position [915, 382, 945, 398] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "8669" Ports [1, 1] Position [400, 72, 460, 128] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "8" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,254" block_type "delay" block_version "10.1.3" sg_icon_stat "60,56,1,1,white,blue,0,e47f993a,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36" ".88 44.88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36." "88 28.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]" ");\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0." "973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-8}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "8670" Ports [1, 1] Position [290, 222, 335, 268] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,46,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 46 46 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 46 46 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 2" "9.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 " "29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bl" "ack');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Gateway Out1" SID "8671" Ports [1, 1] Position [1265, 679, 1295, 691] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "addr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out2" SID "8672" Ports [1, 1] Position [1265, 694, 1295, 706] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "en1" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out3" SID "8673" Ports [1, 1] Position [1265, 709, 1295, 721] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "en2" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out4" SID "8674" Ports [1, 1] Position [1265, 664, 1295, 676] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "vout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out5" SID "8675" Ports [1, 1] Position [1265, 724, 1295, 736] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "reg" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out6" SID "8676" Ports [1, 1] Position [1265, 739, 1295, 751] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "30,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 12 12 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 30 30 0 0 ],[0 0 12 12 0 ]);\npatch([12.775 14.22 15.22 16.22 17.22 15.22 13.775 12.775 ],[7." "11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([13.775 15.22 14.22 12.775 13.775 ],[6.11 6.11 7.11 7." "11 6.11 ],[0.964 0.964 0.964 ]);\npatch([12.775 14.22 15.22 13.775 12.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]" ");\npatch([13.775 17.22 16.22 15.22 14.22 12.775 13.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" Port { PortNumber 1 Name "data" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Inverter1" SID "8677" Ports [1, 1] Position [435, 348, 470, 372] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12." "33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 " "9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\nc" "olor('black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter2" SID "8678" Ports [1, 1] Position [450, 233, 480, 257] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 24 24 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[15.3" "3 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[9.33 9.33 12.33 12.33 9.33 " "],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('" "black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8679" Ports [2, 1] Position [505, 328, 550, 372] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8680" Ports [2, 1] Position [515, 198, 560, 242] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "8681" Ports [2, 1] Position [690, 188, 735, 232] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "8682" Ports [2, 1] Position [695, 318, 740, 362] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "8683" Ports [4, 1] Position [675, 442, 705, 478] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,36,4,1,white,blue,0,4f3eee2e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 36 36 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 36 36 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[22.44 22.4" "4 26.44 22.44 26.44 26.44 26.44 22.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[18.44 18.44 22.44 22.44 " "18.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[14.44 14.44 18.44 18.44 14.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[10.44 10.44 14.44 10.44 14.44 14.44 10.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\ncolor('black');" "disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "8684" Ports [3, 1] Position [1125, 402, 1150, 468] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[5 0 0 10 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,66,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 9.42857 56.5714 66 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 9.42857 56.5714 66 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[36.33 36.33 39.33 36.33 39.33 39.33 39.33 36.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[33.33 33.33 36.33 36.33 33.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[30.33 30.33 " "33.33 33.33 30.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33 27.33 30.33" " 30.33 27.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');" } Block { BlockType Reference Name "Mux1" SID "8685" Ports [3, 1] Position [965, 452, 990, 518] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[5 0 0 10 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,66,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 9.42857 56.5714 66 0 ]" ",[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 9.42857 56.5714 66 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66" " 8.325 5.325 ],[36.33 36.33 39.33 36.33 39.33 39.33 39.33 36.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.32" "5 ],[33.33 33.33 36.33 36.33 33.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[30.33 30.33 " "33.33 33.33 30.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33 27.33 30.33" " 30.33 27.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black" "');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');" } Block { BlockType Reference Name "RAM counter" SID "8686" Ports [2, 1] Position [870, 420, 920, 475] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "log2(RAM_init_size)" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[5 10 0 10 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,619" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,55,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 55 55 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[34.7" "7 34.77 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[27.77 27.77 " "34.77 34.77 27.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[20.77 20.77 27.77 27.77 20." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{" "\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "RAM counter1" SID "8687" Ports [2, 1] Position [870, 500, 920, 555] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited count" "er is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "1" cnt_by_val "1" arith_type "Unsigned" n_bits "log2(RAM_init_size)" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[5 10 0 10 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,619" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,55,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 55 55 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 55 55 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[34.7" "7 34.77 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[27.77 27.77 " "34.77 34.77 27.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[20.77 20.77 27.77 27.77 20." "77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[13.77 13.77 20.77 13.77 20.77 20.77 13.77" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nc" "olor('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{" "\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register1" SID "8688" Ports [2, 1] Position [870, 172, 905, 223] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[4 8 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,51,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 51 51 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[30.55 30." "55 35.55 30.55 35.55 35.55 35.55 30.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[25.55 25.55 30.55 3" "0.55 25.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[20.55 20.55 25.55 25.55 20.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[15.55 15.55 20.55 15.55 20.55 20.55 15.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q" "');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "8689" Ports [2, 1] Position [870, 301, 905, 354] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[4 8 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,53,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 53 53 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 53 53 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[31.55 31." "55 36.55 31.55 36.55 36.55 36.55 31.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[26.55 26.55 31.55 3" "1.55 26.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[21.55 21.55 26.55 26.55 21.55 ],[1 1" " 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[16.55 16.55 21.55 16.55 21.55 21.55 16.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q" "');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register3" SID "8690" Ports [1, 1] Position [255, 75, 295, 125] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,50,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 50 50 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 50 50 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[30.55 30." "55 35.55 30.55 35.55 35.55 35.55 30.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[25.55 25.55 30.55 3" "0.55 25.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[20.55 20.55 25.55 25.55 20.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[15.55 15.55 20.55 15.55 20.55 20.55 15.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register4" SID "8691" Ports [1, 1] Position [615, 265, 665, 305] BlockRotation 270 BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,40,1,1,white,blue,0,c80657c5,down,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 40 40 0 ]);\npatch([13.875 21.1 26.1 31.1 36.1 26.1 18.875 13.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([18.875 26.1 21.1 13.875 18.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([13.875 21.1 26.1 18.875 13.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([18.875 36.1 31.1 26.1 21.1 13.875 18.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register5" SID "8692" Ports [1, 1] Position [785, 200, 805, 220] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,20,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 20 20 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[12.22 12." "22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Register6" SID "8693" Ports [1, 1] Position [785, 330, 805, 350] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[2 4 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "20,20,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 20 20 0 0 ],[0 0 20 20 0 ]);\npatch([5.55 8.44 10.44 12.44 14.44 10.44 7.55 5.55 ],[12.22 12." "22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([7.55 10.44 8.44 5.55 7.55 ],[10.22 10.22 12.22 12.22" " 10.22 ],[0.931 0.946 0.973 ]);\npatch([5.55 8.44 10.44 7.55 5.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npa" "tch([7.55 14.44 12.44 10.44 8.44 5.55 7.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Slice1" SID "8694" Ports [1, 1] Position [360, 231, 405, 259] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice9" SID "8695" Ports [1, 1] Position [290, 186, 335, 214] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "Tx Bytes" SID "8696" Ports [6] Position [1370, 655, 1435, 760] Floating off Location [143, 86, 1823, 1053] Open off NumInputPorts "6" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" } TimeRange "15000" YMin "-1~0~-1~-1~-5~-5" YMax "2~4e+009~2~2~5~5" SaveName "ScopeData30" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Outport Name "RAM address (B)" SID "8697" Position [1210, 428, 1240, 442] IconDisplay "Port number" } Block { BlockType Outport Name "RAM addr Vout" SID "8698" Position [1205, 558, 1235, 572] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "16-Bit Register" SID "8699" Position [1050, 258, 1080, 272] Port "3" IconDisplay "Port number" } Line { SrcBlock "Convert1" SrcPort 1 Points [160, 0] DstBlock "Mux" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Mux1" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 Points [15, 0; 0, -50] DstBlock "Mux" DstPort 2 } Line { SrcBlock "RAM counter" SrcPort 1 Points [10, 0; 0, 35] DstBlock "Mux1" DstPort 2 } Line { SrcBlock "RAM counter1" SrcPort 1 Points [10, 0; 0, -25] DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Logical6" SrcPort 1 Points [120, 0] Branch { Points [0, 0] Branch { Points [0, -50] DstBlock "Convert" DstPort 1 } Branch { DstBlock "RAM counter" DstPort 2 } } Branch { Points [0, 80] Branch { DstBlock "RAM counter1" DstPort 2 } Branch { Points [0, 25; 350, 0] Branch { DstBlock "RAM addr Vout" DstPort 1 } Branch { Points [0, 105] DstBlock "Gateway Out4" DstPort 1 } } } } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Register6" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Register5" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 Points [5, 0] Branch { DstBlock "RAM address (B)" DstPort 1 } Branch { Points [0, 250] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "Constant" SrcPort 1 Points [0, -30] DstBlock "Mux" DstPort 3 } Line { SrcBlock "Register1" SrcPort 1 Points [5, 0] DstBlock "Concat" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 Points [5, 0] DstBlock "Concat" DstPort 2 } Line { SrcBlock "reset" SrcPort 1 Points [70, 0] Branch { Points [0, 240; 715, 0] Branch { DstBlock "Convert1" DstPort 1 } Branch { Points [0, 45] Branch { Points [0, 80] DstBlock "RAM counter1" DstPort 1 } Branch { DstBlock "RAM counter" DstPort 1 } } } Branch { Points [100, 0; 0, -50] DstBlock "Register3" DstPort 1 } } Line { SrcBlock "RAM data" SrcPort 1 Points [20, 0; 0, 55] Branch { DstBlock "Register1" DstPort 1 } Branch { Points [0, 130] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, 430] DstBlock "Gateway Out6" DstPort 1 } } } Line { SrcBlock "Logical2" SrcPort 1 Points [15, 0] Branch { DstBlock "Logical3" DstPort 2 } Branch { Points [0, 245] DstBlock "Logical6" DstPort 3 } } Line { SrcBlock "Slice1" SrcPort 1 Points [5, 0; 20, 0] Branch { Points [-5, 0; 0, 95] DstBlock "Logical1" DstPort 1 } Branch { DstBlock "Inverter2" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 Points [70, 0] Branch { DstBlock "Logical4" DstPort 2 } Branch { Points [0, 95] DstBlock "Logical6" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Inverter2" SrcPort 1 Points [5, 0; 0, -15] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Concat" SrcPort 1 Points [10, 0] Branch { DstBlock "16-Bit Register" DstPort 1 } Branch { Points [0, 465] DstBlock "Gateway Out5" DstPort 1 } } Line { SrcBlock "Register4" SrcPort 1 Points [0, 20] Branch { DstBlock "Logical4" DstPort 1 } Branch { Points [0, 145] DstBlock "Logical6" DstPort 4 } } Line { SrcBlock "Slice9" SrcPort 1 Points [0, 0; 80, 0] Branch { DstBlock "Inverter1" DstPort 1 } Branch { Points [70, 0; 0, 10] DstBlock "Logical2" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Slice1" DstPort 1 } Line { SrcBlock "index" SrcPort 1 Points [75, 0] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "mod" SrcPort 1 Points [70, 0] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 Points [65, 0] Branch { Points [0, 20] DstBlock "Delay1" DstPort 1 } Branch { Points [0, -25] DstBlock "Slice9" DstPort 1 } } Line { SrcBlock "Register3" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "Register6" SrcPort 1 Points [5, 0] Branch { DstBlock "Register2" DstPort 2 } Branch { Points [0, 375] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "Register5" SrcPort 1 Points [15, 0] Branch { DstBlock "Register1" DstPort 2 } Branch { Points [0, 490] DstBlock "Gateway Out2" DstPort 1 } } Line { Name "vout" Labels [0, 0] SrcBlock "Gateway Out4" SrcPort 1 DstBlock "Tx Bytes" DstPort 1 } Line { Name "addr" Labels [0, 0] SrcBlock "Gateway Out1" SrcPort 1 DstBlock "Tx Bytes" DstPort 2 } Line { Name "en1" Labels [0, 0] SrcBlock "Gateway Out2" SrcPort 1 DstBlock "Tx Bytes" DstPort 3 } Line { Name "en2" Labels [0, 0] SrcBlock "Gateway Out3" SrcPort 1 DstBlock "Tx Bytes" DstPort 4 } Line { Name "reg" Labels [0, 0] SrcBlock "Gateway Out5" SrcPort 1 DstBlock "Tx Bytes" DstPort 5 } Line { SrcBlock "Delay" SrcPort 1 Points [210, 0; 0, 50; -10, 0] Branch { Points [0, 50] DstBlock "Logical3" DstPort 1 } Branch { Points [-25, 0] Branch { DstBlock "Register4" DstPort 1 } Branch { Points [-25, 0; 0, 305] DstBlock "Logical6" DstPort 2 } } } Line { Name "data" Labels [0, 0] SrcBlock "Gateway Out6" SrcPort 1 DstBlock "Tx Bytes" DstPort 6 } Annotation { Name "This output, 16-Bit Register, holds the 16 currently buffered bits\nfrom two bytes of RAM data. Bits" " are stripped and used from these 16, \nand every time the first eight or last eight bits are about to be exhaus" "ted,\nthe system will load a new byte into the first or last eight bits of the buffer. In\nthis way, nomatter w" "hat the current index is or how many bits will be used for the\nfollowing subcarriers, there will always be a su" "fficient number of available bits." Position [1182, 194] DropShadow on } Annotation { Name "increment address after reset or \nwhen index has gone past 7 or 15" Position [290, 459] DropShadow on } Annotation { Name "This input, RAM data, is the data \nthat is returned from the RAM \nfor a given address designated by" " RAM \naddress a cycle earlier. RAM data \nis expected to be one byte long." Position [855, 71] DropShadow on } Annotation { Name "This ouput, RAM address, outputs the \naddress that data_buffer needs next." Position [1244, 364] DropShadow on } } } Block { BlockType Reference Name "fec_encoder" SID "8700" Ports [8, 4] Position [1190, 226, 1345, 464] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Black Box" SourceType "Xilinx Black Box Block" infoedit " Incorporates black box HDL and simulation model into a System Generator design.

You must supply" " a Black Box with certain information about the HDL component you would like to bring into System Generator. This " "information is provided through a Matlab function.

When \"Simulation mode\" is set to \"Inactive\", you will " "typically want to provide a separate simulation model by using a Simulation Multiplexer.

When \"Simulation mode\"" " is set to \"External co-simulator\", you must include a ModelSim block in the design." init_code "fec_encoder_config" sim_method "ISE Simulator" verbose off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,388" block_type "blackbox2" block_version "10.1.3" sg_icon_stat "155,238,8,4,white,blue,0,b4c75768,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 155 155 0 0 ],[0 0 238 238 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 155 155 0 0 ],[0 0 238 238 0 ]);\npatch([28.05 59.84 81.84 103.84 125.84 81.84 50.05 28.05 ],[1" "43.42 143.42 165.42 143.42 165.42 165.42 165.42 143.42 ],[1 1 1 ]);\npatch([50.05 81.84 59.84 28.05 50.05 ],[121.4" "2 121.42 143.42 143.42 121.42 ],[0.931 0.946 0.973 ]);\npatch([28.05 59.84 81.84 50.05 28.05 ],[99.42 99.42 121.42" " 121.42 99.42 ],[1 1 1 ]);\npatch([50.05 125.84 103.84 81.84 59.84 28.05 50.05 ],[77.42 77.42 99.42 77.42 99.42 99" ".42 77.42 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon tex" "t');\ncolor('black');port_label('input',1,'nrst');\ncolor('black');port_label('input',2,'start');\ncolor('black');" "port_label('input',3,'coding_en');\ncolor('black');port_label('input',4,'pkt_done');\ncolor('black');port_label('i" "nput',5,'fec_rd');\ncolor('black');port_label('input',6,'info_data');\ncolor('black');port_label('input',7,'info_s" "cram');\ncolor('black');port_label('input',8,'info_len');\ncolor('black');port_label('output',1,'codeword_len');\n" "color('black');port_label('output',2,'info_rd');\ncolor('black');port_label('output',3,'info_raddr');\ncolor('blac" "k');port_label('output',4,'fec_data');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "posedge1" SID "8701" Ports [1, 1] Position [350, 330, 410, 360] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Period" MaskStyleString "edit" MaskVariables "period=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "1" System { Name "posedge1" Location [2, 70, 1278, 976] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "signal" SID "8702" Position [15, 38, 45, 52] IconDisplay "Port number" } Block { BlockType SubSystem Name "Delay3" SID "8703" Ports [1, 1] Position [140, 57, 185, 103] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Delay3" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "in0" SID "8704" Position [70, 117, 100, 133] IconDisplay "Port number" } Block { BlockType Reference Name "Delay3" SID "8705" Ports [1, 1] Position [150, 102, 195, 148] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,46,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 46 46 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 46 46 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 2" "9.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 " "29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bl" "ack');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "out0" SID "8706" Position [325, 117, 355, 133] IconDisplay "Port number" } Line { SrcBlock "in0" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "out0" DstPort 1 } } } Block { BlockType SubSystem Name "Inverter2" SID "8707" Ports [1, 1] Position [75, 63, 120, 97] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Inverter2" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "in0" SID "8708" Position [70, 107, 100, 123] IconDisplay "Port number" } Block { BlockType Reference Name "Inverter2" SID "8709" Ports [1, 1] Position [150, 98, 195, 132] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,34,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 34 34 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[21.44 21" ".44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[17.44 17.44 21.44 21." "44 17.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "out0" SID "8710" Position [325, 107, 355, 123] IconDisplay "Port number" } Line { SrcBlock "in0" SrcPort 1 DstBlock "Inverter2" DstPort 1 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "out0" DstPort 1 } } } Block { BlockType SubSystem Name "Logical3" SID "8711" Ports [2, 1] Position [210, 48, 255, 92] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Logical3" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "in0" SID "8712" Position [70, 102, 100, 118] IconDisplay "Port number" } Block { BlockType Inport Name "in1" SID "8713" Position [70, 142, 100, 158] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Logical3" SID "8714" Ports [2, 1] Position [150, 98, 195, 142] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "out0" SID "8715" Position [325, 112, 355, 128] IconDisplay "Port number" } Line { SrcBlock "in0" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "in1" SrcPort 1 Points [15, 0; 0, -20] DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "out0" DstPort 1 } } } Block { BlockType Outport Name "pulse" SID "8716" Position [275, 63, 305, 77] IconDisplay "Port number" } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "signal" SrcPort 1 Points [10, 0] Branch { DstBlock "Inverter2" DstPort 1 } Branch { Points [135, 0] DstBlock "Logical3" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "pulse" DstPort 1 } } } Block { BlockType SubSystem Name "posedge2" SID "8717" Ports [1, 1] Position [1255, 160, 1320, 180] BlockMirror on ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskPromptString "Period" MaskStyleString "edit" MaskVariables "period=@1;" MaskTunableValueString "on" MaskEnableString "on" MaskVisibilityString "on" MaskToolTipString "on" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "1" System { Name "posedge2" Location [2, 82, 1278, 988] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "signal" SID "8718" Position [15, 38, 45, 52] IconDisplay "Port number" } Block { BlockType SubSystem Name "Delay3" SID "8719" Ports [1, 1] Position [140, 57, 185, 103] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Delay3" Location [2, 82, 1184, 1016] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "in0" SID "8720" Position [70, 117, 100, 133] IconDisplay "Port number" } Block { BlockType Reference Name "Delay3" SID "8721" Ports [1, 1] Position [150, 102, 195, 148] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,46,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 46 46 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 46 46 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 2" "9.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 " "29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bl" "ack');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "out0" SID "8722" Position [325, 117, 355, 133] IconDisplay "Port number" } Line { SrcBlock "in0" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "out0" DstPort 1 } } } Block { BlockType SubSystem Name "Inverter2" SID "8723" Ports [1, 1] Position [75, 63, 120, 97] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Inverter2" Location [2, 82, 1184, 1016] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "in0" SID "8724" Position [70, 107, 100, 123] IconDisplay "Port number" } Block { BlockType Reference Name "Inverter2" SID "8725" Ports [1, 1] Position [150, 98, 195, 132] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,34,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 34 34 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 34 34 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[21.44 21" ".44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[17.44 17.44 21.44 21." "44 17.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp" "('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "out0" SID "8726" Position [325, 107, 355, 123] IconDisplay "Port number" } Line { SrcBlock "in0" SrcPort 1 DstBlock "Inverter2" DstPort 1 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "out0" DstPort 1 } } } Block { BlockType SubSystem Name "Logical3" SID "8727" Ports [2, 1] Position [210, 48, 255, 92] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Logical3" Location [2, 82, 1184, 1016] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "in0" SID "8728" Position [70, 102, 100, 118] IconDisplay "Port number" } Block { BlockType Inport Name "in1" SID "8729" Position [70, 142, 100, 158] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Logical3" SID "8730" Ports [2, 1] Position [150, 98, 195, 142] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "out0" SID "8731" Position [325, 112, 355, 128] IconDisplay "Port number" } Line { SrcBlock "in0" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "in1" SrcPort 1 Points [15, 0; 0, -20] DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "out0" DstPort 1 } } } Block { BlockType Outport Name "pulse" SID "8732" Position [275, 63, 305, 77] IconDisplay "Port number" } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "signal" SrcPort 1 Points [10, 0] Branch { DstBlock "Inverter2" DstPort 1 } Branch { Points [135, 0] DstBlock "Logical3" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "pulse" DstPort 1 } } } Block { BlockType SubSystem Name "slicer" SID "8733" Ports [2, 1] Position [965, 466, 1065, 579] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "slicer" Location [337, 122, 1338, 919] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "16-Bit In" SID "8734" Position [25, 123, 55, 137] IconDisplay "Port number" } Block { BlockType Inport Name "index" SID "8735" Position [25, 98, 55, 112] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Concat" SID "8736" Ports [2, 1] Position [300, 395, 345, 435] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,40,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 40 40 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsiz" "e{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat1" SID "8737" Ports [2, 1] Position [300, 485, 345, 525] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,40,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 40 40 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsiz" "e{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat2" SID "8738" Ports [2, 1] Position [300, 530, 345, 570] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,40,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 40 40 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsiz" "e{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat3" SID "8739" Ports [2, 1] Position [300, 575, 345, 615] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,40,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 40 40 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsiz" "e{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat4" SID "8740" Ports [2, 1] Position [300, 620, 345, 660] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,40,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 40 40 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsiz" "e{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat5" SID "8741" Ports [2, 1] Position [300, 665, 345, 705] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,40,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 40 40 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsiz" "e{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat7" SID "8742" Ports [2, 1] Position [300, 440, 345, 480] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,40,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 40 40 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 40 40 0 ]);\npatch([10.875 18.1 23.1 28.1 33.1 23.1 15.875 10.875 ],[25.55 2" "5.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([15.875 23.1 18.1 10.875 15.875 ],[20.55 20.55 25.5" "5 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([10.875 18.1 23.1 15.875 10.875 ],[15.55 15.55 20.55 20.55 15.55 ]" ",[1 1 1 ]);\npatch([15.875 33.1 28.1 23.1 18.1 10.875 15.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('b" "lack');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsiz" "e{20}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "8743" Ports [17, 1] Position [540, 68, 600, 542] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "16" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[36 0 0 72 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "60,474,17,1,white,blue,3,bd351760,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 67.7143 406.286 474 0 " "],[0.77 0.82 0.91 ]);\nplot([0 60 60 0 0 ],[0 67.7143 406.286 474 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31." "76 20.2 12.2 ],[245.88 245.88 253.88 245.88 253.88 253.88 253.88 245.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12" ".2 20.2 ],[237.88 237.88 245.88 245.88 237.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[229" ".88 229.88 237.88 237.88 229.88 ],[1 1 1 ]);\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[221.88 221.88 229" ".88 221.88 229.88 229.88 221.88 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf(''," "'COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'" "d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');po" "rt_label('input',5,'d3');\ncolor('black');port_label('input',6,'d4');\ncolor('black');port_label('input',7,'d5')" ";\ncolor('black');port_label('input',8,'d6');\ncolor('black');port_label('input',9,'d7');\ncolor('black');port_l" "abel('input',10,'d8');\ncolor('black');port_label('input',11,'d9');\ncolor('black');port_label('input',12,'d10')" ";\ncolor('black');port_label('input',13,'d11');\ncolor('black');port_label('input',14,'d12');\ncolor('black');po" "rt_label('input',15,'d13');\ncolor('black');port_label('input',16,'d14');\ncolor('black');port_label('input',17," "'d15');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice" SID "8744" Ports [1, 1] Position [230, 116, 275, 144] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice1" SID "8745" Ports [1, 1] Position [230, 146, 275, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Upper Bit Location + Width" bit1 "-1" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice10" SID "8746" Ports [1, 1] Position [235, 462, 275, 478] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice11" SID "8747" Ports [1, 1] Position [235, 417, 275, 433] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice12" SID "8748" Ports [1, 1] Position [235, 442, 275, 458] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "6" boolean_output off mode "Upper Bit Location + Width" bit1 "-10" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice13" SID "8749" Ports [1, 1] Position [235, 507, 275, 523] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "3" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice14" SID "8750" Ports [1, 1] Position [235, 487, 275, 503] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Upper Bit Location + Width" bit1 "-11" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice15" SID "8751" Ports [1, 1] Position [235, 552, 275, 568] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice16" SID "8752" Ports [1, 1] Position [235, 532, 275, 548] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "4" boolean_output off mode "Upper Bit Location + Width" bit1 "-12" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice17" SID "8753" Ports [1, 1] Position [235, 597, 275, 613] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice18" SID "8754" Ports [1, 1] Position [235, 577, 275, 593] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "3" boolean_output off mode "Upper Bit Location + Width" bit1 "-13" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice19" SID "8755" Ports [1, 1] Position [235, 642, 275, 658] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "6" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice2" SID "8756" Ports [1, 1] Position [230, 176, 275, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Upper Bit Location + Width" bit1 "-2" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice20" SID "8757" Ports [1, 1] Position [235, 622, 275, 638] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Upper Bit Location + Width" bit1 "-14" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice21" SID "8758" Ports [1, 1] Position [235, 687, 275, 703] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "7" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice22" SID "8759" Ports [1, 1] Position [235, 667, 275, 683] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "-15" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice3" SID "8760" Ports [1, 1] Position [230, 206, 275, 234] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Upper Bit Location + Width" bit1 "-3" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice4" SID "8761" Ports [1, 1] Position [230, 236, 275, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Upper Bit Location + Width" bit1 "-4" base1 "MSB of Input" bit0 "-4" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice5" SID "8762" Ports [1, 1] Position [230, 266, 275, 294] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Upper Bit Location + Width" bit1 "-5" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice6" SID "8763" Ports [1, 1] Position [230, 296, 275, 324] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Upper Bit Location + Width" bit1 "-6" base1 "MSB of Input" bit0 "6" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice7" SID "8764" Ports [1, 1] Position [230, 326, 275, 354] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Upper Bit Location + Width" bit1 "-7" base1 "MSB of Input" bit0 "7" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice8" SID "8765" Ports [1, 1] Position [230, 356, 275, 384] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Upper Bit Location + Width" bit1 "-8" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,28,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 28 28 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[18.44 18" ".44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[14.44 14.44 18.44 18." "44 14.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]" ");\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_l" "abel('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Slice9" SID "8766" Ports [1, 1] Position [235, 397, 275, 413] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "7" boolean_output off mode "Upper Bit Location + Width" bit1 "-9" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Byte Out" SID "8767" Position [705, 298, 735, 312] IconDisplay "Port number" } Line { SrcBlock "index" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Byte Out" DstPort 1 } Line { SrcBlock "Concat" SrcPort 1 Points [85, 0; 0, -60] DstBlock "Mux" DstPort 11 } Line { SrcBlock "Slice8" SrcPort 1 Points [145, 0; 0, -40] DstBlock "Mux" DstPort 10 } Line { SrcBlock "Slice7" SrcPort 1 Points [135, 0; 0, -35] DstBlock "Mux" DstPort 9 } Line { SrcBlock "Slice6" SrcPort 1 Points [125, 0; 0, -30] DstBlock "Mux" DstPort 8 } Line { SrcBlock "Slice5" SrcPort 1 Points [115, 0; 0, -25] DstBlock "Mux" DstPort 7 } Line { SrcBlock "Slice4" SrcPort 1 Points [105, 0; 0, -20] DstBlock "Mux" DstPort 6 } Line { SrcBlock "Slice3" SrcPort 1 Points [95, 0; 0, -15] DstBlock "Mux" DstPort 5 } Line { SrcBlock "Slice2" SrcPort 1 Points [85, 0; 0, -10] DstBlock "Mux" DstPort 4 } Line { SrcBlock "Slice1" SrcPort 1 Points [75, 0; 0, -5] DstBlock "Mux" DstPort 3 } Line { SrcBlock "Slice" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "16-Bit In" SrcPort 1 Points [0, 0; 155, 0] Branch { Points [0, 25] Branch { DstBlock "Slice1" DstPort 1 } Branch { Points [0, 25] Branch { Points [0, 25] Branch { Points [0, 25] Branch { Points [0, 25] Branch { Points [0, 25] Branch { Points [0, 60] Branch { Points [0, 30] Branch { Points [0, 35] Branch { DstBlock "Slice9" DstPort 1 } Branch { Points [0, 20] Branch { DstBlock "Slice11" DstPort 1 } Branch { Points [0, 25] Branch { DstBlock "Slice12" DstPort 1 } Branch { Points [0, 20] Branch { DstBlock "Slice10" DstPort 1 } Branch { Points [0, 25] Branch { DstBlock "Slice14" DstPort 1 } Branch { Points [0, 20] Branch { DstBlock "Slice13" DstPort 1 } Branch { Points [0, 25] Branch { DstBlock "Slice16" DstPort 1 } Branch { Points [0, 20] Branch { DstBlock "Slice15" DstPort 1 } Branch { Points [0, 25] Branch { DstBlock "Slice18" DstPort 1 } Branch { Points [0, 20] Branch { DstBlock "Slice17" DstPort 1 } Branch { Points [0, 25] Branch { DstBlock "Slice20" DstPort 1 } Branch { Points [0, 20] Branch { DstBlock "Slice19" DstPort 1 } Branch { Points [0, 25] Branch { Points [0, 20] DstBlock "Slice21" DstPort 1 } Branch { DstBlock "Slice22" DstPort 1 } } } } } } } } } } } } } } Branch { DstBlock "Slice8" DstPort 1 } } Branch { DstBlock "Slice7" DstPort 1 } } Branch { DstBlock "Slice6" DstPort 1 } } Branch { DstBlock "Slice5" DstPort 1 } } Branch { DstBlock "Slice4" DstPort 1 } } Branch { DstBlock "Slice3" DstPort 1 } } Branch { DstBlock "Slice2" DstPort 1 } } } Branch { DstBlock "Slice" DstPort 1 } } Line { SrcBlock "Slice9" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "Slice11" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "Slice12" SrcPort 1 DstBlock "Concat7" DstPort 1 } Line { SrcBlock "Slice10" SrcPort 1 DstBlock "Concat7" DstPort 2 } Line { SrcBlock "Concat7" SrcPort 1 Points [95, 0; 0, -80] DstBlock "Mux" DstPort 12 } Line { SrcBlock "Slice14" SrcPort 1 DstBlock "Concat1" DstPort 1 } Line { SrcBlock "Slice13" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "Slice16" SrcPort 1 DstBlock "Concat2" DstPort 1 } Line { SrcBlock "Slice15" SrcPort 1 DstBlock "Concat2" DstPort 2 } Line { SrcBlock "Slice18" SrcPort 1 DstBlock "Concat3" DstPort 1 } Line { SrcBlock "Slice17" SrcPort 1 DstBlock "Concat3" DstPort 2 } Line { SrcBlock "Slice20" SrcPort 1 DstBlock "Concat4" DstPort 1 } Line { SrcBlock "Slice19" SrcPort 1 DstBlock "Concat4" DstPort 2 } Line { SrcBlock "Slice22" SrcPort 1 DstBlock "Concat5" DstPort 1 } Line { SrcBlock "Slice21" SrcPort 1 DstBlock "Concat5" DstPort 2 } Line { SrcBlock "Concat1" SrcPort 1 Points [105, 0; 0, -100] DstBlock "Mux" DstPort 13 } Line { SrcBlock "Concat2" SrcPort 1 Points [115, 0; 0, -120] DstBlock "Mux" DstPort 14 } Line { SrcBlock "Concat3" SrcPort 1 Points [125, 0; 0, -140] DstBlock "Mux" DstPort 15 } Line { SrcBlock "Concat4" SrcPort 1 Points [135, 0; 0, -160] DstBlock "Mux" DstPort 16 } Line { SrcBlock "Concat5" SrcPort 1 Points [145, 0; 0, -180] DstBlock "Mux" DstPort 17 } Annotation { Name "This input, index, is passed from data_buffer to designate what slice is to be used" Position [264, 89] } Annotation { Name "This input, 16-Big In, is the 16 bit signal \nthat is to be sliced into an 8 bit \nnumber that will b" "e passed to the \nmodulator." Position [100, 185] } Annotation { Name "This output, Byte Out, outputs an 8 bit \nsegment of the 16 bit number that was inputted,\n It can b" "e any group of sequencial bits \nincluding wrapping around. " Position [717, 215] } Annotation { Name "This subsystem slices down the 16 bit inputted signal so that an 8 bit signal can be \noutputted and " "passed for modulation. The specific slice chosen is defined by tyhe input index. \nIndex is the location in the" " registers of the system at a given time." Position [576, 732] } } } Block { BlockType Outport Name "I" SID "8768" Position [1320, 563, 1350, 577] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "Q" SID "8769" Position [1325, 638, 1355, 652] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Payload Done" SID "8770" Position [1415, 93, 1445, 107] Port "3" IconDisplay "Port number" } Line { SrcBlock "control" SrcPort 3 Points [10, 0; 0, 60] Branch { DstBlock "data_buffer" DstPort 4 } Branch { Points [0, 160] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "vin" SrcPort 1 DstBlock "control" DstPort 6 } Line { SrcBlock "control" SrcPort 2 Points [25, 0; 0, 60] Branch { DstBlock "data_buffer" DstPort 3 } Branch { Points [0, 120] DstBlock "Register2" DstPort 1 } } Line { SrcBlock "slicer" SrcPort 1 Points [5, 0; 0, 45] DstBlock "QAM" DstPort 1 } Line { SrcBlock "QAM" SrcPort 1 DstBlock "I" DstPort 1 } Line { SrcBlock "QAM" SrcPort 2 DstBlock "Q" DstPort 1 } Line { SrcBlock "data_buffer" SrcPort 3 Points [25, 0] DstBlock "slicer" DstPort 1 } Line { SrcBlock "control" SrcPort 1 Points [35, 0; 0, 60] DstBlock "data_buffer" DstPort 2 } Line { SrcBlock "ifft_index" SrcPort 1 Points [15, 0] Branch { DstBlock "control" DstPort 4 } Branch { Points [0, 315] DstBlock "Gateway Out8" DstPort 1 } } Line { SrcBlock "BaseRate_En" SrcPort 1 DstBlock "control" DstPort 5 } Line { SrcBlock "ant_sel" SrcPort 1 Points [25, 0] Branch { DstBlock "control" DstPort 7 } Branch { Points [0, 285] DstBlock "Gateway Out11" DstPort 1 } } Line { SrcBlock "posedge1" SrcPort 1 Points [35, 0] Branch { DstBlock "control" DstPort 3 } Branch { Points [0, -255; 480, 0] Branch { DstBlock "PktBuffer_CRC1" DstPort 1 } Branch { DstBlock "SR Latch" DstPort 1 } } } Line { SrcBlock "PktBuffer_CRC1" SrcPort 2 Points [-270, 0] DstBlock "control" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "slicer" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "QAM" DstPort 2 } Line { SrcBlock "Relational4" SrcPort 1 Points [35, 0; 0, -20] DstBlock "SR Latch" DstPort 2 } Line { SrcBlock "SR Latch" SrcPort 1 Points [35, 0] Branch { Points [0, -90; -1380, 0; 0, 765] DstBlock "Gateway Out14" DstPort 1 } Branch { Points [0, 0] Branch { DstBlock "Payload Done" DstPort 1 } Branch { Points [0, 0; 0, 70] Branch { Points [110, 0; 0, 545] Branch { Points [0, 235] DstBlock "Gateway Out18" DstPort 1 } Branch { Points [-710, 0; 0, 105; -430, 0; 0, -60] DstBlock "Gateway Out13" DstPort 1 } } Branch { DstBlock "posedge2" DstPort 1 } } } } Line { SrcBlock "S-R Latch1" SrcPort 1 DstBlock "posedge1" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "S-R Latch1" DstPort 1 } Line { SrcBlock "start" SrcPort 1 Points [0, -10; 25, 0] Branch { Points [0, 0] Branch { DstBlock "S-R Latch1" DstPort 2 } Branch { Points [0, -120; 785, 0; 0, 40; 150, 0] Branch { Points [0, 545] DstBlock "Gateway Out1" DstPort 1 } Branch { DstBlock "fec_encoder" DstPort 2 } } } Branch { Points [0, 365] DstBlock "Gateway Out10" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 Points [25, 0] Branch { DstBlock "Logical2" DstPort 2 } Branch { Points [0, -140] DstBlock "Inverter" DstPort 1 } } Line { SrcBlock "packet_done" SrcPort 1 Points [20, 0] Branch { DstBlock "Logical2" DstPort 1 } Branch { Points [0, 420] DstBlock "Gateway Out12" DstPort 1 } } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [50, 0; 0, 55] DstBlock "Relational4" DstPort 1 } Line { SrcBlock "data_buffer" SrcPort 2 Points [5, 0] Branch { Points [0, 180; -460, 0; 0, 115] DstBlock "Gateway Out9" DstPort 1 } Branch { Points [0, -45; 210, 0] Branch { Points [0, 470] DstBlock "Gateway Out2" DstPort 1 } Branch { DstBlock "fec_encoder" DstPort 5 } } } Line { SrcBlock "fec_encoder" SrcPort 3 Points [25, 0] Branch { Points [0, 0; 0, -170; -340, 0; 0, -25] DstBlock "PktBuffer_CRC1" DstPort 3 } Branch { Points [0, 0; 0, 500] DstBlock "Gateway Out6" DstPort 1 } } Line { SrcBlock "PktBuffer_CRC1" SrcPort 3 Points [-30, 0; 0, 110; 220, 0; 0, 150; 160, 0] Branch { DstBlock "fec_encoder" DstPort 7 } Branch { Points [0, 470] DstBlock "Gateway Out7" DstPort 1 } } Line { SrcBlock "fec_encoder" SrcPort 4 Points [120, 0; 0, 330] Branch { Points [-730, 0; 0, -445] DstBlock "data_buffer" DstPort 1 } Branch { Points [0, 80] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "fec_encoder" SrcPort 2 Points [100, 0] Branch { Points [0, -130; -400, 0; 0, -30] DstBlock "PktBuffer_CRC1" DstPort 2 } Branch { Points [0, 545] DstBlock "Gateway Out5" DstPort 1 } } Line { SrcBlock "data_buffer" SrcPort 1 Points [175, 0; 0, -195] DstBlock "Relational4" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [625, 0; 0, 40; 160, 0] Branch { Points [0, 560] DstBlock "Gateway Out4" DstPort 1 } Branch { DstBlock "fec_encoder" DstPort 1 } } Line { Name "nrst" Labels [0, 0] SrcBlock "Gateway Out4" SrcPort 1 DstBlock "Encoder" DstPort 1 } Line { Name "start" Labels [0, 0] SrcBlock "Gateway Out1" SrcPort 1 DstBlock "Encoder" DstPort 2 } Line { Name "fec_rd" Labels [0, 0] SrcBlock "Gateway Out2" SrcPort 1 DstBlock "Encoder" DstPort 3 } Line { Name "fec_data" Labels [0, 0] SrcBlock "Gateway Out3" SrcPort 1 DstBlock "Encoder" DstPort 4 } Line { Name "info_rd" Labels [0, 0] SrcBlock "Gateway Out5" SrcPort 1 DstBlock "Encoder" DstPort 5 } Line { Name "info_raddr" Labels [0, 0] SrcBlock "Gateway Out6" SrcPort 1 DstBlock "Encoder" DstPort 6 } Line { Name "info_scram" Labels [0, 0] SrcBlock "Gateway Out7" SrcPort 1 DstBlock "Encoder" DstPort 7 } Line { Name "ifft_index" Labels [0, 0] SrcBlock "Gateway Out8" SrcPort 1 DstBlock "FEC1" DstPort 1 } Line { Name "vout" Labels [0, 0] SrcBlock "Gateway Out9" SrcPort 1 DstBlock "FEC1" DstPort 2 } Line { Name "start" Labels [0, 0] SrcBlock "Gateway Out10" SrcPort 1 DstBlock "FEC1" DstPort 3 } Line { Name "ant_sel" Labels [0, 0] SrcBlock "Gateway Out11" SrcPort 1 DstBlock "FEC1" DstPort 4 } Line { Name "pkt_done" Labels [0, 0] SrcBlock "Gateway Out12" SrcPort 1 DstBlock "FEC1" DstPort 5 } Line { Name "nbytes" Labels [0, 0] SrcBlock "Gateway Out13" SrcPort 1 DstBlock "FEC1" DstPort 6 } Line { Name "payload_done" Labels [0, 0] SrcBlock "Gateway Out14" SrcPort 1 DstBlock "FEC1" DstPort 7 } Line { SrcBlock "PktBuffer_CRC1" SrcPort 1 Points [-65, 0; 0, 150; 240, 0; 0, 170] DstBlock "Assert4" DstPort 1 } Line { SrcBlock "fec_encoder" SrcPort 1 Points [135, 0] Branch { Points [25, 0] Branch { Points [0, -235; -590, 0] Branch { Points [0, 40] DstBlock "AddSub" DstPort 2 } Branch { Points [-440, 0; 0, 300] DstBlock "control" DstPort 2 } } Branch { Points [5, 0; 0, 45] DstBlock "Gateway Out20" DstPort 1 } } Branch { Points [0, 680] DstBlock "Gateway Out17" DstPort 1 } } Line { SrcBlock "PktBuffer_CRC1" SrcPort 4 Points [-15, 0; 0, 80; 225, 0; 0, 135; 125, 0] Branch { DstBlock "fec_encoder" DstPort 6 } Branch { Points [0, 515] DstBlock "Gateway Out15" DstPort 1 } } Line { SrcBlock "From2" SrcPort 1 Points [20, 0] Branch { DstBlock "fec_encoder" DstPort 3 } Branch { Points [0, 620] DstBlock "Gateway Out16" DstPort 1 } } Line { Name "info_data" Labels [0, 0] SrcBlock "Gateway Out15" SrcPort 1 DstBlock "Encoder" DstPort 8 } Line { Name "coding_en" Labels [0, 0] SrcBlock "Gateway Out16" SrcPort 1 DstBlock "Encoder" DstPort 9 } Line { Name "codeword_len" Labels [0, 0] SrcBlock "Gateway Out17" SrcPort 1 DstBlock "Encoder" DstPort 10 } Line { Name "pkt_done" Labels [0, 0] SrcBlock "Gateway Out18" SrcPort 1 DstBlock "Encoder" DstPort 11 } Line { SrcBlock "Assert4" SrcPort 1 Points [60, 0] Branch { DstBlock "fec_encoder" DstPort 8 } Branch { Points [0, 50] DstBlock "Gateway Out19" DstPort 1 } } Line { SrcBlock "posedge2" SrcPort 1 Points [-115, 0; 0, 160] DstBlock "fec_encoder" DstPort 4 } Line { SrcBlock "Gateway Out19" SrcPort 1 DstBlock "Display1" DstPort 1 } Line { SrcBlock "Gateway Out20" SrcPort 1 DstBlock "Display" DstPort 1 } Annotation { Name "Latency = 2?" Position [594, 484] } Annotation { Name "Latency = 1" Position [1202, 516] } Annotation { Name "Latency = 0\n" Position [1017, 616] } Annotation { Position [1775, 907] } } } Block { BlockType From Name "From1" SID "8771" Position [85, 422, 210, 438] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReset" TagVisibility "global" } Block { BlockType Reference Name "Logical" SID "8772" Ports [3, 1] Position [350, 198, 375, 232] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,34,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 34 34 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[20" ".33 20.33 23.33 20.33 23.33 23.33 23.33 20.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[17.33 17.33 " "20.33 20.33 17.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[14.33 14.33 17.33 17.33 14.3" "3 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33 11.33 14.33 14.33 11.33 ]," "[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n" "\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical1" SID "8773" Ports [2, 1] Position [270, 415, 295, 435] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,20,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.2" "2 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.2" "2 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 " "1 ]);\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "8774" Ports [2, 1] Position [420, 255, 445, 275] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,20,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.2" "2 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.2" "2 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 " "1 ]);\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Training_Pilots" SID "8775" Ports [6, 2] Position [800, 178, 880, 302] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Training_Pilots" Location [2, 82, 1184, 1016] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Xn_index" SID "8776" Position [60, 213, 90, 227] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "I_mod" SID "8777" Position [310, 233, 340, 247] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Q_mod" SID "8778" Position [310, 253, 340, 267] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "train#" SID "8779" Position [60, 449, 90, 461] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "antSel" SID "8780" Position [145, 483, 175, 497] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "rst" SID "8781" Position [80, 273, 110, 287] NamePlacement "alternate" Port "6" IconDisplay "Port number" } Block { BlockType Reference Name "Concat" SID "8782" Ports [2, 1] Position [250, 480, 290, 515] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at z" "ero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,35,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 35 35 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 35 35 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[22.55 22.55 27." "55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[17.55 17.55 22.55 22.55 17." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input" "',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "8783" Ports [1, 1] Position [320, 371, 345, 389] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'cast');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "8784" Ports [1, 1] Position [500, 366, 530, 394] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "3" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,83e6bb61,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "8785" Ports [1, 1] Position [390, 447, 425, 463] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "8786" Ports [3, 1] Position [850, 412, 875, 478] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,66,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 9.42857 56.5714 66 0 ],[0." "77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 9.42857 56.5714 66 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325" " 5.325 ],[36.33 36.33 39.33 36.33 39.33 39.33 39.33 36.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[33." "33 33.33 36.33 36.33 33.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[30.33 30.33 33.33 33.3" "3 30.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33 27.33 30.33 30.33 27.33" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('i" "nput',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "8787" Ports [3, 1] Position [850, 482, 875, 548] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,66,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 9.42857 56.5714 66 0 ],[0." "77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 9.42857 56.5714 66 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325" " 5.325 ],[36.33 36.33 39.33 36.33 39.33 39.33 39.33 36.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[33." "33 33.33 36.33 36.33 33.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[30.33 30.33 33.33 33.3" "3 30.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[27.33 27.33 30.33 27.33 30.33 30.33 27.33" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('i" "nput',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Scrambled_Pilot_Inserter1" SID "8788" Ports [6, 2] Position [625, 211, 735, 329] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Scrambled_Pilot_Inserter1" Location [202, 74, 1654, 982] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "IFFT Index" SID "8789" Position [120, 378, 150, 392] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "I " SID "8790" Position [1185, 438, 1215, 452] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Q " SID "8791" Position [1185, 583, 1215, 597] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "rst" SID "8792" Position [135, 193, 165, 207] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Ant Sel" SID "8793" Position [135, 278, 165, 292] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "Train#" SID "8794" Position [135, 228, 165, 242] NamePlacement "alternate" Port "6" IconDisplay "Port number" } Block { BlockType Reference Name "6LSB" SID "8795" Ports [1, 1] Position [255, 407, 295, 423] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "ceil(log2(numSubcarriers))" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-609,148,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "6LSB+16" SID "8796" Ports [1, 1] Position [255, 482, 295, 498] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "ceil(log2(numSubcarriers))" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "6LSB+24" SID "8797" Ports [1, 1] Position [255, 507, 295, 523] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "ceil(log2(numSubcarriers))" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "6LSB+8" SID "8798" Ports [1, 1] Position [255, 432, 295, 448] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "ceil(log2(numSubcarriers))" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Concat1" SID "8799" Ports [2, 1] Position [1075, 367, 1100, 418] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,51,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 51 51 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 51 51 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[28.33 " "28.33 31.33 28.33 31.33 31.33 31.33 28.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[25.33 25.33 28.33" " 28.33 25.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[22.33 22.33 25.33 25.33 22.33 ],[1" " 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[19.33 19.33 22.33 19.33 22.33 22.33 19.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{2" "0}\\}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "8800" Ports [0, 1] Position [1100, 549, 1125, 571] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant4" SID "8801" Ports [0, 1] Position [275, 344, 300, 366] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant5" SID "8802" Ports [0, 1] Position [305, 239, 330, 261] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "63" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "6" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "2" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,22,0,1,white,blue,0,346a66ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 " "14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('output',1,'63');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "8803" Ports [1, 1] Position [210, 375, 240, 395] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "3" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[3 6 0 6 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,1,1,white,blue,0,83e6bb61,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[12.22" " 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.22 12." "22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1" " 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black'" ");disp('z^{-3}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From4" SID "8804" Position [505, 408, 645, 422] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_Alamouti_Mode" TagVisibility "global" } Block { BlockType From Name "From6" SID "8805" Position [15, 452, 185, 468] ShowName off CloseFcn "tagdialog Close" GotoTag "regTxRx_PilotToneIndex" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "8806" Ports [1, 1] Position [410, 276, 445, 294] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,251" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8807" Ports [3, 1] Position [495, 225, 540, 295] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[2 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,70,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 70 70 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 70 70 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[41.66 4" "1.66 47.66 41.66 47.66 47.66 47.66 41.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[35.66 35.66 41.66 " "41.66 35.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[29.66 29.66 35.66 35.66 29.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 23.66 29.66 29.66 23.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical5" SID "8808" Ports [2, 1] Position [1000, 362, 1030, 393] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,31,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "8809" Ports [2, 1] Position [1000, 387, 1030, 418] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "30,31,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 31 31 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 31 31 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.4" "4 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 " "15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "MCode" SID "8810" Ports [8, 4] Position [710, 335, 875, 425] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/MCode" SourceType "Xilinx MCode Block Block" infoedit "Pass input values to a MATLAB function for evaluation in Xilinx fixed-point type. The input ports" " of the block are input arguments of the function. The output ports of the block are output arguments of the fun" "ction." mfname "tx_pilot_select" explicit_period off period "1" inputsTable "{'boundInpExpr'=>['','','','','','','',''],'inputs'=>['neg','antSel','sc0','ind0','ind1','ind2" "','ind3','alamoutiMode']}" outputsTable "{'outputs'=>['o_zero','o_pilotVal1','o_pilotVal2','o_nonPilot'],'suppressOut'=>['off','off','o" "ff','off']}" dbl_ovrd off enable_stdout off enable_debug off xl_use_area off xl_area "[0,0,0,0,0,0,0]" suppress_output "1" defparams "{}" hide_port_list "{}" has_advanced_control "0" sggui_pos "20,20,348,449" block_type "mcode" block_version "10.1.3" sg_icon_stat "165,90,8,4,white,blue,0,de9599e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 165 165 0 0 ],[0 0 90 90 0 ],[0.77 0." "82 0.91 ]);\nplot([0 165 165 0 0 ],[0 0 90 90 0 ]);\npatch([55.3 72.64 84.64 96.64 108.64 84.64 67.3 55.3 ],[58." "32 58.32 70.32 58.32 70.32 70.32 70.32 58.32 ],[1 1 1 ]);\npatch([67.3 84.64 72.64 55.3 67.3 ],[46.32 46.32 58.3" "2 58.32 46.32 ],[0.931 0.946 0.973 ]);\npatch([55.3 72.64 84.64 67.3 55.3 ],[34.32 34.32 46.32 46.32 34.32 ],[1 " "1 1 ]);\npatch([67.3 108.64 96.64 84.64 72.64 55.3 67.3 ],[22.32 22.32 34.32 22.32 34.32 34.32 22.32 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'neg');\ncolor('black');port_label('input',2,'antSel');\ncolor('black');port_label('input" "',3,'sc0');\ncolor('black');port_label('input',4,'ind0');\ncolor('black');port_label('input',5,'ind1');\ncolor('" "black');port_label('input',6,'ind2');\ncolor('black');port_label('input',7,'ind3');\ncolor('black');port_label('" "input',8,'alamoutiMode');\ncolor('black');port_label('output',1,'o_zero');\ncolor('black');port_label('output',2" ",'o_pilotVal1');\ncolor('black');port_label('output',3,'o_pilotVal2');\ncolor('black');port_label('output',4,'o_" "nonPilot');\ncolor('black');disp('\\bf{tx\\_pilot\\_select}','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');\n" } Block { BlockType Reference Name "Mux" SID "8811" Ports [5, 1] Position [1320, 377, 1345, 513] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[16 0 0 32 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,136,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 19.4286 116.571 136 0 " "],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 19.4286 116.571 136 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12." "66 8.325 5.325 ],[71.33 71.33 74.33 71.33 74.33 74.33 74.33 71.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8." "325 ],[68.33 68.33 71.33 71.33 68.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[65.33 65.3" "3 68.33 68.33 65.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[62.33 62.33 65.33 62.33 65." "33 65.33 62.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i" "con text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('bla" "ck');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input'," "5,'d3');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "8812" Ports [5, 1] Position [1320, 519, 1345, 661] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[16 0 0 32 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,142,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 20.2857 121.714 142 0 " "],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 20.2857 121.714 142 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12." "66 8.325 5.325 ],[74.33 74.33 77.33 74.33 77.33 77.33 77.33 74.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8." "325 ],[71.33 71.33 74.33 74.33 71.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[68.33 68.3" "3 71.33 71.33 68.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[65.33 65.33 68.33 65.33 68." "33 68.33 65.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i" "con text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('bla" "ck');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('input'," "5,'d3');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "Pilot Scrambing" SID "8813" Ports [10] Position [1320, 115, 1375, 280] Floating off Location [6, 80, 1690, 1044] Open off NumInputPorts "10" ZoomMode "yonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" axes8 "%" axes9 "%" axes10 "%" } TimeRange "20000" YMin "-1~-1~-1~-1~-0.2~-0.2~-1~-1~0~0" YMax "1~1~1~1~0.2~0.2~1~1~100~1" SaveName "ScopeData12" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "Pilot Scrambling\nSequence Gen" SID "8814" Ports [2, 1] Position [595, 239, 660, 266] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Pilot Scrambling\nSequence Gen" Location [202, 74, 1670, 982] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "rst" SID "8815" Position [190, 498, 220, 512] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "en" SID "8816" Position [120, 543, 150, 557] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Assert" SID "8817" Ports [1, 1] Position [575, 257, 620, 273] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type on type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,423" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,16,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Assert1" SID "8818" Ports [1, 1] Position [575, 277, 620, 293] BlockMirror on NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Assert" SourceType "Xilinx Assert Block" infoedit "Asserts a user-defined sample rate and/or type on a signal.

Hardware notes: In hardware this" " block costs nothing." assert_type on type_source "Explicitly" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" assert_rate on rate_source "Explicitly" period "2" output_port on has_advanced_control "0" sggui_pos "20,20,356,423" block_type "assert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,16,1,1,white,blue,0,9657e937,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('Assert');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "8819" Ports [1, 1] Position [490, 141, 520, 159] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "8820" Position [25, 557, 150, 573] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_PilotScrambling" TagVisibility "global" } Block { BlockType Reference Name "Logical" SID "8821" Ports [2, 1] Position [485, 253, 530, 297] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,dc21e094,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('xor');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8822" Ports [2, 1] Position [185, 544, 230, 571] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 27 27 0 ]);\npatch([15.325 19.66 22.66 25.66 28.66 22.66 18.325 15.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([18.325 22.66 19.66 15.325 18.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([15.325 19.66 22.66 18.325 15.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([18.325 28.66 25.66 22.66 19.66 15.325 18.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "\n\n\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "8823" Ports [3, 1] Position [310, 326, 355, 374] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "8824" Ports [3, 1] Position [395, 326, 440, 374] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "8825" Ports [3, 1] Position [485, 326, 530, 374] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register3" SID "8826" Ports [3, 1] Position [575, 326, 620, 374] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register4" SID "8827" Ports [3, 1] Position [735, 326, 780, 374] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register5" SID "8828" Ports [3, 1] Position [825, 326, 870, 374] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Register6" SID "8829" Ports [3, 1] Position [910, 326, 955, 374] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30.66 3" "0.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 30.66 " "30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'" "en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8830" Position [685, 143, 715, 157] IconDisplay "Port number" } Line { SrcBlock "rst" SrcPort 1 Points [0, 0; 50, 0] Branch { Points [0, -155] DstBlock "Register" DstPort 2 } Branch { Points [95, 0] Branch { Points [0, -155] DstBlock "Register1" DstPort 2 } Branch { Points [80, 0] Branch { Points [0, -155] DstBlock "Register2" DstPort 2 } Branch { Points [100, 0] Branch { Points [0, -155] DstBlock "Register3" DstPort 2 } Branch { Points [150, 0] Branch { Points [0, -155] DstBlock "Register4" DstPort 2 } Branch { Points [100, 0] Branch { Points [0, -155] DstBlock "Register5" DstPort 2 } Branch { Points [80, 0; 0, -155] DstBlock "Register6" DstPort 2 } } } } } } } Line { SrcBlock "Register6" SrcPort 1 Points [20, 0; 0, -85] DstBlock "Assert" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [0, -45; 50, 0] Branch { Points [0, -150] DstBlock "Register" DstPort 3 } Branch { Points [95, 0] Branch { DstBlock "Register1" DstPort 3 } Branch { Points [80, 0] Branch { Points [0, -150] DstBlock "Register2" DstPort 3 } Branch { Points [100, 0] Branch { DstBlock "Register3" DstPort 3 } Branch { Points [150, 0] Branch { Points [0, -150] DstBlock "Register4" DstPort 3 } Branch { Points [100, 0] Branch { DstBlock "Register5" DstPort 3 } Branch { Points [75, 0; 0, -150] DstBlock "Register6" DstPort 3 } } } } } } } Line { SrcBlock "Logical" SrcPort 1 Points [0, 0; -170, 0] Branch { Points [-55, 0; 0, 60] DstBlock "Register" DstPort 1 } Branch { Points [0, -125] DstBlock "Convert" DstPort 1 } } Line { SrcBlock "Register5" SrcPort 1 Points [0, -15] DstBlock "Register6" DstPort 1 } Line { SrcBlock "Register4" SrcPort 1 Points [10, 0; 0, -15] DstBlock "Register5" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 Points [45, 0; 0, -15] Branch { DstBlock "Register4" DstPort 1 } Branch { Points [0, -50] DstBlock "Assert1" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 Points [10, 0; 0, -15] DstBlock "Register3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [0, -15] DstBlock "Register2" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 Points [5, 0; 0, -15] DstBlock "Register1" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 Points [0, 0] DstBlock "Q" DstPort 1 } Line { SrcBlock "Assert" SrcPort 1 Points [0, 0] DstBlock "Logical" DstPort 1 } Line { SrcBlock "Assert1" SrcPort 1 Points [0, 0] DstBlock "Logical" DstPort 2 } Line { SrcBlock "en" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical1" DstPort 2 } } } Block { BlockType SubSystem Name "Pilot Values" SID "8831" Ports [0, 2] Position [1185, 459, 1240, 506] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Pilot Values" Location [207, 791, 705, 940] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "16LSB" SID "8832" Ports [1, 1] Position [330, 232, 370, 248] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "16MSB" SID "8833" Ports [1, 1] Position [330, 302, 370, 318] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "8834" Ports [1, 1] Position [485, 296, 515, 324] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample3" SID "8835" Ports [1, 1] Position [485, 226, 515, 254] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in h" "ardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From2" SID "8836" Position [80, 232, 250, 248] ShowName off CloseFcn "tagdialog Close" GotoTag "regTx_PilotToneValues" TagVisibility "global" } Block { BlockType Reference Name "Reinterpret" SID "8837" Ports [1, 1] Position [405, 231, 445, 249] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes type of samples without altering their binary representation.

Hardware notes: In har" "dware this block costs nothing.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits," " and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's comp" "lement) becomes an output of 56 (111000 in binary)." force_arith_type on arith_type "Signed (2's comp)" force_bin_pt on bin_pt "15" has_advanced_control "0" sggui_pos "20,20,356,278" block_type "cast" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reinterpret2" SID "8838" Ports [1, 1] Position [405, 301, 445, 319] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes type of samples without altering their binary representation.

Hardware notes: In har" "dware this block costs nothing.

Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits," " and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's comp" "lement) becomes an output of 56 (111000 in binary)." force_arith_type on arith_type "Signed (2's comp)" force_bin_pt on bin_pt "15" has_advanced_control "0" sggui_pos "20,20,356,278" block_type "cast" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,18,1,1,white,blue,0,6b04d0b0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[11.22" " 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 11.22" " 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');dis" "p('reinterpret');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "val1" SID "8839" Position [540, 303, 570, 317] IconDisplay "Port number" } Block { BlockType Outport Name "val2" SID "8840" Position [540, 233, 570, 247] Port "2" IconDisplay "Port number" } Line { SrcBlock "From2" SrcPort 1 Points [25, 0] Branch { DstBlock "16LSB" DstPort 1 } Branch { Points [0, 70] DstBlock "16MSB" DstPort 1 } } Line { SrcBlock "16LSB" SrcPort 1 DstBlock "Reinterpret" DstPort 1 } Line { SrcBlock "16MSB" SrcPort 1 DstBlock "Reinterpret2" DstPort 1 } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "Reinterpret2" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "val2" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "val1" DstPort 1 } } } Block { BlockType Reference Name "Relational1" SID "8841" Ports [2, 1] Position [375, 349, 415, 376] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,27,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 27 27 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label(" "'output',1,'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "8842" Ports [2, 1] Position [405, 244, 445, 271] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[6 0 0 11 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,27,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 27 27 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label(" "'output',1,'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "8843" Ports [2, 1] Position [370, 409, 410, 436] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 3 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,27,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 27 27 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label(" "'output',1,'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational5" SID "8844" Ports [2, 1] Position [370, 434, 410, 461] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 3 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,27,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 27 27 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label(" "'output',1,'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational6" SID "8845" Ports [2, 1] Position [370, 484, 410, 511] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 3 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,27,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 27 27 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label(" "'output',1,'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational7" SID "8846" Ports [2, 1] Position [370, 509, 410, 536] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 3 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,27,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 27 27 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 27 27 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[16" ".33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[13.33 13." "33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[10.33 10.33 13.33 13.3" "3 10.33 ],[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7." "33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label(" "'output',1,'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Terminator Name "Terminator" SID "8847" Position [1010, 342, 1025, 358] ShowName off } Block { BlockType Reference Name "done1" SID "8848" Ports [1, 1] Position [1230, 200, 1265, 210] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done3" SID "8849" Ports [1, 1] Position [1230, 170, 1265, 180] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done4" SID "8850" Ports [1, 1] Position [1230, 140, 1265, 150] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done5" SID "8851" Ports [1, 1] Position [1230, 155, 1265, 165] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done6" SID "8852" Ports [1, 1] Position [1230, 185, 1265, 195] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "done9" SID "8853" Ports [1, 1] Position [1230, 125, 1265, 135] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, doub" "le, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarde" "d, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,10,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 10 10 0 ],[0.88 0.88" " 0.88 ]);\nplot([0 35 35 0 0 ],[0 0 10 10 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[6." "11 6.11 7.11 6.11 7.11 7.11 7.11 6.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[5.11 5.11 6.11 6." "11 5.11 ],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[4.11 4.11 5.11 5.11 4.11 ],[1 1 1 ]" ");\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[3.11 3.11 4.11 3.11 4.11 4.11 3.11 ],[0.964 0.964 0.9" "64 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Outport Name " I" SID "8854" Position [1410, 438, 1440, 452] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name " Q" SID "8855" Position [1415, 583, 1445, 597] Port "2" IconDisplay "Port number" } Line { SrcBlock "Mux" SrcPort 1 Points [20, 0] Branch { DstBlock " I" DstPort 1 } Branch { Points [0, -65; -175, 0; 0, -190] DstBlock "done6" DstPort 1 } } Line { SrcBlock "Mux1" SrcPort 1 Points [35, 0] Branch { DstBlock " Q" DstPort 1 } Branch { Points [0, -240; -180, 0; 0, -145] DstBlock "done1" DstPort 1 } } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Relational1" DstPort 1 } Line { SrcBlock "6LSB+16" SrcPort 1 DstBlock "Relational6" DstPort 1 } Line { SrcBlock "6LSB+24" SrcPort 1 DstBlock "Relational7" DstPort 1 } Line { SrcBlock "6LSB+8" SrcPort 1 DstBlock "Relational5" DstPort 1 } Line { SrcBlock "6LSB" SrcPort 1 DstBlock "Relational4" DstPort 1 } Line { SrcBlock "IFFT Index" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 Points [100, 0] Branch { Points [0, 45] Branch { Points [0, 25] Branch { DstBlock "Relational5" DstPort 2 } Branch { Points [0, 50] Branch { Points [0, 25] DstBlock "Relational7" DstPort 2 } Branch { DstBlock "Relational6" DstPort 2 } } } Branch { DstBlock "Relational4" DstPort 2 } } Branch { Points [0, -15] Branch { DstBlock "Relational1" DstPort 2 } Branch { Points [0, -105] Branch { DstBlock "Relational2" DstPort 2 } Branch { Points [0, -135] DstBlock "done9" DstPort 1 } } } } Line { SrcBlock "rst" SrcPort 1 Points [385, 0; 0, 45] DstBlock "Pilot Scrambling\nSequence Gen" DstPort 1 } Line { SrcBlock "Constant5" SrcPort 1 DstBlock "Relational2" DstPort 1 } Line { SrcBlock "Ant Sel" SrcPort 1 Points [205, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, 35; 110, 0; 0, 35] DstBlock "MCode" DstPort 2 } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Pilot Scrambling\nSequence Gen" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical2" DstPort 3 } Line { SrcBlock "Relational4" SrcPort 1 Points [40, 0; 0, -50] DstBlock "MCode" DstPort 4 } Line { SrcBlock "Relational5" SrcPort 1 Points [55, 0; 0, -65] DstBlock "MCode" DstPort 5 } Line { SrcBlock "Relational6" SrcPort 1 Points [65, 0; 0, -105] DstBlock "MCode" DstPort 6 } Line { SrcBlock "Relational7" SrcPort 1 Points [70, 0; 0, -120] DstBlock "MCode" DstPort 7 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "MCode" DstPort 3 } Line { SrcBlock "Pilot Scrambling\nSequence Gen" SrcPort 1 Points [5, 0] Branch { Points [0, 90] DstBlock "MCode" DstPort 1 } Branch { Points [0, -95] DstBlock "done5" DstPort 1 } } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "Concat1" DstPort 1 } Line { SrcBlock "MCode" SrcPort 4 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "MCode" SrcPort 2 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "MCode" SrcPort 3 Points [85, 0] Branch { Points [0, 5] DstBlock "Logical6" DstPort 1 } Branch { Points [0, -5] DstBlock "Logical5" DstPort 2 } } Line { SrcBlock "Concat1" SrcPort 1 Points [15, 0] Branch { DstBlock "Mux" DstPort 1 } Branch { Points [0, 135] DstBlock "Mux1" DstPort 1 } Branch { Points [0, -220] DstBlock "done3" DstPort 1 } } Line { SrcBlock "Constant2" SrcPort 1 Points [40, 0] Branch { Points [0, 60] Branch { Points [0, 30] DstBlock "Mux1" DstPort 5 } Branch { DstBlock "Mux1" DstPort 4 } } Branch { Points [0, -140] DstBlock "Mux" DstPort 2 } Branch { DstBlock "Mux1" DstPort 2 } } Line { SrcBlock "Pilot Values" SrcPort 1 DstBlock "Mux" DstPort 4 } Line { SrcBlock "Pilot Values" SrcPort 2 DstBlock "Mux" DstPort 5 } Line { SrcBlock "MCode" SrcPort 1 DstBlock "Terminator" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 Points [50, 0] Branch { Points [0, -20] Branch { DstBlock "6LSB" DstPort 1 } Branch { DstBlock "6LSB+8" DstPort 1 } } Branch { Points [0, 30] Branch { DstBlock "6LSB+24" DstPort 1 } Branch { DstBlock "6LSB+16" DstPort 1 } } } Line { SrcBlock "From4" SrcPort 1 DstBlock "MCode" DstPort 8 } Line { SrcBlock "Train#" SrcPort 1 Points [300, 0] Branch { DstBlock "Logical2" DstPort 1 } Branch { Points [0, -90] DstBlock "done4" DstPort 1 } } Line { SrcBlock "done9" SrcPort 1 DstBlock "Pilot Scrambing" DstPort 1 } Line { SrcBlock "done6" SrcPort 1 DstBlock "Pilot Scrambing" DstPort 5 } Line { SrcBlock "done3" SrcPort 1 DstBlock "Pilot Scrambing" DstPort 4 } Line { SrcBlock "done5" SrcPort 1 DstBlock "Pilot Scrambing" DstPort 3 } Line { SrcBlock "done4" SrcPort 1 DstBlock "Pilot Scrambing" DstPort 2 } Line { SrcBlock "done1" SrcPort 1 DstBlock "Pilot Scrambing" DstPort 6 } Line { SrcBlock "Q " SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "I " SrcPort 1 DstBlock "Mux" DstPort 3 } Annotation { Name "+21" Position [227, 515] } Annotation { Name "-7" Position [227, 490] } Annotation { Name "-21" Position [227, 440] } Annotation { Name "+7" Position [227, 420] } Annotation { Name "one-hot -> binary" Position [1028, 433] } Annotation { Name "Pilot selection logic:\nOn index 0, force zeros.\nOn non-zero non-pilot indices, pass through input I" "/Q.\n\nOn non-zero pilot indices:\n\nIn SISO/Multiplexing mode:\nif not antSel (i.e. even symbol):\n If not neg" "ate:\n Pilot val1 on indicies 0, 1, 2\n Pilot val2 on index 3\n else If negate:\n Pilot val2 on indici" "es 0, 1, 2\n Pilot val1 on index 3\n end\nelse (i.e. odd symbol):\n zeros on all pilot indices\nend" Position [537, 734] HorizontalAlignment "left" } Annotation { Name "In Alamouti mode:\nif not antSel (i.e. even symbol):\n If not negate:\n Pilot val1 on indicies 0," " 1\n Zeros on indices 2, 3\n else If negate:\n Pilot val2 on indicies 0, 1\n Zeros on indices 2, 3\n " "end\nelse (i.e. odd symbol)\n If not negate:\n Zeros on indices 0, 1\n Pilot val1 on index 2\n Pilot v" "al2 on index 3\n else If negate:\n Zeros on indices 0, 1\n Pilot val2 on index 2\n Pilot val1 on index" " 3\n end\nend" Position [827, 744] HorizontalAlignment "left" } } } Block { BlockType Reference Name "Train_I" SID "8856" Ports [2, 1] Position [490, 416, 540, 469] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "2*numSubcarriers" initVector "real(train)" distributed_mem "Block RAM" rst off init_reg "0" en on latency "3" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,53,2,1,white,blue,0,b349efd0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 53 53 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 53 53 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.77 33.7" "7 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 33.77 33" ".77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19.77 ],[1 1 " "1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('z^{-3}','texmode" "','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Train_Q" SID "8857" Ports [2, 1] Position [490, 486, 540, 539] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "2*numSubcarriers" initVector "imag(train)" distributed_mem "Block RAM" rst off init_reg "0" en on latency "3" gui_display_data_type "Fixed-point" arith_type "Signed (2's comp)" n_bits "modConstellation_prec" bin_pt "modConstellation_bp" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,53,2,1,white,blue,0,b349efd0,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 53 53 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 53 53 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[33.77 33.7" "7 40.77 33.77 40.77 40.77 40.77 33.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[26.77 26.77 33.77 33" ".77 26.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[19.77 19.77 26.77 26.77 19.77 ],[1 1 " "1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[12.77 12.77 19.77 12.77 19.77 19.77 12.77 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('z^{-3}','texmode" "','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "tx_I" SID "8858" Position [945, 438, 975, 452] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "tx_Q" SID "8859" Position [945, 508, 975, 522] Port "2" IconDisplay "Port number" } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "tx_Q" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "tx_I" DstPort 1 } Line { SrcBlock "Scrambled_Pilot_Inserter1" SrcPort 1 Points [50, 0; 0, 225] DstBlock "Mux" DstPort 3 } Line { SrcBlock "Scrambled_Pilot_Inserter1" SrcPort 2 Points [40, 0; 0, 235] DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Train_I" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Train_Q" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [40, 0] Branch { DstBlock "Train_I" DstPort 2 } Branch { Points [0, 70] DstBlock "Train_Q" DstPort 2 } } Line { SrcBlock "Concat" SrcPort 1 Points [165, 0] Branch { DstBlock "Train_Q" DstPort 1 } Branch { Points [0, -70] DstBlock "Train_I" DstPort 1 } } Line { SrcBlock "Xn_index" SrcPort 1 Points [35, 0] Branch { Points [0, 285] DstBlock "Concat" DstPort 2 } Branch { DstBlock "Scrambled_Pilot_Inserter1" DstPort 1 } } Line { SrcBlock "train#" SrcPort 1 Points [130, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [0, -75] Branch { DstBlock "Convert" DstPort 1 } Branch { Points [0, -60] DstBlock "Scrambled_Pilot_Inserter1" DstPort 6 } } } Line { SrcBlock "antSel" SrcPort 1 Points [20, 0] Branch { DstBlock "Concat" DstPort 1 } Branch { Points [0, -190] DstBlock "Scrambled_Pilot_Inserter1" DstPort 5 } } Line { SrcBlock "I_mod" SrcPort 1 DstBlock "Scrambled_Pilot_Inserter1" DstPort 2 } Line { SrcBlock "Q_mod" SrcPort 1 DstBlock "Scrambled_Pilot_Inserter1" DstPort 3 } Line { SrcBlock "Delay1" SrcPort 1 Points [295, 0; 0, 45] Branch { DstBlock "Mux" DstPort 1 } Branch { Points [0, 70] DstBlock "Mux1" DstPort 1 } } Line { SrcBlock "rst" SrcPort 1 DstBlock "Scrambled_Pilot_Inserter1" DstPort 4 } Annotation { Name "The training seq lookup tables have latency=3 to\nalign their output with the IFFT's expected inputs.\nT" "he IFFT xn output runs three cycles ahead of the input\ndata (i.e. xn=3 when data[0] should be on the IFFT inputs." Position [546, 728] } } } Block { BlockType Outport Name "tx_Q" SID "8860" Position [1045, 263, 1075, 277] IconDisplay "Port number" } Block { BlockType Outport Name "tx_I" SID "8861" Position [1045, 203, 1075, 217] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Payload Done" SID "8862" Position [830, 343, 860, 357] Port "3" IconDisplay "Port number" } Line { SrcBlock "FlexibleMod" SrcPort 2 DstBlock "Training_Pilots" DstPort 3 } Line { Labels [3, 0] SrcBlock "FlexibleMod" SrcPort 1 Points [45, 0; 0, 30] DstBlock "Training_Pilots" DstPort 2 } Line { SrcBlock "packet_done" SrcPort 1 Points [120, 0; 0, 25] Branch { DstBlock "FlexibleMod" DstPort 2 } Branch { Points [0, 230] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "xn_index" SrcPort 1 Points [140, 0; 0, 40; 250, 0] Branch { DstBlock "FlexibleMod" DstPort 1 } Branch { Points [0, -45; 205, 0; 0, 70] DstBlock "Training_Pilots" DstPort 1 } } Line { SrcBlock "train_pay" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "FlexibleMod" DstPort 3 } Line { SrcBlock "Start" SrcPort 1 Points [225, 0; 0, -50] DstBlock "FlexibleMod" DstPort 4 } Line { SrcBlock "BaseRate_En" SrcPort 1 Points [60, 0] Branch { Points [0, 25] DstBlock "Ant Selector" DstPort 1 } Branch { Points [175, 0; 0, -70] DstBlock "Logical5" DstPort 2 } } Line { SrcBlock "CPn_Data" SrcPort 1 Points [45, 0] Branch { Points [0, 165] DstBlock "Ant Selector" DstPort 2 } Branch { DstBlock "Logical" DstPort 2 } } Line { SrcBlock "Delay2" SrcPort 1 Points [45, 0] Branch { Points [0, 5] Branch { DstBlock "Logical5" DstPort 1 } Branch { Points [0, 55; 485, 0; 0, -65] DstBlock "Training_Pilots" DstPort 4 } } Branch { Points [0, -30] DstBlock "Logical" DstPort 3 } } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "FlexibleMod" DstPort 5 } Line { SrcBlock "Ant Selector" SrcPort 1 Points [20, 0] Branch { Points [0, -90] DstBlock "FlexibleMod" DstPort 6 } Branch { Points [280, 0; 0, -110] DstBlock "Training_Pilots" DstPort 5 } } Line { SrcBlock "FFT En" SrcPort 1 Points [235, 0; 0, 130] DstBlock "Logical" DstPort 1 } Line { SrcBlock "Training_Pilots" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Training_Pilots" SrcPort 2 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "tx_I" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "tx_Q" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [45, 0] Branch { Points [430, 0; 0, -135] DstBlock "Training_Pilots" DstPort 6 } Branch { Points [0, -30] DstBlock "Ant Selector" DstPort 3 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "FlexibleMod" SrcPort 3 Points [55, 0; 0, 70] DstBlock "Payload Done" DstPort 1 } } } Block { BlockType SubSystem Name "Tx Reset Logic" SID "8863" Ports [] Position [160, 391, 230, 427] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Tx Reset Logic" Location [-64, 183, 1558, 1127] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType From Name "From3" SID "8864" Position [325, 266, 440, 284] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_TxReset" TagVisibility "global" } Block { BlockType Goto Name "Goto13" SID "8865" Position [655, 217, 715, 233] ShowName off GotoTag "TxReset" TagVisibility "global" } Block { BlockType Reference Name "Logical" SID "8866" Ports [2, 1] Position [505, 203, 545, 247] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,262" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55" " 27.55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27" ".55 27.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 " "],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType DiscretePulseGenerator Name "Pulse\nGenerator1" SID "8867" Ports [0, 1] Position [205, 193, 250, 227] NamePlacement "alternate" Period "1e6" PulseWidth "4" PhaseDelay "2750" } Block { BlockType Step Name "Step" SID "8868" Position [315, 200, 345, 230] Before "1" After "0" SampleTime "0" } Block { BlockType Reference Name "ToBool" SID "8869" Ports [1, 1] Position [580, 216, 605, 234] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,470,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2" "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);" "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label" "('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Tx_Reset" SID "8870" Ports [1, 1] Position [420, 209, 455, 221] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx" " fixed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "4" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,423" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0." "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');" "\nfprintf('','COMMENT: end icon text');" } Line { SrcBlock "Tx_Reset" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "ToBool" DstPort 1 } Line { SrcBlock "ToBool" SrcPort 1 DstBlock "Goto13" DstPort 1 } Line { SrcBlock "Step" SrcPort 1 DstBlock "Tx_Reset" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 Points [15, 0; 0, -40] DstBlock "Logical" DstPort 2 } } } Block { BlockType SubSystem Name "TxControl" SID "8871" Ports [2, 7] Position [140, 216, 260, 334] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "TxControl" Location [2, 82, 1661, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "StartTx" SID "8872" Position [95, 343, 125, 357] IconDisplay "Port number" } Block { BlockType Inport Name "PktDone" SID "8873" Position [95, 218, 125, 232] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "16_8LSB" SID "8874" Ports [1, 1] Position [450, 447, 490, 463] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "ceil(log2(max_num_baseRateSymbols+1))" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "2x" SID "8875" Ports [1, 1] Position [540, 443, 580, 467] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "2x" Location [32, 519, 257, 631] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "8876" Position [30, 33, 60, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Concat1" SID "8877" Ports [2, 1] Position [85, 25, 145, 85] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at z" "ero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "60,60,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46" ".88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88" " ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch(" "[20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "8878" Ports [0, 1] Position [25, 61, 50, 79] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "O" SID "8879" Position [170, 48, 200, 62] IconDisplay "Port number" } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "I" SrcPort 1 Points [0, 0] DstBlock "Concat1" DstPort 1 } Line { SrcBlock "Concat1" SrcPort 1 Points [0, 0] DstBlock "O" DstPort 1 } } } Block { BlockType SubSystem Name "2x1" SID "8880" Ports [1, 1] Position [540, 498, 580, 522] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "2x1" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" SID "8881" Position [30, 33, 60, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Concat1" SID "8882" Ports [2, 1] Position [85, 25, 145, 85] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at z" "ero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "VER_STRING_GOES_HERE" sg_icon_stat "60,60,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46" ".88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88" " ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch(" "[20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "8883" Ports [0, 1] Position [25, 61, 50, 79] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "O" SID "8884" Position [170, 48, 200, 62] IconDisplay "Port number" } Line { SrcBlock "Concat1" SrcPort 1 Points [0, 0] DstBlock "O" DstPort 1 } Line { SrcBlock "I" SrcPort 1 Points [0, 0] DstBlock "Concat1" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Concat1" DstPort 2 } } } Block { BlockType Reference Name "8LSB" SID "8885" Ports [1, 1] Position [450, 502, 490, 518] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "ceil(log2(max_num_trainingSymbols+1))" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,16,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 16 16 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" SID "8886" Ports [2, 1] Position [675, 452, 710, 503] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "10" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,51,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 51 51 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 51 51 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[30.55" " 30.55 35.55 30.55 35.55 35.55 35.55 30.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[25.55 25.55 30" ".55 30.55 25.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[20.55 20.55 25.55 25.55 20.55 " "],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[15.55 15.55 20.55 15.55 20.55 20.55 15.55 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor(" "'black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('outp" "ut',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "8887" Ports [0, 1] Position [545, 398, 580, 422] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "length(preamble)-148" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(length(preamble)))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,0,1,white,blue,0,6803411a,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]" ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3" "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 " "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6" ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\ncolor('black');port_label('output',1,'172');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant2" SID "8888" Ports [0, 1] Position [515, 287, 530, 303] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 " "8.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant3" SID "8889" Ports [0, 1] Position [780, 213, 815, 237] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "length(preamble)-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(length(preamble)))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,0,1,white,blue,0,93ce2787,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]" ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3" "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 " "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6" ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\ncolor('black');port_label('output',1,'319');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant4" SID "8890" Ports [0, 1] Position [880, 761, 920, 789] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "numSubcarriers+CPLength-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(max_num_subcarriers+CPLength+1))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,28,0,1,white,blue,0,ed27c8eb,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 28 28 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[18.4" "4 18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[14.44 14.44 18.4" "4 18.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'79');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant5" SID "8891" Ports [0, 1] Position [1125, 577, 1140, 593] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 " "8.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant6" SID "8892" Ports [0, 1] Position [410, 677, 425, 693] ShowName off AttributesFormatString "%" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10" ".22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 " "8.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant7" SID "8893" Ports [0, 1] Position [880, 704, 915, 726] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "numSubcarriers-1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "log2(numSubcarriers)" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,22,0,1,white,blue,0,346a66ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 22 22 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 22 22 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]" ",[14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[11.3" "3 11.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[8.33 8.33 11.33 " "11.33 8.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5" ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\ncolor('black');port_label('output',1,'63');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant8" SID "8894" Ports [0, 1] Position [875, 811, 915, 839] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,28,0,1,white,blue,0,bf4ddd8b,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 28 28 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[18.4" "4 18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[14.44 14.44 18.4" "4 18.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "8895" Ports [1, 1] Position [860, 881, 895, 899] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "8" bin_pt "6" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,374,366" block_type "convert" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "8896" Ports [1, 1] Position [385, 331, 415, 359] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo" "p. If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "8897" Ports [1, 1] Position [1005, 696, 1035, 724] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo" "p. If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "8898" Ports [1, 1] Position [635, 285, 665, 315] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,30,1,1,white,blue,0,e5fb4045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample1" SID "8899" Ports [1, 1] Position [635, 304, 665, 336] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,32,1,1,white,blue,0,e5fb4045,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 32 32 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 32 32 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 " "20.44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 2" "0.44 16.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample4" SID "8900" Ports [1, 1] Position [375, 496, 405, 524] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,300" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "FFT Start Gen" SID "8901" Ports [1, 1] Position [835, 929, 895, 951] BlockMirror on MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "FFT Start Gen" Location [2, 70, 1184, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "SymNum" SID "8902" Position [115, 301, 145, 319] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" SID "8903" Ports [2, 1] Position [225, 447, 260, 498] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "10" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" use_rpm "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,51,2,1,white,blue,0,e139daf6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 51 51 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 51 51 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[30.55 30.55 35." "55 30.55 35.55 35.55 35.55 30.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[25.55 25.55 30.55 30.55 25." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[20.55 20.55 25.55 25.55 20.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[15.55 15.55 20.55 15.55 20.55 20.55 15.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant9" SID "8904" Ports [0, 1] Position [190, 313, 225, 337] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15.33 15" ".33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port" "_label('output',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "8905" Position [65, 477, 190, 493] ShowName off CloseFcn "tagdialog Close" GotoTag "reg_numBaseRateSyms" TagVisibility "global" } Block { BlockType From Name "From2" SID "8906" Position [125, 702, 250, 718] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_Alamouti_Mode" TagVisibility "global" } Block { BlockType From Name "From7" SID "8907" Position [75, 407, 200, 423] ShowName off CloseFcn "tagdialog Close" GotoTag "reg_numTrainingSyms" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "8908" Ports [1, 1] Position [385, 597, 430, 613] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,201" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 16 16 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "LSB" SID "8909" Ports [1, 1] Position [300, 594, 350, 616] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "LSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,22,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 22 22 0 ]);\npatch([18.325 22.66 25.66 28.66 31.66 25.66 21.325 18.325 ],[14.33 14" ".33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([21.325 25.66 22.66 18.325 21.325 ],[11.33 11.33 14.33" " 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([18.325 22.66 25.66 21.325 18.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 " "1 1 ]);\npatch([21.325 31.66 28.66 25.66 22.66 18.325 21.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');po" "rt_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "8910" Ports [3, 1] Position [630, 314, 675, 356] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27.66 3" "3.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 27.66 21" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8911" Ports [3, 1] Position [490, 404, 535, 446] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,42,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 42 42 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[27.66 27.66 3" "3.66 27.66 33.66 33.66 33.66 27.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[21.66 21.66 27.66 27.66 21" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[15.66 15.66 21.66 21.66 15.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[9.66 9.66 15.66 9.66 15.66 15.66 9.66 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('an" "d');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8912" Ports [2, 1] Position [470, 651, 505, 689] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,38,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 38 38 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[24.55 24.55 29." "55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[19.55 19.55 24.55 24.55 19." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "8913" Ports [2, 1] Position [305, 689, 345, 716] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,27,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 27 27 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 27 27 0 ]);\npatch([13.325 17.66 20.66 23.66 26.66 20.66 16.325 13.325 ],[16.33 16" ".33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([16.325 20.66 17.66 13.325 16.325 ],[13.33 13.33 16.33" " 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([13.325 17.66 20.66 16.325 13.325 ],[10.33 10.33 13.33 13.33 10.33 ]," "[1 1 1 ]);\npatch([16.325 26.66 23.66 20.66 17.66 13.325 16.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "8914" Ports [2, 1] Position [300, 392, 345, 423] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,31,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 31 31 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 31 31 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\geq b','texmode','o" "n');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "8915" Ports [2, 1] Position [300, 452, 345, 483] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,31,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 31 31 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 31 31 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\geq b','texmode','o" "n');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational9" SID "8917" Ports [2, 1] Position [300, 302, 345, 333] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a<=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,31,2,1,white,blue,0,52e4b236,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 31 31 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 31 31 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.44 19.44 23" ".44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.44 19.44 15.44" " ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch(" "[17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\leq b','texmode','o" "n');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "En" SID "8918" Position [760, 328, 790, 342] NamePlacement "alternate" IconDisplay "Port number" } Line { SrcBlock "Constant9" SrcPort 1 DstBlock "Relational9" DstPort 2 } Line { SrcBlock "SymNum" SrcPort 1 Points [130, 0] Branch { DstBlock "Relational9" DstPort 1 } Branch { Points [0, 90] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 60] Branch { DstBlock "Relational2" DstPort 1 } Branch { Points [0, 145] Branch { DstBlock "LSB" DstPort 1 } Branch { Points [0, 45] DstBlock "Relational3" DstPort 1 } } } } } Line { SrcBlock "Relational9" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "En" DstPort 1 } Line { SrcBlock "From7" SrcPort 1 Points [5, 0] Branch { DstBlock "Relational1" DstPort 2 } Branch { DstBlock "AddSub1" DstPort 1 } } Line { SrcBlock "Relational1" SrcPort 1 Points [55, 0] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, 170; -155, 0; 0, 115] DstBlock "Logical3" DstPort 1 } } Line { SrcBlock "AddSub1" SrcPort 1 Points [5, 0] Branch { DstBlock "Relational2" DstPort 2 } Branch { Points [0, 190] DstBlock "Relational3" DstPort 2 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 Points [20, 0; 0, -45] DstBlock "Logical1" DstPort 2 } Line { SrcBlock "LSB" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [45, 0; 0, -90] DstBlock "Logical" DstPort 2 } Line { SrcBlock "Inverter" SrcPort 1 Points [20, 0; 0, -165] DstBlock "Logical1" DstPort 3 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 Points [105, 0] DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 Points [105, 0] DstBlock "Logical" DstPort 3 } Annotation { Name "First two symbols are always training and should be processed immediately, back-to-back. The same IFFT\n" "output will be repeated numTrainingSyms times. After this, the IFFT processes the base-rate symbols. Because\neach" " base-rate symbol is transmitted from both antennas, the IFFT waits a full output symbol period before processing\n" "the next symbol. After the base rate symbols, the multiplexing of full-rate symbols begins, so the IFFT is trigger" "ed twice\nper output symbol period (computing two output symbols- one per antenna- per period)." Position [311, 253] HorizontalAlignment "left" } Annotation { Name "In Alamouti mode, treat base rate symbols\nsame as full rate" Position [458, 772] } } } Block { BlockType From Name "From1" SID "8919" Position [1075, 602, 1155, 618] ShowName off CloseFcn "tagdialog Close" GotoTag "localReset" } Block { BlockType From Name "From2" SID "8920" Position [315, 702, 395, 718] ShowName off CloseFcn "tagdialog Close" GotoTag "localReset" } Block { BlockType From Name "From3" SID "8921" Position [610, 687, 690, 703] ShowName off CloseFcn "tagdialog Close" GotoTag "localReset" } Block { BlockType From Name "From4" SID "8922" Position [345, 317, 425, 333] ShowName off CloseFcn "tagdialog Close" GotoTag "localReset" } Block { BlockType From Name "From5" SID "8923" Position [605, 622, 685, 638] ShowName off CloseFcn "tagdialog Close" GotoTag "localReset" } Block { BlockType From Name "From6" SID "8924" Position [170, 503, 335, 517] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_OFDM_SymCounts" TagVisibility "global" } Block { BlockType From Name "From7" SID "8925" Position [300, 197, 380, 213] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReset" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "8926" Position [1085, 376, 1215, 394] ShowName off GotoTag "reg_numBaseRateSyms" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "8927" Position [500, 207, 560, 223] ShowName off GotoTag "localReset" TagVisibility "local" } Block { BlockType Goto Name "Goto3" SID "8928" Position [1085, 396, 1215, 414] ShowName off GotoTag "reg_numTrainingSyms" TagVisibility "global" } Block { BlockType Reference Name "Logical1" SID "8929" Ports [2, 1] Position [455, 304, 485, 331] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[" "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 1" "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13." "33 10.33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7" ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\n\n\n\ncolor('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8930" Ports [3, 1] Position [435, 201, 465, 229] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black'" ");disp('or');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Logical4" SID "8931" Ports [2, 1] Position [725, 674, 755, 701] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[" "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 1" "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13." "33 10.33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7" ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\n\n\n\ncolor('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "8932" Ports [3, 1] Position [800, 868, 830, 912] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,44,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 44 44 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[26.44 " "26.44 30.44 26.44 30.44 30.44 30.44 26.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[22.44 22.44 26.44 2" "6.44 22.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 22.44 18.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 14.44 18.44 18.44 14.44 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('bl" "ack');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "8933" Ports [2, 1] Position [1285, 649, 1315, 676] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,27,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 27 27 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 27 27 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[" "16.33 16.33 19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[13.33 1" "3.33 16.33 16.33 13.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[10.33 10.33 13.33 13." "33 10.33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7" ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\n\n\n\ncolor('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Payload\nRunning1" SID "8934" Ports [3, 1] Position [555, 281, 600, 359] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,78,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 78 78 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 78 78 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[45." "66 45.66 51.66 45.66 51.66 51.66 51.66 45.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[39.66 39.66 4" "5.66 45.66 39.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[33.66 33.66 39.66 39.66 33.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 27.66 33.66 33.66 27.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Payload\nRunning2" SID "8935" Ports [3, 1] Position [1200, 571, 1245, 649] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,78,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 78 78 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 78 78 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[45." "66 45.66 51.66 45.66 51.66 51.66 51.66 45.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[39.66 39.66 4" "5.66 45.66 39.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[33.66 33.66 39.66 39.66 33.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 27.66 33.66 33.66 27.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Payload\nRunning4" SID "8936" Ports [3, 1] Position [510, 671, 555, 749] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,78,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 78 78 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 78 78 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[45." "66 45.66 51.66 45.66 51.66 51.66 51.66 45.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[39.66 39.66 4" "5.66 45.66 39.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[33.66 33.66 39.66 39.66 33.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[27.66 27.66 33.66 27.66 33.66 33.66 27.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge1" SID "8937" Ports [1, 1] Position [455, 335, 500, 355] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge1" Location [2, 74, 598, 375] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "8938" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "8939" Ports [1, 1] Position [95, 46, 125, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "8940" Ports [1, 1] Position [160, 48, 185, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "8941" Ports [2, 1] Position [215, 28, 260, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8942" Position [285, 43, 315, 57] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } } } Block { BlockType SubSystem Name "Posedge2" SID "8943" Ports [1, 1] Position [300, 335, 345, 355] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge2" Location [2, 74, 598, 375] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "8944" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "8945" Ports [1, 1] Position [95, 46, 125, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "8946" Ports [1, 1] Position [160, 48, 185, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 " "18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 1" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "8947" Ports [2, 1] Position [215, 28, 260, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8948" Position [285, 43, 315, 57] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType Reference Name "Preamble Index\nCounter" SID "8949" Ports [2, 1] Position [735, 291, 785, 329] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited co" "unter is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(1+length(preamble)))" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[5 9 0 9 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,630" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,38,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 38 38 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 38 38 0 ]);\npatch([13.875 21.1 26.1 31.1 36.1 26.1 18.875 13.875 ],[24." "55 24.55 29.55 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([18.875 26.1 21.1 13.875 18.875 ],[19.55 19.55" " 24.55 24.55 19.55 ],[0.931 0.946 0.973 ]);\npatch([13.875 21.1 26.1 18.875 13.875 ],[14.55 14.55 19.55 19.55 1" "4.55 ],[1 1 1 ]);\npatch([18.875 36.1 31.1 26.1 21.1 13.875 18.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\" "fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Relational1" SID "8950" Ports [2, 1] Position [670, 213, 715, 257] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 0 0 5 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28." "66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 2" "8.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('out" "put',1,'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "8951" Ports [2, 1] Position [795, 752, 830, 783] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,31,2,1,white,blue,0,2a81ff49,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 31 31 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 31 31 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = " "b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "8952" Ports [2, 1] Position [950, 692, 985, 723] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a<=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,31,2,1,white,blue,0,52e4b236,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 31 31 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 31 31 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\" "leq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational5" SID "8953" Ports [2, 1] Position [460, 378, 505, 422] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[3 0 0 5 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,2a81ff49,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28." "66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 2" "8.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('out" "put',1,'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational6" SID "8954" Ports [2, 1] Position [950, 617, 995, 648] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a<=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,31,2,1,white,blue,0,52e4b236,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 31 31 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 31 31 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa \\leq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational7" SID "8955" Ports [2, 1] Position [795, 802, 830, 833] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,31,2,1,white,blue,0,2a81ff49,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 31 31 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 31 31 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = " "b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational8" SID "8956" Ports [2, 1] Position [970, 472, 1015, 503] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[2 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,31,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 31 31 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 31 31 0 ]);\npatch([13.1 18.88 22.88 26.88 30.88 22.88 17.1 13.1 ],[19.4" "4 19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([17.1 22.88 18.88 13.1 17.1 ],[15.44 15.44 19.4" "4 19.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([13.1 18.88 22.88 17.1 13.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1" " 1 1 ]);\npatch([17.1 30.88 26.88 22.88 18.88 13.1 17.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bfa > b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Sample Counter" SID "8957" Ports [2, 1] Position [790, 680, 840, 720] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited co" "unter is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "1+ceil(log2(numSubcarriers + CPLength + 1))" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[4 7 0 7 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,40,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 40 40 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 40 40 0 ]);\npatch([13.875 21.1 26.1 31.1 36.1 26.1 18.875 13.875 ],[25." "55 25.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([18.875 26.1 21.1 13.875 18.875 ],[20.55 20.55" " 25.55 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([13.875 21.1 26.1 18.875 13.875 ],[15.55 15.55 20.55 20.55 1" "5.55 ],[1 1 1 ]);\npatch([18.875 36.1 31.1 26.1 21.1 13.875 18.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55" " ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp(" "'{\\fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Start/Done\nControl" SID "8958" Ports [2, 1] Position [180, 329, 255, 356] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Start/Done\nControl" Location [120, 92, 1254, 824] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "TxDone" SID "8959" Position [140, 418, 170, 432] IconDisplay "Port number" } Block { BlockType Inport Name "Start" SID "8960" Position [125, 373, 155, 387] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant2" SID "8961" Ports [0, 1] Position [750, 192, 765, 208] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 12.22 " "10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 ],[0.931" " 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 11.44 9.44" " 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon" " graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "8962" Ports [1, 1] Position [590, 367, 620, 383] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,375" block_type "convert" block_version "8.2.02" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "8963" Ports [1, 1] Position [590, 382, 620, 398] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,374,375" block_type "convert" block_version "8.2.02" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "8964" Position [55, 243, 215, 257] ShowName off CloseFcn "tagdialog Close" GotoTag "AF_TxDone" TagVisibility "global" } Block { BlockType From Name "From2" SID "8965" Position [165, 472, 245, 488] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReset" TagVisibility "global" } Block { BlockType From Name "From4" SID "8966" Position [55, 193, 215, 207] ShowName off CloseFcn "tagdialog Close" GotoTag "TxEn_Output" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "8967" Position [800, 191, 930, 209] ShowName off GotoTag "regTx_PktRunningEn" TagVisibility "global" } Block { BlockType Goto Name "Goto5" SID "8968" Position [805, 216, 935, 234] ShowName off GotoTag "regTx_PktRunning" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "8969" Ports [1, 1] Position [500, 381, 530, 399] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "8.2.02" sg_icon_stat "30,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 18 18 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfpr" "intf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "8970" Ports [2, 1] Position [305, 415, 340, 450] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22.55 27." "55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 22.55 17." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "8971" Ports [2, 1] Position [480, 190, 515, 225] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22.55 27." "55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 22.55 17." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "8972" Ports [2, 1] Position [480, 225, 515, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22.55 27." "55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 22.55 17." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "8973" Ports [2, 1] Position [675, 365, 710, 400] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 35 35 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 35 35 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[22.55 22.55 27." "55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[17.55 17.55 22.55 22.55 17." "55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[12.55 12.55 17.55 17.55 12.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and')" ";\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge1" SID "8974" Ports [1, 1] Position [265, 240, 310, 260] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge1" Location [160, 70, 1394, 782] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "8975" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "8976" Ports [1, 1] Position [95, 46, 125, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "8977" Ports [1, 1] Position [160, 48, 185, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "8978" Ports [2, 1] Position [215, 28, 260, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8979" Position [285, 43, 315, 57] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } } } Block { BlockType SubSystem Name "Posedge2" SID "8980" Ports [1, 1] Position [210, 370, 255, 390] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge2" Location [160, 70, 1394, 782] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "8981" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "8982" Ports [1, 1] Position [95, 46, 125, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "8983" Ports [1, 1] Position [160, 48, 185, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "8984" Ports [2, 1] Position [215, 28, 260, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8985" Position [285, 43, 315, 57] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType SubSystem Name "Posedge3" SID "8986" Ports [1, 1] Position [210, 415, 255, 435] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge3" Location [2, 74, 598, 375] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "8987" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "8988" Ports [1, 1] Position [95, 46, 125, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "8989" Ports [1, 1] Position [160, 48, 185, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "8990" Ports [2, 1] Position [215, 28, 260, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8991" Position [285, 43, 315, 57] IconDisplay "Port number" } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } } } Block { BlockType SubSystem Name "Posedge4" SID "8992" Ports [1, 1] Position [265, 190, 310, 210] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Posedge4" Location [160, 70, 1394, 782] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "8993" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "8994" Ports [1, 1] Position [95, 46, 125, 74] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. " "If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,356,256" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.4" "4 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 " "14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nf" "printf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-" "1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "8995" Ports [1, 1] Position [160, 48, 185, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,24,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 " "15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 " "1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "8996" Ports [2, 1] Position [215, 28, 260, 72] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "1" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 2" "8.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 " "28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('" "black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "8997" Position [285, 43, 315, 57] IconDisplay "Port number" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "D" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 20] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType SubSystem Name "S-R Latch" SID "8998" Ports [2, 1] Position [385, 373, 425, 402] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch" Location [582, 427, 787, 526] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "8999" Position [225, 213, 255, 227] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "9000" Position [180, 198, 210, 212] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant2" SID "9001" Ports [0, 1] Position [240, 182, 255, 198] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 " "12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reg" SID "9002" Ports [3, 1] Position [300, 183, 340, 227] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "9003" Position [390, 198, 420, 212] IconDisplay "Port number" } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Reg" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Reg" DstPort 2 } Line { SrcBlock "Reg" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Reg" DstPort 3 } } } Block { BlockType SubSystem Name "S-R Latch1" SID "9004" Ports [2, 1] Position [560, 197, 600, 248] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "S-R Latch1" Location [582, 427, 787, 526] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "9005" Position [225, 213, 255, 227] IconDisplay "Port number" } Block { BlockType Inport Name "R" SID "9006" Position [180, 198, 210, 212] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant2" SID "9007" Ports [0, 1] Position [240, 182, 255, 198] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,16,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 16 16 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[10.22 10.22 " "12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[8.22 8.22 10.22 10.22 8.22 " "],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch([4.55 " "11.44 9.44 7.44 5.44 2.55 4.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMME" "NT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nf" "printf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Reg" SID "9008" Ports [3, 1] Position [300, 183, 340, 227] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,44,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 44 44 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 44 44 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[27.55 27." "55 32.55 27.55 32.55 32.55 32.55 27.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[22.55 22.55 27.55 2" "7.55 22.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[17.55 17.55 22.55 22.55 17.55 ],[1 1" " 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[12.55 12.55 17.55 12.55 17.55 17.55 12.55 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black')" ";port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Outport Name "Q" SID "9009" Position [390, 198, 420, 212] IconDisplay "Port number" } Line { SrcBlock "S" SrcPort 1 DstBlock "Reg" DstPort 3 } Line { SrcBlock "Reg" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Reg" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Reg" DstPort 1 } } } Block { BlockType Reference Name "Tx_PktDone" SID "9010" Ports [1, 1] Position [645, 477, 705, 493] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, " "or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, dep" "ending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "60,16,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 16 16 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[10.22 10.22" " 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[8.22 8.22 10.22 10.22 8" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 ]);\npatch" "([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1," "' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end" " icon text');" } Block { BlockType Reference Name "Up Sample1" SID "9011" Ports [1, 1] Position [390, 208, 420, 222] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,14,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([12.5" "5 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}" "\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample2" SID "9012" Ports [1, 1] Position [565, 471, 595, 499] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,28,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}\\" "bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample3" SID "9013" Ports [1, 1] Position [390, 228, 420, 242] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,14,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([12.5" "5 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}" "\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Up Sample4" SID "9014" Ports [1, 1] Position [390, 243, 420, 257] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and sin" "gle bit flip-flop are used." sample_ratio "4" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,14,1,1,white,blue,0,a300b05e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([12.5" "5 19.44 17.44 15.44 13.44 10.55 12.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('{\\fontsize{14pt}" "\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "TxStart" SID "9015" Position [775, 378, 805, 392] IconDisplay "Port number" } Line { SrcBlock "Start" SrcPort 1 DstBlock "Posedge2" DstPort 1 } Line { SrcBlock "TxDone" SrcPort 1 DstBlock "Posedge3" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [10, 0; 0, -40] Branch { DstBlock "S-R Latch" DstPort 2 } Branch { Points [0, -160] DstBlock "Up Sample3" DstPort 1 } } Line { SrcBlock "From2" SrcPort 1 Points [15, 0; 0, -40] DstBlock "Logical1" DstPort 2 } Line { SrcBlock "S-R Latch" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "TxStart" DstPort 1 } Line { SrcBlock "Posedge3" SrcPort 1 Points [20, 0] Branch { DstBlock "Logical1" DstPort 1 } Branch { Points [0, 60] DstBlock "Up Sample2" DstPort 1 } } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Posedge2" SrcPort 1 Points [70, 0] Branch { DstBlock "S-R Latch" DstPort 1 } Branch { Points [0, -20] Branch { Points [145, 0; 0, 15] DstBlock "Convert1" DstPort 1 } Branch { Points [0, -145] DstBlock "Up Sample1" DstPort 1 } } } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Tx_PktDone" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "S-R Latch1" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Posedge4" DstPort 1 } Line { SrcBlock "Posedge4" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "S-R Latch1" SrcPort 1 DstBlock "Goto5" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Up Sample3" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 Points [10, 0; 0, -10] DstBlock "S-R Latch1" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Posedge1" DstPort 1 } Line { SrcBlock "Posedge1" SrcPort 1 DstBlock "Up Sample4" DstPort 1 } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "Logical3" DstPort 2 } } } Block { BlockType Reference Name "Sym Counter" SID "9016" Ports [2, 1] Position [790, 620, 840, 655] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited co" "unter is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(max_OFDM_symbols+1))" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[4 7 0 7 0 0 0]" use_rpm "on" has_advanced_control "0" sggui_pos "20,20,356,524" block_type "counter" block_version "VER_STRING_GOES_HERE" sg_icon_stat "50,35,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 35 35 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 35 35 0 ]);\npatch([13.875 21.1 26.1 31.1 36.1 26.1 18.875 13.875 ],[22." "55 22.55 27.55 22.55 27.55 27.55 27.55 22.55 ],[1 1 1 ]);\npatch([18.875 26.1 21.1 13.875 18.875 ],[17.55 17.55" " 22.55 22.55 17.55 ],[0.931 0.946 0.973 ]);\npatch([13.875 21.1 26.1 18.875 13.875 ],[12.55 12.55 17.55 17.55 1" "2.55 ],[1 1 1 ]);\npatch([18.875 36.1 31.1 26.1 21.1 13.875 18.875 ],[7.55 7.55 12.55 7.55 12.55 12.55 7.55 ],[" "0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolo" "r('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\" "fontsize{14}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample" SID "9017" Ports [1, 1] Position [845, 292, 880, 328] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sampl" "e.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a m" "ux and single bit flip-flop are used." sample_ratio "2" copy_samples on en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,266" block_type "usamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,36,1,1,white,blue,0,cf641474,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 36 36 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 36 36 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[23.55" " 23.55 28.55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[18.55 18.55 23" ".55 23.55 18.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[13.55 13.55 18.55 18.55 13.55 " "],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 " "0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor(" "'black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Preamble Index" SID "9018" Position [945, 253, 975, 267] IconDisplay "Port number" } Block { BlockType Outport Name "Start" SID "9019" Position [360, 133, 390, 147] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "FFT En" SID "9020" Position [1120, 963, 1150, 977] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "BaseRate_En" SID "9021" Position [1090, 483, 1120, 497] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Training_Data" SID "9022" Position [1375, 658, 1405, 672] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "CPn_Data" SID "9023" Position [1065, 703, 1095, 717] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Start IFFT" SID "9024" Position [1120, 883, 1150, 897] Port "7" IconDisplay "Port number" } Line { SrcBlock "Payload\nRunning1" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Payload\nRunning1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [15, 0] Branch { DstBlock "Payload\nRunning1" DstPort 2 } Branch { Points [0, -50; 110, 0; 0, 30] DstBlock "Down Sample" DstPort 1 } } Line { SrcBlock "From4" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Preamble Index\nCounter" SrcPort 1 Points [35, 0] Branch { DstBlock "Up Sample" DstPort 1 } Branch { Points [0, -50] DstBlock "Preamble Index" DstPort 1 } } Line { SrcBlock "Relational1" SrcPort 1 Points [-235, 0; 0, 75] DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Relational1" DstPort 1 } Line { SrcBlock "Posedge1" SrcPort 1 DstBlock "Payload\nRunning1" DstPort 3 } Line { SrcBlock "Sample Counter" SrcPort 1 Points [20, 0] Branch { DstBlock "Relational4" DstPort 1 } Branch { Points [0, 60] Branch { DstBlock "Relational3" DstPort 1 } Branch { Points [0, 50] DstBlock "Relational7" DstPort 1 } } } Line { SrcBlock "Relational3" SrcPort 1 Points [-95, 0; 0, -90] Branch { Points [0, -35] DstBlock "Sym Counter" DstPort 2 } Branch { DstBlock "Logical4" DstPort 1 } } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "Payload\nRunning4" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Payload\nRunning4" DstPort 2 } Line { SrcBlock "Payload\nRunning4" SrcPort 1 Points [40, 0] Branch { DstBlock "Sample Counter" DstPort 2 } Branch { Points [0, 180] DstBlock "Logical6" DstPort 2 } } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Sample Counter" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Sym Counter" DstPort 1 } Line { SrcBlock "Sym Counter" SrcPort 1 Points [80, 0] Branch { Points [0, -145] DstBlock "Relational8" DstPort 2 } Branch { Points [5, 0] Branch { DstBlock "Relational6" DstPort 2 } Branch { Points [0, 300] DstBlock "FFT Start Gen" DstPort 1 } } } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "Relational6" SrcPort 1 Points [175, 0] Branch { DstBlock "Payload\nRunning2" DstPort 3 } Branch { Points [0, 35] DstBlock "Logical7" DstPort 2 } } Line { SrcBlock "Posedge2" SrcPort 1 Points [15, 0] Branch { DstBlock "Delay" DstPort 1 } Branch { Points [0, -130] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Posedge1" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Relational5" DstPort 2 } Line { SrcBlock "Relational5" SrcPort 1 Points [-210, 0; 0, 335] DstBlock "Payload\nRunning4" DstPort 3 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Constant7" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "PktDone" SrcPort 1 Points [35, 0] Branch { DstBlock "Start/Done\nControl" DstPort 1 } Branch { DstBlock "Logical2" DstPort 3 } } Line { SrcBlock "Constant5" SrcPort 1 DstBlock "Payload\nRunning2" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Payload\nRunning2" DstPort 2 } Line { SrcBlock "Payload\nRunning2" SrcPort 1 Points [20, 0] DstBlock "Logical7" DstPort 1 } Line { SrcBlock "Constant8" SrcPort 1 DstBlock "Relational7" DstPort 2 } Line { SrcBlock "Relational7" SrcPort 1 Points [-15, 0; 0, 55] DstBlock "Logical6" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Start IFFT" DstPort 1 } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "Training_Data" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "CPn_Data" DstPort 1 } Line { SrcBlock "Relational8" SrcPort 1 DstBlock "BaseRate_En" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Relational8" DstPort 1 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "FFT Start Gen" SrcPort 1 Points [-65, 0] Branch { Points [0, 30] DstBlock "FFT En" DstPort 1 } Branch { Points [0, -35] DstBlock "Logical6" DstPort 3 } } Line { SrcBlock "2x1" SrcPort 1 Points [50, 0] Branch { Points [15, 0] Branch { Points [260, 0; 0, 115] DstBlock "Relational6" DstPort 1 } Branch { Points [0, -20] DstBlock "AddSub1" DstPort 2 } } Branch { Points [0, -105] DstBlock "Goto3" DstPort 1 } } Line { SrcBlock "2x" SrcPort 1 Points [40, 0] Branch { Points [0, 10] DstBlock "AddSub1" DstPort 1 } Branch { Points [0, -70] DstBlock "Goto1" DstPort 1 } } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Preamble Index\nCounter" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Preamble Index\nCounter" DstPort 2 } Line { SrcBlock "Up Sample" SrcPort 1 Points [10, 0] Branch { Points [0, 80] DstBlock "Relational5" DstPort 1 } Branch { Points [0, -65] DstBlock "Relational1" DstPort 2 } } Line { SrcBlock "16_8LSB" SrcPort 1 DstBlock "2x" DstPort 1 } Line { SrcBlock "8LSB" SrcPort 1 DstBlock "2x1" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Down Sample4" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 Points [5, 0] Branch { DstBlock "8LSB" DstPort 1 } Branch { Points [0, -55] DstBlock "16_8LSB" DstPort 1 } } Line { SrcBlock "Start/Done\nControl" SrcPort 1 Points [15, 0] Branch { DstBlock "Posedge2" DstPort 1 } Branch { Points [0, -205] DstBlock "Start" DstPort 1 } } Line { SrcBlock "StartTx" SrcPort 1 DstBlock "Start/Done\nControl" DstPort 2 } Annotation { Name "0=Waiting for Cyclic Prefix\n1=Processing real data" Position [1116, 713] HorizontalAlignment "left" } Annotation { Name "0=Sending training symbols\n1=Processing real data" Position [1316, 703] HorizontalAlignment "left" } Annotation { Name "1 cycle delay to align CPn_data\nwith IFFT start. FFT core begins\naccepting data 1 cycle after\nr" "ising edge of start." Position [1166, 761] } Annotation { Name "Three inputs to AND for IFFT start:\n1) Start when first data sample is ready\n2) Start when samp/" "sym counters are enabled\n(i.e. during payload, not training)\n3) Not after last symbol is finished\n(i.e. when" " coutners are being reset)" Position [625, 969] } } } Block { BlockType SubSystem Name "TxStart" SID "9025" Ports [0, 1] Position [15, 231, 95, 259] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "TxStart" Location [2, 82, 1184, 1016] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Sum Name "Add" SID "9026" Ports [2, 1] Position [270, 187, 300, 218] InputSameDT off OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Reference Name "Constant1" SID "9027" Ports [0, 1] Position [450, 118, 475, 142] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "ActionID_AFTransmit" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(ActionID_AFTransmit))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,24,0,1,white,blue,0,8a5cc997,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('output',1,'31');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert" SID "9028" Ports [1, 1] Position [465, 272, 495, 288] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Copy_Downsample" SID "9029" Ports [1, 1] Position [480, 196, 545, 214] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Copy_Downsample" Location [-1278, 70, -2, 1004] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "9030" Position [110, 353, 140, 367] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "9031" Ports [1, 1] Position [210, 347, 235, 373] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,26,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Down Sample" SID "9032" Ports [1, 1] Position [390, 355, 415, 385] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardw" "are of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,30,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 30 30 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[18.33 18.33 " "21.33 18.33 21.33 21.33 21.33 18.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[15.33 15.33 18.33 18.33 1" "5.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[12.33 12.33 15.33 15.33 12.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[9.33 9.33 12.33 9.33 12.33 12.33 9.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1" "}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','texmode','on');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "9033" Ports [2, 1] Position [280, 348, 325, 392] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,44,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 44 44 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[28.66 28.66 3" "4.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[22.66 22.66 28.66 28.66 22" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[16.66 16.66 22.66 22.66 16.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "9034" Position [475, 363, 505, 377] NamePlacement "alternate" IconDisplay "Port number" } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [30, 0] Branch { Points [0, 20] DstBlock "Logical" DstPort 2 } Branch { DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Logical" DstPort 1 } } } Block { BlockType From Name "From1" SID "9035" Position [170, 273, 330, 287] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_SoftTxStart_TxEn" TagVisibility "global" } Block { BlockType From Name "From2" SID "9036" Position [310, 91, 490, 109] ShowName off CloseFcn "tagdialog Close" GotoTag "RxAutoReply_Action_BufNum" TagVisibility "global" } Block { BlockType From Name "From3" SID "9037" Position [60, 213, 220, 227] ShowName off CloseFcn "tagdialog Close" GotoTag "TxEn_Output_dbl" TagVisibility "global" } Block { BlockType From Name "From4" SID "9038" Position [170, 253, 330, 267] ShowName off CloseFcn "tagdialog Close" GotoTag "TxReg_TxStart" TagVisibility "global" } Block { BlockType Goto Name "Goto13" SID "9039" Position [1015, 116, 1130, 134] ShowName off GotoTag "AF_TxStart" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "9040" Ports [1, 1] Position [390, 272, 425, 288] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "9041" Ports [1, 1] Position [675, 160, 705, 180] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,20,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 20 20 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor" "('black');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "9042" Ports [2, 1] Position [680, 195, 710, 230] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,35,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 35 35 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 35 35 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[21.44 " "21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[17.44 17.44 21.44 2" "1.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "9043" Ports [2, 1] Position [540, 250, 575, 290] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,40,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 40 40 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 40 40 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[25.55" " 25.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[20.55 20.55 25" ".55 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[15.55 15.55 20.55 20.55 15.55 " "],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "9044" Ports [2, 1] Position [775, 190, 805, 225] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 35 35 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 35 35 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[21.44 " "21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[17.44 17.44 21.44 2" "1.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "9045" Ports [2, 1] Position [910, 105, 940, 140] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,35,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 35 35 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 35 35 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[21.44 " "21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[17.44 17.44 21.44 2" "1.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType DiscretePulseGenerator Name "Pulse\nGenerator1" SID "9046" Ports [0, 1] Position [70, 178, 115, 212] NamePlacement "alternate" Period "(simOnly_numSamples*2 + 1250)*2" PhaseDelay "5" } Block { BlockType Reference Name "Relational1" SID "9047" Ports [2, 1] Position [555, 84, 595, 146] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.3" sg_icon_stat "40,62,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 62 62 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 62 62 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[36.55" " 36.55 41.55 36.55 41.55 41.55 41.55 36.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[31.55 31.55 36" ".55 36.55 31.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[26.55 26.55 31.55 31.55 26.55 " "],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[21.55 21.55 26.55 21.55 26.55 26.55 21.55 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor(" "'black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('outp" "ut',1,'\\bfa = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Tx_StartTransmit" SID "9048" Ports [1, 1] Position [380, 199, 415, 211] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx" " fixed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,12,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ]" ",[7.11 7.11 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7." "11 7.11 6.11 ],[0.985 0.979 0.895 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1" " 1 1 ]);\npatch([15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.985 0." "979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "posedge1" SID "9049" Ports [1, 1] Position [590, 197, 620, 213] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "posedge1" Location [202, 74, 1392, 1156] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "9050" Position [200, 253, 230, 267] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" SID "9051" Ports [1, 1] Position [425, 223, 460, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15.33 15" ".33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "9052" Ports [1, 1] Position [485, 226, 510, 244] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "9053" Ports [2, 1] Position [540, 221, 585, 274] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 32.66 3" "8.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 32.66 26" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "9054" Position [610, 243, 640, 257] IconDisplay "Port number" } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [165, 0] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType Outport Name "Start" SID "9055" Position [910, 203, 940, 217] IconDisplay "Port number" } Line { SrcBlock "Tx_StartTransmit" SrcPort 1 DstBlock "Copy_Downsample" DstPort 1 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Copy_Downsample" SrcPort 1 DstBlock "posedge1" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [60, 0; 0, -50] DstBlock "Logical" DstPort 2 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Relational1" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Inverter1" SrcPort 1 Points [30, 0; 0, 30] DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 Points [60, 0] Branch { DstBlock "Logical4" DstPort 1 } Branch { DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Start" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Goto13" DstPort 1 } Line { SrcBlock "posedge1" SrcPort 1 Points [20, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, -75] DstBlock "Logical4" DstPort 2 } } Line { SrcBlock "Pulse\nGenerator1" SrcPort 1 DstBlock "Add" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 Points [15, 0; 0, -10] DstBlock "Add" DstPort 2 } Line { SrcBlock "Add" SrcPort 1 DstBlock "Tx_StartTransmit" DstPort 1 } Annotation { Name "If TxReg_SoftTxStart_TxEn is set, the PHY\nwill assert the radio controller's TxEn port. This\nsta" "rts the Tx state machine, which will eventually\nassert the PHY's Tx_StartTransmit input.\nOtherwise, the TxSta" "rt register can start the PHY\ndirectly, independent of the radio controller." Position [436, 344] } Annotation { Name "BufNum=31 (or X?) falls before TxEn!" Position [514, 35] } } } Block { BlockType Outport Name "AntA I" SID "9056" Position [1045, 193, 1075, 207] IconDisplay "Port number" } Block { BlockType Outport Name "AntA Q" SID "9057" Position [1045, 233, 1075, 247] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "AntB I" SID "9058" Position [1045, 273, 1075, 287] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "AntB Q" SID "9059" Position [1045, 313, 1075, 327] Port "4" IconDisplay "Port number" } Line { SrcBlock "TxStart" SrcPort 1 DstBlock "TxControl" DstPort 1 } Line { SrcBlock "Training_Data" SrcPort 1 Points [-30, 0; 0, 160] DstBlock "IFFT" DstPort 3 } Line { SrcBlock "TxControl" SrcPort 7 Points [70, 0; 0, -30] DstBlock "IFFT" DstPort 4 } Line { SrcBlock "IFFT" SrcPort 3 DstBlock "OutputBuffers" DstPort 2 } Line { SrcBlock "IFFT" SrcPort 4 DstBlock "OutputBuffers" DstPort 3 } Line { SrcBlock "IFFT" SrcPort 1 Points [20, 0; 0, -35] DstBlock "Training_Data" DstPort 7 } Line { SrcBlock "IFFT" SrcPort 5 DstBlock "OutputBuffers" DstPort 4 } Line { SrcBlock "OutputBuffers" SrcPort 1 DstBlock "OutputMuxes" DstPort 2 } Line { SrcBlock "OutputBuffers" SrcPort 2 DstBlock "OutputMuxes" DstPort 3 } Line { Labels [0, 0] SrcBlock "TxControl" SrcPort 5 Points [45, 0; 0, -245; 255, 0; 0, 65] DstBlock "Training_Data" DstPort 2 } Line { SrcBlock "TxControl" SrcPort 6 Points [50, 0; 0, -255; 245, 0; 0, 50] DstBlock "Training_Data" DstPort 1 } Line { Labels [5, 0] SrcBlock "TxControl" SrcPort 4 Points [40, 0; 0, -235; 265, 0; 0, 80] DstBlock "Training_Data" DstPort 3 } Line { SrcBlock "OutputBuffers" SrcPort 5 DstBlock "OutputMuxes" DstPort 6 } Line { Labels [0, 0] SrcBlock "Training_Data" SrcPort 2 Points [-20, 0; 0, 100] DstBlock "IFFT" DstPort 2 } Line { SrcBlock "OutputBuffers" SrcPort 6 Points [30, 0] Branch { DstBlock "OutputMuxes" DstPort 7 } Branch { Points [0, -170] DstBlock "Training_Data" DstPort 6 } Branch { Points [0, 35; -360, 0] Branch { Points [0, -35] DstBlock "IFFT" DstPort 5 } Branch { Points [-225, 0] DstBlock "TxControl" DstPort 2 } } } Line { SrcBlock "OutputBuffers" SrcPort 3 DstBlock "OutputMuxes" DstPort 4 } Line { Labels [0, 0] SrcBlock "OutputBuffers" SrcPort 4 DstBlock "OutputMuxes" DstPort 5 } Line { SrcBlock "TxControl" SrcPort 1 Points [25, 0; 0, -215; 425, 0; 0, 185] DstBlock "OutputMuxes" DstPort 1 } Line { SrcBlock "IFFT" SrcPort 2 DstBlock "OutputBuffers" DstPort 1 } Line { SrcBlock "TxControl" SrcPort 3 Points [35, 0; 0, -225; 275, 0; 0, 95] DstBlock "Training_Data" DstPort 4 } Line { SrcBlock "Pre-Spin, \nFilters & DACs" SrcPort 1 DstBlock "AntA I" DstPort 1 } Line { SrcBlock "Pre-Spin, \nFilters & DACs" SrcPort 2 DstBlock "AntA Q" DstPort 1 } Line { Labels [0, 0] SrcBlock "Pre-Spin, \nFilters & DACs" SrcPort 3 DstBlock "AntB I" DstPort 1 } Line { SrcBlock "Pre-Spin, \nFilters & DACs" SrcPort 4 DstBlock "AntB Q" DstPort 1 } Line { SrcBlock "TxControl" SrcPort 2 Points [30, 0; 0, -215; 285, 0; 0, 110] DstBlock "Training_Data" DstPort 5 } Line { SrcBlock "Training_Data" SrcPort 3 Points [-10, 0] DstBlock "IFFT" DstPort 1 } Line { SrcBlock "IFFT" SrcPort 6 DstBlock "OutputBuffers" DstPort 5 } Line { SrcBlock "OutputMuxes" SrcPort 1 DstBlock "Pre-Spin, \nFilters & DACs" DstPort 1 } Line { SrcBlock "OutputMuxes" SrcPort 2 DstBlock "Pre-Spin, \nFilters & DACs" DstPort 2 } Line { SrcBlock "OutputMuxes" SrcPort 3 DstBlock "Pre-Spin, \nFilters & DACs" DstPort 3 } Line { SrcBlock "OutputMuxes" SrcPort 4 DstBlock "Pre-Spin, \nFilters & DACs" DstPort 4 } Line { SrcBlock "OutputMuxes" SrcPort 5 DstBlock "Pre-Spin, \nFilters & DACs" DstPort 5 } } } Block { BlockType SubSystem Name "Pkt Buffer\nBRAM Interface" SID "9060" Ports [] Position [17, 127, 62, 172] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Pkt Buffer\nBRAM Interface" Location [202, 82, 1161, 733] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "120" Block { BlockType SubSystem Name "Addr Select" SID "9061" Ports [0, 1] Position [90, 350, 170, 380] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Addr Select" Location [288, 388, 937, 583] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Constant2" SID "9062" Ports [0, 1] Position [360, 274, 390, 296] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "8.2.02" sg_icon_stat "30,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[" "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 1" "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33" " 8.33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]," "[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant3" SID "9063" Ports [0, 1] Position [360, 299, 390, 321] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "8.2.02" sg_icon_stat "30,22,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[" "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 1" "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33" " 8.33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]," "[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('output',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "9064" Ports [1, 1] Position [520, 427, 550, 443] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "9065" Ports [1, 1] Position [695, 422, 725, 438] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert7" SID "9066" Ports [1, 1] Position [520, 447, 550, 463] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert8" SID "9067" Ports [1, 1] Position [520, 467, 550, 483] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do" " not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "9068" Position [290, 467, 415, 483] ShowName off CloseFcn "tagdialog Close" GotoTag "regTx_PktRunning" TagVisibility "global" } Block { BlockType From Name "From2" SID "9069" Position [290, 447, 415, 463] ShowName off CloseFcn "tagdialog Close" GotoTag "Tx_Running" TagVisibility "global" } Block { BlockType From Name "From4" SID "9070" Position [290, 425, 435, 445] ShowName off CloseFcn "tagdialog Close" GotoTag "BRAM_Rx_AnyWrEn" TagVisibility "global" } Block { BlockType From Name "From5" SID "9071" Position [375, 230, 520, 250] ShowName off CloseFcn "tagdialog Close" GotoTag "regRx_FlexBERMode" TagVisibility "global" } Block { BlockType Reference Name "Inverter" SID "9072" Ports [1, 1] Position [440, 447, 475, 463] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter1" SID "9073" Ports [1, 1] Position [440, 467, 475, 483] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 16 16 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 16 16 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[1" "0.22 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[8.22 8.22 " "10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[6.22 6.22 8.22 8.22 6.22 ],[" "1 1 1 ]);\npatch([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('bla" "ck');disp('not');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical" SID "9074" Ports [2, 1] Position [780, 418, 815, 467] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "35,49,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 49 49 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 49 49 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[29.55" " 29.55 34.55 29.55 34.55 34.55 34.55 29.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[24.55 24.55 29" ".55 29.55 24.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[19.55 19.55 24.55 24.55 19.55 " "],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[14.55 14.55 19.55 14.55 19.55 19.55 14.55 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "9075" Ports [2, 1] Position [580, 270, 620, 310] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "40,40,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55" " 25.55 30.55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25" ".55 25.55 20.55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 " "],[1 1 1 ]);\npatch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "9076" Ports [3, 1] Position [590, 423, 635, 487] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "45,64,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 64 64 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 64 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[38." "66 38.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[32.66 32.66 3" "8.66 38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32.66 32.66 26.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 26.66 20.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "\ncolor('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Simulation Multiplexer1" SID "9077" Ports [2, 1] Position [435, 272, 485, 323] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Simulation Multiplexer" SourceType "Xilinx Simulation Multiplexer Block" infoedit "Distinguish input subsystems as \"simulation only\" and \"generation only\". The input specif" "ied For Simulation will be used during Simulink simulation. The input specified For Generation will be used du" "ring code generation. This block will typically be used on the output of a HW Co-Simulation, Black Box, or Mod" "elSim subsystem.

Hardware Notes: This block costs nothing." sim_sel "1" hw_sel "2" has_advanced_control "0" sggui_pos "20,20,336,197" block_type "simmux" block_version "10.1.3" sg_icon_stat "50,51,2,1,white,blue,0,4170dd71,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 51 51 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 51 51 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425 ],[" "32.77 32.77 39.77 32.77 39.77 39.77 39.77 32.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.425 ],[25.77 2" "5.77 32.77 32.77 25.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[18.77 18.77 25.77 25." "77 18.77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[11.77 11.77 18.77 11.77 18.77 18.7" "7 11.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon te" "xt');\n\n\n\nfprintf('','COMMENT: end icon text');color('red');\nplot(swLineX,simSwLineY);\ncolor('black');\npl" "ot(swLineX,hwSwLineY);\n" } Block { BlockType Outport Name "Sel" SID "9078" Position [885, 438, 915, 452] IconDisplay "Port number" } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Simulation Multiplexer1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [25, 0; 0, 140] DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Simulation Multiplexer1" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 Points [25, 0; 0, 40] DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Simulation Multiplexer1" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Sel" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Convert8" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Convert7" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Convert8" SrcPort 1 DstBlock "Logical2" DstPort 3 } Annotation { Name "Simulation of FlexBER mode requires overriding the address selection\nto ignore the Tx blocks, eve" "n when transmitting. This is *not* required in \nhardware, as Tx/Rx are half duplex at a given node." Position [441, 364] } Annotation { Name "Let the Rx logic control the BRAM address unless we're transmitting.\nThis check handles a very ra" "re bug, when an incoming packet starts\nimmediately before the MAC begins a transmission." Position [465, 515] } } } Block { BlockType Reference Name "BRAM_Addr" SID "9079" Ports [1, 1] Position [435, 385, 490, 405] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o" "r fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depen" "ding on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 55 55 0 0 ],[0 0 20 20 0 ]);\npatch([22.55 25.44 27.44 29.44 31.44 27.44 24.55 22.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([24.55 27.44 25.44 22.55 24.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([22.55 25.44 27.44 24.55 22.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([24.55 31.44 29.44 27.44 25.44 22.55 24.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "BRAM_DataIn" SID "9080" Ports [1, 1] Position [785, 174, 840, 196] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed p" "oint type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "64" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,22,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 22 22 0 ],[0.95 0.93 0.65" " ]);\nplot([0 55 55 0 0 ],[0 0 22 22 0 ]);\npatch([20.325 24.66 27.66 30.66 33.66 27.66 23.325 20.325 ],[14.33 14.3" "3 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([23.325 27.66 24.66 20.325 23.325 ],[11.33 11.33 14.33 14" ".33 11.33 ],[0.985 0.979 0.895 ]);\npatch([20.325 24.66 27.66 23.325 20.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 " "]);\npatch([23.325 33.66 30.66 27.66 24.66 20.325 23.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.985 0.979 0.895" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "BRAM_Dout" SID "9081" Ports [1, 1] Position [375, 145, 430, 165] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o" "r fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depen" "ding on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 55 55 0 0 ],[0 0 20 20 0 ]);\npatch([22.55 25.44 27.44 29.44 31.44 27.44 24.55 22.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([24.55 27.44 25.44 22.55 24.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([22.55 25.44 27.44 24.55 22.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([24.55 31.44 29.44 27.44 25.44 22.55 24.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "BRAM_En" SID "9863" Ports [1, 1] Position [435, 225, 495, 245] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o" "r fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depen" "ding on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "8.2.02" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "BRAM_Reset" SID "9082" Ports [1, 1] Position [435, 280, 495, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o" "r fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depen" "ding on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "8.2.02" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "BRAM_WEn" SID "9083" Ports [1, 1] Position [375, 175, 430, 195] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, o" "r fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depen" "ding on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "20,20,356,332" block_type "gatewayout" block_version "VER_STRING_GOES_HERE" sg_icon_stat "55,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 55 55 0 0 ],[0 0 20 20 0 ]);\npatch([22.55 25.44 27.44 29.44 31.44 27.44 24.55 22.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([24.55 27.44 25.44 22.55 24.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([22.55 25.44 27.44 24.55 22.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([24.55 31.44 29.44 27.44 25.44 22.55 24.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Constant" SID "9084" Ports [0, 1] Position [320, 279, 350, 301] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "8.2.02" sg_icon_stat "30,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.33 14.33 " "17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 14.33 14.33" " 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]);\n" "patch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('outp" "ut',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "9864" Ports [0, 1] Position [320, 224, 350, 246] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "8.2.02" sg_icon_stat "30,22,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[14.33 14.33 " "17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 11.33 14.33 14.33" " 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]);\n" "patch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('outp" "ut',1,'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "9085" Position [140, 145, 285, 165] ShowName off CloseFcn "tagdialog Close" GotoTag "BRAM_Rx_DOut" TagVisibility "global" } Block { BlockType From Name "From2" SID "9086" Position [140, 175, 285, 195] ShowName off CloseFcn "tagdialog Close" GotoTag "BRAM_Rx_WrEn" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "9087" Position [420, 460, 565, 480] ShowName off GotoTag "Debug_BRAM_Addr" TagVisibility "global" } Block { BlockType Goto Name "Goto2" SID "9088" Position [990, 175, 1135, 195] ShowName off GotoTag "BRAM_Tx_DIn" TagVisibility "global" } Block { BlockType Reference Name "Mux" SID "9089" Ports [3, 1] Position [315, 350, 350, 440] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "8.2.02" sg_icon_stat "35,90,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 12.8571 77.1429 90 0 ],[0.7" "7 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 12.8571 77.1429 90 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.87" "5 ],[50.55 50.55 55.55 50.55 55.55 55.55 55.55 50.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[45.55 45" ".55 50.55 50.55 45.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[40.55 40.55 45.55 45.55 40.5" "5 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[35.55 35.55 40.55 35.55 40.55 40.55 35.55 ],[0.93" "1 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black" "');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d" "1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "PLB Pkt Buffer" SID "9090" Ports [3, 1] Position [620, 137, 725, 233] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "PLB Pkt Buffer" Location [787, 95, 1092, 512] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "BRAM_Dout" SID "9091" Position [30, 123, 60, 137] IconDisplay "Port number" } Block { BlockType Inport Name "WEn" SID "9092" Position [20, 183, 50, 197] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Addr" SID "9093" Position [35, 33, 65, 47] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "AddrIn" SID "9094" Ports [1, 1] Position [135, 30, 200, 50] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx" " fixed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "8.2.02" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte0" SID "9095" Ports [1, 1] Position [365, 436, 405, 454] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte1" SID "9096" Ports [1, 1] Position [365, 391, 405, 409] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte2" SID "9097" Ports [1, 1] Position [365, 346, 405, 364] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte3" SID "9098" Ports [1, 1] Position [365, 301, 405, 319] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte4" SID "9099" Ports [1, 1] Position [365, 256, 405, 274] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "32" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte5" SID "9100" Ports [1, 1] Position [365, 211, 405, 229] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "40" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte6" SID "9101" Ports [1, 1] Position [365, 166, 405, 184] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "48" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte7" SID "9102" Ports [1, 1] Position [365, 121, 405, 139] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "56" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte8" SID "9103" Ports [1, 1] Position [265, 31, 305, 49] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "9" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "9104" Ports [8, 1] Position [825, 100, 875, 475] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary poi" "nt at zero." num_inputs "8" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.02" sg_icon_stat "50,375,8,1,white,blue,0,6fe74153,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 375 375 0 ],[0.77" " 0.82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 375 375 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425" " ],[194.77 194.77 201.77 194.77 201.77 201.77 201.77 194.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.42" "5 ],[187.77 187.77 194.77 194.77 187.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[180." "77 180.77 187.77 187.77 180.77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[173.77 173.7" "7 180.77 173.77 180.77 180.77 173.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprin" "tf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\n\n\n\n\n\n\ncolor('black');port" "_label('input',8,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "DataIn" SID "9105" Ports [1, 1] Position [95, 120, 160, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx" " fixed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "64" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "8.2.02" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "DataOut" SID "9106" Ports [1, 1] Position [925, 280, 985, 300] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, d" "ouble, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are disc" "arded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" UseAsDAC off DACChannel "'1'" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "8.2.02" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','o" "n');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disregard Subsystem" SID "9107" Tag "discardX" Ports [] Position [738, 603, 796, 661] ShowName off AttributesFormatString "Disregard Subsystem\\nFor Generation" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Disregard Subsystem" SourceType "Xilinx Disregard Subsystem For Generation Block" infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code ge" "neration. This block can be used in combination with the Simulation Multiplexer block to provide an alternative" " simulation model for another subsystem (e.g., to provide a simulation model for a black box)." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "disregard" block_version "8.2.02" sg_icon_stat "58,58,-1,-1,darkgray,black,0,0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 ],[0 0 58 58 ],[0.1 0.1 0." "1]);\npatch([14 4 18 4 14 29 33 37 53 40 28 19 33 19 28 40 53 37 33 29 14 ],[6 16 30 44 54 54 50 54 54 41 53 44" " 30 16 7 19 6 6 10 6 6 ],[0.33 0.33 0.33]);\nplot([0 0 58 58 0 ],[0 58 58 0 0 ]);\nfprintf('','COMMENT: end ico" "n graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType From Name "From3" SID "9108" Position [440, 45, 585, 65] ShowName off CloseFcn "tagdialog Close" GotoTag "BRAM_Tx_RdAddr" TagVisibility "global" } Block { BlockType From Name "From5" SID "9109" Position [275, 80, 420, 100] ShowName off CloseFcn "tagdialog Close" GotoTag "BRAM_Rx_WrAddr" TagVisibility "global" } Block { BlockType Reference Name "ROM" SID "9110" Ports [1, 1] Position [705, 113, 760, 147] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(8:8:end)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 34 34 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');\n" } Block { BlockType Reference Name "ROM1" SID "9111" Ports [1, 1] Position [705, 158, 760, 192] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(7:8:end)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 34 34 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');\n" } Block { BlockType Reference Name "ROM2" SID "9112" Ports [1, 1] Position [705, 203, 760, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(6:8:end)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 34 34 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');\n" } Block { BlockType Reference Name "ROM3" SID "9113" Ports [1, 1] Position [705, 248, 760, 282] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(5:8:end)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 34 34 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');\n" } Block { BlockType Reference Name "ROM4" SID "9114" Ports [1, 1] Position [705, 293, 760, 327] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(4:8:end)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 34 34 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');\n" } Block { BlockType Reference Name "ROM5" SID "9115" Ports [1, 1] Position [705, 338, 760, 372] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(3:8:end)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 34 34 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');\n" } Block { BlockType Reference Name "ROM6" SID "9116" Ports [1, 1] Position [705, 383, 760, 417] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(2:8:end)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 34 34 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');\n" } Block { BlockType Reference Name "ROM7" SID "9117" Ports [1, 1] Position [705, 428, 760, 462] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(1:8:end)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 34 34 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');\n" } Block { BlockType Reference Name "Single Port RAM10" SID "9118" Ports [3, 1] Position [545, 333, 630, 377] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Single Port RAM" SourceType "Xilinx Single Port Random Access Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(3:8:end)" distributed_mem "Block RAM" write_mode "Read After Write" rst off init_reg "0" en off latency "1" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "spram" block_version "8.2.02" sg_icon_stat "85,44,3,1,white,blue,0,afe23399,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 44 44 0 ]);\npatch([28.65 37.32 43.32 49.32 55.32 43.32 34.65 28.65 ],[2" "8.66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([34.65 43.32 37.32 28.65 34.65 ],[22.66 22.6" "6 28.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([28.65 37.32 43.32 34.65 28.65 ],[16.66 16.66 22.66 22.66 1" "6.66 ],[1 1 1 ]);\npatch([34.65 55.32 49.32 43.32 37.32 28.65 34.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.6" "6 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'data');\ncolor('black');port" "_label('input',3,'we');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "Single Port RAM11" SID "9119" Ports [3, 1] Position [545, 288, 630, 332] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Single Port RAM" SourceType "Xilinx Single Port Random Access Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(4:8:end)" distributed_mem "Block RAM" write_mode "Read After Write" rst off init_reg "0" en off latency "1" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "spram" block_version "8.2.02" sg_icon_stat "85,44,3,1,white,blue,0,afe23399,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 44 44 0 ]);\npatch([28.65 37.32 43.32 49.32 55.32 43.32 34.65 28.65 ],[2" "8.66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([34.65 43.32 37.32 28.65 34.65 ],[22.66 22.6" "6 28.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([28.65 37.32 43.32 34.65 28.65 ],[16.66 16.66 22.66 22.66 1" "6.66 ],[1 1 1 ]);\npatch([34.65 55.32 49.32 43.32 37.32 28.65 34.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.6" "6 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'data');\ncolor('black');port" "_label('input',3,'we');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "Single Port RAM12" SID "9120" Ports [3, 1] Position [545, 243, 630, 287] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Single Port RAM" SourceType "Xilinx Single Port Random Access Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(5:8:end)" distributed_mem "Block RAM" write_mode "Read After Write" rst off init_reg "0" en off latency "1" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "spram" block_version "8.2.02" sg_icon_stat "85,44,3,1,white,blue,0,afe23399,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 44 44 0 ]);\npatch([28.65 37.32 43.32 49.32 55.32 43.32 34.65 28.65 ],[2" "8.66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([34.65 43.32 37.32 28.65 34.65 ],[22.66 22.6" "6 28.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([28.65 37.32 43.32 34.65 28.65 ],[16.66 16.66 22.66 22.66 1" "6.66 ],[1 1 1 ]);\npatch([34.65 55.32 49.32 43.32 37.32 28.65 34.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.6" "6 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'data');\ncolor('black');port" "_label('input',3,'we');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "Single Port RAM13" SID "9121" Ports [3, 1] Position [545, 198, 630, 242] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Single Port RAM" SourceType "Xilinx Single Port Random Access Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(6:8:end)" distributed_mem "Block RAM" write_mode "Read After Write" rst off init_reg "0" en off latency "1" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "spram" block_version "8.2.02" sg_icon_stat "85,44,3,1,white,blue,0,afe23399,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 44 44 0 ]);\npatch([28.65 37.32 43.32 49.32 55.32 43.32 34.65 28.65 ],[2" "8.66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([34.65 43.32 37.32 28.65 34.65 ],[22.66 22.6" "6 28.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([28.65 37.32 43.32 34.65 28.65 ],[16.66 16.66 22.66 22.66 1" "6.66 ],[1 1 1 ]);\npatch([34.65 55.32 49.32 43.32 37.32 28.65 34.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.6" "6 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'data');\ncolor('black');port" "_label('input',3,'we');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "Single Port RAM14" SID "9122" Ports [3, 1] Position [545, 153, 630, 197] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Single Port RAM" SourceType "Xilinx Single Port Random Access Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(7:8:end)" distributed_mem "Block RAM" write_mode "Read After Write" rst off init_reg "0" en off latency "1" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "spram" block_version "8.2.02" sg_icon_stat "85,44,3,1,white,blue,0,afe23399,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 44 44 0 ]);\npatch([28.65 37.32 43.32 49.32 55.32 43.32 34.65 28.65 ],[2" "8.66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([34.65 43.32 37.32 28.65 34.65 ],[22.66 22.6" "6 28.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([28.65 37.32 43.32 34.65 28.65 ],[16.66 16.66 22.66 22.66 1" "6.66 ],[1 1 1 ]);\npatch([34.65 55.32 49.32 43.32 37.32 28.65 34.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.6" "6 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'data');\ncolor('black');port" "_label('input',3,'we');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "Single Port RAM15" SID "9123" Ports [3, 1] Position [545, 108, 630, 152] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Single Port RAM" SourceType "Xilinx Single Port Random Access Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(8:8:end)" distributed_mem "Block RAM" write_mode "Read After Write" rst off init_reg "0" en off latency "1" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "spram" block_version "8.2.02" sg_icon_stat "85,44,3,1,white,blue,0,afe23399,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 44 44 0 ]);\npatch([28.65 37.32 43.32 49.32 55.32 43.32 34.65 28.65 ],[2" "8.66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([34.65 43.32 37.32 28.65 34.65 ],[22.66 22.6" "6 28.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([28.65 37.32 43.32 34.65 28.65 ],[16.66 16.66 22.66 22.66 1" "6.66 ],[1 1 1 ]);\npatch([34.65 55.32 49.32 43.32 37.32 28.65 34.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.6" "6 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'data');\ncolor('black');port" "_label('input',3,'we');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "Single Port RAM8" SID "9124" Ports [3, 1] Position [545, 423, 630, 467] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Single Port RAM" SourceType "Xilinx Single Port Random Access Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(1:8:end)" distributed_mem "Block RAM" write_mode "Read After Write" rst off init_reg "0" en off latency "1" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "spram" block_version "8.2.02" sg_icon_stat "85,44,3,1,white,blue,0,afe23399,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 44 44 0 ]);\npatch([28.65 37.32 43.32 49.32 55.32 43.32 34.65 28.65 ],[2" "8.66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([34.65 43.32 37.32 28.65 34.65 ],[22.66 22.6" "6 28.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([28.65 37.32 43.32 34.65 28.65 ],[16.66 16.66 22.66 22.66 1" "6.66 ],[1 1 1 ]);\npatch([34.65 55.32 49.32 43.32 37.32 28.65 34.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.6" "6 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'data');\ncolor('black');port" "_label('input',3,'we');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "Single Port RAM9" SID "9125" Ports [3, 1] Position [545, 378, 630, 422] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Single Port RAM" SourceType "Xilinx Single Port Random Access Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(2:8:end)" distributed_mem "Block RAM" write_mode "Read After Write" rst off init_reg "0" en off latency "1" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "spram" block_version "8.2.02" sg_icon_stat "85,44,3,1,white,blue,0,afe23399,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 85 85 0 0 ],[0 0 44 44 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 85 85 0 0 ],[0 0 44 44 0 ]);\npatch([28.65 37.32 43.32 49.32 55.32 43.32 34.65 28.65 ],[2" "8.66 28.66 34.66 28.66 34.66 34.66 34.66 28.66 ],[1 1 1 ]);\npatch([34.65 43.32 37.32 28.65 34.65 ],[22.66 22.6" "6 28.66 28.66 22.66 ],[0.931 0.946 0.973 ]);\npatch([28.65 37.32 43.32 34.65 28.65 ],[16.66 16.66 22.66 22.66 1" "6.66 ],[1 1 1 ]);\npatch([34.65 55.32 49.32 43.32 37.32 28.65 34.65 ],[10.66 10.66 16.66 10.66 16.66 16.66 10.6" "6 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'data');\ncolor('black');port" "_label('input',3,'we');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "WEn0" SID "9126" Ports [1, 1] Position [235, 451, 275, 469] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "WEn1" SID "9127" Ports [1, 1] Position [235, 406, 275, 424] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "WEn2" SID "9128" Ports [1, 1] Position [235, 361, 275, 379] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "WEn3" SID "9129" Ports [1, 1] Position [235, 316, 275, 334] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "WEn4" SID "9130" Ports [1, 1] Position [235, 271, 275, 289] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "4" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "WEn5" SID "9131" Ports [1, 1] Position [235, 226, 275, 244] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "WEn6" SID "9132" Ports [1, 1] Position [235, 181, 275, 199] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "6" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "WEn7" SID "9133" Ports [1, 1] Position [235, 136, 275, 154] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "7" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "WEnIn" SID "9134" Ports [1, 1] Position [90, 180, 155, 200] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx" " fixed point type.

Hardware notes: In hardware these blocks become top level input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off UseAsADC off ADCChannel "'1'" hdl_port "on" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "8.2.02" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Data" SID "9135" Position [1030, 283, 1060, 297] IconDisplay "Port number" } Line { SrcBlock "DataIn" SrcPort 1 Points [140, 0] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 45] DstBlock "Byte0" DstPort 1 } Branch { DstBlock "Byte1" DstPort 1 } } Branch { DstBlock "Byte2" DstPort 1 } } Branch { DstBlock "Byte3" DstPort 1 } } Branch { DstBlock "Byte4" DstPort 1 } } Branch { DstBlock "Byte5" DstPort 1 } } Branch { DstBlock "Byte6" DstPort 1 } } Branch { DstBlock "Byte7" DstPort 1 } } Line { SrcBlock "AddrIn" SrcPort 1 Points [0, 0] DstBlock "Byte8" DstPort 1 } Line { SrcBlock "ROM" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "ROM1" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "ROM2" SrcPort 1 DstBlock "Concat" DstPort 3 } Line { SrcBlock "ROM3" SrcPort 1 DstBlock "Concat" DstPort 4 } Line { SrcBlock "ROM4" SrcPort 1 DstBlock "Concat" DstPort 5 } Line { SrcBlock "ROM5" SrcPort 1 DstBlock "Concat" DstPort 6 } Line { SrcBlock "ROM6" SrcPort 1 DstBlock "Concat" DstPort 7 } Line { SrcBlock "ROM7" SrcPort 1 DstBlock "Concat" DstPort 8 } Line { SrcBlock "Byte7" SrcPort 1 DstBlock "Single Port RAM15" DstPort 2 } Line { SrcBlock "Byte6" SrcPort 1 DstBlock "Single Port RAM14" DstPort 2 } Line { SrcBlock "Byte5" SrcPort 1 DstBlock "Single Port RAM13" DstPort 2 } Line { SrcBlock "Byte4" SrcPort 1 DstBlock "Single Port RAM12" DstPort 2 } Line { SrcBlock "Byte3" SrcPort 1 DstBlock "Single Port RAM11" DstPort 2 } Line { SrcBlock "Byte2" SrcPort 1 DstBlock "Single Port RAM10" DstPort 2 } Line { SrcBlock "Byte1" SrcPort 1 DstBlock "Single Port RAM9" DstPort 2 } Line { SrcBlock "Byte0" SrcPort 1 DstBlock "Single Port RAM8" DstPort 2 } Line { SrcBlock "WEn0" SrcPort 1 DstBlock "Single Port RAM8" DstPort 3 } Line { SrcBlock "WEn1" SrcPort 1 DstBlock "Single Port RAM9" DstPort 3 } Line { SrcBlock "WEn2" SrcPort 1 DstBlock "Single Port RAM10" DstPort 3 } Line { SrcBlock "WEn3" SrcPort 1 DstBlock "Single Port RAM11" DstPort 3 } Line { SrcBlock "WEn4" SrcPort 1 DstBlock "Single Port RAM12" DstPort 3 } Line { SrcBlock "WEn5" SrcPort 1 DstBlock "Single Port RAM13" DstPort 3 } Line { SrcBlock "WEn6" SrcPort 1 DstBlock "Single Port RAM14" DstPort 3 } Line { SrcBlock "WEn7" SrcPort 1 DstBlock "Single Port RAM15" DstPort 3 } Line { SrcBlock "WEnIn" SrcPort 1 Points [40, 0] Branch { DstBlock "WEn6" DstPort 1 } Branch { Points [0, -45] DstBlock "WEn7" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "WEn5" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "WEn4" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "WEn3" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "WEn2" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "WEn1" DstPort 1 } Branch { Points [0, 45] DstBlock "WEn0" DstPort 1 } } } } } } } Line { SrcBlock "WEn" SrcPort 1 Points [0, 0] DstBlock "WEnIn" DstPort 1 } Line { SrcBlock "BRAM_Dout" SrcPort 1 DstBlock "DataIn" DstPort 1 } Line { SrcBlock "Addr" SrcPort 1 DstBlock "AddrIn" DstPort 1 } Line { SrcBlock "Concat" SrcPort 1 DstBlock "DataOut" DstPort 1 } Line { SrcBlock "DataOut" SrcPort 1 Points [0, 0] DstBlock "Data" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 Points [55, 0; 0, 25] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 45] Branch { DstBlock "Single Port RAM9" DstPort 1 } Branch { Points [0, 45] DstBlock "Single Port RAM8" DstPort 1 } } Branch { DstBlock "Single Port RAM10" DstPort 1 } } Branch { DstBlock "Single Port RAM11" DstPort 1 } } Branch { DstBlock "Single Port RAM12" DstPort 1 } } Branch { DstBlock "Single Port RAM13" DstPort 1 } } Branch { DstBlock "Single Port RAM14" DstPort 1 } } Branch { DstBlock "Single Port RAM15" DstPort 1 } } Line { SrcBlock "From3" SrcPort 1 Points [80, 0; 0, 75] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 45] Branch { Points [0, 45] Branch { DstBlock "ROM6" DstPort 1 } Branch { Points [0, 45] DstBlock "ROM7" DstPort 1 } } Branch { DstBlock "ROM5" DstPort 1 } } Branch { DstBlock "ROM4" DstPort 1 } } Branch { Points [0, 0] DstBlock "ROM3" DstPort 1 } } Branch { DstBlock "ROM2" DstPort 1 } } Branch { DstBlock "ROM1" DstPort 1 } } Branch { DstBlock "ROM" DstPort 1 } } } } Block { BlockType SubSystem Name "Pkt Buffer\nAddressing" SID "9136" Ports [0, 2] Position [90, 381, 170, 439] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Pkt Buffer\nAddressing" Location [202, 446, 707, 766] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "111" Block { BlockType Reference Name "16b0 " SID "9137" Ports [0, 1] Position [435, 289, 465, 311] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "16" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "8.2.02" sg_icon_stat "30,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[" "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 1" "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33" " 8.33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]," "[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "3b0 " SID "9138" Ports [0, 1] Position [435, 349, 465, 371] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "8.2.02" sg_icon_stat "30,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 22 22 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 22 22 0 ]);\npatch([8.325 12.66 15.66 18.66 21.66 15.66 11.325 8.325 ],[" "14.33 14.33 17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([11.325 15.66 12.66 8.325 11.325 ],[11.33 1" "1.33 14.33 14.33 11.33 ],[0.931 0.946 0.973 ]);\npatch([8.325 12.66 15.66 11.325 8.325 ],[8.33 8.33 11.33 11.33" " 8.33 ],[1 1 1 ]);\npatch([11.325 21.66 18.66 15.66 12.66 8.325 11.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ]," "[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncol" "or('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat3" SID "9139" Ports [3, 1] Position [560, 389, 590, 481] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary poi" "nt at zero." num_inputs "3" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.02" sg_icon_stat "30,92,3,1,white,blue,0,61ef8218,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 92 92 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 92 92 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[50.44 " "50.44 54.44 50.44 54.44 54.44 54.44 50.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[46.44 46.44 50.44 5" "0.44 46.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[42.44 42.44 46.44 46.44 42.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[38.44 38.44 42.44 38.44 42.44 42.44 38.44 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'hi');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('\\fontsize{20}\\" "}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Concat4" SID "9140" Ports [3, 1] Position [560, 284, 590, 376] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary poi" "nt at zero." num_inputs "3" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.02" sg_icon_stat "30,92,3,1,white,blue,0,61ef8218,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 92 92 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 92 92 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[50.44 " "50.44 54.44 50.44 54.44 54.44 54.44 50.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[46.44 46.44 50.44 5" "0.44 46.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[42.44 42.44 46.44 46.44 42.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[38.44 38.44 42.44 38.44 42.44 42.44 38.44 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'hi');\n\ncolor('black');port_label('input',3,'lo');\n\ncolor('black');disp('\\fontsize{20}\\" "}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Rx Word Addr Generation" SID "9141" Ports [0, 1] Position [315, 416, 405, 454] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Rx Word Addr Generation" Location [372, 735, 1505, 964] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "2LSB+8" SID "9142" Ports [1, 1] Position [290, 343, 330, 357] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.5" "5 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "5LSB+8" SID "9143" Ports [1, 1] Position [290, 278, 330, 292] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.5" "5 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB " SID "9144" Ports [1, 1] Position [405, 308, 445, 322] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.5" "5 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat7" SID "9145" Ports [2, 1] Position [490, 335, 520, 395] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at z" "ero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.02" sg_icon_stat "30,60,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 60 60 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[34.44 34.44 38.4" "4 34.44 38.44 38.44 38.44 34.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[30.44 30.44 34.44 34.44 30.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[26.44 26.44 30.44 30.44 26.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[22.44 22.44 26.44 22.44 26.44 26.44 22.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi" "');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat8" SID "9146" Ports [2, 1] Position [490, 270, 520, 330] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at z" "ero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.02" sg_icon_stat "30,60,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 60 60 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[34.44 34.44 38.4" "4 34.44 38.44 38.44 38.44 34.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[30.44 30.44 34.44 34.44 30.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[26.44 26.44 30.44 30.44 26.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[22.44 22.44 26.44 22.44 26.44 26.44 22.44 ],[0.931 0.946 0.973 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi" "');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType From Name "From10" SID "9147" Position [55, 340, 200, 360] ShowName off CloseFcn "tagdialog Close" GotoTag "regTxRx_PktBuffOffsets" TagVisibility "global" } Block { BlockType From Name "From4" SID "9148" Position [215, 240, 360, 260] ShowName off CloseFcn "tagdialog Close" GotoTag "regTxRx_BigPktBufMode" TagVisibility "global" } Block { BlockType From Name "From9" SID "9149" Position [235, 371, 360, 389] ShowName off CloseFcn "tagdialog Close" GotoTag "BRAM_Rx_WrAddr" TagVisibility "global" } Block { BlockType Reference Name "Mux1" SID "9150" Ports [3, 1] Position [570, 257, 600, 343] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "8.2.01" sg_icon_stat "30,86,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 12.2857 73.7143 86 0 ],[0." "77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 12.2857 73.7143 86 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6" ".1 ],[47.44 47.44 51.44 47.44 51.44 51.44 51.44 47.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[43.44 43.4" "4 47.44 47.44 43.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[39.44 39.44 43.44 43.44 39.44 ],[" "1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[35.44 35.44 39.44 35.44 39.44 39.44 35.44 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');" "\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Word Addr" SID "9151" Position [735, 293, 765, 307] IconDisplay "Port number" } Line { SrcBlock "Concat8" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Concat7" SrcPort 1 Points [20, 0; 0, -35] DstBlock "Mux1" DstPort 3 } Line { SrcBlock "5LSB+8" SrcPort 1 DstBlock "Concat8" DstPort 1 } Line { SrcBlock "8LSB " SrcPort 1 DstBlock "Concat8" DstPort 2 } Line { SrcBlock "From10" SrcPort 1 Points [40, 0] Branch { Points [0, -65] DstBlock "5LSB+8" DstPort 1 } Branch { DstBlock "2LSB+8" DstPort 1 } } Line { SrcBlock "2LSB+8" SrcPort 1 DstBlock "Concat7" DstPort 1 } Line { SrcBlock "From9" SrcPort 1 Points [10, 0] Branch { Points [0, -65] DstBlock "8LSB " DstPort 1 } Branch { DstBlock "Concat7" DstPort 2 } } Line { SrcBlock "From4" SrcPort 1 Points [190, 0] DstBlock "Mux1" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Word Addr" DstPort 1 } Annotation { Name "Supports two modes for dividing the big PLB BRAM packet buffer:\n\nBigPktMode = 1 uses 16KB sub-buffers " "(4 buffers in 64KB)\nBigPktMode = 0 uses 2KB sub-buffers (32 buffers in 64KB)" Position [306, 206] } } } Block { BlockType SubSystem Name "Tx Word Addr Generation" SID "9152" Ports [0, 1] Position [315, 311, 405, 349] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Tx Word Addr Generation" Location [144, 230, 1354, 615] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "5LSB" SID "9153" Ports [1, 1] Position [675, 548, 715, 562] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "5" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.5" "5 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat1" SID "9154" Ports [2, 1] Position [720, 385, 735, 465] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at z" "ero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.02" sg_icon_stat "15,80,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 80 80 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 15 15 0 0 ],[0 0 80 80 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[42.22 42.22 44.22 " "42.22 44.22 44.22 44.22 42.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[40.22 40.22 42.22 42.22 40.22 ],[0." "931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[38.22 38.22 40.22 40.22 38.22 ],[1 1 1 ]);\npatch([4.55 11" ".44 9.44 7.44 5.44 2.55 4.55 ],[36.22 36.22 38.22 36.22 38.22 38.22 36.22 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\n" "color('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType From Name "From2" SID "9155" Position [435, 646, 655, 664] ShowName off CloseFcn "tagdialog Close" GotoTag "RxAutoReply_TransHdr_BufNum" TagVisibility "global" } Block { BlockType From Name "From3" SID "9156" Position [290, 426, 495, 444] ShowName off CloseFcn "tagdialog Close" GotoTag "RxAutoReply_TransHdr_BufOveride" TagVisibility "global" } Block { BlockType From Name "From4" SID "9157" Position [440, 596, 660, 614] ShowName off CloseFcn "tagdialog Close" GotoTag "RxAutoReply_Action_BufNum" TagVisibility "global" } Block { BlockType From Name "From5" SID "9158" Position [290, 446, 495, 464] ShowName off CloseFcn "tagdialog Close" GotoTag "RxAutoReply_AutoTx" TagVisibility "global" } Block { BlockType From Name "From8" SID "9159" Position [440, 545, 585, 565] ShowName off CloseFcn "tagdialog Close" GotoTag "regTxRx_PktBuffOffsets" TagVisibility "global" } Block { BlockType Goto Name "Goto1" SID "9160" Position [970, 780, 1115, 800] ShowName off GotoTag "PreSpin_TxBufIndex" TagVisibility "global" } Block { BlockType Reference Name "Logical2" SID "9161" Ports [2, 1] Position [620, 385, 660, 425] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "40,40,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('a" "nd');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "9162" Ports [2, 1] Position [620, 425, 660, 465] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "XOR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "40,40,2,1,white,blue,0,dc21e094,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30." "55 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('x" "or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "9163" Ports [4, 1] Position [830, 480, 860, 680] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "8.2.01" sg_icon_stat "30,200,4,1,white,blue,3,58b3489d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 28.5714 171.429 200 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 28.5714 171.429 200 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1" " 6.1 ],[104.44 104.44 108.44 104.44 108.44 108.44 108.44 104.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[" "100.44 100.44 104.44 104.44 100.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[96.44 96.44 100.44" " 100.44 96.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[92.44 92.44 96.44 92.44 96.44 96.44 92" ".44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label" "('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfp" "rintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "9164" Ports [3, 1] Position [830, 690, 860, 890] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "8.2.01" sg_icon_stat "30,200,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 28.5714 171.429 200 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 28.5714 171.429 200 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1" " 6.1 ],[104.44 104.44 108.44 104.44 108.44 108.44 108.44 104.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[" "100.44 100.44 104.44 104.44 100.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[96.44 96.44 100.44" " 100.44 96.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[92.44 92.44 96.44 92.44 96.44 96.44 92" ".44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n" "color('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label" "('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "WordAddrGen" SID "9165" Ports [1, 1] Position [965, 559, 1090, 601] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "WordAddrGen" Location [837, 479, 1357, 770] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Buffer Ind" SID "9166" Position [500, 358, 530, 372] IconDisplay "Port number" } Block { BlockType Reference Name "11MSB" SID "9167" Ports [1, 1] Position [470, 493, 510, 507] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "log2(max_numBytes)-3" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "2LSB" SID "9168" Ports [1, 1] Position [595, 358, 635, 372] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "8LSB" SID "9169" Ports [1, 1] Position [710, 323, 750, 337] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output " "type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

H" "ardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 " "9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22" " 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\np" "atch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label(" "'output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat5" SID "9170" Ports [2, 1] Position [795, 350, 825, 410] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.02" sg_icon_stat "30,60,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 60 60 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[34.44 34.4" "4 38.44 34.44 38.44 38.44 38.44 34.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[30.44 30.44 34.44 34.44 " "30.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[26.44 26.44 30.44 30.44 26.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[22.44 22.44 26.44 22.44 26.44 26.44 22.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmod" "e','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat6" SID "9171" Ports [2, 1] Position [795, 285, 825, 345] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point " "at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.02" sg_icon_stat "30,60,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 60 60 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 60 60 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[34.44 34.4" "4 38.44 34.44 38.44 38.44 38.44 34.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[30.44 30.44 34.44 34.44 " "30.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[26.44 26.44 30.44 30.44 26.44 ],[1 1 1 ]);\np" "atch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[22.44 22.44 26.44 22.44 26.44 26.44 22.44 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmod" "e','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "9172" Ports [1, 1] Position [285, 367, 315, 383] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert3" SID "9173" Ports [1, 1] Position [285, 387, 315, 403] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "9174" Ports [1, 1] Position [285, 407, 315, 423] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do no" "t." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "30,16,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 16 16 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 16 16 0 ]);\npatch([10.55 13.44 15.44 17.44 19.44 15.44 12.55 10.55 ],[10.22" " 10.22 12.22 10.22 12.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([12.55 15.44 13.44 10.55 12.55 ],[8.22 8.22 10.22" " 10.22 8.22 ],[0.931 0.946 0.973 ]);\npatch([10.55 13.44 15.44 12.55 10.55 ],[6.22 6.22 8.22 8.22 6.22 ],[1 1 1 " "]);\npatch([12.55 19.44 17.44 15.44 13.44 10.55 12.55 ],[4.22 4.22 6.22 4.22 6.22 6.22 4.22 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_" "label('output',1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "9175" Position [290, 455, 405, 475] ShowName off CloseFcn "tagdialog Close" GotoTag "BRAM_Tx_RdAddr" TagVisibility "global" } Block { BlockType From Name "From5" SID "9176" Position [70, 365, 215, 385] ShowName off CloseFcn "tagdialog Close" GotoTag "Tx_RandomPayloadByte_valid" TagVisibility "global" } Block { BlockType From Name "From6" SID "9177" Position [70, 385, 215, 405] ShowName off CloseFcn "tagdialog Close" GotoTag "regTx_CaptureRandomPayload" TagVisibility "global" } Block { BlockType From Name "From7" SID "9178" Position [545, 240, 690, 260] ShowName off CloseFcn "tagdialog Close" GotoTag "regTxRx_BigPktBufMode" TagVisibility "global" } Block { BlockType From Name "From8" SID "9179" Position [70, 405, 215, 425] ShowName off CloseFcn "tagdialog Close" GotoTag "regTx_RandomPayload" TagVisibility "global" } Block { BlockType From Name "From9" SID "9180" Position [205, 490, 410, 510] ShowName off CloseFcn "tagdialog Close" GotoTag "Tx_RandomPayloadByte_addr" TagVisibility "global" } Block { BlockType Reference Name "Logical1" SID "9181" Ports [3, 1] Position [365, 363, 410, 427] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.3" sg_icon_stat "45,64,3,1,white,blue,0,98d76266,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 64 64 0 ],[0.77 0.82" " 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 64 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[38.66 3" "8.66 44.66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[32.66 32.66 38.66 " "38.66 32.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32.66 32.66 26.66 ],[1 1" " 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 26.66 20.66 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor" "('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "9182" Ports [3, 1] Position [885, 215, 915, 415] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "8.2.01" sg_icon_stat "30,200,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 28.5714 171.429 200 0 " "],[0.77 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 28.5714 171.429 200 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.8" "8 10.1 6.1 ],[104.44 104.44 108.44 104.44 108.44 108.44 108.44 104.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 " "10.1 ],[100.44 100.44 104.44 104.44 100.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[96.44 96" ".44 100.44 100.44 96.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[92.44 92.44 96.44 92.44 96" ".44 96.44 92.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('bl" "ack');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end ico" "n text');" } Block { BlockType Reference Name "Mux1" SID "9183" Ports [3, 1] Position [585, 412, 610, 518] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "8.2.01" sg_icon_stat "25,106,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 15.1429 90.8571 106 0 " "],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 15.1429 90.8571 106 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12." "66 8.325 5.325 ],[56.33 56.33 59.33 56.33 59.33 59.33 59.33 56.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8." "325 ],[53.33 53.33 56.33 56.33 53.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[50.33 50.3" "3 53.33 53.33 50.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[47.33 47.33 50.33 47.33 50." "33 50.33 47.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i" "con text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('bla" "ck');port_label('input',3,'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon" " text');" } Block { BlockType Outport Name "Word Addr" SID "9184" Position [990, 308, 1020, 322] IconDisplay "Port number" } Line { SrcBlock "From7" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 Points [55, 0; 0, -70; 10, 0] Branch { DstBlock "Concat5" DstPort 2 } Branch { Points [0, -65] DstBlock "8LSB" DstPort 1 } } Line { SrcBlock "2LSB" SrcPort 1 DstBlock "Concat5" DstPort 1 } Line { SrcBlock "Buffer Ind" SrcPort 1 Points [15, 0] Branch { Points [0, -65] DstBlock "Concat6" DstPort 1 } Branch { DstBlock "2LSB" DstPort 1 } } Line { SrcBlock "8LSB" SrcPort 1 DstBlock "Concat6" DstPort 2 } Line { SrcBlock "Concat5" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Concat6" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Word Addr" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Convert4" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Convert4" SrcPort 1 DstBlock "Logical1" DstPort 3 } Line { SrcBlock "From9" SrcPort 1 DstBlock "11MSB" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 Points [20, 0; 0, 35] DstBlock "Mux1" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "11MSB" SrcPort 1 DstBlock "Mux1" DstPort 3 } Annotation { Name "Supports two modes for dividing the big PLB BRAM packet buffer:\n\nBigPktMode = 1 uses 16KB sub-buffe" "rs (4 buffers in 64KB)\nBigPktMode = 0 uses 2KB sub-buffers (32 buffers in 64KB)" Position [776, 171] } Annotation { Name "When capturing a random payload, the random bytes are written to the BRAM.\nThe write address is gene" "rated in the Tx PHY (derived from the same signal used\nto generate read addresses when not capturing payloads)," " but is delayed to\naccount for the LFSR latency. The BRAM byte-enables are generated in the backend\nof the Rx " "pipeline, also derived from the Tx read address (again, only when capturing\nradnom payloads). In every case, he" "aders are read (not written) by the Tx PHY." Position [330, 593] } } } Block { BlockType Outport Name "Word Addr" SID "9185" Position [1240, 573, 1270, 587] IconDisplay "Port number" } Line { SrcBlock "From3" SrcPort 1 Points [100, 0] Branch { DstBlock "Logical3" DstPort 1 } Branch { Points [0, -20] DstBlock "Logical2" DstPort 2 } } Line { SrcBlock "From5" SrcPort 1 Points [95, 0] Branch { DstBlock "Logical3" DstPort 2 } Branch { Points [0, -60] DstBlock "Logical2" DstPort 1 } Branch { Points [0, 270] DstBlock "Mux2" DstPort 1 } } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Concat1" DstPort 1 } Line { SrcBlock "From8" SrcPort 1 DstBlock "5LSB" DstPort 1 } Line { SrcBlock "5LSB" SrcPort 1 Points [70, 0] Branch { DstBlock "Mux1" DstPort 2 } Branch { Points [0, 235] DstBlock "Mux2" DstPort 2 } } Line { SrcBlock "From4" SrcPort 1 Points [120, 0] Branch { DstBlock "Mux1" DstPort 3 } Branch { Points [0, 250] DstBlock "Mux2" DstPort 3 } } Line { SrcBlock "From2" SrcPort 1 DstBlock "Mux1" DstPort 4 } Line { SrcBlock "Concat1" SrcPort 1 Points [15, 0; 0, 80] DstBlock "Mux1" DstPort 1 } Line { SrcBlock "WordAddrGen" SrcPort 1 DstBlock "Word Addr" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { Labels [0, 0] SrcBlock "Mux1" SrcPort 1 DstBlock "WordAddrGen" DstPort 1 } Annotation { Name "The Tx Pkt Buf number can come from three places:\n-User code, via the PktBuffOffsets register (the \"ol" "d\" flow)\n-The autoReply actionID, specifying a template pktBuffer\n-The autoReply header translator, specifying " "a potentially different \n buffer for just the header bytes.\n\nIn a single pkt Tx event, the buffer selection i" "s either:\n-Software-only, written to the register and cosntant throughout the Tx\n or\n-Hardware-only, using th" "e actionID buffer number except where overridden\n by the header translator" Position [180, 310] HorizontalAlignment "left" } Annotation { Name "Truth table:\nx = AutoReply triggered this transmission\ny = Header translator should be used for this b" "yte\nz = 2-bit mux select\n\nx y z\n0 0 00 (no autoTx; use the register)\n0 1 x (invalid inputs - should never occ" "ur)\n1 0 01 (autoTx, but not a translated header byte)\n1 1 10 (autoTx and translated header byte)" Position [621, 311] HorizontalAlignment "left" } } } Block { BlockType Outport Name "Tx_RdAddr" SID "9186" Position [660, 323, 690, 337] IconDisplay "Port number" } Block { BlockType Outport Name "Rx_WrAddr" SID "9187" Position [660, 428, 690, 442] Port "2" IconDisplay "Port number" } Line { SrcBlock "3b0 " SrcPort 1 Points [40, 0] Branch { DstBlock "Concat4" DstPort 3 } Branch { Points [0, 105] DstBlock "Concat3" DstPort 3 } } Line { SrcBlock "16b0 " SrcPort 1 Points [45, 0] Branch { DstBlock "Concat4" DstPort 1 } Branch { Points [0, 105] DstBlock "Concat3" DstPort 1 } } Line { SrcBlock "Concat4" SrcPort 1 DstBlock "Tx_RdAddr" DstPort 1 } Line { SrcBlock "Rx Word Addr Generation" SrcPort 1 DstBlock "Concat3" DstPort 2 } Line { SrcBlock "Concat3" SrcPort 1 DstBlock "Rx_WrAddr" DstPort 1 } Line { SrcBlock "Tx Word Addr Generation" SrcPort 1 DstBlock "Concat4" DstPort 2 } Annotation { Name "Create a byte addresses, required by the BRAM interface.\nThe bottom 3 LSB are always zero, since " "each access\nhas to be aligned to a 64-bit word." Position [559, 539] } } } Block { BlockType SubSystem Name "SIM ONLY!\nFlexBER Pkt Buffer" SID "9188" Ports [] Position [620, 237, 725, 333] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "SIM ONLY!\nFlexBER Pkt Buffer" Location [160, 70, 1918, 1152] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "3LSB" SID "9189" Ports [1, 1] Position [925, 95, 970, 115] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "3" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "45,20,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 20 20 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 20 20 0 ]);\npatch([17.55 20.44 22.44 24.44 26.44 22.44 19.55 17.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([19.55 22.44 20.44 17.55 19.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.931 0.946 0.973 ]);\npatch([17.55 20.44 22.44 19.55 17.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([19.55 26.44 24.44 22.44 20.44 17.55 19.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931" " 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('" "black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte0" SID "9190" Ports [1, 1] Position [925, 376, 965, 394] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte1" SID "9191" Ports [1, 1] Position [925, 341, 965, 359] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte2" SID "9192" Ports [1, 1] Position [925, 306, 965, 324] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte3" SID "9193" Ports [1, 1] Position [925, 271, 965, 289] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte4" SID "9194" Ports [1, 1] Position [925, 236, 965, 254] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "32" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte5" SID "9195" Ports [1, 1] Position [925, 201, 965, 219] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "40" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte6" SID "9196" Ports [1, 1] Position [925, 166, 965, 184] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "48" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Byte7" SID "9197" Ports [1, 1] Position [925, 131, 965, 149] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

" "

Hardware notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "56" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,442,407" block_type "slice" block_version "8.2.02" sg_icon_stat "40,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 18 18 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[1" "1.22 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[9.22 9.22 " "11.22 11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[7.22 7.22 9.22 9.22 7.22 ],[" "1 1 1 ]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black" "');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "9198" Ports [8, 1] Position [650, 115, 700, 480] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary poi" "nt at zero." num_inputs "8" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.02" sg_icon_stat "50,365,8,1,white,blue,0,6fe74153,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 365 365 0 ],[0.77" " 0.82 0.91 ]);\nplot([0 50 50 0 0 ],[0 0 365 365 0 ]);\npatch([9.425 19.54 26.54 33.54 40.54 26.54 16.425 9.425" " ],[189.77 189.77 196.77 189.77 196.77 196.77 196.77 189.77 ],[1 1 1 ]);\npatch([16.425 26.54 19.54 9.425 16.42" "5 ],[182.77 182.77 189.77 189.77 182.77 ],[0.931 0.946 0.973 ]);\npatch([9.425 19.54 26.54 16.425 9.425 ],[175." "77 175.77 182.77 182.77 175.77 ],[1 1 1 ]);\npatch([16.425 40.54 33.54 26.54 19.54 9.425 16.425 ],[168.77 168.7" "7 175.77 168.77 175.77 175.77 168.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprin" "tf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\n\n\n\n\n\n\ncolor('black');port" "_label('input',8,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\nfprintf('','COMMENT: end i" "con text');\n" } Block { BlockType Reference Name "Disregard Subsystem" SID "9199" Tag "discardX" Ports [] Position [608, 533, 666, 591] ShowName off AttributesFormatString "Disregard Subsystem\\nFor Generation" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Disregard Subsystem" SourceType "Xilinx Disregard Subsystem For Generation Block" infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code ge" "neration. This block can be used in combination with the Simulation Multiplexer block to provide an alternative" " simulation model for another subsystem (e.g., to provide a simulation model for a black box)." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "disregard" block_version "8.2.02" sg_icon_stat "58,58,-1,-1,darkgray,black,0,0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 ],[0 0 58 58 ],[0.1 0.1 0." "1]);\npatch([14 4 18 4 14 29 33 37 53 40 28 19 33 19 28 40 53 37 33 29 14 ],[6 16 30 44 54 54 50 54 54 41 53 44" " 30 16 7 19 6 6 10 6 6 ],[0.33 0.33 0.33]);\nplot([0 0 58 58 0 ],[0 58 58 0 0 ]);\nfprintf('','COMMENT: end ico" "n graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample" SID "9200" Ports [1, 1] Position [1195, 229, 1230, 261] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost i" "n hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,356,303" block_type "dsamp" block_version "8.2.02" sg_icon_stat "35,32,1,1,white,blue,0,80c3f0cd,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 32 32 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 32 32 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 " "20.44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 2" "0.44 16.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 " "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp(' \\newline{\\fontsize{14pt}\\bf\\downarrow}2','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From3" SID "9201" Position [630, 65, 830, 85] ShowName off CloseFcn "tagdialog Close" GotoTag "FlexBER_BRAM_Rx_ByteWrAddr" TagVisibility "global" } Block { BlockType From Name "From5" SID "9202" Position [310, 130, 455, 150] ShowName off CloseFcn "tagdialog Close" GotoTag "BRAM_Rx_WrAddr" TagVisibility "global" } Block { BlockType Goto Name "Goto3" SID "9203" Position [1275, 235, 1460, 255] ShowName off GotoTag "FlexBER_TxPktBuffBtyte_SIM" TagVisibility "global" } Block { BlockType Reference Name "Mux1" SID "9204" Ports [9, 1] Position [1115, 84, 1145, 406] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "8" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "8.2.02" sg_icon_stat "30,322,9,1,white,blue,3,9717d9a5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 46 276 322 0 ],[0.7" "7 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 46 276 322 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[" "165.44 165.44 169.44 165.44 169.44 169.44 169.44 165.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[161.4" "4 161.44 165.44 165.44 161.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[157.44 157.44 161.44" " 161.44 157.44 ],[1 1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[153.44 153.44 157.44 153.44 157.44" " 157.44 153.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('b" "lack');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('inpu" "t',5,'d3');\ncolor('black');port_label('input',6,'d4');\ncolor('black');port_label('input',7,'d5');\ncolor('bla" "ck');port_label('input',8,'d6');\ncolor('black');port_label('input',9,'d7');\n\ncolor('black');disp('\\bf{}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "ROM" SID "9205" Ports [1, 1] Position [530, 123, 585, 157] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(8:8:end)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 34 34 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');\n" } Block { BlockType Reference Name "ROM1" SID "9206" Ports [1, 1] Position [530, 168, 585, 202] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(7:8:end)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 34 34 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');\n" } Block { BlockType Reference Name "ROM2" SID "9207" Ports [1, 1] Position [530, 213, 585, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(6:8:end)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 34 34 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');\n" } Block { BlockType Reference Name "ROM3" SID "9208" Ports [1, 1] Position [530, 258, 585, 292] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(5:8:end)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 34 34 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');\n" } Block { BlockType Reference Name "ROM4" SID "9209" Ports [1, 1] Position [530, 303, 585, 337] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(4:8:end)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 34 34 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');\n" } Block { BlockType Reference Name "ROM5" SID "9210" Ports [1, 1] Position [530, 348, 585, 382] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(3:8:end)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 34 34 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');\n" } Block { BlockType Reference Name "ROM6" SID "9211" Ports [1, 1] Position [530, 393, 585, 427] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(2:8:end)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 34 34 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');\n" } Block { BlockType Reference Name "ROM7" SID "9212" Ports [1, 1] Position [530, 438, 585, 472] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "RAM_init_size/8" initVector "RAM_init_values(1:8:end)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "8.2.02" sg_icon_stat "55,34,1,1,white,blue,0,bbc23d60,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 34 34 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 34 34 0 ]);\npatch([18.1 23.88 27.88 31.88 35.88 27.88 22.1 18.1 ],[21.4" "4 21.44 25.44 21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([22.1 27.88 23.88 18.1 22.1 ],[17.44 17.44 21.4" "4 21.44 17.44 ],[0.931 0.946 0.973 ]);\npatch([18.1 23.88 27.88 22.1 18.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1" " 1 1 ]);\npatch([22.1 35.88 31.88 27.88 23.88 18.1 22.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'addr');\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon t" "ext');\n" } Block { BlockType Reference Name "Register" SID "9213" Ports [1, 1] Position [1020, 89, 1060, 121] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "8.2.02" sg_icon_stat "40,32,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 32 32 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 32 32 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[20.4" "4 20.44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[16.44 16.44 20.4" "4 20.44 16.44 ],[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1" " 1 1 ]);\npatch([15.1 28.88 24.88 20.88 16.88 11.1 15.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946" " 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');" "port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Line { SrcBlock "From5" SrcPort 1 Points [35, 0] Branch { DstBlock "ROM" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "ROM1" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "ROM2" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "ROM3" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "ROM4" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "ROM5" DstPort 1 } Branch { Points [0, 45] Branch { DstBlock "ROM6" DstPort 1 } Branch { Points [0, 45] DstBlock "ROM7" DstPort 1 } } } } } } } } Line { SrcBlock "ROM7" SrcPort 1 DstBlock "Concat" DstPort 8 } Line { SrcBlock "ROM6" SrcPort 1 DstBlock "Concat" DstPort 7 } Line { SrcBlock "ROM5" SrcPort 1 DstBlock "Concat" DstPort 6 } Line { SrcBlock "ROM4" SrcPort 1 DstBlock "Concat" DstPort 5 } Line { SrcBlock "ROM3" SrcPort 1 DstBlock "Concat" DstPort 4 } Line { SrcBlock "ROM2" SrcPort 1 DstBlock "Concat" DstPort 3 } Line { SrcBlock "ROM1" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "ROM" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "3LSB" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Byte7" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Byte6" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Byte5" SrcPort 1 DstBlock "Mux1" DstPort 4 } Line { SrcBlock "Byte4" SrcPort 1 DstBlock "Mux1" DstPort 5 } Line { SrcBlock "Byte3" SrcPort 1 DstBlock "Mux1" DstPort 6 } Line { SrcBlock "Byte2" SrcPort 1 DstBlock "Mux1" DstPort 7 } Line { SrcBlock "Byte1" SrcPort 1 DstBlock "Mux1" DstPort 8 } Line { SrcBlock "Byte0" SrcPort 1 DstBlock "Mux1" DstPort 9 } Line { SrcBlock "Concat" SrcPort 1 Points [130, 0; 0, -160; 30, 0] Branch { DstBlock "Byte7" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "Byte6" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "Byte5" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "Byte4" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "Byte3" DstPort 1 } Branch { Points [0, 35] Branch { DstBlock "Byte2" DstPort 1 } Branch { Points [0, 35] Branch { Points [0, 35] DstBlock "Byte0" DstPort 1 } Branch { DstBlock "Byte1" DstPort 1 } } } } } } } } Line { SrcBlock "Register" SrcPort 1 DstBlock "Mux1" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 Points [35, 0; 0, 30] DstBlock "3LSB" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Annotation { Name "This is a simulation-only block. It is required since in simulation\nthe Tx and Rx subsystems are " "active simultaneously. In hardware\nthey aren't, so flexBER mode in the Rx actually uses some logic\nin the Tx " "pkt buffer control/byte demuxing. This block allows the\nsame behavior to work in simulation but needn't be inc" "luded in HW." Position [637, 661] } } } Line { SrcBlock "PLB Pkt Buffer" SrcPort 1 DstBlock "BRAM_DataIn" DstPort 1 } Line { SrcBlock "BRAM_DataIn" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "BRAM_Reset" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 Points [45, 0] Branch { DstBlock "BRAM_Addr" DstPort 1 } Branch { Points [0, 75] DstBlock "Goto1" DstPort 1 } } Line { SrcBlock "BRAM_Dout" SrcPort 1 DstBlock "PLB Pkt Buffer" DstPort 1 } Line { SrcBlock "BRAM_WEn" SrcPort 1 DstBlock "PLB Pkt Buffer" DstPort 2 } Line { SrcBlock "BRAM_Addr" SrcPort 1 Points [70, 0; 0, -180] DstBlock "PLB Pkt Buffer" DstPort 3 } Line { SrcBlock "Pkt Buffer\nAddressing" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Pkt Buffer\nAddressing" SrcPort 2 DstBlock "Mux" DstPort 3 } Line { SrcBlock "Addr Select" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "BRAM_WEn" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "BRAM_Dout" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "BRAM_En" DstPort 1 } } } Block { BlockType SubSystem Name "Workspace\nTransmitter" SID "9218" Ports [0, 4] Position [15, 223, 65, 282] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Workspace\nTransmitter" Location [202, 82, 1319, 769] Open off ModelBrowserVisibility on ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType FromWorkspace Name "From\nWorkspace" SID "9219" Position [215, 191, 275, 209] NamePlacement "alternate" ShowName off VariableName "rxAntI" SampleTime "4" Interpolate off OutputAfterFinalValue "Cyclic repetition" } Block { BlockType FromWorkspace Name "From\nWorkspace1" SID "9220" Position [215, 206, 275, 224] NamePlacement "alternate" ShowName off VariableName "rxAntQ" SampleTime "4" Interpolate off OutputAfterFinalValue "Cyclic repetition" } Block { BlockType Constant Name "RXreset" SID "9221" Position [220, 262, 250, 278] ShowName off Value "0" SampleTime "4" } Block { BlockType Outport Name "A_I" SID "9222" Position [300, 193, 330, 207] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Outport Name "A_Q" SID "9223" Position [300, 208, 330, 222] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "B_I" SID "9224" Position [300, 263, 330, 277] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "B_Q" SID "9225" Position [300, 278, 330, 292] Port "4" IconDisplay "Port number" } Line { SrcBlock "From\nWorkspace" SrcPort 1 DstBlock "A_I" DstPort 1 } Line { SrcBlock "From\nWorkspace1" SrcPort 1 DstBlock "A_Q" DstPort 1 } Line { SrcBlock "RXreset" SrcPort 1 Points [0, 0; 15, 0] Branch { DstBlock "B_I" DstPort 1 } Branch { Points [0, 15] DstBlock "B_Q" DstPort 1 } } } } Line { SrcBlock "\"Channel\"" SrcPort 1 DstBlock "OFDM Rx MIMO" DstPort 1 } Line { SrcBlock "\"Channel\"" SrcPort 2 DstBlock "OFDM Rx MIMO" DstPort 2 } Line { SrcBlock "\"Channel\"" SrcPort 3 DstBlock "OFDM Rx MIMO" DstPort 3 } Line { SrcBlock "\"Channel\"" SrcPort 4 DstBlock "OFDM Rx MIMO" DstPort 4 } Line { SrcBlock "OFDM Tx MIMO" SrcPort 1 DstBlock "\"Channel\"" DstPort 1 } Line { SrcBlock "OFDM Tx MIMO" SrcPort 2 DstBlock "\"Channel\"" DstPort 2 } Line { SrcBlock "OFDM Tx MIMO" SrcPort 3 DstBlock "\"Channel\"" DstPort 3 } Line { SrcBlock "OFDM Tx MIMO" SrcPort 4 DstBlock "\"Channel\"" DstPort 4 } Line { SrcBlock "Workspace\nTransmitter" SrcPort 1 Points [50, 0] } Line { SrcBlock "Workspace\nTransmitter" SrcPort 2 Points [50, 0] } Line { SrcBlock "Workspace\nTransmitter" SrcPort 3 Points [50, 0] } Line { SrcBlock "Workspace\nTransmitter" SrcPort 4 Points [50, 0] } } } MatData { NumRecords 1 DataRecord { Tag DataTag0 Data " %)30 . &&, 8 ( @ % \" $ ! 0 % 0 !@ $ , 0 . . 8 ( ! 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